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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
staging: fbtft: Use standard MIPI DCS command defines for ili9481
This patch makes use of the standard MIPI Display Command Set to remove
some of the magic constants found in source code.
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
authored by
Priit Laes
and committed by
Greg Kroah-Hartman
89823edc
467786c1
+17
-13
+17
-13
drivers/staging/fbtft/fb_ili9481.c
+17
-13
drivers/staging/fbtft/fb_ili9481.c
···
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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+
#include <video/mipi_display.h>
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#include "fbtft.h"
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···
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static int default_init_sequence[] = {
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/* SLP_OUT - Sleep out */
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-
-1, 0x11,
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-1, MIPI_DCS_EXIT_SLEEP_MODE,
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-2, 50,
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/* Power setting */
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-1, 0xD0, 0x07, 0x42, 0x18,
···
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/* Frame rate & inv. */
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-1, 0xC5, 0x03,
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/* Pixel format */
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-1, 0x3A, 0x55,
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-1, MIPI_DCS_SET_PIXEL_FORMAT, 0x55,
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/* Gamma */
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-1, 0xC8, 0x00, 0x32, 0x36, 0x45, 0x06, 0x16,
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0x37, 0x75, 0x77, 0x54, 0x0C, 0x00,
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/* DISP_ON */
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-1, 0x29,
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-1, MIPI_DCS_SET_DISPLAY_ON,
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-3
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};
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static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
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{
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/* column address */
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write_reg(par, 0x2a, xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
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write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
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xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
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/* Row address */
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write_reg(par, 0x2b, ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
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write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
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ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
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/* memory write */
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write_reg(par, 0x2c);
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write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
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}
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#define HFLIP 0x01
···
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{
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switch (par->info->var.rotate) {
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case 270:
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write_reg(par, 0x36, ROWxCOL | HFLIP | VFLIP | (par->bgr << 3));
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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ROWxCOL | HFLIP | VFLIP | (par->bgr << 3));
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break;
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case 180:
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write_reg(par, 0x36, VFLIP | (par->bgr << 3));
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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VFLIP | (par->bgr << 3));
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break;
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case 90:
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write_reg(par, 0x36, ROWxCOL | (par->bgr << 3));
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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ROWxCOL | (par->bgr << 3));
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break;
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default:
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write_reg(par, 0x36, HFLIP | (par->bgr << 3));
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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HFLIP | (par->bgr << 3));
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break;
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}
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