Merge tag 'usb-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB / Thunderbolt updates from Greg KH:
"Here is the big set of USB and Thunderbolt changes for 6.10-rc1.
Nothing hugely earth-shattering, just constant forward progress for
hardware support of new devices and cleanups over the drivers.

Included in here are:

- Thunderbolt / USB 4 driver updates

- typec driver updates

- dwc3 driver updates

- gadget driver updates

- uss720 driver id additions and fixes (people use USB->arallel port
devices still!)

- onboard-hub driver rename and additions for new hardware

- xhci driver updates

- other small USB driver updates and additions for quirks and api
changes

All of these have been in linux-next for a while with no reported
problems"

* tag 'usb-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits)
drm/bridge: aux-hpd-bridge: correct devm_drm_dp_hpd_bridge_add() stub
usb: fotg210: Add missing kernel doc description
usb: dwc3: core: Fix unused variable warning in core driver
usb: typec: tipd: rely on i2c_get_match_data()
usb: typec: tipd: fix event checking for tps6598x
usb: typec: tipd: fix event checking for tps25750
dt-bindings: usb: qcom,dwc3: fix interrupt max items
usb: fotg210: Use *-y instead of *-objs in Makefile
usb: phy: tegra: Replace of_gpio.h by proper one
usb: typec: ucsi: displayport: Fix potential deadlock
usb: typec: qcom-pmic-typec: split HPD bridge alloc and registration
usb: musc: Remove unused list 'buffers'
usb: dwc3: Wait unconditionally after issuing EndXfer command
usb: gadget: u_audio: Clear uac pointer when freed.
usb: gadget: u_audio: Fix race condition use of controls after free during gadget unbind.
dt-bindings: usb: dwc3: Add QDU1000 compatible
usb: core: Remove the useless struct usb_devmap which is just a bitmap
MAINTAINERS: Remove {ehci,uhci}-platform.c from ARM/VT8500 entry
USB: usb_parse_endpoint: ignore reserved bits
usb: xhci: compact 'trb_in_td()' arguments
...

+2755 -1941
+2 -1
Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-hub Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-dev
··· 5 linux-usb@vger.kernel.org 6 Description: 7 (RW) Controls whether the USB hub remains always powered 8 - during system suspend or not.
··· 5 linux-usb@vger.kernel.org 6 Description: 7 (RW) Controls whether the USB hub remains always powered 8 + during system suspend or not. This attribute is not 9 + available for non-hub devices.
+63
Documentation/devicetree/bindings/sound/xmos,xvf3500.yaml
···
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/sound/xmos,xvf3500.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: XMOS XVF3500 VocalFusion Voice Processor 8 + 9 + maintainers: 10 + - Javier Carrasco <javier.carrasco@wolfvision.net> 11 + 12 + description: 13 + The XMOS XVF3500 VocalFusion Voice Processor is a low-latency, 32-bit 14 + multicore controller for voice processing. 15 + https://www.xmos.com/xvf3500/ 16 + 17 + allOf: 18 + - $ref: /schemas/usb/usb-device.yaml# 19 + 20 + properties: 21 + compatible: 22 + const: usb20b1,0013 23 + 24 + reg: true 25 + 26 + reset-gpios: 27 + maxItems: 1 28 + 29 + vdd-supply: 30 + description: 31 + Regulator for the 1V0 supply. 32 + 33 + vddio-supply: 34 + description: 35 + Regulator for the 3V3 supply. 36 + 37 + required: 38 + - compatible 39 + - reg 40 + - reset-gpios 41 + - vdd-supply 42 + - vddio-supply 43 + 44 + additionalProperties: false 45 + 46 + examples: 47 + - | 48 + #include <dt-bindings/gpio/gpio.h> 49 + 50 + usb { 51 + #address-cells = <1>; 52 + #size-cells = <0>; 53 + 54 + voice_processor: voice-processor@1 { 55 + compatible = "usb20b1,0013"; 56 + reg = <1>; 57 + reset-gpios = <&gpio 5 GPIO_ACTIVE_LOW>; 58 + vdd-supply = <&vcc1v0>; 59 + vddio-supply = <&vcc3v3>; 60 + }; 61 + }; 62 + 63 + ...
+200
Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml
···
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: USB2 ChipIdea USB controller Common Properties 8 + 9 + maintainers: 10 + - Xu Yang <xu.yang_2@nxp.com> 11 + 12 + properties: 13 + reg: 14 + minItems: 1 15 + maxItems: 2 16 + 17 + interrupts: 18 + minItems: 1 19 + maxItems: 2 20 + 21 + clocks: 22 + minItems: 1 23 + maxItems: 3 24 + 25 + clock-names: 26 + minItems: 1 27 + maxItems: 3 28 + 29 + dr_mode: true 30 + 31 + power-domains: 32 + maxItems: 1 33 + 34 + resets: 35 + maxItems: 1 36 + 37 + reset-names: 38 + maxItems: 1 39 + 40 + "#reset-cells": 41 + const: 1 42 + 43 + phy_type: true 44 + 45 + itc-setting: 46 + description: 47 + interrupt threshold control register control, the setting should be 48 + aligned with ITC bits at register USBCMD. 49 + $ref: /schemas/types.yaml#/definitions/uint32 50 + 51 + ahb-burst-config: 52 + description: 53 + it is vendor dependent, the required value should be aligned with 54 + AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is 55 + used to change AHB burst configuration, check the chipidea spec for 56 + meaning of each value. If this property is not existed, it will use 57 + the reset value. 58 + $ref: /schemas/types.yaml#/definitions/uint32 59 + minimum: 0x0 60 + maximum: 0x7 61 + 62 + tx-burst-size-dword: 63 + description: 64 + it is vendor dependent, the tx burst size in dword (4 bytes), This 65 + register represents the maximum length of a the burst in 32-bit 66 + words while moving data from system memory to the USB bus, the value 67 + of this property will only take effect if property "ahb-burst-config" 68 + is set to 0, if this property is missing the reset default of the 69 + hardware implementation will be used. 70 + $ref: /schemas/types.yaml#/definitions/uint32 71 + minimum: 0x0 72 + maximum: 0x20 73 + 74 + rx-burst-size-dword: 75 + description: 76 + it is vendor dependent, the rx burst size in dword (4 bytes), This 77 + register represents the maximum length of a the burst in 32-bit words 78 + while moving data from the USB bus to system memory, the value of 79 + this property will only take effect if property "ahb-burst-config" 80 + is set to 0, if this property is missing the reset default of the 81 + hardware implementation will be used. 82 + $ref: /schemas/types.yaml#/definitions/uint32 83 + minimum: 0x0 84 + maximum: 0x20 85 + 86 + extcon: 87 + description: 88 + Phandles to external connector devices. First phandle should point 89 + to external connector, which provide "USB" cable events, the second 90 + should point to external connector device, which provide "USB-HOST" 91 + cable events. If one of the external connector devices is not 92 + required, empty <0> phandle should be specified. 93 + $ref: /schemas/types.yaml#/definitions/phandle-array 94 + minItems: 1 95 + items: 96 + - description: vbus extcon 97 + - description: id extcon 98 + 99 + phy-clkgate-delay-us: 100 + description: 101 + The delay time (us) between putting the PHY into low power mode and 102 + gating the PHY clock. 103 + 104 + non-zero-ttctrl-ttha: 105 + description: 106 + After setting this property, the value of register ttctrl.ttha 107 + will be 0x7f; if not, the value will be 0x0, this is the default 108 + value. It needs to be very carefully for setting this property, it 109 + is recommended that consult with your IC engineer before setting 110 + this value. On the most of chipidea platforms, the "usage_tt" flag 111 + at RTL is 0, so this property only affects siTD. 112 + 113 + If this property is not set, the max packet size is 1023 bytes, and 114 + if the total of packet size for previous transactions are more than 115 + 256 bytes, it can't accept any transactions within this frame. The 116 + use case is single transaction, but higher frame rate. 117 + 118 + If this property is set, the max packet size is 188 bytes, it can 119 + handle more transactions than above case, it can accept transactions 120 + until it considers the left room size within frame is less than 188 121 + bytes, software needs to make sure it does not send more than 90% 122 + maximum_periodic_data_per_frame. The use case is multiple 123 + transactions, but less frame rate. 124 + type: boolean 125 + 126 + mux-controls: 127 + description: 128 + The mux control for toggling host/device output of this controller. 129 + It's expected that a mux state of 0 indicates device mode and a mux 130 + state of 1 indicates host mode. 131 + maxItems: 1 132 + 133 + mux-control-names: 134 + const: usb_switch 135 + 136 + pinctrl-names: 137 + description: 138 + Names for optional pin modes in "default", "host", "device". 139 + In case of HSIC-mode, "idle" and "active" pin modes are mandatory. 140 + In this case, the "idle" state needs to pull down the data and 141 + strobe pin and the "active" state needs to pull up the strobe pin. 142 + oneOf: 143 + - items: 144 + - const: idle 145 + - const: active 146 + - items: 147 + - const: default 148 + - const: host 149 + - const: device 150 + - items: 151 + - const: default 152 + - enum: 153 + - host 154 + - device 155 + - items: 156 + - const: default 157 + 158 + pinctrl-0: 159 + maxItems: 1 160 + 161 + pinctrl-1: 162 + maxItems: 1 163 + 164 + phys: 165 + maxItems: 1 166 + 167 + phy-names: 168 + const: usb-phy 169 + 170 + vbus-supply: 171 + description: reference to the VBUS regulator. 172 + 173 + usb-phy: 174 + description: phandle for the PHY device. Use "phys" instead. 175 + maxItems: 1 176 + deprecated: true 177 + 178 + port: 179 + description: 180 + Any connector to the data bus of this controller should be modelled 181 + using the OF graph bindings specified, if the "usb-role-switch" 182 + property is used. 183 + $ref: /schemas/graph.yaml#/properties/port 184 + 185 + reset-gpios: 186 + maxItems: 1 187 + 188 + dependencies: 189 + port: [ usb-role-switch ] 190 + mux-controls: [ mux-control-names ] 191 + 192 + required: 193 + - reg 194 + - interrupts 195 + 196 + allOf: 197 + - $ref: usb-hcd.yaml# 198 + - $ref: usb-drd.yaml# 199 + 200 + additionalProperties: true
+287
Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
···
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: NXP USB2 ChipIdea USB controller 8 + 9 + maintainers: 10 + - Xu Yang <xu.yang_2@nxp.com> 11 + 12 + properties: 13 + compatible: 14 + oneOf: 15 + - enum: 16 + - fsl,imx27-usb 17 + - items: 18 + - enum: 19 + - fsl,imx23-usb 20 + - fsl,imx25-usb 21 + - fsl,imx28-usb 22 + - fsl,imx35-usb 23 + - fsl,imx50-usb 24 + - fsl,imx51-usb 25 + - fsl,imx53-usb 26 + - fsl,imx6q-usb 27 + - fsl,imx6sl-usb 28 + - fsl,imx6sx-usb 29 + - fsl,imx6ul-usb 30 + - fsl,imx7d-usb 31 + - fsl,vf610-usb 32 + - const: fsl,imx27-usb 33 + - items: 34 + - enum: 35 + - fsl,imx8dxl-usb 36 + - fsl,imx8ulp-usb 37 + - const: fsl,imx7ulp-usb 38 + - const: fsl,imx6ul-usb 39 + - items: 40 + - enum: 41 + - fsl,imx8mm-usb 42 + - fsl,imx8mn-usb 43 + - fsl,imx93-usb 44 + - const: fsl,imx7d-usb 45 + - const: fsl,imx27-usb 46 + - items: 47 + - enum: 48 + - fsl,imx6sll-usb 49 + - fsl,imx7ulp-usb 50 + - const: fsl,imx6ul-usb 51 + - const: fsl,imx27-usb 52 + 53 + reg: 54 + maxItems: 1 55 + 56 + interrupts: 57 + maxItems: 1 58 + 59 + clocks: 60 + minItems: 1 61 + maxItems: 3 62 + 63 + clock-names: 64 + minItems: 1 65 + maxItems: 3 66 + 67 + fsl,usbmisc: 68 + description: 69 + Phandler of non-core register device, with one argument that 70 + indicate usb controller index 71 + $ref: /schemas/types.yaml#/definitions/phandle-array 72 + items: 73 + - items: 74 + - description: phandle to usbmisc node 75 + - description: index of usb controller 76 + 77 + disable-over-current: 78 + type: boolean 79 + description: disable over current detect 80 + 81 + over-current-active-low: 82 + type: boolean 83 + description: over current signal polarity is active low 84 + 85 + over-current-active-high: 86 + type: boolean 87 + description: 88 + Over current signal polarity is active high. It's recommended to 89 + specify the over current polarity. 90 + 91 + power-active-high: 92 + type: boolean 93 + description: power signal polarity is active high 94 + 95 + external-vbus-divider: 96 + type: boolean 97 + description: enables off-chip resistor divider for Vbus 98 + 99 + samsung,picophy-pre-emp-curr-control: 100 + description: 101 + HS Transmitter Pre-Emphasis Current Control. This signal controls 102 + the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN 103 + pins after a J-to-K or K-to-J transition. The range is from 0x0 to 104 + 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0 105 + bits of USBNC_n_PHY_CFG1. 106 + $ref: /schemas/types.yaml#/definitions/uint32 107 + minimum: 0x0 108 + maximum: 0x3 109 + 110 + samsung,picophy-dc-vol-level-adjust: 111 + description: 112 + HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC 113 + level voltage. The range is from 0x0 to 0xf, the default value is 114 + 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1. 115 + $ref: /schemas/types.yaml#/definitions/uint32 116 + minimum: 0x0 117 + maximum: 0xf 118 + 119 + fsl,picophy-rise-fall-time-adjust: 120 + description: 121 + HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times 122 + of the high-speed transmitter waveform. It has no unit. The rise/fall 123 + time will be increased or decreased by a certain percentage relative 124 + to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%) 125 + Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1. 126 + $ref: /schemas/types.yaml#/definitions/uint32 127 + minimum: 0 128 + maximum: 3 129 + default: 1 130 + 131 + fsl,usbphy: 132 + description: phandle of usb phy that connects to the port. Use "phys" instead. 133 + $ref: /schemas/types.yaml#/definitions/phandle 134 + deprecated: true 135 + 136 + required: 137 + - compatible 138 + 139 + allOf: 140 + - $ref: chipidea,usb2-common.yaml# 141 + - if: 142 + properties: 143 + phy_type: 144 + const: hsic 145 + required: 146 + - phy_type 147 + then: 148 + properties: 149 + pinctrl-names: 150 + items: 151 + - const: idle 152 + - const: active 153 + 154 + # imx27 Soc needs three clocks 155 + - if: 156 + properties: 157 + compatible: 158 + const: fsl,imx27-usb 159 + then: 160 + properties: 161 + clocks: 162 + minItems: 3 163 + clock-names: 164 + items: 165 + - const: ipg 166 + - const: ahb 167 + - const: per 168 + 169 + # imx25 and imx35 Soc need three clocks 170 + - if: 171 + properties: 172 + compatible: 173 + contains: 174 + enum: 175 + - fsl,imx25-usb 176 + - fsl,imx35-usb 177 + then: 178 + properties: 179 + clocks: 180 + minItems: 3 181 + clock-names: 182 + items: 183 + - const: ipg 184 + - const: ahb 185 + - const: per 186 + 187 + # imx93 Soc needs two clocks 188 + - if: 189 + properties: 190 + compatible: 191 + contains: 192 + enum: 193 + - fsl,imx93-usb 194 + then: 195 + properties: 196 + clocks: 197 + minItems: 2 198 + maxItems: 2 199 + clock-names: 200 + items: 201 + - const: usb_ctrl_root 202 + - const: usb_wakeup 203 + 204 + # imx7d Soc need one clock 205 + - if: 206 + properties: 207 + compatible: 208 + items: 209 + - const: fsl,imx7d-usb 210 + - const: fsl,imx27-usb 211 + then: 212 + properties: 213 + clocks: 214 + maxItems: 1 215 + clock-names: false 216 + 217 + # other Soc need one clock 218 + - if: 219 + properties: 220 + compatible: 221 + contains: 222 + enum: 223 + - fsl,imx23-usb 224 + - fsl,imx28-usb 225 + - fsl,imx50-usb 226 + - fsl,imx51-usb 227 + - fsl,imx53-usb 228 + - fsl,imx6q-usb 229 + - fsl,imx6sl-usb 230 + - fsl,imx6sx-usb 231 + - fsl,imx6ul-usb 232 + - fsl,imx8mm-usb 233 + - fsl,imx8mn-usb 234 + - fsl,vf610-usb 235 + then: 236 + properties: 237 + clocks: 238 + maxItems: 1 239 + clock-names: false 240 + 241 + unevaluatedProperties: false 242 + 243 + examples: 244 + - | 245 + #include <dt-bindings/interrupt-controller/arm-gic.h> 246 + #include <dt-bindings/clock/imx7d-clock.h> 247 + 248 + usb@30b10000 { 249 + compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; 250 + reg = <0x30b10000 0x200>; 251 + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 252 + clocks = <&clks IMX7D_USB_CTRL_CLK>; 253 + fsl,usbphy = <&usbphynop1>; 254 + fsl,usbmisc = <&usbmisc1 0>; 255 + phy-clkgate-delay-us = <400>; 256 + }; 257 + 258 + # Example for HSIC: 259 + - | 260 + #include <dt-bindings/interrupt-controller/arm-gic.h> 261 + #include <dt-bindings/clock/imx6qdl-clock.h> 262 + 263 + usb@2184400 { 264 + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 265 + reg = <0x02184400 0x200>; 266 + interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; 267 + clocks = <&clks IMX6QDL_CLK_USBOH3>; 268 + fsl,usbphy = <&usbphynop1>; 269 + fsl,usbmisc = <&usbmisc 2>; 270 + phy_type = "hsic"; 271 + dr_mode = "host"; 272 + ahb-burst-config = <0x0>; 273 + tx-burst-size-dword = <0x10>; 274 + rx-burst-size-dword = <0x10>; 275 + pinctrl-names = "idle", "active"; 276 + pinctrl-0 = <&pinctrl_usbh2_idle>; 277 + pinctrl-1 = <&pinctrl_usbh2_active>; 278 + #address-cells = <1>; 279 + #size-cells = <0>; 280 + 281 + ethernet@1 { 282 + compatible = "usb424,9730"; 283 + reg = <1>; 284 + }; 285 + }; 286 + 287 + ...
+3 -357
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
··· 15 oneOf: 16 - enum: 17 - chipidea,usb2 18 - - fsl,imx27-usb 19 - lsi,zevio-usb 20 - nuvoton,npcm750-udc 21 - nvidia,tegra20-ehci ··· 31 - nvidia,tegra210-ehci 32 - const: nvidia,tegra30-ehci 33 - items: 34 - - enum: 35 - - fsl,imx23-usb 36 - - fsl,imx25-usb 37 - - fsl,imx28-usb 38 - - fsl,imx35-usb 39 - - fsl,imx50-usb 40 - - fsl,imx51-usb 41 - - fsl,imx53-usb 42 - - fsl,imx6q-usb 43 - - fsl,imx6sl-usb 44 - - fsl,imx6sx-usb 45 - - fsl,imx6ul-usb 46 - - fsl,imx7d-usb 47 - - fsl,vf610-usb 48 - - const: fsl,imx27-usb 49 - - items: 50 - - enum: 51 - - fsl,imx8dxl-usb 52 - - fsl,imx8ulp-usb 53 - - const: fsl,imx7ulp-usb 54 - - const: fsl,imx6ul-usb 55 - - items: 56 - - enum: 57 - - fsl,imx8mm-usb 58 - - fsl,imx8mn-usb 59 - - const: fsl,imx7d-usb 60 - - const: fsl,imx27-usb 61 - - items: 62 - - enum: 63 - - fsl,imx6sll-usb 64 - - fsl,imx7ulp-usb 65 - - const: fsl,imx6ul-usb 66 - - const: fsl,imx27-usb 67 - - items: 68 - const: xlnx,zynq-usb-2.20a 69 - const: chipidea,usb2 70 - items: ··· 38 - nuvoton,npcm845-udc 39 - const: nuvoton,npcm750-udc 40 41 - reg: 42 - minItems: 1 43 - maxItems: 2 44 - 45 - interrupts: 46 - minItems: 1 47 - maxItems: 2 48 - 49 clocks: 50 minItems: 1 51 - maxItems: 3 52 53 clock-names: 54 minItems: 1 55 - maxItems: 3 56 - 57 - dr_mode: true 58 - 59 - power-domains: 60 - maxItems: 1 61 - 62 - resets: 63 - maxItems: 1 64 - 65 - reset-names: 66 - maxItems: 1 67 - 68 - "#reset-cells": 69 - const: 1 70 - 71 - phy_type: true 72 - 73 - itc-setting: 74 - description: 75 - interrupt threshold control register control, the setting should be 76 - aligned with ITC bits at register USBCMD. 77 - $ref: /schemas/types.yaml#/definitions/uint32 78 - 79 - ahb-burst-config: 80 - description: 81 - it is vendor dependent, the required value should be aligned with 82 - AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is 83 - used to change AHB burst configuration, check the chipidea spec for 84 - meaning of each value. If this property is not existed, it will use 85 - the reset value. 86 - $ref: /schemas/types.yaml#/definitions/uint32 87 - minimum: 0x0 88 - maximum: 0x7 89 - 90 - tx-burst-size-dword: 91 - description: 92 - it is vendor dependent, the tx burst size in dword (4 bytes), This 93 - register represents the maximum length of a the burst in 32-bit 94 - words while moving data from system memory to the USB bus, the value 95 - of this property will only take effect if property "ahb-burst-config" 96 - is set to 0, if this property is missing the reset default of the 97 - hardware implementation will be used. 98 - $ref: /schemas/types.yaml#/definitions/uint32 99 - minimum: 0x0 100 - maximum: 0x20 101 - 102 - rx-burst-size-dword: 103 - description: 104 - it is vendor dependent, the rx burst size in dword (4 bytes), This 105 - register represents the maximum length of a the burst in 32-bit words 106 - while moving data from the USB bus to system memory, the value of 107 - this property will only take effect if property "ahb-burst-config" 108 - is set to 0, if this property is missing the reset default of the 109 - hardware implementation will be used. 110 - $ref: /schemas/types.yaml#/definitions/uint32 111 - minimum: 0x0 112 - maximum: 0x20 113 - 114 - extcon: 115 - description: 116 - Phandles to external connector devices. First phandle should point 117 - to external connector, which provide "USB" cable events, the second 118 - should point to external connector device, which provide "USB-HOST" 119 - cable events. If one of the external connector devices is not 120 - required, empty <0> phandle should be specified. 121 - $ref: /schemas/types.yaml#/definitions/phandle-array 122 - minItems: 1 123 - items: 124 - - description: vbus extcon 125 - - description: id extcon 126 - 127 - phy-clkgate-delay-us: 128 - description: 129 - The delay time (us) between putting the PHY into low power mode and 130 - gating the PHY clock. 131 - 132 - non-zero-ttctrl-ttha: 133 - description: 134 - After setting this property, the value of register ttctrl.ttha 135 - will be 0x7f; if not, the value will be 0x0, this is the default 136 - value. It needs to be very carefully for setting this property, it 137 - is recommended that consult with your IC engineer before setting 138 - this value. On the most of chipidea platforms, the "usage_tt" flag 139 - at RTL is 0, so this property only affects siTD. 140 - 141 - If this property is not set, the max packet size is 1023 bytes, and 142 - if the total of packet size for previous transactions are more than 143 - 256 bytes, it can't accept any transactions within this frame. The 144 - use case is single transaction, but higher frame rate. 145 - 146 - If this property is set, the max packet size is 188 bytes, it can 147 - handle more transactions than above case, it can accept transactions 148 - until it considers the left room size within frame is less than 188 149 - bytes, software needs to make sure it does not send more than 90% 150 - maximum_periodic_data_per_frame. The use case is multiple 151 - transactions, but less frame rate. 152 - type: boolean 153 - 154 - mux-controls: 155 - description: 156 - The mux control for toggling host/device output of this controller. 157 - It's expected that a mux state of 0 indicates device mode and a mux 158 - state of 1 indicates host mode. 159 - maxItems: 1 160 - 161 - mux-control-names: 162 - const: usb_switch 163 164 operating-points-v2: 165 description: A phandle to the OPP table containing the performance states. 166 $ref: /schemas/types.yaml#/definitions/phandle 167 - 168 - pinctrl-names: 169 - description: 170 - Names for optional pin modes in "default", "host", "device". 171 - In case of HSIC-mode, "idle" and "active" pin modes are mandatory. 172 - In this case, the "idle" state needs to pull down the data and 173 - strobe pin and the "active" state needs to pull up the strobe pin. 174 - oneOf: 175 - - items: 176 - - const: idle 177 - - const: active 178 - - items: 179 - - const: default 180 - - enum: 181 - - host 182 - - device 183 - - items: 184 - - const: default 185 - 186 - pinctrl-0: 187 - maxItems: 1 188 - 189 - pinctrl-1: 190 - maxItems: 1 191 - 192 - phys: 193 - maxItems: 1 194 - 195 - phy-names: 196 - const: usb-phy 197 198 phy-select: 199 description: ··· 60 - description: register offset 61 - description: phy index 62 63 - vbus-supply: 64 - description: reference to the VBUS regulator. 65 - 66 - fsl,usbmisc: 67 - description: 68 - Phandler of non-core register device, with one argument that 69 - indicate usb controller index 70 - $ref: /schemas/types.yaml#/definitions/phandle-array 71 - items: 72 - - items: 73 - - description: phandle to usbmisc node 74 - - description: index of usb controller 75 - 76 - fsl,anatop: 77 - description: phandle for the anatop node. 78 - $ref: /schemas/types.yaml#/definitions/phandle 79 - 80 - disable-over-current: 81 - type: boolean 82 - description: disable over current detect 83 - 84 - over-current-active-low: 85 - type: boolean 86 - description: over current signal polarity is active low 87 - 88 - over-current-active-high: 89 - type: boolean 90 - description: 91 - Over current signal polarity is active high. It's recommended to 92 - specify the over current polarity. 93 - 94 - power-active-high: 95 - type: boolean 96 - description: power signal polarity is active high 97 - 98 - external-vbus-divider: 99 - type: boolean 100 - description: enables off-chip resistor divider for Vbus 101 - 102 - samsung,picophy-pre-emp-curr-control: 103 - description: 104 - HS Transmitter Pre-Emphasis Current Control. This signal controls 105 - the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN 106 - pins after a J-to-K or K-to-J transition. The range is from 0x0 to 107 - 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0 108 - bits of USBNC_n_PHY_CFG1. 109 - $ref: /schemas/types.yaml#/definitions/uint32 110 - minimum: 0x0 111 - maximum: 0x3 112 - 113 - samsung,picophy-dc-vol-level-adjust: 114 - description: 115 - HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC 116 - level voltage. The range is from 0x0 to 0xf, the default value is 117 - 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1. 118 - $ref: /schemas/types.yaml#/definitions/uint32 119 - minimum: 0x0 120 - maximum: 0xf 121 - 122 - fsl,picophy-rise-fall-time-adjust: 123 - description: 124 - HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times 125 - of the high-speed transmitter waveform. It has no unit. The rise/fall 126 - time will be increased or decreased by a certain percentage relative 127 - to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%) 128 - Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1. 129 - $ref: /schemas/types.yaml#/definitions/uint32 130 - minimum: 0 131 - maximum: 3 132 - default: 1 133 - 134 - usb-phy: 135 - description: phandle for the PHY device. Use "phys" instead. 136 - maxItems: 1 137 - deprecated: true 138 - 139 - fsl,usbphy: 140 - description: phandle of usb phy that connects to the port. Use "phys" instead. 141 - $ref: /schemas/types.yaml#/definitions/phandle 142 - deprecated: true 143 - 144 nvidia,phy: 145 description: phandle of usb phy that connects to the port. Use "phys" instead. 146 $ref: /schemas/types.yaml#/definitions/phandle ··· 70 type: boolean 71 deprecated: true 72 73 - port: 74 - description: 75 - Any connector to the data bus of this controller should be modelled 76 - using the OF graph bindings specified, if the "usb-role-switch" 77 - property is used. 78 - $ref: /schemas/graph.yaml#/properties/port 79 - 80 - reset-gpios: 81 - maxItems: 1 82 - 83 ulpi: 84 type: object 85 additionalProperties: false ··· 79 type: object 80 $ref: /schemas/phy/qcom,usb-hs-phy.yaml 81 82 - dependencies: 83 - port: [ usb-role-switch ] 84 - mux-controls: [ mux-control-names ] 85 - 86 required: 87 - compatible 88 - - reg 89 - - interrupts 90 91 allOf: 92 - $ref: usb-hcd.yaml# 93 - $ref: usb-drd.yaml# 94 - - if: 95 - properties: 96 - phy_type: 97 - const: hsic 98 - required: 99 - - phy_type 100 - then: 101 - properties: 102 - pinctrl-names: 103 - items: 104 - - const: idle 105 - - const: active 106 - else: 107 - properties: 108 - pinctrl-names: 109 - minItems: 1 110 - maxItems: 2 111 - oneOf: 112 - - items: 113 - - const: default 114 - - enum: 115 - - host 116 - - device 117 - - items: 118 - - const: default 119 - - if: 120 - properties: 121 - compatible: 122 - contains: 123 - enum: 124 - - chipidea,usb2 125 - - lsi,zevio-usb 126 - - nuvoton,npcm750-udc 127 - - nvidia,tegra20-udc 128 - - nvidia,tegra30-udc 129 - - nvidia,tegra114-udc 130 - - nvidia,tegra124-udc 131 - - qcom,ci-hdrc 132 - - xlnx,zynq-usb-2.20a 133 - then: 134 - properties: 135 - fsl,usbmisc: false 136 - disable-over-current: false 137 - over-current-active-low: false 138 - over-current-active-high: false 139 - power-active-high: false 140 - external-vbus-divider: false 141 - samsung,picophy-pre-emp-curr-control: false 142 - samsung,picophy-dc-vol-level-adjust: false 143 144 unevaluatedProperties: false 145 ··· 111 phy-clkgate-delay-us = <400>; 112 mux-controls = <&usb_switch>; 113 mux-control-names = "usb_switch"; 114 - }; 115 - 116 - # Example for HSIC: 117 - - | 118 - #include <dt-bindings/interrupt-controller/arm-gic.h> 119 - #include <dt-bindings/clock/imx6qdl-clock.h> 120 - 121 - usb@2184400 { 122 - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 123 - reg = <0x02184400 0x200>; 124 - interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; 125 - clocks = <&clks IMX6QDL_CLK_USBOH3>; 126 - fsl,usbphy = <&usbphynop1>; 127 - fsl,usbmisc = <&usbmisc 2>; 128 - phy_type = "hsic"; 129 - dr_mode = "host"; 130 - ahb-burst-config = <0x0>; 131 - tx-burst-size-dword = <0x10>; 132 - rx-burst-size-dword = <0x10>; 133 - pinctrl-names = "idle", "active"; 134 - pinctrl-0 = <&pinctrl_usbh2_idle>; 135 - pinctrl-1 = <&pinctrl_usbh2_active>; 136 - #address-cells = <1>; 137 - #size-cells = <0>; 138 - 139 - ethernet@1 { 140 - compatible = "usb424,9730"; 141 - reg = <1>; 142 - }; 143 }; 144 145 ...
··· 15 oneOf: 16 - enum: 17 - chipidea,usb2 18 - lsi,zevio-usb 19 - nuvoton,npcm750-udc 20 - nvidia,tegra20-ehci ··· 32 - nvidia,tegra210-ehci 33 - const: nvidia,tegra30-ehci 34 - items: 35 - const: xlnx,zynq-usb-2.20a 36 - const: chipidea,usb2 37 - items: ··· 73 - nuvoton,npcm845-udc 74 - const: nuvoton,npcm750-udc 75 76 clocks: 77 minItems: 1 78 + maxItems: 2 79 80 clock-names: 81 minItems: 1 82 + maxItems: 2 83 84 operating-points-v2: 85 description: A phandle to the OPP table containing the performance states. 86 $ref: /schemas/types.yaml#/definitions/phandle 87 88 phy-select: 89 description: ··· 240 - description: register offset 241 - description: phy index 242 243 nvidia,phy: 244 description: phandle of usb phy that connects to the port. Use "phys" instead. 245 $ref: /schemas/types.yaml#/definitions/phandle ··· 331 type: boolean 332 deprecated: true 333 334 ulpi: 335 type: object 336 additionalProperties: false ··· 350 type: object 351 $ref: /schemas/phy/qcom,usb-hs-phy.yaml 352 353 required: 354 - compatible 355 356 allOf: 357 + - $ref: chipidea,usb2-common.yaml# 358 - $ref: usb-hcd.yaml# 359 - $ref: usb-drd.yaml# 360 361 unevaluatedProperties: false 362 ··· 436 phy-clkgate-delay-us = <400>; 437 mux-controls = <&usb_switch>; 438 mux-control-names = "usb_switch"; 439 }; 440 441 ...
-1
Documentation/devicetree/bindings/usb/cypress,hx3.yaml
··· 51 #include <dt-bindings/gpio/gpio.h> 52 53 usb { 54 - dr_mode = "host"; 55 #address-cells = <1>; 56 #size-cells = <0>; 57
··· 51 #include <dt-bindings/gpio/gpio.h> 52 53 usb { 54 #address-cells = <1>; 55 #size-cells = <0>; 56
+1
Documentation/devicetree/bindings/usb/dwc2.yaml
··· 59 - const: amcc,dwc-otg 60 - const: apm,apm82181-dwc-otg 61 - const: snps,dwc2 62 - const: st,stm32f4x9-fsotg 63 - const: st,stm32f4x9-hsotg 64 - const: st,stm32f7-hsotg
··· 59 - const: amcc,dwc-otg 60 - const: apm,apm82181-dwc-otg 61 - const: snps,dwc2 62 + - const: sophgo,cv1800-usb 63 - const: st,stm32f4x9-fsotg 64 - const: st,stm32f4x9-hsotg 65 - const: st,stm32f7-hsotg
+63
Documentation/devicetree/bindings/usb/microchip,usb2514.yaml
···
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/usb/microchip,usb2514.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Microchip USB2514 Hub Controller 8 + 9 + maintainers: 10 + - Fabio Estevam <festevam@gmail.com> 11 + 12 + allOf: 13 + - $ref: usb-hcd.yaml# 14 + 15 + properties: 16 + compatible: 17 + enum: 18 + - usb424,2412 19 + - usb424,2417 20 + - usb424,2514 21 + 22 + reg: true 23 + 24 + reset-gpios: 25 + description: GPIO connected to the RESET_N pin. 26 + 27 + vdd-supply: 28 + description: 3.3V power supply. 29 + 30 + clocks: 31 + description: External 24MHz clock connected to the CLKIN pin. 32 + maxItems: 1 33 + 34 + required: 35 + - compatible 36 + - reg 37 + 38 + unevaluatedProperties: false 39 + 40 + examples: 41 + - | 42 + #include <dt-bindings/clock/imx6qdl-clock.h> 43 + #include <dt-bindings/gpio/gpio.h> 44 + 45 + usb { 46 + #address-cells = <1>; 47 + #size-cells = <0>; 48 + 49 + usb-hub@1 { 50 + compatible = "usb424,2514"; 51 + reg = <1>; 52 + clocks = <&clks IMX6QDL_CLK_CKO>; 53 + reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; 54 + vdd-supply = <&reg_3v3_hub>; 55 + #address-cells = <1>; 56 + #size-cells = <0>; 57 + 58 + ethernet@1 { 59 + compatible = "usbb95,772b"; 60 + reg = <1>; 61 + }; 62 + }; 63 + };
+39 -2
Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
··· 26 - qcom,msm8998-dwc3 27 - qcom,qcm2290-dwc3 28 - qcom,qcs404-dwc3 29 - qcom,sa8775p-dwc3 30 - qcom,sc7180-dwc3 31 - qcom,sc7280-dwc3 32 - qcom,sc8280xp-dwc3 33 - qcom,sdm660-dwc3 34 - qcom,sdm670-dwc3 35 - qcom,sdm845-dwc3 ··· 119 exception of SDM670/SDM845/SM6350. 120 - ss_phy_irq: Used for remote wakeup in Super Speed mode of operation. 121 minItems: 2 122 - maxItems: 5 123 124 interrupt-names: 125 minItems: 2 126 - maxItems: 5 127 128 qcom,select-utmi-as-pipe-clk: 129 description: ··· 247 contains: 248 enum: 249 - qcom,ipq8074-dwc3 250 then: 251 properties: 252 clocks: ··· 285 contains: 286 enum: 287 - qcom,sc8280xp-dwc3 288 - qcom,x1e80100-dwc3 289 then: 290 properties: ··· 444 - qcom,ipq4019-dwc3 445 - qcom,ipq8064-dwc3 446 - qcom,msm8994-dwc3 447 - qcom,sa8775p-dwc3 448 - qcom,sc7180-dwc3 449 - qcom,sc7280-dwc3 ··· 474 - const: dp_hs_phy_irq 475 - const: dm_hs_phy_irq 476 - const: ss_phy_irq 477 478 additionalProperties: false 479
··· 26 - qcom,msm8998-dwc3 27 - qcom,qcm2290-dwc3 28 - qcom,qcs404-dwc3 29 + - qcom,qdu1000-dwc3 30 - qcom,sa8775p-dwc3 31 - qcom,sc7180-dwc3 32 - qcom,sc7280-dwc3 33 - qcom,sc8280xp-dwc3 34 + - qcom,sc8280xp-dwc3-mp 35 - qcom,sdm660-dwc3 36 - qcom,sdm670-dwc3 37 - qcom,sdm845-dwc3 ··· 117 exception of SDM670/SDM845/SM6350. 118 - ss_phy_irq: Used for remote wakeup in Super Speed mode of operation. 119 minItems: 2 120 + maxItems: 18 121 122 interrupt-names: 123 minItems: 2 124 + maxItems: 18 125 126 qcom,select-utmi-as-pipe-clk: 127 description: ··· 245 contains: 246 enum: 247 - qcom,ipq8074-dwc3 248 + - qcom,qdu1000-dwc3 249 then: 250 properties: 251 clocks: ··· 282 contains: 283 enum: 284 - qcom,sc8280xp-dwc3 285 + - qcom,sc8280xp-dwc3-mp 286 - qcom,x1e80100-dwc3 287 then: 288 properties: ··· 440 - qcom,ipq4019-dwc3 441 - qcom,ipq8064-dwc3 442 - qcom,msm8994-dwc3 443 + - qcom,qdu1000-dwc3 444 - qcom,sa8775p-dwc3 445 - qcom,sc7180-dwc3 446 - qcom,sc7280-dwc3 ··· 469 - const: dp_hs_phy_irq 470 - const: dm_hs_phy_irq 471 - const: ss_phy_irq 472 + 473 + - if: 474 + properties: 475 + compatible: 476 + contains: 477 + enum: 478 + - qcom,sc8280xp-dwc3-mp 479 + then: 480 + properties: 481 + interrupts: 482 + minItems: 18 483 + maxItems: 18 484 + interrupt-names: 485 + items: 486 + - const: pwr_event_1 487 + - const: pwr_event_2 488 + - const: pwr_event_3 489 + - const: pwr_event_4 490 + - const: hs_phy_1 491 + - const: hs_phy_2 492 + - const: hs_phy_3 493 + - const: hs_phy_4 494 + - const: dp_hs_phy_1 495 + - const: dm_hs_phy_1 496 + - const: dp_hs_phy_2 497 + - const: dm_hs_phy_2 498 + - const: dp_hs_phy_3 499 + - const: dm_hs_phy_3 500 + - const: dp_hs_phy_4 501 + - const: dm_hs_phy_4 502 + - const: ss_phy_1 503 + - const: ss_phy_2 504 505 additionalProperties: false 506
+27 -8
Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml
··· 21 - items: 22 - enum: 23 - qcom,pm6150-typec 24 - const: qcom,pm8150b-typec 25 - items: 26 - enum: ··· 193 194 port@0 { 195 reg = <0>; 196 - pmic_typec_mux_out: endpoint { 197 - remote-endpoint = <&usb_phy_typec_mux_in>; 198 }; 199 }; 200 201 port@1 { 202 reg = <1>; 203 - pmic_typec_role_switch_out: endpoint { 204 - remote-endpoint = <&usb_role_switch_in>; 205 }; 206 }; 207 }; ··· 220 dr_mode = "otg"; 221 usb-role-switch; 222 port { 223 - usb_role_switch_in: endpoint { 224 - remote-endpoint = <&pmic_typec_role_switch_out>; 225 }; 226 }; 227 }; ··· 229 usb-phy { 230 orientation-switch; 231 port { 232 - usb_phy_typec_mux_in: endpoint { 233 - remote-endpoint = <&pmic_typec_mux_out>; 234 }; 235 }; 236 };
··· 21 - items: 22 - enum: 23 - qcom,pm6150-typec 24 + - qcom,pm7250b-typec 25 - const: qcom,pm8150b-typec 26 - items: 27 - enum: ··· 192 193 port@0 { 194 reg = <0>; 195 + pmic_typec_hs_in: endpoint { 196 + remote-endpoint = <&usb_hs_out>; 197 }; 198 }; 199 200 port@1 { 201 reg = <1>; 202 + pmic_typec_ss_in: endpoint { 203 + remote-endpoint = <&usb_phy_typec_ss_out>; 204 + }; 205 + }; 206 + 207 + port@2 { 208 + reg = <2>; 209 + pmic_typec_sbu: endpoint { 210 + remote-endpoint = <&usb_mux_sbu>; 211 }; 212 }; 213 }; ··· 212 dr_mode = "otg"; 213 usb-role-switch; 214 port { 215 + usb_hs_out: endpoint { 216 + remote-endpoint = <&pmic_typec_hs_in>; 217 }; 218 }; 219 }; ··· 221 usb-phy { 222 orientation-switch; 223 port { 224 + usb_phy_typec_ss_out: endpoint { 225 + remote-endpoint = <&pmic_typec_ss_in>; 226 + }; 227 + }; 228 + }; 229 + 230 + usb-mux { 231 + orientation-switch; 232 + mode-switch; 233 + 234 + port { 235 + usb_mux_sbu: endpoint { 236 + remote-endpoint = <&pmic_typec_sbu>; 237 }; 238 }; 239 };
+5 -1
Documentation/devicetree/bindings/usb/renesas,usbhs.yaml
··· 19 - items: 20 - enum: 21 - renesas,usbhs-r7s9210 # RZ/A2 22 - renesas,usbhs-r9a07g043 # RZ/G2UL and RZ/Five 23 - renesas,usbhs-r9a07g044 # RZ/G2{L,LC} 24 - renesas,usbhs-r9a07g054 # RZ/V2L 25 - - const: renesas,rza2-usbhs 26 27 - items: 28 - enum:
··· 19 - items: 20 - enum: 21 - renesas,usbhs-r7s9210 # RZ/A2 22 + - const: renesas,rza2-usbhs 23 + 24 + - items: 25 + - enum: 26 - renesas,usbhs-r9a07g043 # RZ/G2UL and RZ/Five 27 - renesas,usbhs-r9a07g044 # RZ/G2{L,LC} 28 - renesas,usbhs-r9a07g054 # RZ/V2L 29 + - const: renesas,rzg2l-usbhs 30 31 - items: 32 - enum:
+18
Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml
··· 12 properties: 13 compatible: 14 enum: 15 - samsung,exynos5250-dwusb3 16 - samsung,exynos5433-dwusb3 17 - samsung,exynos7-dwusb3 ··· 56 - vdd33-supply 57 58 allOf: 59 - if: 60 properties: 61 compatible:
··· 12 properties: 13 compatible: 14 enum: 15 + - google,gs101-dwusb3 16 - samsung,exynos5250-dwusb3 17 - samsung,exynos5433-dwusb3 18 - samsung,exynos7-dwusb3 ··· 55 - vdd33-supply 56 57 allOf: 58 + - if: 59 + properties: 60 + compatible: 61 + contains: 62 + const: google,gs101-dwusb3 63 + then: 64 + properties: 65 + clocks: 66 + minItems: 4 67 + maxItems: 4 68 + clock-names: 69 + items: 70 + - const: bus_early 71 + - const: susp_clk 72 + - const: link_aclk 73 + - const: link_pclk 74 + 75 - if: 76 properties: 77 compatible:
+7 -6
Documentation/devicetree/bindings/usb/snps,dwc3.yaml
··· 85 86 phys: 87 minItems: 1 88 - maxItems: 2 89 90 phy-names: 91 minItems: 1 92 - maxItems: 2 93 - items: 94 - enum: 95 - - usb2-phy 96 - - usb3-phy 97 98 power-domains: 99 description:
··· 85 86 phys: 87 minItems: 1 88 + maxItems: 19 89 90 phy-names: 91 minItems: 1 92 + maxItems: 19 93 + oneOf: 94 + - items: 95 + enum: [ usb2-phy, usb3-phy ] 96 + - items: 97 + pattern: "^usb(2-([0-9]|1[0-4])|3-[0-3])$" 98 99 power-domains: 100 description:
-18
Documentation/devicetree/bindings/usb/usb-uhci.txt
··· 1 - Generic Platform UHCI Controller 2 - ----------------------------------------------------- 3 - 4 - Required properties: 5 - - compatible : "generic-uhci" (deprecated: "platform-uhci") 6 - - reg : Should contain 1 register ranges(address and length) 7 - - interrupts : UHCI controller interrupt 8 - 9 - additionally the properties from usb-hcd.yaml (in the current directory) are 10 - supported. 11 - 12 - Example: 13 - 14 - uhci@d8007b00 { 15 - compatible = "generic-uhci"; 16 - reg = <0xd8007b00 0x200>; 17 - interrupts = <43>; 18 - };
···
+75
Documentation/devicetree/bindings/usb/usb-uhci.yaml
···
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/usb/usb-uhci.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Generic Platform UHCI Controller 8 + 9 + maintainers: 10 + - Greg Kroah-Hartman <gregkh@linuxfoundation.org> 11 + 12 + properties: 13 + compatible: 14 + oneOf: 15 + - const: generic-uhci 16 + - const: platform-uhci 17 + deprecated: true 18 + - items: 19 + - enum: 20 + - aspeed,ast2400-uhci 21 + - aspeed,ast2500-uhci 22 + - aspeed,ast2600-uhci 23 + - const: generic-uhci 24 + 25 + reg: 26 + maxItems: 1 27 + 28 + interrupts: 29 + maxItems: 1 30 + 31 + '#ports': 32 + $ref: /schemas/types.yaml#/definitions/uint32 33 + 34 + clocks: 35 + maxItems: 1 36 + 37 + required: 38 + - compatible 39 + - reg 40 + - interrupts 41 + 42 + allOf: 43 + - $ref: usb-hcd.yaml 44 + - if: 45 + properties: 46 + compatible: 47 + contains: 48 + const: generic-uhci 49 + then: 50 + required: 51 + - clocks 52 + 53 + unevaluatedProperties: false 54 + 55 + examples: 56 + - | 57 + #include <dt-bindings/clock/aspeed-clock.h> 58 + 59 + usb@d8007b00 { 60 + compatible = "generic-uhci"; 61 + reg = <0xd8007b00 0x200>; 62 + interrupts = <43>; 63 + clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 64 + }; 65 + - | 66 + #include <dt-bindings/clock/aspeed-clock.h> 67 + 68 + usb@1e6b0000 { 69 + compatible = "aspeed,ast2500-uhci", "generic-uhci"; 70 + reg = <0x1e6b0000 0x100>; 71 + interrupts = <14>; 72 + #ports = <2>; 73 + clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 74 + }; 75 + ...
+2 -4
MAINTAINERS
··· 3087 F: drivers/pwm/pwm-vt8500.c 3088 F: drivers/rtc/rtc-vt8500.c 3089 F: drivers/tty/serial/vt8500_serial.c 3090 - F: drivers/usb/host/ehci-platform.c 3091 - F: drivers/usb/host/uhci-platform.c 3092 F: drivers/video/fbdev/vt8500lcdfb.* 3093 F: drivers/video/fbdev/wm8505fb* 3094 F: drivers/video/fbdev/wmt_ge_rops.* ··· 16689 M: Matthias Kaehlcke <mka@chromium.org> 16690 L: linux-usb@vger.kernel.org 16691 S: Maintained 16692 - F: Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-hub 16693 - F: drivers/usb/misc/onboard_usb_hub.c 16694 16695 ONENAND FLASH DRIVER 16696 M: Kyungmin Park <kyungmin.park@samsung.com>
··· 3087 F: drivers/pwm/pwm-vt8500.c 3088 F: drivers/rtc/rtc-vt8500.c 3089 F: drivers/tty/serial/vt8500_serial.c 3090 F: drivers/video/fbdev/vt8500lcdfb.* 3091 F: drivers/video/fbdev/wm8505fb* 3092 F: drivers/video/fbdev/wmt_ge_rops.* ··· 16691 M: Matthias Kaehlcke <mka@chromium.org> 16692 L: linux-usb@vger.kernel.org 16693 S: Maintained 16694 + F: Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-dev 16695 + F: drivers/usb/misc/onboard_usb_dev.c 16696 16697 ONENAND FLASH DRIVER 16698 M: Kyungmin Park <kyungmin.park@samsung.com>
+1 -1
arch/arm/configs/multi_v7_defconfig
··· 885 CONFIG_USB_CHIPIDEA_HOST=y 886 CONFIG_USB_ISP1760=y 887 CONFIG_USB_HSIC_USB3503=y 888 - CONFIG_USB_ONBOARD_HUB=m 889 CONFIG_AB8500_USB=y 890 CONFIG_KEYSTONE_USB_PHY=m 891 CONFIG_NOP_USB_XCEIV=y
··· 885 CONFIG_USB_CHIPIDEA_HOST=y 886 CONFIG_USB_ISP1760=y 887 CONFIG_USB_HSIC_USB3503=y 888 + CONFIG_USB_ONBOARD_DEV=m 889 CONFIG_AB8500_USB=y 890 CONFIG_KEYSTONE_USB_PHY=m 891 CONFIG_NOP_USB_XCEIV=y
+1 -1
arch/arm64/boot/dts/renesas/r9a07g043.dtsi
··· 813 814 hsusb: usb@11c60000 { 815 compatible = "renesas,usbhs-r9a07g043", 816 - "renesas,rza2-usbhs"; 817 reg = <0 0x11c60000 0 0x10000>; 818 interrupts = <SOC_PERIPHERAL_IRQ(100) IRQ_TYPE_EDGE_RISING>, 819 <SOC_PERIPHERAL_IRQ(101) IRQ_TYPE_LEVEL_HIGH>,
··· 813 814 hsusb: usb@11c60000 { 815 compatible = "renesas,usbhs-r9a07g043", 816 + "renesas,rzg2l-usbhs"; 817 reg = <0 0x11c60000 0 0x10000>; 818 interrupts = <SOC_PERIPHERAL_IRQ(100) IRQ_TYPE_EDGE_RISING>, 819 <SOC_PERIPHERAL_IRQ(101) IRQ_TYPE_LEVEL_HIGH>,
+1 -1
arch/arm64/boot/dts/renesas/r9a07g044.dtsi
··· 1217 1218 hsusb: usb@11c60000 { 1219 compatible = "renesas,usbhs-r9a07g044", 1220 - "renesas,rza2-usbhs"; 1221 reg = <0 0x11c60000 0 0x10000>; 1222 interrupts = <GIC_SPI 100 IRQ_TYPE_EDGE_RISING>, 1223 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
··· 1217 1218 hsusb: usb@11c60000 { 1219 compatible = "renesas,usbhs-r9a07g044", 1220 + "renesas,rzg2l-usbhs"; 1221 reg = <0 0x11c60000 0 0x10000>; 1222 interrupts = <GIC_SPI 100 IRQ_TYPE_EDGE_RISING>, 1223 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+1 -1
arch/arm64/boot/dts/renesas/r9a07g054.dtsi
··· 1225 1226 hsusb: usb@11c60000 { 1227 compatible = "renesas,usbhs-r9a07g054", 1228 - "renesas,rza2-usbhs"; 1229 reg = <0 0x11c60000 0 0x10000>; 1230 interrupts = <GIC_SPI 100 IRQ_TYPE_EDGE_RISING>, 1231 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
··· 1225 1226 hsusb: usb@11c60000 { 1227 compatible = "renesas,usbhs-r9a07g054", 1228 + "renesas,rzg2l-usbhs"; 1229 reg = <0 0x11c60000 0 0x10000>; 1230 interrupts = <GIC_SPI 100 IRQ_TYPE_EDGE_RISING>, 1231 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+1 -1
arch/arm64/configs/defconfig
··· 1073 CONFIG_USB_SERIAL_OPTION=m 1074 CONFIG_USB_QCOM_EUD=m 1075 CONFIG_USB_HSIC_USB3503=y 1076 - CONFIG_USB_ONBOARD_HUB=m 1077 CONFIG_NOP_USB_XCEIV=y 1078 CONFIG_USB_MXS_PHY=m 1079 CONFIG_USB_GADGET=y
··· 1073 CONFIG_USB_SERIAL_OPTION=m 1074 CONFIG_USB_QCOM_EUD=m 1075 CONFIG_USB_HSIC_USB3503=y 1076 + CONFIG_USB_ONBOARD_DEV=m 1077 CONFIG_NOP_USB_XCEIV=y 1078 CONFIG_USB_MXS_PHY=m 1079 CONFIG_USB_GADGET=y
+2 -2
drivers/gpu/drm/ci/arm64.config
··· 87 CONFIG_DRM_LONTIUM_LT9611UXC=y 88 CONFIG_PHY_QCOM_USB_HS=y 89 CONFIG_QCOM_GPI_DMA=y 90 - CONFIG_USB_ONBOARD_HUB=y 91 CONFIG_NVMEM_QCOM_QFPROM=y 92 CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y 93 ··· 97 # db820c ethernet 98 CONFIG_ATL1C=y 99 # Chromebooks ethernet 100 - CONFIG_USB_ONBOARD_HUB=y 101 # 888 HDK ethernet 102 CONFIG_USB_LAN78XX=y 103
··· 87 CONFIG_DRM_LONTIUM_LT9611UXC=y 88 CONFIG_PHY_QCOM_USB_HS=y 89 CONFIG_QCOM_GPI_DMA=y 90 + CONFIG_USB_ONBOARD_DEV=y 91 CONFIG_NVMEM_QCOM_QFPROM=y 92 CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y 93 ··· 97 # db820c ethernet 98 CONFIG_ATL1C=y 99 # Chromebooks ethernet 100 + CONFIG_USB_ONBOARD_DEV=y 101 # 888 HDK ethernet 102 CONFIG_USB_LAN78XX=y 103
-5
drivers/soc/qcom/pmic_glink.c
··· 348 mutex_unlock(&__pmic_glink_lock); 349 } 350 351 - static const unsigned long pmic_glink_sc8180x_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | 352 - BIT(PMIC_GLINK_CLIENT_ALTMODE); 353 - 354 static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | 355 BIT(PMIC_GLINK_CLIENT_ALTMODE) | 356 BIT(PMIC_GLINK_CLIENT_UCSI); 357 358 static const struct of_device_id pmic_glink_of_match[] = { 359 - { .compatible = "qcom,sc8180x-pmic-glink", .data = &pmic_glink_sc8180x_client_mask }, 360 - { .compatible = "qcom,sc8280xp-pmic-glink", .data = &pmic_glink_sc8180x_client_mask }, 361 { .compatible = "qcom,pmic-glink", .data = &pmic_glink_sm8450_client_mask }, 362 {} 363 };
··· 348 mutex_unlock(&__pmic_glink_lock); 349 } 350 351 static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | 352 BIT(PMIC_GLINK_CLIENT_ALTMODE) | 353 BIT(PMIC_GLINK_CLIENT_UCSI); 354 355 static const struct of_device_id pmic_glink_of_match[] = { 356 { .compatible = "qcom,pmic-glink", .data = &pmic_glink_sm8450_client_mask }, 357 {} 358 };
+1 -1
drivers/thunderbolt/debugfs.c
··· 1346 if (tb_switch_is_usb4(sw)) 1347 dwords = ARRAY_SIZE(data); 1348 else 1349 - dwords = 7; 1350 1351 ret = tb_sw_read(sw, data, TB_CFG_SWITCH, 0, dwords); 1352 if (ret)
··· 1346 if (tb_switch_is_usb4(sw)) 1347 dwords = ARRAY_SIZE(data); 1348 else 1349 + dwords = 5; 1350 1351 ret = tb_sw_read(sw, data, TB_CFG_SWITCH, 0, dwords); 1352 if (ret)
+1
drivers/thunderbolt/icm.c
··· 2532 2533 case PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_2C_NHI: 2534 case PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_4C_NHI: 2535 icm->is_supported = icm_tgl_is_supported; 2536 icm->get_mode = icm_ar_get_mode; 2537 icm->driver_ready = icm_tr_driver_ready;
··· 2532 2533 case PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_2C_NHI: 2534 case PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_4C_NHI: 2535 + icm->can_upgrade_nvm = true; 2536 icm->is_supported = icm_tgl_is_supported; 2537 icm->get_mode = icm_ar_get_mode; 2538 icm->driver_ready = icm_tr_driver_ready;
+8 -4
drivers/thunderbolt/retimer.c
··· 199 * If the retimer has it set, store it for the new retimer 200 * device instance. 201 */ 202 - for (i = 1; i <= TB_MAX_RETIMER_INDEX; i++) 203 - usb4_port_retimer_nvm_authenticate_status(port, i, &status[i]); 204 } 205 206 static void tb_retimer_set_inbound_sbtx(struct tb_port *port) ··· 236 237 tb_port_dbg(port, "disabling sideband transactions\n"); 238 239 - for (i = TB_MAX_RETIMER_INDEX; i >= 1; i--) 240 - usb4_port_retimer_unset_inbound_sbtx(port, i); 241 } 242 243 static ssize_t nvm_authenticate_store(struct device *dev,
··· 199 * If the retimer has it set, store it for the new retimer 200 * device instance. 201 */ 202 + for (i = 1; i <= TB_MAX_RETIMER_INDEX; i++) { 203 + if (usb4_port_retimer_nvm_authenticate_status(port, i, &status[i])) 204 + break; 205 + } 206 } 207 208 static void tb_retimer_set_inbound_sbtx(struct tb_port *port) ··· 234 235 tb_port_dbg(port, "disabling sideband transactions\n"); 236 237 + for (i = TB_MAX_RETIMER_INDEX; i >= 1; i--) { 238 + if (usb4_port_retimer_unset_inbound_sbtx(port, i)) 239 + break; 240 + } 241 } 242 243 static ssize_t nvm_authenticate_store(struct device *dev,
+5 -4
drivers/thunderbolt/tb.c
··· 498 * @consumed_down: Consumed downstream bandwidth (Mb/s) 499 * 500 * Calculates consumed USB3 and PCIe bandwidth at @port between path 501 - * from @src_port to @dst_port. Does not take tunnel starting from 502 - * @src_port and ending from @src_port into account. 503 */ 504 static int tb_consumed_usb3_pcie_bandwidth(struct tb *tb, 505 struct tb_port *src_port, ··· 515 *consumed_up = *consumed_down = 0; 516 517 tunnel = tb_find_first_usb3_tunnel(tb, src_port, dst_port); 518 - if (tunnel && tunnel->src_port != src_port && 519 - tunnel->dst_port != dst_port) { 520 int ret; 521 522 ret = tb_tunnel_consumed_bandwidth(tunnel, consumed_up,
··· 498 * @consumed_down: Consumed downstream bandwidth (Mb/s) 499 * 500 * Calculates consumed USB3 and PCIe bandwidth at @port between path 501 + * from @src_port to @dst_port. Does not take USB3 tunnel starting from 502 + * @src_port and ending on @src_port into account because that bandwidth is 503 + * already included in as part of the "first hop" USB3 tunnel. 504 */ 505 static int tb_consumed_usb3_pcie_bandwidth(struct tb *tb, 506 struct tb_port *src_port, ··· 514 *consumed_up = *consumed_down = 0; 515 516 tunnel = tb_find_first_usb3_tunnel(tb, src_port, dst_port); 517 + if (tunnel && !tb_port_is_usb3_down(src_port) && 518 + !tb_port_is_usb3_up(dst_port)) { 519 int ret; 520 521 ret = tb_tunnel_consumed_bandwidth(tunnel, consumed_up,
-6
drivers/thunderbolt/tb_msgs.h
··· 98 struct tb_cfg_header header; 99 } __packed; 100 101 - /* TB_CFG_PKG_PREPARE_TO_SLEEP */ 102 - struct cfg_pts_pkg { 103 - struct tb_cfg_header header; 104 - u32 data; 105 - } __packed; 106 - 107 /* ICM messages */ 108 109 enum icm_pkg_code {
··· 98 struct tb_cfg_header header; 99 } __packed; 100 101 /* ICM messages */ 102 103 enum icm_pkg_code {
+11 -2
drivers/thunderbolt/trace.h
··· 87 const char *prefix = ""; 88 int i; 89 90 - show_route(p, data); 91 - 92 switch (type) { 93 case TB_CFG_PKG_READ: 94 case TB_CFG_PKG_WRITE: 95 show_data_read_write(p, data); 96 break; 97 98 case TB_CFG_PKG_ERROR: 99 show_data_error(p, data); 100 break; 101 102 case TB_CFG_PKG_EVENT: 103 show_data_event(p, data); 104 break; 105 106 default: 107 break; 108 } 109
··· 87 const char *prefix = ""; 88 int i; 89 90 switch (type) { 91 case TB_CFG_PKG_READ: 92 case TB_CFG_PKG_WRITE: 93 + show_route(p, data); 94 show_data_read_write(p, data); 95 break; 96 97 case TB_CFG_PKG_ERROR: 98 + show_route(p, data); 99 show_data_error(p, data); 100 break; 101 102 case TB_CFG_PKG_EVENT: 103 + show_route(p, data); 104 show_data_event(p, data); 105 break; 106 107 + case TB_CFG_PKG_ICM_EVENT: 108 + case TB_CFG_PKG_ICM_CMD: 109 + case TB_CFG_PKG_ICM_RESP: 110 + /* ICM messages always target the host router */ 111 + trace_seq_puts(p, "route=0, "); 112 + break; 113 + 114 default: 115 + show_route(p, data); 116 break; 117 } 118
+17 -22
drivers/thunderbolt/tunnel.c
··· 1435 * @in: DP in adapter port 1436 * @out: DP out adapter port 1437 * @link_nr: Preferred lane adapter when the link is not bonded 1438 - * @max_up: Maximum available upstream bandwidth for the DP tunnel (%0 1439 - * if not limited) 1440 - * @max_down: Maximum available downstream bandwidth for the DP tunnel 1441 - * (%0 if not limited) 1442 * 1443 * Allocates a tunnel between @in and @out that is capable of tunneling 1444 * Display Port traffic. ··· 2048 * @tb: Pointer to the domain structure 2049 * @up: USB3 upstream adapter port 2050 * @down: USB3 downstream adapter port 2051 - * @max_up: Maximum available upstream bandwidth for the USB3 tunnel (%0 2052 - * if not limited). 2053 - * @max_down: Maximum available downstream bandwidth for the USB3 tunnel 2054 - * (%0 if not limited). 2055 * 2056 * Allocate an USB3 tunnel. The ports must be of type @TB_TYPE_USB3_UP and 2057 * @TB_TYPE_USB3_DOWN. ··· 2066 struct tb_path *path; 2067 int max_rate = 0; 2068 2069 - /* 2070 - * Check that we have enough bandwidth available for the new 2071 - * USB3 tunnel. 2072 - */ 2073 - if (max_up > 0 || max_down > 0) { 2074 max_rate = tb_usb3_max_link_rate(down, up); 2075 if (max_rate < 0) 2076 return NULL; 2077 2078 - /* Only 90% can be allocated for USB3 isochronous transfers */ 2079 max_rate = max_rate * 90 / 100; 2080 - tb_port_dbg(up, "required bandwidth for USB3 tunnel %d Mb/s\n", 2081 max_rate); 2082 - 2083 - if (max_rate > max_up || max_rate > max_down) { 2084 - tb_port_warn(up, "not enough bandwidth for USB3 tunnel\n"); 2085 - return NULL; 2086 - } 2087 } 2088 2089 tunnel = tb_tunnel_alloc(tb, 2, TB_TUNNEL_USB3); ··· 2110 tunnel->paths[TB_USB3_PATH_UP] = path; 2111 2112 if (!tb_route(down->sw)) { 2113 - tunnel->allocated_up = max_rate; 2114 - tunnel->allocated_down = max_rate; 2115 2116 tunnel->init = tb_usb3_init; 2117 tunnel->consumed_bandwidth = tb_usb3_consumed_bandwidth;
··· 1435 * @in: DP in adapter port 1436 * @out: DP out adapter port 1437 * @link_nr: Preferred lane adapter when the link is not bonded 1438 + * @max_up: Maximum available upstream bandwidth for the DP tunnel. 1439 + * %0 if no available bandwidth. 1440 + * @max_down: Maximum available downstream bandwidth for the DP tunnel. 1441 + * %0 if no available bandwidth. 1442 * 1443 * Allocates a tunnel between @in and @out that is capable of tunneling 1444 * Display Port traffic. ··· 2048 * @tb: Pointer to the domain structure 2049 * @up: USB3 upstream adapter port 2050 * @down: USB3 downstream adapter port 2051 + * @max_up: Maximum available upstream bandwidth for the USB3 tunnel. 2052 + * %0 if no available bandwidth. 2053 + * @max_down: Maximum available downstream bandwidth for the USB3 tunnel. 2054 + * %0 if no available bandwidth. 2055 * 2056 * Allocate an USB3 tunnel. The ports must be of type @TB_TYPE_USB3_UP and 2057 * @TB_TYPE_USB3_DOWN. ··· 2066 struct tb_path *path; 2067 int max_rate = 0; 2068 2069 + if (!tb_route(down->sw) && (max_up > 0 || max_down > 0)) { 2070 + /* 2071 + * For USB3 isochronous transfers, we allow bandwidth which is 2072 + * not higher than 90% of maximum supported bandwidth by USB3 2073 + * adapters. 2074 + */ 2075 max_rate = tb_usb3_max_link_rate(down, up); 2076 if (max_rate < 0) 2077 return NULL; 2078 2079 max_rate = max_rate * 90 / 100; 2080 + tb_port_dbg(up, "maximum required bandwidth for USB3 tunnel %d Mb/s\n", 2081 max_rate); 2082 } 2083 2084 tunnel = tb_tunnel_alloc(tb, 2, TB_TUNNEL_USB3); ··· 2115 tunnel->paths[TB_USB3_PATH_UP] = path; 2116 2117 if (!tb_route(down->sw)) { 2118 + tunnel->allocated_up = min(max_rate, max_up); 2119 + tunnel->allocated_down = min(max_rate, max_down); 2120 2121 tunnel->init = tb_usb3_init; 2122 tunnel->consumed_bandwidth = tb_usb3_consumed_bandwidth;
+15 -7
drivers/thunderbolt/usb4.c
··· 52 #define USB4_BA_VALUE_MASK GENMASK(31, 16) 53 #define USB4_BA_VALUE_SHIFT 16 54 55 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode, 56 u32 *metadata, u8 *status, 57 const void *tx_data, size_t tx_dwords, ··· 1249 } 1250 1251 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit, 1252 - u32 value, int timeout_msec) 1253 { 1254 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec); 1255 ··· 1264 if ((val & bit) == value) 1265 return 0; 1266 1267 - usleep_range(50, 100); 1268 } while (ktime_before(ktime_get(), timeout)); 1269 1270 return -ETIMEDOUT; ··· 1312 return ret; 1313 1314 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1, 1315 - PORT_CS_1_PND, 0, 500); 1316 if (ret) 1317 return ret; 1318 ··· 1359 return ret; 1360 1361 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1, 1362 - PORT_CS_1_PND, 0, 500); 1363 if (ret) 1364 return ret; 1365 ··· 1414 1415 if (val != opcode) 1416 return usb4_port_sb_opcode_err_to_errno(val); 1417 } while (ktime_before(ktime_get(), timeout)); 1418 1419 return -ETIMEDOUT; ··· 1597 * port started the symmetry transition. 1598 */ 1599 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_19, 1600 - PORT_CS_19_START_ASYM, 0, 1000); 1601 if (ret) 1602 return ret; 1603 1604 /* Then wait for the transtion to be completed */ 1605 return usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_18, 1606 - PORT_CS_18_TIP, 0, 5000); 1607 } 1608 1609 /** ··· 2130 */ 2131 val &= ADP_USB3_CS_2_CMR; 2132 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1, 2133 - ADP_USB3_CS_1_HCA, val, 1500); 2134 } 2135 2136 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
··· 52 #define USB4_BA_VALUE_MASK GENMASK(31, 16) 53 #define USB4_BA_VALUE_SHIFT 16 54 55 + /* Delays in us used with usb4_port_wait_for_bit() */ 56 + #define USB4_PORT_DELAY 50 57 + #define USB4_PORT_SB_DELAY 5000 58 + 59 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode, 60 u32 *metadata, u8 *status, 61 const void *tx_data, size_t tx_dwords, ··· 1245 } 1246 1247 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit, 1248 + u32 value, int timeout_msec, unsigned long delay_usec) 1249 { 1250 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec); 1251 ··· 1260 if ((val & bit) == value) 1261 return 0; 1262 1263 + fsleep(delay_usec); 1264 } while (ktime_before(ktime_get(), timeout)); 1265 1266 return -ETIMEDOUT; ··· 1308 return ret; 1309 1310 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1, 1311 + PORT_CS_1_PND, 0, 500, USB4_PORT_SB_DELAY); 1312 if (ret) 1313 return ret; 1314 ··· 1355 return ret; 1356 1357 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1, 1358 + PORT_CS_1_PND, 0, 500, USB4_PORT_SB_DELAY); 1359 if (ret) 1360 return ret; 1361 ··· 1410 1411 if (val != opcode) 1412 return usb4_port_sb_opcode_err_to_errno(val); 1413 + 1414 + fsleep(USB4_PORT_SB_DELAY); 1415 } while (ktime_before(ktime_get(), timeout)); 1416 1417 return -ETIMEDOUT; ··· 1591 * port started the symmetry transition. 1592 */ 1593 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_19, 1594 + PORT_CS_19_START_ASYM, 0, 1000, 1595 + USB4_PORT_DELAY); 1596 if (ret) 1597 return ret; 1598 1599 /* Then wait for the transtion to be completed */ 1600 return usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_18, 1601 + PORT_CS_18_TIP, 0, 5000, USB4_PORT_DELAY); 1602 } 1603 1604 /** ··· 2123 */ 2124 val &= ADP_USB3_CS_2_CMR; 2125 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1, 2126 + ADP_USB3_CS_1_HCA, val, 1500, 2127 + USB4_PORT_DELAY); 2128 } 2129 2130 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
+1 -1
drivers/thunderbolt/xdomain.c
··· 250 case ERROR_UNKNOWN_DOMAIN: 251 return -EIO; 252 case ERROR_NOT_SUPPORTED: 253 - return -ENOTSUPP; 254 case ERROR_NOT_READY: 255 return -EAGAIN; 256 default:
··· 250 case ERROR_UNKNOWN_DOMAIN: 251 return -EIO; 252 case ERROR_NOT_SUPPORTED: 253 + return -EOPNOTSUPP; 254 case ERROR_NOT_READY: 255 return -EAGAIN; 256 default:
+1 -1
drivers/usb/chipidea/ci_hdrc_imx.c
··· 212 /* Get wakeup clock. Not all of the platforms need to 213 * handle this clock. So make it optional. 214 */ 215 - data->clk_wakeup = devm_clk_get_optional(dev, "usb_wakeup_clk"); 216 if (IS_ERR(data->clk_wakeup)) 217 ret = dev_err_probe(dev, PTR_ERR(data->clk_wakeup), 218 "Failed to get wakeup clk\n");
··· 212 /* Get wakeup clock. Not all of the platforms need to 213 * handle this clock. So make it optional. 214 */ 215 + data->clk_wakeup = devm_clk_get_optional(dev, "usb_wakeup"); 216 if (IS_ERR(data->clk_wakeup)) 217 ret = dev_err_probe(dev, PTR_ERR(data->clk_wakeup), 218 "Failed to get wakeup clk\n");
+2 -4
drivers/usb/chipidea/ci_hdrc_npcm.c
··· 80 return ret; 81 } 82 83 - static int npcm_udc_remove(struct platform_device *pdev) 84 { 85 struct npcm_udc_data *ci = platform_get_drvdata(pdev); 86 87 pm_runtime_disable(&pdev->dev); 88 ci_hdrc_remove_device(ci->ci); 89 clk_disable_unprepare(ci->core_clk); 90 - 91 - return 0; 92 } 93 94 static const struct of_device_id npcm_udc_dt_match[] = { ··· 98 99 static struct platform_driver npcm_udc_driver = { 100 .probe = npcm_udc_probe, 101 - .remove = npcm_udc_remove, 102 .driver = { 103 .name = "npcm_udc", 104 .of_match_table = npcm_udc_dt_match,
··· 80 return ret; 81 } 82 83 + static void npcm_udc_remove(struct platform_device *pdev) 84 { 85 struct npcm_udc_data *ci = platform_get_drvdata(pdev); 86 87 pm_runtime_disable(&pdev->dev); 88 ci_hdrc_remove_device(ci->ci); 89 clk_disable_unprepare(ci->core_clk); 90 } 91 92 static const struct of_device_id npcm_udc_dt_match[] = { ··· 100 101 static struct platform_driver npcm_udc_driver = { 102 .probe = npcm_udc_probe, 103 + .remove_new = npcm_udc_remove, 104 .driver = { 105 .name = "npcm_udc", 106 .of_match_table = npcm_udc_dt_match,
+4 -4
drivers/usb/chipidea/core.c
··· 1084 return -ENODEV; 1085 } 1086 1087 - ret = ci_ulpi_init(ci); 1088 - if (ret) 1089 - return ret; 1090 - 1091 if (ci->platdata->phy) { 1092 ci->phy = ci->platdata->phy; 1093 } else if (ci->platdata->usb_phy) { ··· 1137 dev_err(dev, "unable to init phy: %d\n", ret); 1138 goto ulpi_exit; 1139 } 1140 1141 ci->hw_bank.phys = res->start; 1142
··· 1084 return -ENODEV; 1085 } 1086 1087 if (ci->platdata->phy) { 1088 ci->phy = ci->platdata->phy; 1089 } else if (ci->platdata->usb_phy) { ··· 1141 dev_err(dev, "unable to init phy: %d\n", ret); 1142 goto ulpi_exit; 1143 } 1144 + 1145 + ret = ci_ulpi_init(ci); 1146 + if (ret) 1147 + return ret; 1148 1149 ci->hw_bank.phys = res->start; 1150
-5
drivers/usb/chipidea/ulpi.c
··· 68 if (ci->platdata->phy_mode != USBPHY_INTERFACE_MODE_ULPI) 69 return 0; 70 71 - /* 72 - * Set PORTSC correctly so we can read/write ULPI registers for 73 - * identification purposes 74 - */ 75 - hw_phymode_configure(ci); 76 77 ci->ulpi_ops.read = ci_ulpi_read; 78 ci->ulpi_ops.write = ci_ulpi_write;
··· 68 if (ci->platdata->phy_mode != USBPHY_INTERFACE_MODE_ULPI) 69 return 0; 70 71 72 ci->ulpi_ops.read = ci_ulpi_read; 73 ci->ulpi_ops.write = ci_ulpi_write;
+2 -2
drivers/usb/core/Makefile
··· 12 usbcore-$(CONFIG_USB_PCI) += hcd-pci.o 13 usbcore-$(CONFIG_ACPI) += usb-acpi.o 14 15 - ifdef CONFIG_USB_ONBOARD_HUB 16 - usbcore-y += ../misc/onboard_usb_hub_pdevs.o 17 endif 18 19 obj-$(CONFIG_USB) += usbcore.o
··· 12 usbcore-$(CONFIG_USB_PCI) += hcd-pci.o 13 usbcore-$(CONFIG_ACPI) += usb-acpi.o 14 15 + ifdef CONFIG_USB_ONBOARD_DEV 16 + usbcore-y += ../misc/onboard_usb_dev_pdevs.o 17 endif 18 19 obj-$(CONFIG_USB) += usbcore.o
+4 -4
drivers/usb/core/config.c
··· 279 goto skip_to_next_endpoint_or_interface_descriptor; 280 } 281 282 - i = d->bEndpointAddress & ~USB_ENDPOINT_DIR_MASK; 283 - if (i >= 16 || i == 0) { 284 dev_notice(ddev, "config %d interface %d altsetting %d has an " 285 - "invalid endpoint with address 0x%X, skipping\n", 286 - cfgno, inum, asnum, d->bEndpointAddress); 287 goto skip_to_next_endpoint_or_interface_descriptor; 288 } 289
··· 279 goto skip_to_next_endpoint_or_interface_descriptor; 280 } 281 282 + i = d->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 283 + if (i == 0) { 284 dev_notice(ddev, "config %d interface %d altsetting %d has an " 285 + "invalid descriptor for endpoint zero, skipping\n", 286 + cfgno, inum, asnum); 287 goto skip_to_next_endpoint_or_interface_descriptor; 288 } 289
+2 -2
drivers/usb/core/hcd.c
··· 866 */ 867 static void usb_bus_init (struct usb_bus *bus) 868 { 869 - memset (&bus->devmap, 0, sizeof(struct usb_devmap)); 870 871 bus->devnum_next = 1; 872 ··· 962 963 usb_dev->devnum = devnum; 964 usb_dev->bus->devnum_next = devnum + 1; 965 - set_bit (devnum, usb_dev->bus->devmap.devicemap); 966 usb_set_device_state(usb_dev, USB_STATE_ADDRESS); 967 968 mutex_lock(&usb_bus_idr_lock);
··· 866 */ 867 static void usb_bus_init (struct usb_bus *bus) 868 { 869 + memset(&bus->devmap, 0, sizeof(bus->devmap)); 870 871 bus->devnum_next = 1; 872 ··· 962 963 usb_dev->devnum = devnum; 964 usb_dev->bus->devnum_next = devnum + 1; 965 + set_bit(devnum, usb_dev->bus->devmap); 966 usb_set_device_state(usb_dev, USB_STATE_ADDRESS); 967 968 mutex_lock(&usb_bus_idr_lock);
+8 -9
drivers/usb/core/hub.c
··· 23 #include <linux/usb.h> 24 #include <linux/usbdevice_fs.h> 25 #include <linux/usb/hcd.h> 26 - #include <linux/usb/onboard_hub.h> 27 #include <linux/usb/otg.h> 28 #include <linux/usb/quirks.h> 29 #include <linux/workqueue.h> ··· 1814 if (hub->quirk_disable_autosuspend) 1815 usb_autopm_put_interface(intf); 1816 1817 - onboard_hub_destroy_pdevs(&hub->onboard_hub_devs); 1818 1819 hub_put(hub); 1820 } ··· 1933 INIT_DELAYED_WORK(&hub->leds, led_work); 1934 INIT_DELAYED_WORK(&hub->init_work, NULL); 1935 INIT_WORK(&hub->events, hub_event); 1936 - INIT_LIST_HEAD(&hub->onboard_hub_devs); 1937 spin_lock_init(&hub->irq_urb_lock); 1938 timer_setup(&hub->irq_urb_retry, hub_retry_irq_urb, 0); 1939 usb_get_intf(intf); ··· 1963 } 1964 1965 if (hub_configure(hub, &desc->endpoint[0].desc) >= 0) { 1966 - onboard_hub_create_pdevs(hdev, &hub->onboard_hub_devs); 1967 1968 return 0; 1969 } ··· 2207 mutex_lock(&bus->devnum_next_mutex); 2208 2209 /* Try to allocate the next devnum beginning at bus->devnum_next. */ 2210 - devnum = find_next_zero_bit(bus->devmap.devicemap, 128, 2211 - bus->devnum_next); 2212 if (devnum >= 128) 2213 - devnum = find_next_zero_bit(bus->devmap.devicemap, 128, 1); 2214 bus->devnum_next = (devnum >= 127 ? 1 : devnum + 1); 2215 if (devnum < 128) { 2216 - set_bit(devnum, bus->devmap.devicemap); 2217 udev->devnum = devnum; 2218 } 2219 mutex_unlock(&bus->devnum_next_mutex); ··· 2221 static void release_devnum(struct usb_device *udev) 2222 { 2223 if (udev->devnum > 0) { 2224 - clear_bit(udev->devnum, udev->bus->devmap.devicemap); 2225 udev->devnum = -1; 2226 } 2227 }
··· 23 #include <linux/usb.h> 24 #include <linux/usbdevice_fs.h> 25 #include <linux/usb/hcd.h> 26 + #include <linux/usb/onboard_dev.h> 27 #include <linux/usb/otg.h> 28 #include <linux/usb/quirks.h> 29 #include <linux/workqueue.h> ··· 1814 if (hub->quirk_disable_autosuspend) 1815 usb_autopm_put_interface(intf); 1816 1817 + onboard_dev_destroy_pdevs(&hub->onboard_devs); 1818 1819 hub_put(hub); 1820 } ··· 1933 INIT_DELAYED_WORK(&hub->leds, led_work); 1934 INIT_DELAYED_WORK(&hub->init_work, NULL); 1935 INIT_WORK(&hub->events, hub_event); 1936 + INIT_LIST_HEAD(&hub->onboard_devs); 1937 spin_lock_init(&hub->irq_urb_lock); 1938 timer_setup(&hub->irq_urb_retry, hub_retry_irq_urb, 0); 1939 usb_get_intf(intf); ··· 1963 } 1964 1965 if (hub_configure(hub, &desc->endpoint[0].desc) >= 0) { 1966 + onboard_dev_create_pdevs(hdev, &hub->onboard_devs); 1967 1968 return 0; 1969 } ··· 2207 mutex_lock(&bus->devnum_next_mutex); 2208 2209 /* Try to allocate the next devnum beginning at bus->devnum_next. */ 2210 + devnum = find_next_zero_bit(bus->devmap, 128, bus->devnum_next); 2211 if (devnum >= 128) 2212 + devnum = find_next_zero_bit(bus->devmap, 128, 1); 2213 bus->devnum_next = (devnum >= 127 ? 1 : devnum + 1); 2214 if (devnum < 128) { 2215 + set_bit(devnum, bus->devmap); 2216 udev->devnum = devnum; 2217 } 2218 mutex_unlock(&bus->devnum_next_mutex); ··· 2222 static void release_devnum(struct usb_device *udev) 2223 { 2224 if (udev->devnum > 0) { 2225 + clear_bit(udev->devnum, udev->bus->devmap); 2226 udev->devnum = -1; 2227 } 2228 }
+1 -1
drivers/usb/core/hub.h
··· 74 spinlock_t irq_urb_lock; 75 struct timer_list irq_urb_retry; 76 struct usb_port **ports; 77 - struct list_head onboard_hub_devs; 78 }; 79 80 /**
··· 74 spinlock_t irq_urb_lock; 75 struct timer_list irq_urb_retry; 76 struct usb_port **ports; 77 + struct list_head onboard_devs; 78 }; 79 80 /**
+42
drivers/usb/dwc2/core.c
··· 249 dwc2_writel(hsotg, gpwrdn, GPWRDN); 250 udelay(10); 251 252 /* Disable PMU interrupt */ 253 gpwrdn = dwc2_readl(hsotg, GPWRDN); 254 gpwrdn &= ~GPWRDN_PMUINTSEL; ··· 980 dwc2_writel(hsotg, hcfg, HCFG); 981 } 982 983 static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) 984 { 985 u32 usbcfg, ggpio, i2cctl; ··· 1031 if (!(usbcfg & GUSBCFG_PHYSEL)) { 1032 usbcfg |= GUSBCFG_PHYSEL; 1033 dwc2_writel(hsotg, usbcfg, GUSBCFG); 1034 1035 /* Reset after a PHY select */ 1036 retval = dwc2_core_reset(hsotg, false);
··· 249 dwc2_writel(hsotg, gpwrdn, GPWRDN); 250 udelay(10); 251 252 + /* Reset ULPI latch */ 253 + gpwrdn = dwc2_readl(hsotg, GPWRDN); 254 + gpwrdn &= ~GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY; 255 + dwc2_writel(hsotg, gpwrdn, GPWRDN); 256 + 257 /* Disable PMU interrupt */ 258 gpwrdn = dwc2_readl(hsotg, GPWRDN); 259 gpwrdn &= ~GPWRDN_PMUINTSEL; ··· 975 dwc2_writel(hsotg, hcfg, HCFG); 976 } 977 978 + static void dwc2_set_clock_switch_timer(struct dwc2_hsotg *hsotg) 979 + { 980 + u32 grstctl, gsnpsid, val = 0; 981 + 982 + gsnpsid = dwc2_readl(hsotg, GSNPSID); 983 + 984 + /* 985 + * Applicable only to HSOTG core v5.00a or higher. 986 + * Not applicable to HS/FS IOT devices. 987 + */ 988 + if ((gsnpsid & ~DWC2_CORE_REV_MASK) != DWC2_OTG_ID || 989 + gsnpsid < DWC2_CORE_REV_5_00a) 990 + return; 991 + 992 + if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI && 993 + hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_NOT_SUPPORTED) || 994 + (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && 995 + hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_NOT_SUPPORTED) || 996 + (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED && 997 + hsotg->hw_params.fs_phy_type != GHWCFG2_FS_PHY_TYPE_NOT_SUPPORTED)) { 998 + val = GRSTCTL_CLOCK_SWITH_TIMER_VALUE_DIS; 999 + } 1000 + 1001 + if (hsotg->params.speed == DWC2_SPEED_PARAM_LOW && 1002 + hsotg->hw_params.hs_phy_type != GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED && 1003 + hsotg->hw_params.fs_phy_type != GHWCFG2_FS_PHY_TYPE_NOT_SUPPORTED) { 1004 + val = GRSTCTL_CLOCK_SWITH_TIMER_VALUE_147; 1005 + } 1006 + 1007 + grstctl = dwc2_readl(hsotg, GRSTCTL); 1008 + grstctl &= ~GRSTCTL_CLOCK_SWITH_TIMER_MASK; 1009 + grstctl |= GRSTCTL_CLOCK_SWITH_TIMER(val); 1010 + dwc2_writel(hsotg, grstctl, GRSTCTL); 1011 + } 1012 + 1013 static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) 1014 { 1015 u32 usbcfg, ggpio, i2cctl; ··· 991 if (!(usbcfg & GUSBCFG_PHYSEL)) { 992 usbcfg |= GUSBCFG_PHYSEL; 993 dwc2_writel(hsotg, usbcfg, GUSBCFG); 994 + 995 + dwc2_set_clock_switch_timer(hsotg); 996 997 /* Reset after a PHY select */ 998 retval = dwc2_core_reset(hsotg, false);
+8
drivers/usb/dwc2/core.h
··· 288 * core has been configured to work at either data path 289 * width. 290 * 8 or 16 (default 16 if available) 291 * @phy_ulpi_ddr: Specifies whether the ULPI operates at double or single 292 * data rate. This parameter is only applicable if phy_type 293 * is ULPI. ··· 447 #define DWC2_SPEED_PARAM_LOW 2 448 449 u8 phy_utmi_width; 450 bool phy_ulpi_ddr; 451 bool phy_ulpi_ext_vbus; 452 bool enable_dynamic_fifo; ··· 1116 #define DWC2_CORE_REV_3_10a 0x4f54310a 1117 #define DWC2_CORE_REV_4_00a 0x4f54400a 1118 #define DWC2_CORE_REV_4_20a 0x4f54420a 1119 #define DWC2_FS_IOT_REV_1_00a 0x5531100a 1120 #define DWC2_HS_IOT_REV_1_00a 0x5532100a 1121 #define DWC2_CORE_REV_MASK 0x0000ffff 1122 1123 /* DWC OTG HW Core ID */
··· 288 * core has been configured to work at either data path 289 * width. 290 * 8 or 16 (default 16 if available) 291 + * @eusb2_disc: Specifies whether eUSB2 PHY disconnect support flow 292 + * applicable or no. Applicable in device mode of HSOTG 293 + * and HS IOT cores v5.00 or higher. 294 + * 0 - eUSB2 PHY disconnect support flow not applicable 295 + * 1 - eUSB2 PHY disconnect support flow applicable 296 * @phy_ulpi_ddr: Specifies whether the ULPI operates at double or single 297 * data rate. This parameter is only applicable if phy_type 298 * is ULPI. ··· 442 #define DWC2_SPEED_PARAM_LOW 2 443 444 u8 phy_utmi_width; 445 + bool eusb2_disc; 446 bool phy_ulpi_ddr; 447 bool phy_ulpi_ext_vbus; 448 bool enable_dynamic_fifo; ··· 1110 #define DWC2_CORE_REV_3_10a 0x4f54310a 1111 #define DWC2_CORE_REV_4_00a 0x4f54400a 1112 #define DWC2_CORE_REV_4_20a 0x4f54420a 1113 + #define DWC2_CORE_REV_5_00a 0x4f54500a 1114 #define DWC2_FS_IOT_REV_1_00a 0x5531100a 1115 #define DWC2_HS_IOT_REV_1_00a 0x5532100a 1116 + #define DWC2_HS_IOT_REV_5_00a 0x5532500a 1117 #define DWC2_CORE_REV_MASK 0x0000ffff 1118 1119 /* DWC OTG HW Core ID */
+23 -3
drivers/usb/dwc2/core_intr.c
··· 84 u32 gotgint; 85 u32 gotgctl; 86 u32 gintmsk; 87 88 gotgint = dwc2_readl(hsotg, GOTGINT); 89 gotgctl = dwc2_readl(hsotg, GOTGCTL); ··· 97 dwc2_op_state_str(hsotg)); 98 gotgctl = dwc2_readl(hsotg, GOTGCTL); 99 100 - if (dwc2_is_device_mode(hsotg)) 101 dwc2_hsotg_disconnect(hsotg); 102 103 if (hsotg->op_state == OTG_STATE_B_HOST) { 104 hsotg->op_state = OTG_STATE_B_PERIPHERAL; ··· 132 * disconnected 133 */ 134 /* Reset to a clean state */ 135 - hsotg->lx_state = DWC2_L0; 136 } 137 138 gotgctl = dwc2_readl(hsotg, GOTGCTL); ··· 301 hsotg->lx_state); 302 303 if (dwc2_is_device_mode(hsotg)) { 304 - if (hsotg->lx_state == DWC2_L2) { 305 if (hsotg->in_ppd) { 306 ret = dwc2_exit_partial_power_down(hsotg, 0, 307 true); ··· 728 gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); 729 gpwrdn_tmp &= ~GPWRDN_PMUINTSEL; 730 dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); 731 732 /* De-assert Wakeup Logic */ 733 gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN);
··· 84 u32 gotgint; 85 u32 gotgctl; 86 u32 gintmsk; 87 + u32 pcgctl; 88 89 gotgint = dwc2_readl(hsotg, GOTGINT); 90 gotgctl = dwc2_readl(hsotg, GOTGCTL); ··· 96 dwc2_op_state_str(hsotg)); 97 gotgctl = dwc2_readl(hsotg, GOTGCTL); 98 99 + if (dwc2_is_device_mode(hsotg)) { 100 + if (hsotg->params.eusb2_disc) { 101 + /* Clear the Gate hclk. */ 102 + pcgctl = dwc2_readl(hsotg, PCGCTL); 103 + pcgctl &= ~PCGCTL_GATEHCLK; 104 + dwc2_writel(hsotg, pcgctl, PCGCTL); 105 + udelay(5); 106 + 107 + /* Clear Phy Clock bit. */ 108 + pcgctl = dwc2_readl(hsotg, PCGCTL); 109 + pcgctl &= ~PCGCTL_STOPPCLK; 110 + dwc2_writel(hsotg, pcgctl, PCGCTL); 111 + udelay(5); 112 + } 113 dwc2_hsotg_disconnect(hsotg); 114 + } 115 116 if (hsotg->op_state == OTG_STATE_B_HOST) { 117 hsotg->op_state = OTG_STATE_B_PERIPHERAL; ··· 117 * disconnected 118 */ 119 /* Reset to a clean state */ 120 + hsotg->lx_state = DWC2_L3; 121 } 122 123 gotgctl = dwc2_readl(hsotg, GOTGCTL); ··· 286 hsotg->lx_state); 287 288 if (dwc2_is_device_mode(hsotg)) { 289 + if (hsotg->lx_state != DWC2_L0) { 290 if (hsotg->in_ppd) { 291 ret = dwc2_exit_partial_power_down(hsotg, 0, 292 true); ··· 713 gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); 714 gpwrdn_tmp &= ~GPWRDN_PMUINTSEL; 715 dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); 716 + 717 + /* Reset ULPI latch */ 718 + gpwrdn = dwc2_readl(hsotg, GPWRDN); 719 + gpwrdn &= ~GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY; 720 + dwc2_writel(hsotg, gpwrdn, GPWRDN); 721 722 /* De-assert Wakeup Logic */ 723 gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN);
+1
drivers/usb/dwc2/debugfs.c
··· 686 print_param(seq, p, host_channels); 687 print_param(seq, p, phy_type); 688 print_param(seq, p, phy_utmi_width); 689 print_param(seq, p, phy_ulpi_ddr); 690 print_param(seq, p, phy_ulpi_ext_vbus); 691 print_param(seq, p, i2c_enable);
··· 686 print_param(seq, p, host_channels); 687 print_param(seq, p, phy_type); 688 print_param(seq, p, phy_utmi_width); 689 + print_param(seq, p, eusb2_disc); 690 print_param(seq, p, phy_ulpi_ddr); 691 print_param(seq, p, phy_ulpi_ext_vbus); 692 print_param(seq, p, i2c_enable);
+27 -1
drivers/usb/dwc2/gadget.c
··· 3424 3425 dwc2_hsotg_init_fifo(hsotg); 3426 3427 - if (!is_usb_reset) 3428 dwc2_set_bit(hsotg, DCTL, DCTL_SFTDISCON); 3429 3430 dcfg |= DCFG_EPMISCNT(1); 3431 ··· 5319 int dwc2_gadget_enter_hibernation(struct dwc2_hsotg *hsotg) 5320 { 5321 u32 gpwrdn; 5322 int ret = 0; 5323 5324 /* Change to L2(suspend) state */ ··· 5340 } 5341 5342 gpwrdn = GPWRDN_PWRDNRSTN; 5343 gpwrdn |= GPWRDN_PMUACTV; 5344 dwc2_writel(hsotg, gpwrdn, GPWRDN); 5345 udelay(10); ··· 5455 /* On USB Reset, reset device address to zero */ 5456 if (reset) 5457 dwc2_clear_bit(hsotg, DCFG, DCFG_DEVADDR_MASK); 5458 5459 /* De-assert Wakeup Logic */ 5460 gpwrdn = dwc2_readl(hsotg, GPWRDN);
··· 3424 3425 dwc2_hsotg_init_fifo(hsotg); 3426 3427 + if (!is_usb_reset) { 3428 dwc2_set_bit(hsotg, DCTL, DCTL_SFTDISCON); 3429 + if (hsotg->params.eusb2_disc) 3430 + dwc2_set_bit(hsotg, GOTGCTL, GOTGCTL_EUSB2_DISC_SUPP); 3431 + } 3432 3433 dcfg |= DCFG_EPMISCNT(1); 3434 ··· 5316 int dwc2_gadget_enter_hibernation(struct dwc2_hsotg *hsotg) 5317 { 5318 u32 gpwrdn; 5319 + u32 gusbcfg; 5320 + u32 pcgcctl; 5321 int ret = 0; 5322 5323 /* Change to L2(suspend) state */ ··· 5335 } 5336 5337 gpwrdn = GPWRDN_PWRDNRSTN; 5338 + udelay(10); 5339 + gusbcfg = dwc2_readl(hsotg, GUSBCFG); 5340 + if (gusbcfg & GUSBCFG_ULPI_UTMI_SEL) { 5341 + /* ULPI interface */ 5342 + gpwrdn |= GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY; 5343 + } 5344 + dwc2_writel(hsotg, gpwrdn, GPWRDN); 5345 + udelay(10); 5346 + 5347 + /* Suspend the Phy Clock */ 5348 + pcgcctl = dwc2_readl(hsotg, PCGCTL); 5349 + pcgcctl |= PCGCTL_STOPPCLK; 5350 + dwc2_writel(hsotg, pcgcctl, PCGCTL); 5351 + udelay(10); 5352 + 5353 + gpwrdn = dwc2_readl(hsotg, GPWRDN); 5354 gpwrdn |= GPWRDN_PMUACTV; 5355 dwc2_writel(hsotg, gpwrdn, GPWRDN); 5356 udelay(10); ··· 5434 /* On USB Reset, reset device address to zero */ 5435 if (reset) 5436 dwc2_clear_bit(hsotg, DCFG, DCFG_DEVADDR_MASK); 5437 + 5438 + /* Reset ULPI latch */ 5439 + gpwrdn = dwc2_readl(hsotg, GPWRDN); 5440 + gpwrdn &= ~GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY; 5441 + dwc2_writel(hsotg, gpwrdn, GPWRDN); 5442 5443 /* De-assert Wakeup Logic */ 5444 gpwrdn = dwc2_readl(hsotg, GPWRDN);
+10
drivers/usb/dwc2/hcd.c
··· 5525 gusbcfg = dwc2_readl(hsotg, GUSBCFG); 5526 if (gusbcfg & GUSBCFG_ULPI_UTMI_SEL) { 5527 /* ULPI interface */ 5528 /* Suspend the Phy Clock */ 5529 pcgcctl = dwc2_readl(hsotg, PCGCTL); 5530 pcgcctl |= PCGCTL_STOPPCLK; ··· 5635 /* Restore GUSBCFG, HCFG */ 5636 dwc2_writel(hsotg, gr->gusbcfg, GUSBCFG); 5637 dwc2_writel(hsotg, hr->hcfg, HCFG); 5638 5639 /* De-assert Wakeup Logic */ 5640 if (!(rem_wakeup && hsotg->hw_params.snpsid >= DWC2_CORE_REV_4_30a)) {
··· 5525 gusbcfg = dwc2_readl(hsotg, GUSBCFG); 5526 if (gusbcfg & GUSBCFG_ULPI_UTMI_SEL) { 5527 /* ULPI interface */ 5528 + udelay(10); 5529 + gpwrdn = dwc2_readl(hsotg, GPWRDN); 5530 + gpwrdn |= GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY; 5531 + dwc2_writel(hsotg, gpwrdn, GPWRDN); 5532 + udelay(10); 5533 /* Suspend the Phy Clock */ 5534 pcgcctl = dwc2_readl(hsotg, PCGCTL); 5535 pcgcctl |= PCGCTL_STOPPCLK; ··· 5630 /* Restore GUSBCFG, HCFG */ 5631 dwc2_writel(hsotg, gr->gusbcfg, GUSBCFG); 5632 dwc2_writel(hsotg, hr->hcfg, HCFG); 5633 + 5634 + /* Reset ULPI latch */ 5635 + gpwrdn = dwc2_readl(hsotg, GPWRDN); 5636 + gpwrdn &= ~GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY; 5637 + dwc2_writel(hsotg, gpwrdn, GPWRDN); 5638 5639 /* De-assert Wakeup Logic */ 5640 if (!(rem_wakeup && hsotg->hw_params.snpsid >= DWC2_CORE_REV_4_30a)) {
+8 -44
drivers/usb/dwc2/hcd_queue.c
··· 16 #include <linux/interrupt.h> 17 #include <linux/dma-mapping.h> 18 #include <linux/io.h> 19 #include <linux/slab.h> 20 #include <linux/usb.h> 21 ··· 361 362 #ifdef DWC2_PRINT_SCHEDULE 363 /* 364 - * cat_printf() - A printf() + strcat() helper 365 - * 366 - * This is useful for concatenating a bunch of strings where each string is 367 - * constructed using printf. 368 - * 369 - * @buf: The destination buffer; will be updated to point after the printed 370 - * data. 371 - * @size: The number of bytes in the buffer (includes space for '\0'). 372 - * @fmt: The format for printf. 373 - * @...: The args for printf. 374 - */ 375 - static __printf(3, 4) 376 - void cat_printf(char **buf, size_t *size, const char *fmt, ...) 377 - { 378 - va_list args; 379 - int i; 380 - 381 - if (*size == 0) 382 - return; 383 - 384 - va_start(args, fmt); 385 - i = vsnprintf(*buf, *size, fmt, args); 386 - va_end(args); 387 - 388 - if (i >= *size) { 389 - (*buf)[*size - 1] = '\0'; 390 - *buf += *size; 391 - *size = 0; 392 - } else { 393 - *buf += i; 394 - *size -= i; 395 - } 396 - } 397 - 398 - /* 399 * pmap_print() - Print the given periodic map 400 * 401 * Will attempt to print out the periodic schedule. ··· 382 int period; 383 384 for (period = 0; period < periods_in_map; period++) { 385 - char tmp[64]; 386 - char *buf = tmp; 387 - size_t buf_size = sizeof(tmp); 388 int period_start = period * bits_per_period; 389 int period_end = period_start + bits_per_period; 390 int start = 0; ··· 406 continue; 407 408 if (!printed) 409 - cat_printf(&buf, &buf_size, "%s %d: ", 410 - period_name, period); 411 else 412 - cat_printf(&buf, &buf_size, ", "); 413 printed = true; 414 415 - cat_printf(&buf, &buf_size, "%d %s -%3d %s", start, 416 - units, start + count - 1, units); 417 count = 0; 418 } 419 420 if (printed) 421 - print_fn(tmp, print_data); 422 } 423 } 424
··· 16 #include <linux/interrupt.h> 17 #include <linux/dma-mapping.h> 18 #include <linux/io.h> 19 + #include <linux/seq_buf.h> 20 #include <linux/slab.h> 21 #include <linux/usb.h> 22 ··· 360 361 #ifdef DWC2_PRINT_SCHEDULE 362 /* 363 * pmap_print() - Print the given periodic map 364 * 365 * Will attempt to print out the periodic schedule. ··· 416 int period; 417 418 for (period = 0; period < periods_in_map; period++) { 419 + DECLARE_SEQ_BUF(buf, 64); 420 int period_start = period * bits_per_period; 421 int period_end = period_start + bits_per_period; 422 int start = 0; ··· 442 continue; 443 444 if (!printed) 445 + seq_buf_printf(&buf, "%s %d: ", 446 + period_name, period); 447 else 448 + seq_buf_puts(&buf, ", "); 449 printed = true; 450 451 + seq_buf_printf(&buf, "%d %s -%3d %s", start, 452 + units, start + count - 1, units); 453 count = 0; 454 } 455 456 if (printed) 457 + print_fn(seq_buf_str(&buf), print_data); 458 } 459 } 460
+14
drivers/usb/dwc2/hw.h
··· 11 #define HSOTG_REG(x) (x) 12 13 #define GOTGCTL HSOTG_REG(0x000) 14 #define GOTGCTL_CHIRPEN BIT(27) 15 #define GOTGCTL_MULT_VALID_BC_MASK (0x1f << 22) 16 #define GOTGCTL_MULT_VALID_BC_SHIFT 22 ··· 99 #define GRSTCTL_AHBIDLE BIT(31) 100 #define GRSTCTL_DMAREQ BIT(30) 101 #define GRSTCTL_CSFTRST_DONE BIT(29) 102 #define GRSTCTL_TXFNUM_MASK (0x1f << 6) 103 #define GRSTCTL_TXFNUM_SHIFT 6 104 #define GRSTCTL_TXFNUM_LIMIT 0x1f ··· 344 #define GLPMCFG_LPMCAP BIT(0) 345 346 #define GPWRDN HSOTG_REG(0x0058) 347 #define GPWRDN_MULT_VAL_ID_BC_MASK (0x1f << 24) 348 #define GPWRDN_MULT_VAL_ID_BC_SHIFT 24 349 #define GPWRDN_ADP_INT BIT(23)
··· 11 #define HSOTG_REG(x) (x) 12 13 #define GOTGCTL HSOTG_REG(0x000) 14 + #define GOTGCTL_EUSB2_DISC_SUPP BIT(28) 15 #define GOTGCTL_CHIRPEN BIT(27) 16 #define GOTGCTL_MULT_VALID_BC_MASK (0x1f << 22) 17 #define GOTGCTL_MULT_VALID_BC_SHIFT 22 ··· 98 #define GRSTCTL_AHBIDLE BIT(31) 99 #define GRSTCTL_DMAREQ BIT(30) 100 #define GRSTCTL_CSFTRST_DONE BIT(29) 101 + #define GRSTCTL_CLOCK_SWITH_TIMER_MASK (0x7 << 11) 102 + #define GRSTCTL_CLOCK_SWITH_TIMER_SHIFT 11 103 + #define GRSTCTL_CLOCK_SWITH_TIMER_VALUE_19 0x0 104 + #define GRSTCTL_CLOCK_SWITH_TIMER_VALUE_15 0x1 105 + #define GRSTCTL_CLOCK_SWITH_TIMER_VALUE_147 0x2 106 + #define GRSTCTL_CLOCK_SWITH_TIMER_VALUE_50 0x3 107 + #define GRSTCTL_CLOCK_SWITH_TIMER_VALUE_100 0x4 108 + #define GRSTCTL_CLOCK_SWITH_TIMER_VALUE_125 0x5 109 + #define GRSTCTL_CLOCK_SWITH_TIMER_VALUE_200 0x6 110 + #define GRSTCTL_CLOCK_SWITH_TIMER_VALUE_DIS 0x7 111 + #define GRSTCTL_CLOCK_SWITH_TIMER(_x) ((_x) << 11) 112 #define GRSTCTL_TXFNUM_MASK (0x1f << 6) 113 #define GRSTCTL_TXFNUM_SHIFT 6 114 #define GRSTCTL_TXFNUM_LIMIT 0x1f ··· 332 #define GLPMCFG_LPMCAP BIT(0) 333 334 #define GPWRDN HSOTG_REG(0x0058) 335 + 336 + #define GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY BIT(29) 337 #define GPWRDN_MULT_VAL_ID_BC_MASK (0x1f << 24) 338 #define GPWRDN_MULT_VAL_ID_BC_SHIFT 24 339 #define GPWRDN_ADP_INT BIT(23)
+43
drivers/usb/dwc2/params.c
··· 201 p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; 202 } 203 204 static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg) 205 { 206 struct dwc2_core_params *p = &hsotg->params; ··· 314 .data = dwc2_set_amlogic_a1_params }, 315 { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params }, 316 { .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params }, 317 { .compatible = "st,stm32f4x9-fsotg", 318 .data = dwc2_set_stm32f4x9_fsotg_params }, 319 { .compatible = "st,stm32f4x9-hsotg" }, ··· 496 dwc2_set_param_lpm(hsotg); 497 p->phy_ulpi_ddr = false; 498 p->phy_ulpi_ext_vbus = false; 499 500 p->enable_dynamic_fifo = hw->enable_dynamic_fifo; 501 p->en_multiple_tx_fifo = hw->en_multiple_tx_fifo; ··· 759 } 760 } 761 762 #define CHECK_RANGE(_param, _min, _max, _def) do { \ 763 if ((int)(hsotg->params._param) < (_min) || \ 764 (hsotg->params._param) > (_max)) { \ ··· 806 dwc2_check_param_speed(hsotg); 807 dwc2_check_param_phy_utmi_width(hsotg); 808 dwc2_check_param_power_down(hsotg); 809 CHECK_BOOL(enable_dynamic_fifo, hw->enable_dynamic_fifo); 810 CHECK_BOOL(en_multiple_tx_fifo, hw->en_multiple_tx_fifo); 811 CHECK_BOOL(i2c_enable, hw->i2c_enable);
··· 201 p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; 202 } 203 204 + static void dwc2_set_cv1800_params(struct dwc2_hsotg *hsotg) 205 + { 206 + struct dwc2_core_params *p = &hsotg->params; 207 + 208 + p->otg_caps.hnp_support = false; 209 + p->otg_caps.srp_support = false; 210 + p->host_dma = false; 211 + p->g_dma = false; 212 + p->speed = DWC2_SPEED_PARAM_HIGH; 213 + p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI; 214 + p->phy_utmi_width = 16; 215 + p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; 216 + p->lpm = false; 217 + p->lpm_clock_gating = false; 218 + p->besl = false; 219 + p->hird_threshold_en = false; 220 + p->power_down = DWC2_POWER_DOWN_PARAM_NONE; 221 + } 222 + 223 static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg) 224 { 225 struct dwc2_core_params *p = &hsotg->params; ··· 295 .data = dwc2_set_amlogic_a1_params }, 296 { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params }, 297 { .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params }, 298 + { .compatible = "sophgo,cv1800-usb", 299 + .data = dwc2_set_cv1800_params }, 300 { .compatible = "st,stm32f4x9-fsotg", 301 .data = dwc2_set_stm32f4x9_fsotg_params }, 302 { .compatible = "st,stm32f4x9-hsotg" }, ··· 475 dwc2_set_param_lpm(hsotg); 476 p->phy_ulpi_ddr = false; 477 p->phy_ulpi_ext_vbus = false; 478 + p->eusb2_disc = false; 479 480 p->enable_dynamic_fifo = hw->enable_dynamic_fifo; 481 p->en_multiple_tx_fifo = hw->en_multiple_tx_fifo; ··· 737 } 738 } 739 740 + static void dwc2_check_param_eusb2_disc(struct dwc2_hsotg *hsotg) 741 + { 742 + u32 gsnpsid; 743 + 744 + if (!hsotg->params.eusb2_disc) 745 + return; 746 + gsnpsid = dwc2_readl(hsotg, GSNPSID); 747 + /* 748 + * eusb2_disc not supported by FS IOT devices. 749 + * For other cores, it supported starting from version 5.00a 750 + */ 751 + if ((gsnpsid & ~DWC2_CORE_REV_MASK) == DWC2_FS_IOT_ID || 752 + (gsnpsid & DWC2_CORE_REV_MASK) < 753 + (DWC2_CORE_REV_5_00a & DWC2_CORE_REV_MASK)) { 754 + hsotg->params.eusb2_disc = false; 755 + return; 756 + } 757 + } 758 + 759 #define CHECK_RANGE(_param, _min, _max, _def) do { \ 760 if ((int)(hsotg->params._param) < (_min) || \ 761 (hsotg->params._param) > (_max)) { \ ··· 765 dwc2_check_param_speed(hsotg); 766 dwc2_check_param_phy_utmi_width(hsotg); 767 dwc2_check_param_power_down(hsotg); 768 + dwc2_check_param_eusb2_disc(hsotg); 769 + 770 CHECK_BOOL(enable_dynamic_fifo, hw->enable_dynamic_fifo); 771 CHECK_BOOL(en_multiple_tx_fifo, hw->en_multiple_tx_fifo); 772 CHECK_BOOL(i2c_enable, hw->i2c_enable);
+248 -72
drivers/usb/dwc3/core.c
··· 39 #include "io.h" 40 41 #include "debug.h" 42 43 #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ 44 ··· 145 int ret; 146 u32 reg; 147 u32 desired_dr_role; 148 149 mutex_lock(&dwc->mutex); 150 spin_lock_irqsave(&dwc->lock, flags); ··· 223 } else { 224 if (dwc->usb2_phy) 225 otg_set_vbus(dwc->usb2_phy->otg, true); 226 - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 227 - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 228 if (dwc->dis_split_quirk) { 229 reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); 230 reg |= DWC3_GUCTL3_SPLITDISABLE; ··· 243 244 if (dwc->usb2_phy) 245 otg_set_vbus(dwc->usb2_phy->otg, false); 246 - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 247 - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 248 249 ret = dwc3_gadget_init(dwc); 250 if (ret) ··· 512 static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned int length) 513 { 514 struct dwc3_event_buffer *evt; 515 516 evt = dwc3_alloc_one_event_buffer(dwc, length); 517 if (IS_ERR(evt)) { ··· 540 { 541 struct dwc3_event_buffer *evt; 542 543 evt = dwc->ev_buf; 544 evt->lpos = 0; 545 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), ··· 559 void dwc3_event_buffers_cleanup(struct dwc3 *dwc) 560 { 561 struct dwc3_event_buffer *evt; 562 563 evt = dwc->ev_buf; 564 ··· 615 return ret; 616 } 617 618 - /** 619 - * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core 620 - * @dwc: Pointer to our controller context structure 621 - * 622 - * Returns 0 on success. The USB PHY interfaces are configured but not 623 - * initialized. The PHY interfaces and the PHYs get initialized together with 624 - * the core in dwc3_core_init. 625 - */ 626 - static int dwc3_phy_setup(struct dwc3 *dwc) 627 { 628 u32 reg; 629 630 - reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); 631 632 /* 633 * Make sure UX_EXIT_PX is cleared as that causes issues with some ··· 666 if (dwc->dis_del_phy_power_chg_quirk) 667 reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE; 668 669 - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); 670 671 - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 672 673 /* Select the HS PHY interface */ 674 switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { ··· 687 } else if (dwc->hsphy_interface && 688 !strncmp(dwc->hsphy_interface, "ulpi", 4)) { 689 reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI; 690 - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 691 } else { 692 /* Relying on default value. */ 693 if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI)) ··· 745 if (dwc->ulpi_ext_vbus_drv) 746 reg |= DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV; 747 748 - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 749 750 return 0; 751 } ··· 781 static int dwc3_phy_init(struct dwc3 *dwc) 782 { 783 int ret; 784 785 usb_phy_init(dwc->usb2_phy); 786 usb_phy_init(dwc->usb3_phy); 787 788 - ret = phy_init(dwc->usb2_generic_phy); 789 - if (ret < 0) 790 - goto err_shutdown_usb3_phy; 791 792 - ret = phy_init(dwc->usb3_generic_phy); 793 - if (ret < 0) 794 - goto err_exit_usb2_phy; 795 796 return 0; 797 798 err_exit_usb2_phy: 799 - phy_exit(dwc->usb2_generic_phy); 800 - err_shutdown_usb3_phy: 801 usb_phy_shutdown(dwc->usb3_phy); 802 usb_phy_shutdown(dwc->usb2_phy); 803 ··· 817 818 static void dwc3_phy_exit(struct dwc3 *dwc) 819 { 820 - phy_exit(dwc->usb3_generic_phy); 821 - phy_exit(dwc->usb2_generic_phy); 822 823 usb_phy_shutdown(dwc->usb3_phy); 824 usb_phy_shutdown(dwc->usb2_phy); ··· 832 static int dwc3_phy_power_on(struct dwc3 *dwc) 833 { 834 int ret; 835 836 usb_phy_set_suspend(dwc->usb2_phy, 0); 837 usb_phy_set_suspend(dwc->usb3_phy, 0); 838 839 - ret = phy_power_on(dwc->usb2_generic_phy); 840 - if (ret < 0) 841 - goto err_suspend_usb3_phy; 842 843 - ret = phy_power_on(dwc->usb3_generic_phy); 844 - if (ret < 0) 845 - goto err_power_off_usb2_phy; 846 847 return 0; 848 849 err_power_off_usb2_phy: 850 - phy_power_off(dwc->usb2_generic_phy); 851 - err_suspend_usb3_phy: 852 usb_phy_set_suspend(dwc->usb3_phy, 1); 853 usb_phy_set_suspend(dwc->usb2_phy, 1); 854 ··· 868 869 static void dwc3_phy_power_off(struct dwc3 *dwc) 870 { 871 - phy_power_off(dwc->usb3_generic_phy); 872 - phy_power_off(dwc->usb2_generic_phy); 873 874 usb_phy_set_suspend(dwc->usb3_phy, 1); 875 usb_phy_set_suspend(dwc->usb2_phy, 1); ··· 1384 if (dwc->parkmode_disable_hs_quirk) 1385 reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS; 1386 1387 - if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY) && 1388 - (dwc->maximum_speed == USB_SPEED_HIGH || 1389 - dwc->maximum_speed == USB_SPEED_FULL)) 1390 - reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; 1391 1392 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 1393 } ··· 1425 { 1426 struct device *dev = dwc->dev; 1427 struct device_node *node = dev->of_node; 1428 int ret; 1429 1430 if (node) { 1431 dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); ··· 1453 return dev_err_probe(dev, ret, "no usb3 phy configured\n"); 1454 } 1455 1456 - dwc->usb2_generic_phy = devm_phy_get(dev, "usb2-phy"); 1457 - if (IS_ERR(dwc->usb2_generic_phy)) { 1458 - ret = PTR_ERR(dwc->usb2_generic_phy); 1459 - if (ret == -ENOSYS || ret == -ENODEV) 1460 - dwc->usb2_generic_phy = NULL; 1461 else 1462 - return dev_err_probe(dev, ret, "no usb2 phy configured\n"); 1463 } 1464 1465 - dwc->usb3_generic_phy = devm_phy_get(dev, "usb3-phy"); 1466 - if (IS_ERR(dwc->usb3_generic_phy)) { 1467 - ret = PTR_ERR(dwc->usb3_generic_phy); 1468 - if (ret == -ENOSYS || ret == -ENODEV) 1469 - dwc->usb3_generic_phy = NULL; 1470 else 1471 - return dev_err_probe(dev, ret, "no usb3 phy configured\n"); 1472 } 1473 1474 return 0; ··· 1494 { 1495 struct device *dev = dwc->dev; 1496 int ret; 1497 1498 switch (dwc->dr_mode) { 1499 case USB_DR_MODE_PERIPHERAL: ··· 1502 1503 if (dwc->usb2_phy) 1504 otg_set_vbus(dwc->usb2_phy->otg, false); 1505 - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 1506 - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 1507 1508 ret = dwc3_gadget_init(dwc); 1509 if (ret) ··· 1514 1515 if (dwc->usb2_phy) 1516 otg_set_vbus(dwc->usb2_phy->otg, true); 1517 - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 1518 - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 1519 1520 ret = dwc3_host_init(dwc); 1521 if (ret) ··· 1969 return 0; 1970 } 1971 1972 static int dwc3_probe(struct platform_device *pdev) 1973 { 1974 struct device *dev = &pdev->dev; 1975 struct resource *res, dwc_res; 1976 void __iomem *regs; 1977 struct dwc3 *dwc; 1978 int ret; ··· 2104 ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(64)); 2105 if (ret) 2106 goto err_disable_clks; 2107 } 2108 2109 spin_lock_init(&dwc->lock); ··· 2252 { 2253 unsigned long flags; 2254 u32 reg; 2255 2256 switch (dwc->current_dr_role) { 2257 case DWC3_GCTL_PRTCAP_DEVICE: ··· 2271 /* Let controller to suspend HSPHY before PHY driver suspends */ 2272 if (dwc->dis_u2_susphy_quirk || 2273 dwc->dis_enblslpm_quirk) { 2274 - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 2275 - reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | 2276 - DWC3_GUSB2PHYCFG_SUSPHY; 2277 - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 2278 2279 /* Give some time for USB2 PHY to suspend */ 2280 usleep_range(5000, 6000); 2281 } 2282 2283 - phy_pm_runtime_put_sync(dwc->usb2_generic_phy); 2284 - phy_pm_runtime_put_sync(dwc->usb3_generic_phy); 2285 break; 2286 case DWC3_GCTL_PRTCAP_OTG: 2287 /* do nothing during runtime_suspend */ ··· 2315 unsigned long flags; 2316 int ret; 2317 u32 reg; 2318 2319 switch (dwc->current_dr_role) { 2320 case DWC3_GCTL_PRTCAP_DEVICE: ··· 2335 break; 2336 } 2337 /* Restore GUSB2PHYCFG bits that were modified in suspend */ 2338 - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 2339 - if (dwc->dis_u2_susphy_quirk) 2340 - reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 2341 2342 - if (dwc->dis_enblslpm_quirk) 2343 - reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 2344 2345 - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 2346 2347 - phy_pm_runtime_get_sync(dwc->usb2_generic_phy); 2348 - phy_pm_runtime_get_sync(dwc->usb3_generic_phy); 2349 break; 2350 case DWC3_GCTL_PRTCAP_OTG: 2351 /* nothing to do on runtime_resume */
··· 39 #include "io.h" 40 41 #include "debug.h" 42 + #include "../host/xhci-ext-caps.h" 43 44 #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ 45 ··· 144 int ret; 145 u32 reg; 146 u32 desired_dr_role; 147 + int i; 148 149 mutex_lock(&dwc->mutex); 150 spin_lock_irqsave(&dwc->lock, flags); ··· 221 } else { 222 if (dwc->usb2_phy) 223 otg_set_vbus(dwc->usb2_phy->otg, true); 224 + 225 + for (i = 0; i < dwc->num_usb2_ports; i++) 226 + phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); 227 + for (i = 0; i < dwc->num_usb3_ports; i++) 228 + phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); 229 + 230 if (dwc->dis_split_quirk) { 231 reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); 232 reg |= DWC3_GUCTL3_SPLITDISABLE; ··· 237 238 if (dwc->usb2_phy) 239 otg_set_vbus(dwc->usb2_phy->otg, false); 240 + phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); 241 + phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); 242 243 ret = dwc3_gadget_init(dwc); 244 if (ret) ··· 506 static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned int length) 507 { 508 struct dwc3_event_buffer *evt; 509 + unsigned int hw_mode; 510 + 511 + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); 512 + if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) { 513 + dwc->ev_buf = NULL; 514 + return 0; 515 + } 516 517 evt = dwc3_alloc_one_event_buffer(dwc, length); 518 if (IS_ERR(evt)) { ··· 527 { 528 struct dwc3_event_buffer *evt; 529 530 + if (!dwc->ev_buf) 531 + return 0; 532 + 533 evt = dwc->ev_buf; 534 evt->lpos = 0; 535 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), ··· 543 void dwc3_event_buffers_cleanup(struct dwc3 *dwc) 544 { 545 struct dwc3_event_buffer *evt; 546 + 547 + if (!dwc->ev_buf) 548 + return; 549 550 evt = dwc->ev_buf; 551 ··· 596 return ret; 597 } 598 599 + static int dwc3_ss_phy_setup(struct dwc3 *dwc, int index) 600 { 601 u32 reg; 602 603 + reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(index)); 604 605 /* 606 * Make sure UX_EXIT_PX is cleared as that causes issues with some ··· 655 if (dwc->dis_del_phy_power_chg_quirk) 656 reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE; 657 658 + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(index), reg); 659 660 + return 0; 661 + } 662 + 663 + static int dwc3_hs_phy_setup(struct dwc3 *dwc, int index) 664 + { 665 + u32 reg; 666 + 667 + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(index)); 668 669 /* Select the HS PHY interface */ 670 switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { ··· 669 } else if (dwc->hsphy_interface && 670 !strncmp(dwc->hsphy_interface, "ulpi", 4)) { 671 reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI; 672 + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); 673 } else { 674 /* Relying on default value. */ 675 if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI)) ··· 727 if (dwc->ulpi_ext_vbus_drv) 728 reg |= DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV; 729 730 + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); 731 + 732 + return 0; 733 + } 734 + 735 + /** 736 + * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core 737 + * @dwc: Pointer to our controller context structure 738 + * 739 + * Returns 0 on success. The USB PHY interfaces are configured but not 740 + * initialized. The PHY interfaces and the PHYs get initialized together with 741 + * the core in dwc3_core_init. 742 + */ 743 + static int dwc3_phy_setup(struct dwc3 *dwc) 744 + { 745 + int i; 746 + int ret; 747 + 748 + for (i = 0; i < dwc->num_usb3_ports; i++) { 749 + ret = dwc3_ss_phy_setup(dwc, i); 750 + if (ret) 751 + return ret; 752 + } 753 + 754 + for (i = 0; i < dwc->num_usb2_ports; i++) { 755 + ret = dwc3_hs_phy_setup(dwc, i); 756 + if (ret) 757 + return ret; 758 + } 759 760 return 0; 761 } ··· 735 static int dwc3_phy_init(struct dwc3 *dwc) 736 { 737 int ret; 738 + int i; 739 + int j; 740 741 usb_phy_init(dwc->usb2_phy); 742 usb_phy_init(dwc->usb3_phy); 743 744 + for (i = 0; i < dwc->num_usb2_ports; i++) { 745 + ret = phy_init(dwc->usb2_generic_phy[i]); 746 + if (ret < 0) 747 + goto err_exit_usb2_phy; 748 + } 749 750 + for (j = 0; j < dwc->num_usb3_ports; j++) { 751 + ret = phy_init(dwc->usb3_generic_phy[j]); 752 + if (ret < 0) 753 + goto err_exit_usb3_phy; 754 + } 755 756 return 0; 757 758 + err_exit_usb3_phy: 759 + while (--j >= 0) 760 + phy_exit(dwc->usb3_generic_phy[j]); 761 + 762 err_exit_usb2_phy: 763 + while (--i >= 0) 764 + phy_exit(dwc->usb2_generic_phy[i]); 765 + 766 usb_phy_shutdown(dwc->usb3_phy); 767 usb_phy_shutdown(dwc->usb2_phy); 768 ··· 760 761 static void dwc3_phy_exit(struct dwc3 *dwc) 762 { 763 + int i; 764 + 765 + for (i = 0; i < dwc->num_usb3_ports; i++) 766 + phy_exit(dwc->usb3_generic_phy[i]); 767 + 768 + for (i = 0; i < dwc->num_usb2_ports; i++) 769 + phy_exit(dwc->usb2_generic_phy[i]); 770 771 usb_phy_shutdown(dwc->usb3_phy); 772 usb_phy_shutdown(dwc->usb2_phy); ··· 770 static int dwc3_phy_power_on(struct dwc3 *dwc) 771 { 772 int ret; 773 + int i; 774 + int j; 775 776 usb_phy_set_suspend(dwc->usb2_phy, 0); 777 usb_phy_set_suspend(dwc->usb3_phy, 0); 778 779 + for (i = 0; i < dwc->num_usb2_ports; i++) { 780 + ret = phy_power_on(dwc->usb2_generic_phy[i]); 781 + if (ret < 0) 782 + goto err_power_off_usb2_phy; 783 + } 784 785 + for (j = 0; j < dwc->num_usb3_ports; j++) { 786 + ret = phy_power_on(dwc->usb3_generic_phy[j]); 787 + if (ret < 0) 788 + goto err_power_off_usb3_phy; 789 + } 790 791 return 0; 792 793 + err_power_off_usb3_phy: 794 + while (--j >= 0) 795 + phy_power_off(dwc->usb3_generic_phy[j]); 796 + 797 err_power_off_usb2_phy: 798 + while (--i >= 0) 799 + phy_power_off(dwc->usb2_generic_phy[i]); 800 + 801 usb_phy_set_suspend(dwc->usb3_phy, 1); 802 usb_phy_set_suspend(dwc->usb2_phy, 1); 803 ··· 795 796 static void dwc3_phy_power_off(struct dwc3 *dwc) 797 { 798 + int i; 799 + 800 + for (i = 0; i < dwc->num_usb3_ports; i++) 801 + phy_power_off(dwc->usb3_generic_phy[i]); 802 + 803 + for (i = 0; i < dwc->num_usb2_ports; i++) 804 + phy_power_off(dwc->usb2_generic_phy[i]); 805 806 usb_phy_set_suspend(dwc->usb3_phy, 1); 807 usb_phy_set_suspend(dwc->usb2_phy, 1); ··· 1306 if (dwc->parkmode_disable_hs_quirk) 1307 reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS; 1308 1309 + if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY)) { 1310 + if (dwc->maximum_speed == USB_SPEED_FULL || 1311 + dwc->maximum_speed == USB_SPEED_HIGH) 1312 + reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; 1313 + else 1314 + reg &= ~DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; 1315 + } 1316 1317 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 1318 } ··· 1344 { 1345 struct device *dev = dwc->dev; 1346 struct device_node *node = dev->of_node; 1347 + char phy_name[9]; 1348 int ret; 1349 + u8 i; 1350 1351 if (node) { 1352 dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); ··· 1370 return dev_err_probe(dev, ret, "no usb3 phy configured\n"); 1371 } 1372 1373 + for (i = 0; i < dwc->num_usb2_ports; i++) { 1374 + if (dwc->num_usb2_ports == 1) 1375 + snprintf(phy_name, sizeof(phy_name), "usb2-phy"); 1376 else 1377 + snprintf(phy_name, sizeof(phy_name), "usb2-%u", i); 1378 + 1379 + dwc->usb2_generic_phy[i] = devm_phy_get(dev, phy_name); 1380 + if (IS_ERR(dwc->usb2_generic_phy[i])) { 1381 + ret = PTR_ERR(dwc->usb2_generic_phy[i]); 1382 + if (ret == -ENOSYS || ret == -ENODEV) 1383 + dwc->usb2_generic_phy[i] = NULL; 1384 + else 1385 + return dev_err_probe(dev, ret, "failed to lookup phy %s\n", 1386 + phy_name); 1387 + } 1388 } 1389 1390 + for (i = 0; i < dwc->num_usb3_ports; i++) { 1391 + if (dwc->num_usb3_ports == 1) 1392 + snprintf(phy_name, sizeof(phy_name), "usb3-phy"); 1393 else 1394 + snprintf(phy_name, sizeof(phy_name), "usb3-%u", i); 1395 + 1396 + dwc->usb3_generic_phy[i] = devm_phy_get(dev, phy_name); 1397 + if (IS_ERR(dwc->usb3_generic_phy[i])) { 1398 + ret = PTR_ERR(dwc->usb3_generic_phy[i]); 1399 + if (ret == -ENOSYS || ret == -ENODEV) 1400 + dwc->usb3_generic_phy[i] = NULL; 1401 + else 1402 + return dev_err_probe(dev, ret, "failed to lookup phy %s\n", 1403 + phy_name); 1404 + } 1405 } 1406 1407 return 0; ··· 1395 { 1396 struct device *dev = dwc->dev; 1397 int ret; 1398 + int i; 1399 1400 switch (dwc->dr_mode) { 1401 case USB_DR_MODE_PERIPHERAL: ··· 1402 1403 if (dwc->usb2_phy) 1404 otg_set_vbus(dwc->usb2_phy->otg, false); 1405 + phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); 1406 + phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); 1407 1408 ret = dwc3_gadget_init(dwc); 1409 if (ret) ··· 1414 1415 if (dwc->usb2_phy) 1416 otg_set_vbus(dwc->usb2_phy->otg, true); 1417 + for (i = 0; i < dwc->num_usb2_ports; i++) 1418 + phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); 1419 + for (i = 0; i < dwc->num_usb3_ports; i++) 1420 + phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); 1421 1422 ret = dwc3_host_init(dwc); 1423 if (ret) ··· 1867 return 0; 1868 } 1869 1870 + static int dwc3_get_num_ports(struct dwc3 *dwc) 1871 + { 1872 + void __iomem *base; 1873 + u8 major_revision; 1874 + u32 offset; 1875 + u32 val; 1876 + 1877 + /* 1878 + * Remap xHCI address space to access XHCI ext cap regs since it is 1879 + * needed to get information on number of ports present. 1880 + */ 1881 + base = ioremap(dwc->xhci_resources[0].start, 1882 + resource_size(&dwc->xhci_resources[0])); 1883 + if (!base) 1884 + return -ENOMEM; 1885 + 1886 + offset = 0; 1887 + do { 1888 + offset = xhci_find_next_ext_cap(base, offset, 1889 + XHCI_EXT_CAPS_PROTOCOL); 1890 + if (!offset) 1891 + break; 1892 + 1893 + val = readl(base + offset); 1894 + major_revision = XHCI_EXT_PORT_MAJOR(val); 1895 + 1896 + val = readl(base + offset + 0x08); 1897 + if (major_revision == 0x03) { 1898 + dwc->num_usb3_ports += XHCI_EXT_PORT_COUNT(val); 1899 + } else if (major_revision <= 0x02) { 1900 + dwc->num_usb2_ports += XHCI_EXT_PORT_COUNT(val); 1901 + } else { 1902 + dev_warn(dwc->dev, "unrecognized port major revision %d\n", 1903 + major_revision); 1904 + } 1905 + } while (1); 1906 + 1907 + dev_dbg(dwc->dev, "hs-ports: %u ss-ports: %u\n", 1908 + dwc->num_usb2_ports, dwc->num_usb3_ports); 1909 + 1910 + iounmap(base); 1911 + 1912 + if (dwc->num_usb2_ports > DWC3_USB2_MAX_PORTS || 1913 + dwc->num_usb3_ports > DWC3_USB3_MAX_PORTS) 1914 + return -EINVAL; 1915 + 1916 + return 0; 1917 + } 1918 + 1919 static int dwc3_probe(struct platform_device *pdev) 1920 { 1921 struct device *dev = &pdev->dev; 1922 struct resource *res, dwc_res; 1923 + unsigned int hw_mode; 1924 void __iomem *regs; 1925 struct dwc3 *dwc; 1926 int ret; ··· 1952 ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(64)); 1953 if (ret) 1954 goto err_disable_clks; 1955 + } 1956 + 1957 + /* 1958 + * Currently only DWC3 controllers that are host-only capable 1959 + * can have more than one port. 1960 + */ 1961 + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); 1962 + if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) { 1963 + ret = dwc3_get_num_ports(dwc); 1964 + if (ret) 1965 + goto err_disable_clks; 1966 + } else { 1967 + dwc->num_usb2_ports = 1; 1968 + dwc->num_usb3_ports = 1; 1969 } 1970 1971 spin_lock_init(&dwc->lock); ··· 2086 { 2087 unsigned long flags; 2088 u32 reg; 2089 + int i; 2090 2091 switch (dwc->current_dr_role) { 2092 case DWC3_GCTL_PRTCAP_DEVICE: ··· 2104 /* Let controller to suspend HSPHY before PHY driver suspends */ 2105 if (dwc->dis_u2_susphy_quirk || 2106 dwc->dis_enblslpm_quirk) { 2107 + for (i = 0; i < dwc->num_usb2_ports; i++) { 2108 + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); 2109 + reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | 2110 + DWC3_GUSB2PHYCFG_SUSPHY; 2111 + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); 2112 + } 2113 2114 /* Give some time for USB2 PHY to suspend */ 2115 usleep_range(5000, 6000); 2116 } 2117 2118 + for (i = 0; i < dwc->num_usb2_ports; i++) 2119 + phy_pm_runtime_put_sync(dwc->usb2_generic_phy[i]); 2120 + for (i = 0; i < dwc->num_usb3_ports; i++) 2121 + phy_pm_runtime_put_sync(dwc->usb3_generic_phy[i]); 2122 break; 2123 case DWC3_GCTL_PRTCAP_OTG: 2124 /* do nothing during runtime_suspend */ ··· 2144 unsigned long flags; 2145 int ret; 2146 u32 reg; 2147 + int i; 2148 2149 switch (dwc->current_dr_role) { 2150 case DWC3_GCTL_PRTCAP_DEVICE: ··· 2163 break; 2164 } 2165 /* Restore GUSB2PHYCFG bits that were modified in suspend */ 2166 + for (i = 0; i < dwc->num_usb2_ports; i++) { 2167 + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); 2168 + if (dwc->dis_u2_susphy_quirk) 2169 + reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 2170 2171 + if (dwc->dis_enblslpm_quirk) 2172 + reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 2173 2174 + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); 2175 + } 2176 2177 + for (i = 0; i < dwc->num_usb2_ports; i++) 2178 + phy_pm_runtime_get_sync(dwc->usb2_generic_phy[i]); 2179 + for (i = 0; i < dwc->num_usb3_ports; i++) 2180 + phy_pm_runtime_get_sync(dwc->usb3_generic_phy[i]); 2181 break; 2182 case DWC3_GCTL_PRTCAP_OTG: 2183 /* nothing to do on runtime_resume */
+16 -4
drivers/usb/dwc3/core.h
··· 33 34 #include <linux/power_supply.h> 35 36 #define DWC3_MSG_MAX 500 37 38 /* Global constants */ ··· 1044 * @usb_psy: pointer to power supply interface. 1045 * @usb2_phy: pointer to USB2 PHY 1046 * @usb3_phy: pointer to USB3 PHY 1047 - * @usb2_generic_phy: pointer to USB2 PHY 1048 - * @usb3_generic_phy: pointer to USB3 PHY 1049 * @phys_ready: flag to indicate that PHYs are ready 1050 * @ulpi: pointer to ulpi interface 1051 * @ulpi_ready: flag to indicate that ULPI is initialized ··· 1193 struct usb_phy *usb2_phy; 1194 struct usb_phy *usb3_phy; 1195 1196 - struct phy *usb2_generic_phy; 1197 - struct phy *usb3_generic_phy; 1198 1199 bool phys_ready; 1200
··· 33 34 #include <linux/power_supply.h> 35 36 + /* 37 + * DWC3 Multiport controllers support up to 15 High-Speed PHYs 38 + * and 4 SuperSpeed PHYs. 39 + */ 40 + #define DWC3_USB2_MAX_PORTS 15 41 + #define DWC3_USB3_MAX_PORTS 4 42 + 43 #define DWC3_MSG_MAX 500 44 45 /* Global constants */ ··· 1037 * @usb_psy: pointer to power supply interface. 1038 * @usb2_phy: pointer to USB2 PHY 1039 * @usb3_phy: pointer to USB3 PHY 1040 + * @usb2_generic_phy: pointer to array of USB2 PHYs 1041 + * @usb3_generic_phy: pointer to array of USB3 PHYs 1042 + * @num_usb2_ports: number of USB2 ports 1043 + * @num_usb3_ports: number of USB3 ports 1044 * @phys_ready: flag to indicate that PHYs are ready 1045 * @ulpi: pointer to ulpi interface 1046 * @ulpi_ready: flag to indicate that ULPI is initialized ··· 1184 struct usb_phy *usb2_phy; 1185 struct usb_phy *usb3_phy; 1186 1187 + struct phy *usb2_generic_phy[DWC3_USB2_MAX_PORTS]; 1188 + struct phy *usb3_generic_phy[DWC3_USB3_MAX_PORTS]; 1189 + 1190 + u8 num_usb2_ports; 1191 + u8 num_usb3_ports; 1192 1193 bool phys_ready; 1194
+9 -6
drivers/usb/dwc3/drd.c
··· 331 u32 reg; 332 int id; 333 unsigned long flags; 334 335 if (dwc->dr_mode != USB_DR_MODE_OTG) 336 return; ··· 387 } else { 388 if (dwc->usb2_phy) 389 otg_set_vbus(dwc->usb2_phy->otg, true); 390 - if (dwc->usb2_generic_phy) 391 - phy_set_mode(dwc->usb2_generic_phy, 392 - PHY_MODE_USB_HOST); 393 } 394 break; 395 case DWC3_OTG_ROLE_DEVICE: ··· 404 405 if (dwc->usb2_phy) 406 otg_set_vbus(dwc->usb2_phy->otg, false); 407 - if (dwc->usb2_generic_phy) 408 - phy_set_mode(dwc->usb2_generic_phy, 409 - PHY_MODE_USB_DEVICE); 410 ret = dwc3_gadget_init(dwc); 411 if (ret) 412 dev_err(dwc->dev, "failed to initialize peripheral\n");
··· 331 u32 reg; 332 int id; 333 unsigned long flags; 334 + int i; 335 336 if (dwc->dr_mode != USB_DR_MODE_OTG) 337 return; ··· 386 } else { 387 if (dwc->usb2_phy) 388 otg_set_vbus(dwc->usb2_phy->otg, true); 389 + for (i = 0; i < dwc->num_usb2_ports; i++) { 390 + if (dwc->usb2_generic_phy[i]) { 391 + phy_set_mode(dwc->usb2_generic_phy[i], 392 + PHY_MODE_USB_HOST); 393 + } 394 + } 395 } 396 break; 397 case DWC3_OTG_ROLE_DEVICE: ··· 400 401 if (dwc->usb2_phy) 402 otg_set_vbus(dwc->usb2_phy->otg, false); 403 + if (dwc->usb2_generic_phy[0]) 404 + phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); 405 ret = dwc3_gadget_init(dwc); 406 if (ret) 407 dev_err(dwc->dev, "failed to initialize peripheral\n");
+12 -10
drivers/usb/dwc3/dwc3-exynos.c
··· 169 .suspend_clk_idx = -1, 170 }; 171 172 static const struct of_device_id exynos_dwc3_match[] = { 173 { 174 .compatible = "samsung,exynos5250-dwusb3", ··· 189 .compatible = "samsung,exynos850-dwusb3", 190 .data = &exynos850_drvdata, 191 }, { 192 } 193 }; 194 MODULE_DEVICE_TABLE(of, exynos_dwc3_match); 195 196 - #ifdef CONFIG_PM_SLEEP 197 static int dwc3_exynos_suspend(struct device *dev) 198 { 199 struct dwc3_exynos *exynos = dev_get_drvdata(dev); ··· 238 return 0; 239 } 240 241 - static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = { 242 - SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume) 243 - }; 244 - 245 - #define DEV_PM_OPS (&dwc3_exynos_dev_pm_ops) 246 - #else 247 - #define DEV_PM_OPS NULL 248 - #endif /* CONFIG_PM_SLEEP */ 249 250 static struct platform_driver dwc3_exynos_driver = { 251 .probe = dwc3_exynos_probe, ··· 247 .driver = { 248 .name = "exynos-dwc3", 249 .of_match_table = exynos_dwc3_match, 250 - .pm = DEV_PM_OPS, 251 }, 252 }; 253
··· 169 .suspend_clk_idx = -1, 170 }; 171 172 + static const struct dwc3_exynos_driverdata gs101_drvdata = { 173 + .clk_names = { "bus_early", "susp_clk", "link_aclk", "link_pclk" }, 174 + .num_clks = 4, 175 + .suspend_clk_idx = 1, 176 + }; 177 + 178 static const struct of_device_id exynos_dwc3_match[] = { 179 { 180 .compatible = "samsung,exynos5250-dwusb3", ··· 183 .compatible = "samsung,exynos850-dwusb3", 184 .data = &exynos850_drvdata, 185 }, { 186 + .compatible = "google,gs101-dwusb3", 187 + .data = &gs101_drvdata, 188 + }, { 189 } 190 }; 191 MODULE_DEVICE_TABLE(of, exynos_dwc3_match); 192 193 static int dwc3_exynos_suspend(struct device *dev) 194 { 195 struct dwc3_exynos *exynos = dev_get_drvdata(dev); ··· 230 return 0; 231 } 232 233 + static DEFINE_SIMPLE_DEV_PM_OPS(dwc3_exynos_dev_pm_ops, 234 + dwc3_exynos_suspend, dwc3_exynos_resume); 235 236 static struct platform_driver dwc3_exynos_driver = { 237 .probe = dwc3_exynos_probe, ··· 245 .driver = { 246 .name = "exynos-dwc3", 247 .of_match_table = exynos_dwc3_match, 248 + .pm = pm_sleep_ptr(&dwc3_exynos_dev_pm_ops), 249 }, 250 }; 251
+7 -1
drivers/usb/dwc3/dwc3-pci.c
··· 8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> ··· 221 222 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) { 223 struct gpio_desc *gpio; 224 int ret; 225 226 /* On BYT the FW does not always enable the refclock */ ··· 279 * detection. These can be identified by them _not_ 280 * using the standard ACPI battery and ac drivers. 281 */ 282 if (acpi_dev_present("INT33FD", "1", 2) && 283 - acpi_quirk_skip_acpi_ac_and_battery()) { 284 dev_info(&pdev->dev, "Using TUSB1211 phy for charger detection\n"); 285 swnode = &dwc3_pci_intel_phy_charger_detect_swnode; 286 }
··· 8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 9 */ 10 11 + #include <linux/dmi.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/slab.h> ··· 220 221 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) { 222 struct gpio_desc *gpio; 223 + const char *bios_ver; 224 int ret; 225 226 /* On BYT the FW does not always enable the refclock */ ··· 277 * detection. These can be identified by them _not_ 278 * using the standard ACPI battery and ac drivers. 279 */ 280 + bios_ver = dmi_get_system_info(DMI_BIOS_VERSION); 281 if (acpi_dev_present("INT33FD", "1", 2) && 282 + acpi_quirk_skip_acpi_ac_and_battery() && 283 + /* Lenovo Yoga Tablet 2 Pro 1380 uses LC824206XA instead */ 284 + !(bios_ver && 285 + strstarts(bios_ver, "BLADE_21.X64.0005.R00.1504101516"))) { 286 dev_info(&pdev->dev, "Using TUSB1211 phy for charger detection\n"); 287 swnode = &dwc3_pci_intel_phy_charger_detect_swnode; 288 }
+177 -88
drivers/usb/dwc3/dwc3-qcom.c
··· 36 #define PIPE3_PHYSTATUS_SW BIT(3) 37 #define PIPE_UTMI_CLK_DIS BIT(8) 38 39 - #define PWR_EVNT_IRQ_STAT_REG 0x58 40 #define PWR_EVNT_LPM_IN_L2_MASK BIT(4) 41 #define PWR_EVNT_LPM_OUT_L2_MASK BIT(5) 42 ··· 51 #define APPS_USB_AVG_BW 0 52 #define APPS_USB_PEAK_BW MBps_to_icc(40) 53 54 struct dwc3_qcom { 55 struct device *dev; 56 void __iomem *qscratch_base; ··· 76 struct clk **clks; 77 int num_clocks; 78 struct reset_control *resets; 79 - 80 - int qusb2_phy_irq; 81 - int dp_hs_phy_irq; 82 - int dm_hs_phy_irq; 83 - int ss_phy_irq; 84 - enum usb_device_speed usb2_speed; 85 86 struct extcon_dev *edev; 87 struct extcon_dev *host_edev; ··· 316 return dwc->xhci; 317 } 318 319 - static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom) 320 { 321 struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); 322 struct usb_device *udev; ··· 327 */ 328 hcd = platform_get_drvdata(dwc->xhci); 329 330 - /* 331 - * It is possible to query the speed of all children of 332 - * USB2.0 root hub via usb_hub_for_each_child(). DWC3 code 333 - * currently supports only 1 port per controller. So 334 - * this is sufficient. 335 - */ 336 #ifdef CONFIG_USB 337 - udev = usb_hub_find_child(hcd->self.root_hub, 1); 338 #else 339 udev = NULL; 340 #endif ··· 359 disable_irq_nosync(irq); 360 } 361 362 - static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) 363 { 364 - dwc3_qcom_disable_wakeup_irq(qcom->qusb2_phy_irq); 365 366 - if (qcom->usb2_speed == USB_SPEED_LOW) { 367 - dwc3_qcom_disable_wakeup_irq(qcom->dm_hs_phy_irq); 368 - } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || 369 - (qcom->usb2_speed == USB_SPEED_FULL)) { 370 - dwc3_qcom_disable_wakeup_irq(qcom->dp_hs_phy_irq); 371 } else { 372 - dwc3_qcom_disable_wakeup_irq(qcom->dp_hs_phy_irq); 373 - dwc3_qcom_disable_wakeup_irq(qcom->dm_hs_phy_irq); 374 } 375 376 - dwc3_qcom_disable_wakeup_irq(qcom->ss_phy_irq); 377 } 378 379 - static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) 380 { 381 - dwc3_qcom_enable_wakeup_irq(qcom->qusb2_phy_irq, 0); 382 383 /* 384 * Configure DP/DM line interrupts based on the USB2 device attached to ··· 389 * DP and DM lines as rising edge to detect HS/HS/LS device connect scenario. 390 */ 391 392 - if (qcom->usb2_speed == USB_SPEED_LOW) { 393 - dwc3_qcom_enable_wakeup_irq(qcom->dm_hs_phy_irq, 394 - IRQ_TYPE_EDGE_FALLING); 395 - } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || 396 - (qcom->usb2_speed == USB_SPEED_FULL)) { 397 - dwc3_qcom_enable_wakeup_irq(qcom->dp_hs_phy_irq, 398 - IRQ_TYPE_EDGE_FALLING); 399 } else { 400 - dwc3_qcom_enable_wakeup_irq(qcom->dp_hs_phy_irq, 401 - IRQ_TYPE_EDGE_RISING); 402 - dwc3_qcom_enable_wakeup_irq(qcom->dm_hs_phy_irq, 403 - IRQ_TYPE_EDGE_RISING); 404 } 405 406 - dwc3_qcom_enable_wakeup_irq(qcom->ss_phy_irq, 0); 407 } 408 409 static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) ··· 430 if (qcom->is_suspended) 431 return 0; 432 433 - val = readl(qcom->qscratch_base + PWR_EVNT_IRQ_STAT_REG); 434 - if (!(val & PWR_EVNT_LPM_IN_L2_MASK)) 435 - dev_err(qcom->dev, "HS-PHY not in L2\n"); 436 437 for (i = qcom->num_clocks - 1; i >= 0; i--) 438 clk_disable_unprepare(qcom->clks[i]); ··· 448 * freezable workqueue. 449 */ 450 if (dwc3_qcom_is_host(qcom) && wakeup) { 451 - qcom->usb2_speed = dwc3_qcom_read_usb2_speed(qcom); 452 dwc3_qcom_enable_interrupts(qcom); 453 } 454 ··· 483 dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret); 484 485 /* Clear existing events from PHY related to L2 in/out */ 486 - dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG, 487 - PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); 488 489 qcom->is_suspended = false; 490 ··· 530 PIPE_UTMI_CLK_DIS); 531 } 532 533 - static int dwc3_qcom_setup_irq(struct platform_device *pdev) 534 { 535 struct dwc3_qcom *qcom = platform_get_drvdata(pdev); 536 int irq; 537 int ret; 538 539 irq = platform_get_irq_byname_optional(pdev, "qusb2_phy"); 540 if (irq > 0) { 541 - /* Keep wakeup interrupts disabled until suspend */ 542 - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, 543 - qcom_dwc3_resume_irq, 544 - IRQF_ONESHOT | IRQF_NO_AUTOEN, 545 - "qcom_dwc3 QUSB2", qcom); 546 - if (ret) { 547 - dev_err(qcom->dev, "qusb2_phy_irq failed: %d\n", ret); 548 return ret; 549 - } 550 - qcom->qusb2_phy_irq = irq; 551 } 552 553 - irq = platform_get_irq_byname_optional(pdev, "dp_hs_phy_irq"); 554 - if (irq > 0) { 555 - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, 556 - qcom_dwc3_resume_irq, 557 - IRQF_ONESHOT | IRQF_NO_AUTOEN, 558 - "qcom_dwc3 DP_HS", qcom); 559 - if (ret) { 560 - dev_err(qcom->dev, "dp_hs_phy_irq failed: %d\n", ret); 561 - return ret; 562 - } 563 - qcom->dp_hs_phy_irq = irq; 564 } 565 566 - irq = platform_get_irq_byname_optional(pdev, "dm_hs_phy_irq"); 567 - if (irq > 0) { 568 - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, 569 - qcom_dwc3_resume_irq, 570 - IRQF_ONESHOT | IRQF_NO_AUTOEN, 571 - "qcom_dwc3 DM_HS", qcom); 572 - if (ret) { 573 - dev_err(qcom->dev, "dm_hs_phy_irq failed: %d\n", ret); 574 - return ret; 575 - } 576 - qcom->dm_hs_phy_irq = irq; 577 - } 578 579 - irq = platform_get_irq_byname_optional(pdev, "ss_phy_irq"); 580 - if (irq > 0) { 581 - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, 582 - qcom_dwc3_resume_irq, 583 - IRQF_ONESHOT | IRQF_NO_AUTOEN, 584 - "qcom_dwc3 SS", qcom); 585 - if (ret) { 586 - dev_err(qcom->dev, "ss_phy_irq failed: %d\n", ret); 587 return ret; 588 - } 589 - qcom->ss_phy_irq = irq; 590 } 591 592 return 0;
··· 36 #define PIPE3_PHYSTATUS_SW BIT(3) 37 #define PIPE_UTMI_CLK_DIS BIT(8) 38 39 #define PWR_EVNT_LPM_IN_L2_MASK BIT(4) 40 #define PWR_EVNT_LPM_OUT_L2_MASK BIT(5) 41 ··· 52 #define APPS_USB_AVG_BW 0 53 #define APPS_USB_PEAK_BW MBps_to_icc(40) 54 55 + /* Qualcomm SoCs with multiport support has up to 4 ports */ 56 + #define DWC3_QCOM_MAX_PORTS 4 57 + 58 + static const u32 pwr_evnt_irq_stat_reg[DWC3_QCOM_MAX_PORTS] = { 59 + 0x58, 60 + 0x1dc, 61 + 0x228, 62 + 0x238, 63 + }; 64 + 65 + struct dwc3_qcom_port { 66 + int qusb2_phy_irq; 67 + int dp_hs_phy_irq; 68 + int dm_hs_phy_irq; 69 + int ss_phy_irq; 70 + enum usb_device_speed usb2_speed; 71 + }; 72 + 73 struct dwc3_qcom { 74 struct device *dev; 75 void __iomem *qscratch_base; ··· 59 struct clk **clks; 60 int num_clocks; 61 struct reset_control *resets; 62 + struct dwc3_qcom_port ports[DWC3_QCOM_MAX_PORTS]; 63 + u8 num_ports; 64 65 struct extcon_dev *edev; 66 struct extcon_dev *host_edev; ··· 303 return dwc->xhci; 304 } 305 306 + static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom, int port_index) 307 { 308 struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); 309 struct usb_device *udev; ··· 314 */ 315 hcd = platform_get_drvdata(dwc->xhci); 316 317 #ifdef CONFIG_USB 318 + udev = usb_hub_find_child(hcd->self.root_hub, port_index + 1); 319 #else 320 udev = NULL; 321 #endif ··· 352 disable_irq_nosync(irq); 353 } 354 355 + static void dwc3_qcom_disable_port_interrupts(struct dwc3_qcom_port *port) 356 { 357 + dwc3_qcom_disable_wakeup_irq(port->qusb2_phy_irq); 358 359 + if (port->usb2_speed == USB_SPEED_LOW) { 360 + dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); 361 + } else if ((port->usb2_speed == USB_SPEED_HIGH) || 362 + (port->usb2_speed == USB_SPEED_FULL)) { 363 + dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); 364 } else { 365 + dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); 366 + dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); 367 } 368 369 + dwc3_qcom_disable_wakeup_irq(port->ss_phy_irq); 370 } 371 372 + static void dwc3_qcom_enable_port_interrupts(struct dwc3_qcom_port *port) 373 { 374 + dwc3_qcom_enable_wakeup_irq(port->qusb2_phy_irq, 0); 375 376 /* 377 * Configure DP/DM line interrupts based on the USB2 device attached to ··· 382 * DP and DM lines as rising edge to detect HS/HS/LS device connect scenario. 383 */ 384 385 + if (port->usb2_speed == USB_SPEED_LOW) { 386 + dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, 387 + IRQ_TYPE_EDGE_FALLING); 388 + } else if ((port->usb2_speed == USB_SPEED_HIGH) || 389 + (port->usb2_speed == USB_SPEED_FULL)) { 390 + dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, 391 + IRQ_TYPE_EDGE_FALLING); 392 } else { 393 + dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, 394 + IRQ_TYPE_EDGE_RISING); 395 + dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, 396 + IRQ_TYPE_EDGE_RISING); 397 } 398 399 + dwc3_qcom_enable_wakeup_irq(port->ss_phy_irq, 0); 400 + } 401 + 402 + static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) 403 + { 404 + int i; 405 + 406 + for (i = 0; i < qcom->num_ports; i++) 407 + dwc3_qcom_disable_port_interrupts(&qcom->ports[i]); 408 + } 409 + 410 + static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) 411 + { 412 + int i; 413 + 414 + for (i = 0; i < qcom->num_ports; i++) 415 + dwc3_qcom_enable_port_interrupts(&qcom->ports[i]); 416 } 417 418 static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) ··· 407 if (qcom->is_suspended) 408 return 0; 409 410 + for (i = 0; i < qcom->num_ports; i++) { 411 + val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg[i]); 412 + if (!(val & PWR_EVNT_LPM_IN_L2_MASK)) 413 + dev_err(qcom->dev, "port-%d HS-PHY not in L2\n", i + 1); 414 + } 415 416 for (i = qcom->num_clocks - 1; i >= 0; i--) 417 clk_disable_unprepare(qcom->clks[i]); ··· 423 * freezable workqueue. 424 */ 425 if (dwc3_qcom_is_host(qcom) && wakeup) { 426 + for (i = 0; i < qcom->num_ports; i++) 427 + qcom->ports[i].usb2_speed = dwc3_qcom_read_usb2_speed(qcom, i); 428 dwc3_qcom_enable_interrupts(qcom); 429 } 430 ··· 457 dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret); 458 459 /* Clear existing events from PHY related to L2 in/out */ 460 + for (i = 0; i < qcom->num_ports; i++) { 461 + dwc3_qcom_setbits(qcom->qscratch_base, 462 + pwr_evnt_irq_stat_reg[i], 463 + PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); 464 + } 465 466 qcom->is_suspended = false; 467 ··· 501 PIPE_UTMI_CLK_DIS); 502 } 503 504 + static int dwc3_qcom_request_irq(struct dwc3_qcom *qcom, int irq, 505 + const char *name) 506 + { 507 + int ret; 508 + 509 + /* Keep wakeup interrupts disabled until suspend */ 510 + ret = devm_request_threaded_irq(qcom->dev, irq, NULL, 511 + qcom_dwc3_resume_irq, 512 + IRQF_ONESHOT | IRQF_NO_AUTOEN, 513 + name, qcom); 514 + if (ret) 515 + dev_err(qcom->dev, "failed to request irq %s: %d\n", name, ret); 516 + 517 + return ret; 518 + } 519 + 520 + static int dwc3_qcom_setup_port_irq(struct platform_device *pdev, int port_index, bool is_multiport) 521 { 522 struct dwc3_qcom *qcom = platform_get_drvdata(pdev); 523 + const char *irq_name; 524 int irq; 525 int ret; 526 527 + if (is_multiport) 528 + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dp_hs_phy_%d", port_index + 1); 529 + else 530 + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dp_hs_phy_irq"); 531 + if (!irq_name) 532 + return -ENOMEM; 533 + 534 + irq = platform_get_irq_byname_optional(pdev, irq_name); 535 + if (irq > 0) { 536 + ret = dwc3_qcom_request_irq(qcom, irq, irq_name); 537 + if (ret) 538 + return ret; 539 + qcom->ports[port_index].dp_hs_phy_irq = irq; 540 + } 541 + 542 + if (is_multiport) 543 + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dm_hs_phy_%d", port_index + 1); 544 + else 545 + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dm_hs_phy_irq"); 546 + if (!irq_name) 547 + return -ENOMEM; 548 + 549 + irq = platform_get_irq_byname_optional(pdev, irq_name); 550 + if (irq > 0) { 551 + ret = dwc3_qcom_request_irq(qcom, irq, irq_name); 552 + if (ret) 553 + return ret; 554 + qcom->ports[port_index].dm_hs_phy_irq = irq; 555 + } 556 + 557 + if (is_multiport) 558 + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "ss_phy_%d", port_index + 1); 559 + else 560 + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "ss_phy_irq"); 561 + if (!irq_name) 562 + return -ENOMEM; 563 + 564 + irq = platform_get_irq_byname_optional(pdev, irq_name); 565 + if (irq > 0) { 566 + ret = dwc3_qcom_request_irq(qcom, irq, irq_name); 567 + if (ret) 568 + return ret; 569 + qcom->ports[port_index].ss_phy_irq = irq; 570 + } 571 + 572 + if (is_multiport) 573 + return 0; 574 + 575 irq = platform_get_irq_byname_optional(pdev, "qusb2_phy"); 576 if (irq > 0) { 577 + ret = dwc3_qcom_request_irq(qcom, irq, "qusb2_phy"); 578 + if (ret) 579 return ret; 580 + qcom->ports[port_index].qusb2_phy_irq = irq; 581 } 582 583 + return 0; 584 + } 585 + 586 + static int dwc3_qcom_find_num_ports(struct platform_device *pdev) 587 + { 588 + char irq_name[14]; 589 + int port_num; 590 + int irq; 591 + 592 + irq = platform_get_irq_byname_optional(pdev, "dp_hs_phy_1"); 593 + if (irq <= 0) 594 + return 1; 595 + 596 + for (port_num = 2; port_num <= DWC3_QCOM_MAX_PORTS; port_num++) { 597 + sprintf(irq_name, "dp_hs_phy_%d", port_num); 598 + 599 + irq = platform_get_irq_byname_optional(pdev, irq_name); 600 + if (irq <= 0) 601 + return port_num - 1; 602 } 603 604 + return DWC3_QCOM_MAX_PORTS; 605 + } 606 607 + static int dwc3_qcom_setup_irq(struct platform_device *pdev) 608 + { 609 + struct dwc3_qcom *qcom = platform_get_drvdata(pdev); 610 + bool is_multiport; 611 + int ret; 612 + int i; 613 + 614 + qcom->num_ports = dwc3_qcom_find_num_ports(pdev); 615 + is_multiport = (qcom->num_ports > 1); 616 + 617 + for (i = 0; i < qcom->num_ports; i++) { 618 + ret = dwc3_qcom_setup_port_irq(pdev, i, is_multiport); 619 + if (ret) 620 return ret; 621 } 622 623 return 0;
+1 -3
drivers/usb/dwc3/gadget.c
··· 1699 */ 1700 static int __dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, bool interrupt) 1701 { 1702 - struct dwc3 *dwc = dep->dwc; 1703 struct dwc3_gadget_ep_cmd_params params; 1704 u32 cmd; 1705 int ret; ··· 1723 dep->resource_index = 0; 1724 1725 if (!interrupt) { 1726 - if (!DWC3_IP_IS(DWC3) || DWC3_VER_IS_PRIOR(DWC3, 310A)) 1727 - mdelay(1); 1728 dep->flags &= ~DWC3_EP_TRANSFER_STARTED; 1729 } else if (!ret) { 1730 dep->flags |= DWC3_EP_END_TRANSFER_PENDING;
··· 1699 */ 1700 static int __dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, bool interrupt) 1701 { 1702 struct dwc3_gadget_ep_cmd_params params; 1703 u32 cmd; 1704 int ret; ··· 1724 dep->resource_index = 0; 1725 1726 if (!interrupt) { 1727 + mdelay(1); 1728 dep->flags &= ~DWC3_EP_TRANSFER_STARTED; 1729 } else if (!ret) { 1730 dep->flags |= DWC3_EP_END_TRANSFER_PENDING;
+3 -7
drivers/usb/fotg210/Makefile
··· 1 # SPDX-License-Identifier: GPL-2.0 2 3 - # This setup links the different object files into one single 4 - # module so we don't have to EXPORT() a lot of internal symbols 5 - # or create unnecessary submodules. 6 - fotg210-objs-y += fotg210-core.o 7 - fotg210-objs-$(CONFIG_USB_FOTG210_HCD) += fotg210-hcd.o 8 - fotg210-objs-$(CONFIG_USB_FOTG210_UDC) += fotg210-udc.o 9 - fotg210-objs := $(fotg210-objs-y) 10 obj-$(CONFIG_USB_FOTG210) += fotg210.o
··· 1 # SPDX-License-Identifier: GPL-2.0 2 3 obj-$(CONFIG_USB_FOTG210) += fotg210.o 4 + fotg210-y := fotg210-core.o 5 + fotg210-$(CONFIG_USB_FOTG210_HCD) += fotg210-hcd.o 6 + fotg210-$(CONFIG_USB_FOTG210_UDC) += fotg210-udc.o
+1
drivers/usb/fotg210/fotg210-core.c
··· 95 96 /** 97 * fotg210_vbus() - Called by gadget driver to enable/disable VBUS 98 * @enable: true to enable VBUS, false to disable VBUS 99 */ 100 void fotg210_vbus(struct fotg210 *fotg, bool enable)
··· 95 96 /** 97 * fotg210_vbus() - Called by gadget driver to enable/disable VBUS 98 + * @fotg: pointer to a private fotg210 object 99 * @enable: true to enable VBUS, false to disable VBUS 100 */ 101 void fotg210_vbus(struct fotg210 *fotg, bool enable)
+19 -1
drivers/usb/gadget/function/f_fs.c
··· 45 #include "configfs.h" 46 47 #define FUNCTIONFS_MAGIC 0xa647361 /* Chosen by a honest dice roll ;) */ 48 49 #define DMABUF_ENQUEUE_TIMEOUT_MS 5000 50 ··· 83 short *interfaces_nums; 84 85 struct usb_function function; 86 }; 87 88 ··· 107 static int ffs_func_bind(struct usb_configuration *, 108 struct usb_function *); 109 static int ffs_func_set_alt(struct usb_function *, unsigned, unsigned); 110 static void ffs_func_disable(struct usb_function *); 111 static int ffs_func_setup(struct usb_function *, 112 const struct usb_ctrlrequest *); ··· 3715 ffs_data_reset(ffs); 3716 } 3717 3718 static int ffs_func_set_alt(struct usb_function *f, 3719 unsigned interface, unsigned alt) 3720 { 3721 struct ffs_function *func = ffs_func_from_usb(f); 3722 struct ffs_data *ffs = func->ffs; 3723 int ret = 0, intf; 3724 3725 if (alt != (unsigned)-1) { 3726 intf = ffs_func_revmap_intf(func, interface); ··· 3761 3762 ffs->func = func; 3763 ret = ffs_func_eps_enable(func); 3764 - if (ret >= 0) 3765 ffs_event_add(ffs, FUNCTIONFS_ENABLE); 3766 return ret; 3767 } 3768 ··· 4091 func->function.bind = ffs_func_bind; 4092 func->function.unbind = ffs_func_unbind; 4093 func->function.set_alt = ffs_func_set_alt; 4094 func->function.disable = ffs_func_disable; 4095 func->function.setup = ffs_func_setup; 4096 func->function.req_match = ffs_func_req_match;
··· 45 #include "configfs.h" 46 47 #define FUNCTIONFS_MAGIC 0xa647361 /* Chosen by a honest dice roll ;) */ 48 + #define MAX_ALT_SETTINGS 2 /* Allow up to 2 alt settings to be set. */ 49 50 #define DMABUF_ENQUEUE_TIMEOUT_MS 5000 51 ··· 82 short *interfaces_nums; 83 84 struct usb_function function; 85 + int cur_alt[MAX_CONFIG_INTERFACES]; 86 }; 87 88 ··· 105 static int ffs_func_bind(struct usb_configuration *, 106 struct usb_function *); 107 static int ffs_func_set_alt(struct usb_function *, unsigned, unsigned); 108 + static int ffs_func_get_alt(struct usb_function *f, unsigned int intf); 109 static void ffs_func_disable(struct usb_function *); 110 static int ffs_func_setup(struct usb_function *, 111 const struct usb_ctrlrequest *); ··· 3712 ffs_data_reset(ffs); 3713 } 3714 3715 + static int ffs_func_get_alt(struct usb_function *f, 3716 + unsigned int interface) 3717 + { 3718 + struct ffs_function *func = ffs_func_from_usb(f); 3719 + int intf = ffs_func_revmap_intf(func, interface); 3720 + 3721 + return (intf < 0) ? intf : func->cur_alt[interface]; 3722 + } 3723 + 3724 static int ffs_func_set_alt(struct usb_function *f, 3725 unsigned interface, unsigned alt) 3726 { 3727 struct ffs_function *func = ffs_func_from_usb(f); 3728 struct ffs_data *ffs = func->ffs; 3729 int ret = 0, intf; 3730 + 3731 + if (alt > MAX_ALT_SETTINGS) 3732 + return -EINVAL; 3733 3734 if (alt != (unsigned)-1) { 3735 intf = ffs_func_revmap_intf(func, interface); ··· 3746 3747 ffs->func = func; 3748 ret = ffs_func_eps_enable(func); 3749 + if (ret >= 0) { 3750 ffs_event_add(ffs, FUNCTIONFS_ENABLE); 3751 + func->cur_alt[interface] = alt; 3752 + } 3753 return ret; 3754 } 3755 ··· 4074 func->function.bind = ffs_func_bind; 4075 func->function.unbind = ffs_func_unbind; 4076 func->function.set_alt = ffs_func_set_alt; 4077 + func->function.get_alt = ffs_func_get_alt; 4078 func->function.disable = ffs_func_disable; 4079 func->function.setup = ffs_func_setup; 4080 func->function.req_match = ffs_func_req_match;
+3 -3
drivers/usb/gadget/function/f_hid.c
··· 1029 { 1030 int ret; 1031 1032 - ret = ida_simple_get(&hidg_ida, 0, 0, GFP_KERNEL); 1033 if (ret >= HIDG_MINORS) { 1034 - ida_simple_remove(&hidg_ida, ret); 1035 ret = -ENODEV; 1036 } 1037 ··· 1176 1177 static inline void hidg_put_minor(int minor) 1178 { 1179 - ida_simple_remove(&hidg_ida, minor); 1180 } 1181 1182 static void hidg_free_inst(struct usb_function_instance *f)
··· 1029 { 1030 int ret; 1031 1032 + ret = ida_alloc(&hidg_ida, GFP_KERNEL); 1033 if (ret >= HIDG_MINORS) { 1034 + ida_free(&hidg_ida, ret); 1035 ret = -ENODEV; 1036 } 1037 ··· 1176 1177 static inline void hidg_put_minor(int minor) 1178 { 1179 + ida_free(&hidg_ida, minor); 1180 } 1181 1182 static void hidg_free_inst(struct usb_function_instance *f)
+3 -3
drivers/usb/gadget/function/f_printer.c
··· 1312 { 1313 int ret; 1314 1315 - ret = ida_simple_get(&printer_ida, 0, 0, GFP_KERNEL); 1316 if (ret >= PRINTER_MINORS) { 1317 - ida_simple_remove(&printer_ida, ret); 1318 ret = -ENODEV; 1319 } 1320 ··· 1323 1324 static inline void gprinter_put_minor(int minor) 1325 { 1326 - ida_simple_remove(&printer_ida, minor); 1327 } 1328 1329 static int gprinter_setup(int);
··· 1312 { 1313 int ret; 1314 1315 + ret = ida_alloc(&printer_ida, GFP_KERNEL); 1316 if (ret >= PRINTER_MINORS) { 1317 + ida_free(&printer_ida, ret); 1318 ret = -ENODEV; 1319 } 1320 ··· 1323 1324 static inline void gprinter_put_minor(int minor) 1325 { 1326 + ida_free(&printer_ida, minor); 1327 } 1328 1329 static int gprinter_setup(int);
+2 -2
drivers/usb/gadget/function/rndis.c
··· 869 870 static inline int rndis_get_nr(void) 871 { 872 - return ida_simple_get(&rndis_ida, 0, 1000, GFP_KERNEL); 873 } 874 875 static inline void rndis_put_nr(int nr) 876 { 877 - ida_simple_remove(&rndis_ida, nr); 878 } 879 880 struct rndis_params *rndis_register(void (*resp_avail)(void *v), void *v)
··· 869 870 static inline int rndis_get_nr(void) 871 { 872 + return ida_alloc_max(&rndis_ida, 999, GFP_KERNEL); 873 } 874 875 static inline void rndis_put_nr(int nr) 876 { 877 + ida_free(&rndis_ida, nr); 878 } 879 880 struct rndis_params *rndis_register(void (*resp_avail)(void *v), void *v)
+17 -15
drivers/usb/gadget/function/u_audio.c
··· 57 58 /* Volume/Mute controls and their state */ 59 int fu_id; /* Feature Unit ID */ 60 - struct snd_kcontrol *snd_kctl_volume; 61 - struct snd_kcontrol *snd_kctl_mute; 62 s16 volume_min, volume_max, volume_res; 63 s16 volume; 64 int mute; 65 66 - struct snd_kcontrol *snd_kctl_rate; /* read-only current rate */ 67 int srate; /* selected samplerate */ 68 int active; /* playback/capture running */ 69 ··· 494 static void set_active(struct uac_rtd_params *prm, bool active) 495 { 496 // notifying through the Rate ctrl 497 - struct snd_kcontrol *kctl = prm->snd_kctl_rate; 498 unsigned long flags; 499 500 spin_lock_irqsave(&prm->lock, flags); 501 if (prm->active != active) { 502 prm->active = active; 503 snd_ctl_notify(prm->uac->card, SNDRV_CTL_EVENT_MASK_VALUE, 504 - &kctl->id); 505 } 506 spin_unlock_irqrestore(&prm->lock, flags); 507 } ··· 806 807 if (change) 808 snd_ctl_notify(uac->card, SNDRV_CTL_EVENT_MASK_VALUE, 809 - &prm->snd_kctl_volume->id); 810 811 return 0; 812 } ··· 855 856 if (change) 857 snd_ctl_notify(uac->card, SNDRV_CTL_EVENT_MASK_VALUE, 858 - &prm->snd_kctl_mute->id); 859 860 return 0; 861 } ··· 1242 if (err < 0) 1243 goto snd_fail; 1244 1245 - strscpy(pcm->name, pcm_name, sizeof(pcm->name)); 1246 pcm->private_data = uac; 1247 uac->pcm = pcm; 1248 ··· 1256 if ((c_chmask && g_audio->in_ep_fback) 1257 || (p_chmask && params->p_fu.id) 1258 || (c_chmask && params->c_fu.id)) 1259 - strscpy(card->mixername, card_name, sizeof(card->driver)); 1260 1261 if (c_chmask && g_audio->in_ep_fback) { 1262 kctl = snd_ctl_new1(&u_audio_controls[UAC_FBACK_CTRL], ··· 1330 err = snd_ctl_add(card, kctl); 1331 if (err < 0) 1332 goto snd_fail; 1333 - prm->snd_kctl_mute = kctl; 1334 prm->mute = 0; 1335 } 1336 ··· 1358 err = snd_ctl_add(card, kctl); 1359 if (err < 0) 1360 goto snd_fail; 1361 - prm->snd_kctl_volume = kctl; 1362 prm->volume = fu->volume_max; 1363 prm->volume_max = fu->volume_max; 1364 prm->volume_min = fu->volume_min; ··· 1382 err = snd_ctl_add(card, kctl); 1383 if (err < 0) 1384 goto snd_fail; 1385 - prm->snd_kctl_rate = kctl; 1386 } 1387 1388 - strscpy(card->driver, card_name, sizeof(card->driver)); 1389 - strscpy(card->shortname, card_name, sizeof(card->shortname)); 1390 - sprintf(card->longname, "%s %i", card_name, card->dev->id); 1391 1392 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, 1393 NULL, 0, BUFF_SIZE_MAX); ··· 1420 return; 1421 1422 uac = g_audio->uac; 1423 card = uac->card; 1424 if (card) 1425 snd_card_free_when_closed(card);
··· 57 58 /* Volume/Mute controls and their state */ 59 int fu_id; /* Feature Unit ID */ 60 + struct snd_ctl_elem_id snd_kctl_volume_id; 61 + struct snd_ctl_elem_id snd_kctl_mute_id; 62 s16 volume_min, volume_max, volume_res; 63 s16 volume; 64 int mute; 65 66 + struct snd_ctl_elem_id snd_kctl_rate_id; /* read-only current rate */ 67 int srate; /* selected samplerate */ 68 int active; /* playback/capture running */ 69 ··· 494 static void set_active(struct uac_rtd_params *prm, bool active) 495 { 496 // notifying through the Rate ctrl 497 unsigned long flags; 498 499 spin_lock_irqsave(&prm->lock, flags); 500 if (prm->active != active) { 501 prm->active = active; 502 snd_ctl_notify(prm->uac->card, SNDRV_CTL_EVENT_MASK_VALUE, 503 + &prm->snd_kctl_rate_id); 504 } 505 spin_unlock_irqrestore(&prm->lock, flags); 506 } ··· 807 808 if (change) 809 snd_ctl_notify(uac->card, SNDRV_CTL_EVENT_MASK_VALUE, 810 + &prm->snd_kctl_volume_id); 811 812 return 0; 813 } ··· 856 857 if (change) 858 snd_ctl_notify(uac->card, SNDRV_CTL_EVENT_MASK_VALUE, 859 + &prm->snd_kctl_mute_id); 860 861 return 0; 862 } ··· 1243 if (err < 0) 1244 goto snd_fail; 1245 1246 + strscpy(pcm->name, pcm_name); 1247 pcm->private_data = uac; 1248 uac->pcm = pcm; 1249 ··· 1257 if ((c_chmask && g_audio->in_ep_fback) 1258 || (p_chmask && params->p_fu.id) 1259 || (c_chmask && params->c_fu.id)) 1260 + strscpy(card->mixername, card_name); 1261 1262 if (c_chmask && g_audio->in_ep_fback) { 1263 kctl = snd_ctl_new1(&u_audio_controls[UAC_FBACK_CTRL], ··· 1331 err = snd_ctl_add(card, kctl); 1332 if (err < 0) 1333 goto snd_fail; 1334 + prm->snd_kctl_mute_id = kctl->id; 1335 prm->mute = 0; 1336 } 1337 ··· 1359 err = snd_ctl_add(card, kctl); 1360 if (err < 0) 1361 goto snd_fail; 1362 + prm->snd_kctl_volume_id = kctl->id; 1363 prm->volume = fu->volume_max; 1364 prm->volume_max = fu->volume_max; 1365 prm->volume_min = fu->volume_min; ··· 1383 err = snd_ctl_add(card, kctl); 1384 if (err < 0) 1385 goto snd_fail; 1386 + prm->snd_kctl_rate_id = kctl->id; 1387 } 1388 1389 + strscpy(card->driver, card_name); 1390 + strscpy(card->shortname, card_name); 1391 + snprintf(card->longname, sizeof(card->longname), "%s %i", 1392 + card_name, card->dev->id); 1393 1394 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, 1395 NULL, 0, BUFF_SIZE_MAX); ··· 1420 return; 1421 1422 uac = g_audio->uac; 1423 + g_audio->uac = NULL; 1424 + 1425 card = uac->card; 1426 if (card) 1427 snd_card_free_when_closed(card);
+1 -1
drivers/usb/gadget/function/u_ether.c
··· 1032 if (!p || p[1] != 'd' || strchr(p + 2, '%')) 1033 return -EINVAL; 1034 1035 - strncpy(net->name, tmp, sizeof(net->name)); 1036 dev->ifname_set = true; 1037 1038 return 0;
··· 1032 if (!p || p[1] != 'd' || strchr(p + 2, '%')) 1033 return -EINVAL; 1034 1035 + strscpy(net->name, tmp); 1036 dev->ifname_set = true; 1037 1038 return 0;
+13 -1
drivers/usb/gadget/function/uvc_configfs.c
··· 13 #include "uvc_configfs.h" 14 15 #include <linux/sort.h> 16 #include <linux/usb/video.h> 17 18 /* ----------------------------------------------------------------------------- ··· 2261 struct f_uvc_opts *opts; 2262 struct config_item *opts_item; 2263 struct mutex *su_mutex = &ch->fmt.group.cg_subsys->su_mutex; 2264 int ret; 2265 2266 mutex_lock(su_mutex); /* for navigating configfs hierarchy */ ··· 2276 goto end; 2277 } 2278 2279 - memcpy(ch->desc.guidFormat, page, 2280 min(sizeof(ch->desc.guidFormat), len)); 2281 ret = sizeof(ch->desc.guidFormat); 2282
··· 13 #include "uvc_configfs.h" 14 15 #include <linux/sort.h> 16 + #include <linux/usb/uvc.h> 17 #include <linux/usb/video.h> 18 19 /* ----------------------------------------------------------------------------- ··· 2260 struct f_uvc_opts *opts; 2261 struct config_item *opts_item; 2262 struct mutex *su_mutex = &ch->fmt.group.cg_subsys->su_mutex; 2263 + const struct uvc_format_desc *format; 2264 + u8 tmpguidFormat[sizeof(ch->desc.guidFormat)]; 2265 int ret; 2266 2267 mutex_lock(su_mutex); /* for navigating configfs hierarchy */ ··· 2273 goto end; 2274 } 2275 2276 + memcpy(tmpguidFormat, page, 2277 + min(sizeof(tmpguidFormat), len)); 2278 + 2279 + format = uvc_format_by_guid(tmpguidFormat); 2280 + if (!format) { 2281 + ret = -EINVAL; 2282 + goto end; 2283 + } 2284 + 2285 + memcpy(ch->desc.guidFormat, tmpguidFormat, 2286 min(sizeof(ch->desc.guidFormat), len)); 2287 ret = sizeof(ch->desc.guidFormat); 2288
+19 -5
drivers/usb/gadget/function/uvc_v4l2.c
··· 260 if (!uframe) 261 return -EINVAL; 262 263 - fmt->fmt.pix.width = uframe->frame.w_width; 264 - fmt->fmt.pix.height = uframe->frame.w_height; 265 fmt->fmt.pix.field = V4L2_FIELD_NONE; 266 - fmt->fmt.pix.bytesperline = uvc_v4l2_get_bytesperline(uformat, uframe); 267 - fmt->fmt.pix.sizeimage = uvc_get_frame_size(uformat, uframe); 268 - fmt->fmt.pix.pixelformat = to_uvc_format(uformat)->fcc; 269 fmt->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB; 270 fmt->fmt.pix.priv = 0; 271
··· 260 if (!uframe) 261 return -EINVAL; 262 263 + if (uformat->type == UVCG_UNCOMPRESSED) { 264 + struct uvcg_uncompressed *u = 265 + to_uvcg_uncompressed(&uformat->group.cg_item); 266 + if (!u) 267 + return 0; 268 + 269 + v4l2_fill_pixfmt(&fmt->fmt.pix, fmt->fmt.pix.pixelformat, 270 + uframe->frame.w_width, uframe->frame.w_height); 271 + 272 + if (fmt->fmt.pix.sizeimage != (uvc_v4l2_get_bytesperline(uformat, uframe) * 273 + uframe->frame.w_height)) 274 + return -EINVAL; 275 + } else { 276 + fmt->fmt.pix.width = uframe->frame.w_width; 277 + fmt->fmt.pix.height = uframe->frame.w_height; 278 + fmt->fmt.pix.bytesperline = uvc_v4l2_get_bytesperline(uformat, uframe); 279 + fmt->fmt.pix.sizeimage = uvc_get_frame_size(uformat, uframe); 280 + fmt->fmt.pix.pixelformat = to_uvc_format(uformat)->fcc; 281 + } 282 fmt->fmt.pix.field = V4L2_FIELD_NONE; 283 fmt->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB; 284 fmt->fmt.pix.priv = 0; 285
+9
drivers/usb/gadget/udc/core.c
··· 1426 if (ret) 1427 goto err_free_id; 1428 1429 return 0; 1430 1431 err_free_id: 1432 ida_free(&gadget_id_numbers, gadget->id_number); ··· 1544 mutex_unlock(&udc_lock); 1545 1546 kobject_uevent(&udc->dev.kobj, KOBJ_REMOVE); 1547 flush_work(&gadget->work); 1548 device_del(&gadget->dev); 1549 ida_free(&gadget_id_numbers, gadget->id_number);
··· 1426 if (ret) 1427 goto err_free_id; 1428 1429 + ret = sysfs_create_link(&udc->dev.kobj, 1430 + &gadget->dev.kobj, "gadget"); 1431 + if (ret) 1432 + goto err_del_gadget; 1433 + 1434 return 0; 1435 + 1436 + err_del_gadget: 1437 + device_del(&gadget->dev); 1438 1439 err_free_id: 1440 ida_free(&gadget_id_numbers, gadget->id_number); ··· 1536 mutex_unlock(&udc_lock); 1537 1538 kobject_uevent(&udc->dev.kobj, KOBJ_REMOVE); 1539 + sysfs_remove_link(&udc->dev.kobj, "gadget"); 1540 flush_work(&gadget->work); 1541 device_del(&gadget->dev); 1542 ida_free(&gadget_id_numbers, gadget->id_number);
+22 -15
drivers/usb/gadget/udc/dummy_hcd.c
··· 30 #include <linux/slab.h> 31 #include <linux/errno.h> 32 #include <linux/init.h> 33 - #include <linux/timer.h> 34 #include <linux/list.h> 35 #include <linux/interrupt.h> 36 #include <linux/platform_device.h> ··· 49 50 #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */ 51 #define POWER_BUDGET_3 900 /* in mA */ 52 53 static const char driver_name[] = "dummy_hcd"; 54 static const char driver_desc[] = "USB Host+Gadget Emulator"; ··· 242 struct dummy_hcd { 243 struct dummy *dum; 244 enum dummy_rh_state rh_state; 245 - struct timer_list timer; 246 u32 port_status; 247 u32 old_status; 248 unsigned long re_timeout; ··· 1303 urb->error_count = 1; /* mark as a new urb */ 1304 1305 /* kick the scheduler, it'll do the rest */ 1306 - if (!timer_pending(&dum_hcd->timer)) 1307 - mod_timer(&dum_hcd->timer, jiffies + 1); 1308 1309 done: 1310 spin_unlock_irqrestore(&dum_hcd->dum->lock, flags); ··· 1325 rc = usb_hcd_check_unlink_urb(hcd, urb, status); 1326 if (!rc && dum_hcd->rh_state != DUMMY_RH_RUNNING && 1327 !list_empty(&dum_hcd->urbp_list)) 1328 - mod_timer(&dum_hcd->timer, jiffies); 1329 1330 spin_unlock_irqrestore(&dum_hcd->dum->lock, flags); 1331 return rc; ··· 1779 * drivers except that the callbacks are invoked from soft interrupt 1780 * context. 1781 */ 1782 - static void dummy_timer(struct timer_list *t) 1783 { 1784 struct dummy_hcd *dum_hcd = from_timer(dum_hcd, t, timer); 1785 struct dummy *dum = dum_hcd->dum; ··· 1810 break; 1811 } 1812 1813 - /* FIXME if HZ != 1000 this will probably misbehave ... */ 1814 - 1815 /* look at each urb queued by the host side driver */ 1816 spin_lock_irqsave(&dum->lock, flags); 1817 ··· 1817 dev_err(dummy_dev(dum_hcd), 1818 "timer fired with no URBs pending?\n"); 1819 spin_unlock_irqrestore(&dum->lock, flags); 1820 - return; 1821 } 1822 dum_hcd->next_frame_urbp = NULL; 1823 ··· 1995 dum_hcd->udev = NULL; 1996 } else if (dum_hcd->rh_state == DUMMY_RH_RUNNING) { 1997 /* want a 1 msec delay here */ 1998 - mod_timer(&dum_hcd->timer, jiffies + msecs_to_jiffies(1)); 1999 } 2000 2001 spin_unlock_irqrestore(&dum->lock, flags); 2002 } 2003 2004 /*-------------------------------------------------------------------------*/ ··· 2389 dum_hcd->rh_state = DUMMY_RH_RUNNING; 2390 set_link_state(dum_hcd); 2391 if (!list_empty(&dum_hcd->urbp_list)) 2392 - mod_timer(&dum_hcd->timer, jiffies); 2393 hcd->state = HC_STATE_RUNNING; 2394 } 2395 spin_unlock_irq(&dum_hcd->dum->lock); ··· 2467 2468 static int dummy_start_ss(struct dummy_hcd *dum_hcd) 2469 { 2470 - timer_setup(&dum_hcd->timer, dummy_timer, 0); 2471 dum_hcd->rh_state = DUMMY_RH_RUNNING; 2472 dum_hcd->stream_en_ep = 0; 2473 INIT_LIST_HEAD(&dum_hcd->urbp_list); ··· 2497 return dummy_start_ss(dum_hcd); 2498 2499 spin_lock_init(&dum_hcd->dum->lock); 2500 - timer_setup(&dum_hcd->timer, dummy_timer, 0); 2501 dum_hcd->rh_state = DUMMY_RH_RUNNING; 2502 2503 INIT_LIST_HEAD(&dum_hcd->urbp_list); ··· 2517 2518 static void dummy_stop(struct usb_hcd *hcd) 2519 { 2520 - device_remove_file(dummy_dev(hcd_to_dummy_hcd(hcd)), &dev_attr_urbs); 2521 - dev_info(dummy_dev(hcd_to_dummy_hcd(hcd)), "stopped\n"); 2522 } 2523 2524 /*-------------------------------------------------------------------------*/
··· 30 #include <linux/slab.h> 31 #include <linux/errno.h> 32 #include <linux/init.h> 33 + #include <linux/hrtimer.h> 34 #include <linux/list.h> 35 #include <linux/interrupt.h> 36 #include <linux/platform_device.h> ··· 49 50 #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */ 51 #define POWER_BUDGET_3 900 /* in mA */ 52 + 53 + #define DUMMY_TIMER_INT_NSECS 125000 /* 1 microframe */ 54 55 static const char driver_name[] = "dummy_hcd"; 56 static const char driver_desc[] = "USB Host+Gadget Emulator"; ··· 240 struct dummy_hcd { 241 struct dummy *dum; 242 enum dummy_rh_state rh_state; 243 + struct hrtimer timer; 244 u32 port_status; 245 u32 old_status; 246 unsigned long re_timeout; ··· 1301 urb->error_count = 1; /* mark as a new urb */ 1302 1303 /* kick the scheduler, it'll do the rest */ 1304 + if (!hrtimer_active(&dum_hcd->timer)) 1305 + hrtimer_start(&dum_hcd->timer, ns_to_ktime(DUMMY_TIMER_INT_NSECS), HRTIMER_MODE_REL); 1306 1307 done: 1308 spin_unlock_irqrestore(&dum_hcd->dum->lock, flags); ··· 1323 rc = usb_hcd_check_unlink_urb(hcd, urb, status); 1324 if (!rc && dum_hcd->rh_state != DUMMY_RH_RUNNING && 1325 !list_empty(&dum_hcd->urbp_list)) 1326 + hrtimer_start(&dum_hcd->timer, ns_to_ktime(0), HRTIMER_MODE_REL); 1327 1328 spin_unlock_irqrestore(&dum_hcd->dum->lock, flags); 1329 return rc; ··· 1777 * drivers except that the callbacks are invoked from soft interrupt 1778 * context. 1779 */ 1780 + static enum hrtimer_restart dummy_timer(struct hrtimer *t) 1781 { 1782 struct dummy_hcd *dum_hcd = from_timer(dum_hcd, t, timer); 1783 struct dummy *dum = dum_hcd->dum; ··· 1808 break; 1809 } 1810 1811 /* look at each urb queued by the host side driver */ 1812 spin_lock_irqsave(&dum->lock, flags); 1813 ··· 1817 dev_err(dummy_dev(dum_hcd), 1818 "timer fired with no URBs pending?\n"); 1819 spin_unlock_irqrestore(&dum->lock, flags); 1820 + return HRTIMER_NORESTART; 1821 } 1822 dum_hcd->next_frame_urbp = NULL; 1823 ··· 1995 dum_hcd->udev = NULL; 1996 } else if (dum_hcd->rh_state == DUMMY_RH_RUNNING) { 1997 /* want a 1 msec delay here */ 1998 + hrtimer_start(&dum_hcd->timer, ns_to_ktime(DUMMY_TIMER_INT_NSECS), HRTIMER_MODE_REL); 1999 } 2000 2001 spin_unlock_irqrestore(&dum->lock, flags); 2002 + 2003 + return HRTIMER_NORESTART; 2004 } 2005 2006 /*-------------------------------------------------------------------------*/ ··· 2387 dum_hcd->rh_state = DUMMY_RH_RUNNING; 2388 set_link_state(dum_hcd); 2389 if (!list_empty(&dum_hcd->urbp_list)) 2390 + hrtimer_start(&dum_hcd->timer, ns_to_ktime(0), HRTIMER_MODE_REL); 2391 hcd->state = HC_STATE_RUNNING; 2392 } 2393 spin_unlock_irq(&dum_hcd->dum->lock); ··· 2465 2466 static int dummy_start_ss(struct dummy_hcd *dum_hcd) 2467 { 2468 + hrtimer_init(&dum_hcd->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 2469 + dum_hcd->timer.function = dummy_timer; 2470 dum_hcd->rh_state = DUMMY_RH_RUNNING; 2471 dum_hcd->stream_en_ep = 0; 2472 INIT_LIST_HEAD(&dum_hcd->urbp_list); ··· 2494 return dummy_start_ss(dum_hcd); 2495 2496 spin_lock_init(&dum_hcd->dum->lock); 2497 + hrtimer_init(&dum_hcd->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 2498 + dum_hcd->timer.function = dummy_timer; 2499 dum_hcd->rh_state = DUMMY_RH_RUNNING; 2500 2501 INIT_LIST_HEAD(&dum_hcd->urbp_list); ··· 2513 2514 static void dummy_stop(struct usb_hcd *hcd) 2515 { 2516 + struct dummy_hcd *dum_hcd = hcd_to_dummy_hcd(hcd); 2517 + 2518 + hrtimer_cancel(&dum_hcd->timer); 2519 + device_remove_file(dummy_dev(dum_hcd), &dev_attr_urbs); 2520 + dev_info(dummy_dev(dum_hcd), "stopped\n"); 2521 } 2522 2523 /*-------------------------------------------------------------------------*/
+2 -2
drivers/usb/gadget/udc/mv_u3d_core.c
··· 1307 /* initialize ep0, ep0 in/out use eps[1] */ 1308 ep = &u3d->eps[1]; 1309 ep->u3d = u3d; 1310 - strncpy(ep->name, "ep0", sizeof(ep->name)); 1311 ep->ep.name = ep->name; 1312 ep->ep.ops = &mv_u3d_ep_ops; 1313 ep->wedge = 0; ··· 1337 ep->ep.caps.dir_out = true; 1338 } 1339 ep->u3d = u3d; 1340 - strncpy(ep->name, name, sizeof(ep->name)); 1341 ep->ep.name = ep->name; 1342 1343 ep->ep.caps.type_iso = true;
··· 1307 /* initialize ep0, ep0 in/out use eps[1] */ 1308 ep = &u3d->eps[1]; 1309 ep->u3d = u3d; 1310 + strscpy(ep->name, "ep0"); 1311 ep->ep.name = ep->name; 1312 ep->ep.ops = &mv_u3d_ep_ops; 1313 ep->wedge = 0; ··· 1337 ep->ep.caps.dir_out = true; 1338 } 1339 ep->u3d = u3d; 1340 + strscpy(ep->name, name); 1341 ep->ep.name = ep->name; 1342 1343 ep->ep.caps.type_iso = true;
+3 -7
drivers/usb/gadget/udc/omap_udc.c
··· 56 /* ISO too */ 57 #define USE_ISO 58 59 - #define DRIVER_DESC "OMAP UDC driver" 60 #define DRIVER_VERSION "4 October 2004" 61 62 #define OMAP_DMA_USB_W2FC_TX0 29 ··· 109 110 111 static const char driver_name[] = "omap_udc"; 112 - static const char driver_desc[] = DRIVER_DESC; 113 114 /*-------------------------------------------------------------------------*/ 115 ··· 2297 2298 spin_lock_irqsave(&udc->lock, flags); 2299 2300 - seq_printf(s, "%s, version: " DRIVER_VERSION 2301 #ifdef USE_ISO 2302 " (iso)" 2303 #endif 2304 - "%s\n", 2305 - driver_desc, 2306 - use_dma ? " (dma)" : ""); 2307 2308 tmp = omap_readw(UDC_REV) & 0xff; 2309 seq_printf(s, ··· 2990 2991 module_platform_driver(udc_driver); 2992 2993 - MODULE_DESCRIPTION(DRIVER_DESC); 2994 MODULE_LICENSE("GPL"); 2995 MODULE_ALIAS("platform:omap_udc");
··· 56 /* ISO too */ 57 #define USE_ISO 58 59 #define DRIVER_VERSION "4 October 2004" 60 61 #define OMAP_DMA_USB_W2FC_TX0 29 ··· 110 111 112 static const char driver_name[] = "omap_udc"; 113 114 /*-------------------------------------------------------------------------*/ 115 ··· 2299 2300 spin_lock_irqsave(&udc->lock, flags); 2301 2302 + seq_printf(s, "OMAP UDC driver, version: " DRIVER_VERSION 2303 #ifdef USE_ISO 2304 " (iso)" 2305 #endif 2306 + "%s\n", use_dma ? " (dma)" : ""); 2307 2308 tmp = omap_readw(UDC_REV) & 0xff; 2309 seq_printf(s, ··· 2994 2995 module_platform_driver(udc_driver); 2996 2997 + MODULE_DESCRIPTION("OMAP UDC driver"); 2998 MODULE_LICENSE("GPL"); 2999 MODULE_ALIAS("platform:omap_udc");
+5 -5
drivers/usb/host/ehci-dbg.c
··· 430 mark = '/'; 431 } 432 switch ((scratch >> 8) & 0x03) { 433 - case 0: 434 type = "out"; 435 break; 436 - case 1: 437 type = "in"; 438 break; 439 - case 2: 440 type = "setup"; 441 break; 442 default: ··· 602 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) { 603 temp++; 604 switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) { 605 - case 0: 606 type = "out"; 607 continue; 608 - case 1: 609 type = "in"; 610 continue; 611 }
··· 430 mark = '/'; 431 } 432 switch ((scratch >> 8) & 0x03) { 433 + case PID_CODE_OUT: 434 type = "out"; 435 break; 436 + case PID_CODE_IN: 437 type = "in"; 438 break; 439 + case PID_CODE_SETUP: 440 type = "setup"; 441 break; 442 default: ··· 602 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) { 603 temp++; 604 switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) { 605 + case PID_CODE_OUT: 606 type = "out"; 607 continue; 608 + case PID_CODE_IN: 609 type = "in"; 610 continue; 611 }
+6 -21
drivers/usb/host/ehci-exynos.c
··· 159 160 err = exynos_ehci_get_phy(&pdev->dev, exynos_ehci); 161 if (err) 162 - goto fail_clk; 163 164 - exynos_ehci->clk = devm_clk_get(&pdev->dev, "usbhost"); 165 166 if (IS_ERR(exynos_ehci->clk)) { 167 dev_err(&pdev->dev, "Failed to get usbhost clock\n"); 168 err = PTR_ERR(exynos_ehci->clk); 169 - goto fail_clk; 170 } 171 - 172 - err = clk_prepare_enable(exynos_ehci->clk); 173 - if (err) 174 - goto fail_clk; 175 176 hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 177 if (IS_ERR(hcd->regs)) { ··· 219 exynos_ehci_phy_disable(&pdev->dev); 220 pdev->dev.of_node = exynos_ehci->of_node; 221 fail_io: 222 - clk_disable_unprepare(exynos_ehci->clk); 223 - fail_clk: 224 usb_put_hcd(hcd); 225 return err; 226 } ··· 234 235 exynos_ehci_phy_disable(&pdev->dev); 236 237 - clk_disable_unprepare(exynos_ehci->clk); 238 - 239 usb_put_hcd(hcd); 240 } 241 242 - #ifdef CONFIG_PM 243 static int exynos_ehci_suspend(struct device *dev) 244 { 245 struct usb_hcd *hcd = dev_get_drvdata(dev); ··· 279 ehci_resume(hcd, false); 280 return 0; 281 } 282 - #else 283 - #define exynos_ehci_suspend NULL 284 - #define exynos_ehci_resume NULL 285 - #endif 286 287 - static const struct dev_pm_ops exynos_ehci_pm_ops = { 288 - .suspend = exynos_ehci_suspend, 289 - .resume = exynos_ehci_resume, 290 - }; 291 292 #ifdef CONFIG_OF 293 static const struct of_device_id exynos_ehci_match[] = { ··· 297 .shutdown = usb_hcd_platform_shutdown, 298 .driver = { 299 .name = "exynos-ehci", 300 - .pm = &exynos_ehci_pm_ops, 301 .of_match_table = of_match_ptr(exynos_ehci_match), 302 } 303 };
··· 159 160 err = exynos_ehci_get_phy(&pdev->dev, exynos_ehci); 161 if (err) 162 + goto fail_io; 163 164 + exynos_ehci->clk = devm_clk_get_enabled(&pdev->dev, "usbhost"); 165 166 if (IS_ERR(exynos_ehci->clk)) { 167 dev_err(&pdev->dev, "Failed to get usbhost clock\n"); 168 err = PTR_ERR(exynos_ehci->clk); 169 + goto fail_io; 170 } 171 172 hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 173 if (IS_ERR(hcd->regs)) { ··· 223 exynos_ehci_phy_disable(&pdev->dev); 224 pdev->dev.of_node = exynos_ehci->of_node; 225 fail_io: 226 usb_put_hcd(hcd); 227 return err; 228 } ··· 240 241 exynos_ehci_phy_disable(&pdev->dev); 242 243 usb_put_hcd(hcd); 244 } 245 246 static int exynos_ehci_suspend(struct device *dev) 247 { 248 struct usb_hcd *hcd = dev_get_drvdata(dev); ··· 288 ehci_resume(hcd, false); 289 return 0; 290 } 291 292 + static DEFINE_SIMPLE_DEV_PM_OPS(exynos_ehci_pm_ops, 293 + exynos_ehci_suspend, exynos_ehci_resume); 294 295 #ifdef CONFIG_OF 296 static const struct of_device_id exynos_ehci_match[] = { ··· 312 .shutdown = usb_hcd_platform_shutdown, 313 .driver = { 314 .name = "exynos-ehci", 315 + .pm = pm_ptr(&exynos_ehci_pm_ops), 316 .of_match_table = of_match_ptr(exynos_ehci_match), 317 } 318 };
+8 -12
drivers/usb/host/ehci-q.c
··· 27 28 /*-------------------------------------------------------------------------*/ 29 30 - /* PID Codes that are used here, from EHCI specification, Table 3-16. */ 31 - #define PID_CODE_IN 1 32 - #define PID_CODE_SETUP 2 33 - 34 /* fill a qtd, returning how much of the buffer we were able to queue up */ 35 36 static unsigned int ··· 226 /* fs/ls interrupt xfer missed the complete-split */ 227 status = -EPROTO; 228 } else if (token & QTD_STS_DBE) { 229 - status = (QTD_PID (token) == 1) /* IN ? */ 230 ? -ENOSR /* hc couldn't read data */ 231 : -ECOMM; /* hc couldn't write data */ 232 } else if (token & QTD_STS_XACT) { ··· 602 /* SETUP pid */ 603 qtd_fill(ehci, qtd, urb->setup_dma, 604 sizeof (struct usb_ctrlrequest), 605 - token | (2 /* "setup" */ << 8), 8); 606 607 /* ... and always at least one more pid */ 608 token ^= QTD_TOGGLE; ··· 616 617 /* for zero length DATA stages, STATUS is always IN */ 618 if (len == 0) 619 - token |= (1 /* "in" */ << 8); 620 } 621 622 /* ··· 638 } 639 640 if (is_input) 641 - token |= (1 /* "in" */ << 8); 642 /* else it's already initted to "out" pid (0 << 8) */ 643 644 maxpacket = usb_endpoint_maxp(&urb->ep->desc); ··· 705 706 if (usb_pipecontrol (urb->pipe)) { 707 one_more = 1; 708 - token ^= 0x0100; /* "in" <--> "out" */ 709 token |= QTD_TOGGLE; /* force DATA1 */ 710 } else if (usb_pipeout(urb->pipe) 711 && (urb->transfer_flags & URB_ZERO_PACKET) ··· 1199 /* SETUP pid, and interrupt after SETUP completion */ 1200 qtd_fill(ehci, qtd, urb->setup_dma, 1201 sizeof(struct usb_ctrlrequest), 1202 - QTD_IOC | token | (2 /* "setup" */ << 8), 8); 1203 1204 submit_async(ehci, urb, &qtd_list, GFP_ATOMIC); 1205 return 0; /*Return now; we shall come back after 15 seconds*/ ··· 1212 token ^= QTD_TOGGLE; /*We need to start IN with DATA-1 Pid-sequence*/ 1213 buf = urb->transfer_dma; 1214 1215 - token |= (1 /* "in" */ << 8); /*This is IN stage*/ 1216 1217 maxpacket = usb_endpoint_maxp(&urb->ep->desc); 1218 ··· 1225 qtd->hw_alt_next = EHCI_LIST_END(ehci); 1226 1227 /* STATUS stage for GetDesc control request */ 1228 - token ^= 0x0100; /* "in" <--> "out" */ 1229 token |= QTD_TOGGLE; /* force DATA1 */ 1230 1231 qtd_prev = qtd;
··· 27 28 /*-------------------------------------------------------------------------*/ 29 30 /* fill a qtd, returning how much of the buffer we were able to queue up */ 31 32 static unsigned int ··· 230 /* fs/ls interrupt xfer missed the complete-split */ 231 status = -EPROTO; 232 } else if (token & QTD_STS_DBE) { 233 + status = (QTD_PID(token) == PID_CODE_IN) /* IN ? */ 234 ? -ENOSR /* hc couldn't read data */ 235 : -ECOMM; /* hc couldn't write data */ 236 } else if (token & QTD_STS_XACT) { ··· 606 /* SETUP pid */ 607 qtd_fill(ehci, qtd, urb->setup_dma, 608 sizeof (struct usb_ctrlrequest), 609 + token | (PID_CODE_SETUP << 8), 8); 610 611 /* ... and always at least one more pid */ 612 token ^= QTD_TOGGLE; ··· 620 621 /* for zero length DATA stages, STATUS is always IN */ 622 if (len == 0) 623 + token |= (PID_CODE_IN << 8); 624 } 625 626 /* ··· 642 } 643 644 if (is_input) 645 + token |= (PID_CODE_IN << 8); 646 /* else it's already initted to "out" pid (0 << 8) */ 647 648 maxpacket = usb_endpoint_maxp(&urb->ep->desc); ··· 709 710 if (usb_pipecontrol (urb->pipe)) { 711 one_more = 1; 712 + token ^= (PID_CODE_IN << 8); /* "in" <--> "out" */ 713 token |= QTD_TOGGLE; /* force DATA1 */ 714 } else if (usb_pipeout(urb->pipe) 715 && (urb->transfer_flags & URB_ZERO_PACKET) ··· 1203 /* SETUP pid, and interrupt after SETUP completion */ 1204 qtd_fill(ehci, qtd, urb->setup_dma, 1205 sizeof(struct usb_ctrlrequest), 1206 + QTD_IOC | token | (PID_CODE_SETUP << 8), 8); 1207 1208 submit_async(ehci, urb, &qtd_list, GFP_ATOMIC); 1209 return 0; /*Return now; we shall come back after 15 seconds*/ ··· 1216 token ^= QTD_TOGGLE; /*We need to start IN with DATA-1 Pid-sequence*/ 1217 buf = urb->transfer_dma; 1218 1219 + token |= (PID_CODE_IN << 8); /*This is IN stage*/ 1220 1221 maxpacket = usb_endpoint_maxp(&urb->ep->desc); 1222 ··· 1229 qtd->hw_alt_next = EHCI_LIST_END(ehci); 1230 1231 /* STATUS stage for GetDesc control request */ 1232 + token ^= (PID_CODE_IN << 8); /* "in" <--> "out" */ 1233 token |= QTD_TOGGLE; /* force DATA1 */ 1234 1235 qtd_prev = qtd;
+7 -1
drivers/usb/host/ehci.h
··· 321 size_t length; /* length of buffer */ 322 } __aligned(32); 323 324 /* mask NakCnt+T in qh->hw_alt_next */ 325 #define QTD_MASK(ehci) cpu_to_hc32(ehci, ~0x1f) 326 327 - #define IS_SHORT_READ(token) (QTD_LENGTH(token) != 0 && QTD_PID(token) == 1) 328 329 /*-------------------------------------------------------------------------*/ 330
··· 321 size_t length; /* length of buffer */ 322 } __aligned(32); 323 324 + /* PID Codes that are used here, from EHCI specification, Table 3-16. */ 325 + #define PID_CODE_OUT 0 326 + #define PID_CODE_IN 1 327 + #define PID_CODE_SETUP 2 328 + 329 /* mask NakCnt+T in qh->hw_alt_next */ 330 #define QTD_MASK(ehci) cpu_to_hc32(ehci, ~0x1f) 331 332 + #define IS_SHORT_READ(token) (QTD_LENGTH(token) != 0 && \ 333 + QTD_PID(token) == PID_CODE_IN) 334 335 /*-------------------------------------------------------------------------*/ 336
+6 -21
drivers/usb/host/ohci-exynos.c
··· 135 136 err = exynos_ohci_get_phy(&pdev->dev, exynos_ohci); 137 if (err) 138 - goto fail_clk; 139 140 - exynos_ohci->clk = devm_clk_get(&pdev->dev, "usbhost"); 141 142 if (IS_ERR(exynos_ohci->clk)) { 143 dev_err(&pdev->dev, "Failed to get usbhost clock\n"); 144 err = PTR_ERR(exynos_ohci->clk); 145 - goto fail_clk; 146 } 147 - 148 - err = clk_prepare_enable(exynos_ohci->clk); 149 - if (err) 150 - goto fail_clk; 151 152 hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 153 if (IS_ERR(hcd->regs)) { ··· 187 exynos_ohci_phy_disable(&pdev->dev); 188 pdev->dev.of_node = exynos_ohci->of_node; 189 fail_io: 190 - clk_disable_unprepare(exynos_ohci->clk); 191 - fail_clk: 192 usb_put_hcd(hcd); 193 return err; 194 } ··· 202 203 exynos_ohci_phy_disable(&pdev->dev); 204 205 - clk_disable_unprepare(exynos_ohci->clk); 206 - 207 usb_put_hcd(hcd); 208 } 209 ··· 213 hcd->driver->shutdown(hcd); 214 } 215 216 - #ifdef CONFIG_PM 217 static int exynos_ohci_suspend(struct device *dev) 218 { 219 struct usb_hcd *hcd = dev_get_drvdata(dev); ··· 249 250 return 0; 251 } 252 - #else 253 - #define exynos_ohci_suspend NULL 254 - #define exynos_ohci_resume NULL 255 - #endif 256 257 static const struct ohci_driver_overrides exynos_overrides __initconst = { 258 .extra_priv_size = sizeof(struct exynos_ohci_hcd), 259 }; 260 261 - static const struct dev_pm_ops exynos_ohci_pm_ops = { 262 - .suspend = exynos_ohci_suspend, 263 - .resume = exynos_ohci_resume, 264 - }; 265 266 #ifdef CONFIG_OF 267 static const struct of_device_id exynos_ohci_match[] = { ··· 271 .shutdown = exynos_ohci_shutdown, 272 .driver = { 273 .name = "exynos-ohci", 274 - .pm = &exynos_ohci_pm_ops, 275 .of_match_table = of_match_ptr(exynos_ohci_match), 276 } 277 };
··· 135 136 err = exynos_ohci_get_phy(&pdev->dev, exynos_ohci); 137 if (err) 138 + goto fail_io; 139 140 + exynos_ohci->clk = devm_clk_get_enabled(&pdev->dev, "usbhost"); 141 142 if (IS_ERR(exynos_ohci->clk)) { 143 dev_err(&pdev->dev, "Failed to get usbhost clock\n"); 144 err = PTR_ERR(exynos_ohci->clk); 145 + goto fail_io; 146 } 147 148 hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 149 if (IS_ERR(hcd->regs)) { ··· 191 exynos_ohci_phy_disable(&pdev->dev); 192 pdev->dev.of_node = exynos_ohci->of_node; 193 fail_io: 194 usb_put_hcd(hcd); 195 return err; 196 } ··· 208 209 exynos_ohci_phy_disable(&pdev->dev); 210 211 usb_put_hcd(hcd); 212 } 213 ··· 221 hcd->driver->shutdown(hcd); 222 } 223 224 static int exynos_ohci_suspend(struct device *dev) 225 { 226 struct usb_hcd *hcd = dev_get_drvdata(dev); ··· 258 259 return 0; 260 } 261 262 static const struct ohci_driver_overrides exynos_overrides __initconst = { 263 .extra_priv_size = sizeof(struct exynos_ohci_hcd), 264 }; 265 266 + static DEFINE_SIMPLE_DEV_PM_OPS(exynos_ohci_pm_ops, 267 + exynos_ohci_suspend, exynos_ohci_resume); 268 269 #ifdef CONFIG_OF 270 static const struct of_device_id exynos_ohci_match[] = { ··· 286 .shutdown = exynos_ohci_shutdown, 287 .driver = { 288 .name = "exynos-ohci", 289 + .pm = pm_ptr(&exynos_ohci_pm_ops), 290 .of_match_table = of_match_ptr(exynos_ohci_match), 291 } 292 };
+1 -1
drivers/usb/host/xhci-dbgcap.c
··· 516 goto string_fail; 517 518 /* Setup ERST register: */ 519 - writel(dbc->erst.erst_size, &dbc->regs->ersts); 520 521 lo_hi_writeq(dbc->erst.erst_dma_addr, &dbc->regs->erstba); 522 deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
··· 516 goto string_fail; 517 518 /* Setup ERST register: */ 519 + writel(dbc->erst.num_entries, &dbc->regs->ersts); 520 521 lo_hi_writeq(dbc->erst.erst_dma_addr, &dbc->regs->erstba); 522 deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
+19 -29
drivers/usb/host/xhci-mem.c
··· 536 struct xhci_stream_ctx *stream_ctx, dma_addr_t dma) 537 { 538 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; 539 - size_t size = sizeof(struct xhci_stream_ctx) * num_stream_ctxs; 540 541 if (size > MEDIUM_STREAM_ARRAY_SIZE) 542 dma_free_coherent(dev, size, stream_ctx, dma); ··· 561 gfp_t mem_flags) 562 { 563 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; 564 - size_t size = size_mul(sizeof(struct xhci_stream_ctx), num_stream_ctxs); 565 566 if (size > MEDIUM_STREAM_ARRAY_SIZE) 567 return dma_alloc_coherent(dev, size, dma, mem_flags); ··· 1638 goto fail_sp; 1639 1640 xhci->scratchpad->sp_array = dma_alloc_coherent(dev, 1641 - size_mul(sizeof(u64), num_sp), 1642 &xhci->scratchpad->sp_dma, flags); 1643 if (!xhci->scratchpad->sp_array) 1644 goto fail_sp2; ··· 1671 kfree(xhci->scratchpad->sp_buffers); 1672 1673 fail_sp3: 1674 - dma_free_coherent(dev, num_sp * sizeof(u64), 1675 xhci->scratchpad->sp_array, 1676 xhci->scratchpad->sp_dma); 1677 ··· 1700 xhci->scratchpad->sp_array[i]); 1701 } 1702 kfree(xhci->scratchpad->sp_buffers); 1703 - dma_free_coherent(dev, num_sp * sizeof(u64), 1704 xhci->scratchpad->sp_array, 1705 xhci->scratchpad->sp_dma); 1706 kfree(xhci->scratchpad); ··· 1778 struct xhci_segment *seg; 1779 struct xhci_erst_entry *entry; 1780 1781 - size = size_mul(sizeof(struct xhci_erst_entry), evt_ring->num_segs); 1782 erst->entries = dma_alloc_coherent(xhci_to_hcd(xhci)->self.sysdev, 1783 size, &erst->erst_dma_addr, flags); 1784 if (!erst->entries) ··· 1829 if (!ir) 1830 return; 1831 1832 - erst_size = sizeof(struct xhci_erst_entry) * ir->erst.num_entries; 1833 if (ir->erst.entries) 1834 dma_free_coherent(dev, erst_size, 1835 ir->erst.entries, ··· 1950 kfree(xhci->usb3_rhub.ports); 1951 kfree(xhci->hw_ports); 1952 kfree(xhci->rh_bw); 1953 - kfree(xhci->ext_caps); 1954 for (i = 0; i < xhci->num_port_caps; i++) 1955 kfree(xhci->port_caps[i].psi); 1956 kfree(xhci->port_caps); ··· 1960 xhci->usb3_rhub.ports = NULL; 1961 xhci->hw_ports = NULL; 1962 xhci->rh_bw = NULL; 1963 - xhci->ext_caps = NULL; 1964 xhci->port_caps = NULL; 1965 xhci->interrupters = NULL; 1966 ··· 2087 2088 port_cap->maj_rev = major_revision; 2089 port_cap->min_rev = minor_revision; 2090 - 2091 - /* cache usb2 port capabilities */ 2092 - if (major_revision < 0x03 && xhci->num_ext_caps < max_caps) 2093 - xhci->ext_caps[xhci->num_ext_caps++] = temp; 2094 2095 if ((xhci->hci_version >= 0x100) && (major_revision != 0x03) && 2096 (temp & XHCI_HLC)) { ··· 2207 XHCI_EXT_CAPS_PROTOCOL); 2208 } 2209 2210 - xhci->ext_caps = kcalloc_node(cap_count, sizeof(*xhci->ext_caps), 2211 - flags, dev_to_node(dev)); 2212 - if (!xhci->ext_caps) 2213 - return -ENOMEM; 2214 - 2215 xhci->port_caps = kcalloc_node(cap_count, sizeof(*xhci->port_caps), 2216 flags, dev_to_node(dev)); 2217 if (!xhci->port_caps) ··· 2259 } 2260 2261 static struct xhci_interrupter * 2262 - xhci_alloc_interrupter(struct xhci_hcd *xhci, int segs, gfp_t flags) 2263 { 2264 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; 2265 struct xhci_interrupter *ir; 2266 - unsigned int num_segs = segs; 2267 int ret; 2268 2269 ir = kzalloc_node(sizeof(*ir), flags, dev_to_node(dev)); 2270 if (!ir) 2271 return NULL; 2272 2273 - /* number of ring segments should be greater than 0 */ 2274 - if (segs <= 0) 2275 - num_segs = min_t(unsigned int, 1 << HCS_ERST_MAX(xhci->hcs_params2), 2276 - ERST_MAX_SEGS); 2277 - 2278 - ir->event_ring = xhci_ring_alloc(xhci, num_segs, 1, TYPE_EVENT, 0, 2279 - flags); 2280 if (!ir->event_ring) { 2281 xhci_warn(xhci, "Failed to allocate interrupter event ring\n"); 2282 kfree(ir); ··· 2334 } 2335 2336 struct xhci_interrupter * 2337 - xhci_create_secondary_interrupter(struct usb_hcd *hcd, int num_seg) 2338 { 2339 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 2340 struct xhci_interrupter *ir; ··· 2344 if (!xhci->interrupters || xhci->max_interrupters <= 1) 2345 return NULL; 2346 2347 - ir = xhci_alloc_interrupter(xhci, num_seg, GFP_KERNEL); 2348 if (!ir) 2349 return NULL; 2350
··· 536 struct xhci_stream_ctx *stream_ctx, dma_addr_t dma) 537 { 538 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; 539 + size_t size = array_size(sizeof(struct xhci_stream_ctx), num_stream_ctxs); 540 541 if (size > MEDIUM_STREAM_ARRAY_SIZE) 542 dma_free_coherent(dev, size, stream_ctx, dma); ··· 561 gfp_t mem_flags) 562 { 563 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; 564 + size_t size = array_size(sizeof(struct xhci_stream_ctx), num_stream_ctxs); 565 566 if (size > MEDIUM_STREAM_ARRAY_SIZE) 567 return dma_alloc_coherent(dev, size, dma, mem_flags); ··· 1638 goto fail_sp; 1639 1640 xhci->scratchpad->sp_array = dma_alloc_coherent(dev, 1641 + array_size(sizeof(u64), num_sp), 1642 &xhci->scratchpad->sp_dma, flags); 1643 if (!xhci->scratchpad->sp_array) 1644 goto fail_sp2; ··· 1671 kfree(xhci->scratchpad->sp_buffers); 1672 1673 fail_sp3: 1674 + dma_free_coherent(dev, array_size(sizeof(u64), num_sp), 1675 xhci->scratchpad->sp_array, 1676 xhci->scratchpad->sp_dma); 1677 ··· 1700 xhci->scratchpad->sp_array[i]); 1701 } 1702 kfree(xhci->scratchpad->sp_buffers); 1703 + dma_free_coherent(dev, array_size(sizeof(u64), num_sp), 1704 xhci->scratchpad->sp_array, 1705 xhci->scratchpad->sp_dma); 1706 kfree(xhci->scratchpad); ··· 1778 struct xhci_segment *seg; 1779 struct xhci_erst_entry *entry; 1780 1781 + size = array_size(sizeof(struct xhci_erst_entry), evt_ring->num_segs); 1782 erst->entries = dma_alloc_coherent(xhci_to_hcd(xhci)->self.sysdev, 1783 size, &erst->erst_dma_addr, flags); 1784 if (!erst->entries) ··· 1829 if (!ir) 1830 return; 1831 1832 + erst_size = array_size(sizeof(struct xhci_erst_entry), ir->erst.num_entries); 1833 if (ir->erst.entries) 1834 dma_free_coherent(dev, erst_size, 1835 ir->erst.entries, ··· 1950 kfree(xhci->usb3_rhub.ports); 1951 kfree(xhci->hw_ports); 1952 kfree(xhci->rh_bw); 1953 for (i = 0; i < xhci->num_port_caps; i++) 1954 kfree(xhci->port_caps[i].psi); 1955 kfree(xhci->port_caps); ··· 1961 xhci->usb3_rhub.ports = NULL; 1962 xhci->hw_ports = NULL; 1963 xhci->rh_bw = NULL; 1964 xhci->port_caps = NULL; 1965 xhci->interrupters = NULL; 1966 ··· 2089 2090 port_cap->maj_rev = major_revision; 2091 port_cap->min_rev = minor_revision; 2092 + port_cap->protocol_caps = temp; 2093 2094 if ((xhci->hci_version >= 0x100) && (major_revision != 0x03) && 2095 (temp & XHCI_HLC)) { ··· 2212 XHCI_EXT_CAPS_PROTOCOL); 2213 } 2214 2215 xhci->port_caps = kcalloc_node(cap_count, sizeof(*xhci->port_caps), 2216 flags, dev_to_node(dev)); 2217 if (!xhci->port_caps) ··· 2269 } 2270 2271 static struct xhci_interrupter * 2272 + xhci_alloc_interrupter(struct xhci_hcd *xhci, unsigned int segs, gfp_t flags) 2273 { 2274 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; 2275 struct xhci_interrupter *ir; 2276 + unsigned int max_segs; 2277 int ret; 2278 + 2279 + if (!segs) 2280 + segs = ERST_DEFAULT_SEGS; 2281 + 2282 + max_segs = BIT(HCS_ERST_MAX(xhci->hcs_params2)); 2283 + segs = min(segs, max_segs); 2284 2285 ir = kzalloc_node(sizeof(*ir), flags, dev_to_node(dev)); 2286 if (!ir) 2287 return NULL; 2288 2289 + ir->event_ring = xhci_ring_alloc(xhci, segs, 1, TYPE_EVENT, 0, flags); 2290 if (!ir->event_ring) { 2291 xhci_warn(xhci, "Failed to allocate interrupter event ring\n"); 2292 kfree(ir); ··· 2344 } 2345 2346 struct xhci_interrupter * 2347 + xhci_create_secondary_interrupter(struct usb_hcd *hcd, unsigned int segs) 2348 { 2349 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 2350 struct xhci_interrupter *ir; ··· 2354 if (!xhci->interrupters || xhci->max_interrupters <= 1) 2355 return NULL; 2356 2357 + ir = xhci_alloc_interrupter(xhci, segs, GFP_KERNEL); 2358 if (!ir) 2359 return NULL; 2360
+20 -29
drivers/usb/host/xhci-pci.c
··· 45 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f 46 #define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI 0x0aa8 47 #define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI 0x1aa8 48 - #define PCI_DEVICE_ID_INTEL_APL_XHCI 0x5aa8 49 - #define PCI_DEVICE_ID_INTEL_DNV_XHCI 0x19d0 50 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI 0x15b5 51 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI 0x15b6 52 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_XHCI 0x15c1 ··· 63 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI 0x15e9 64 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI 0x15ec 65 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI 0x15f0 66 - #define PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI 0x8a13 67 - #define PCI_DEVICE_ID_INTEL_CML_XHCI 0xa3af 68 - #define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13 69 - #define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI 0x1138 70 - #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI 0x51ed 71 - #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_PCH_XHCI 0x54ed 72 73 #define PCI_DEVICE_ID_AMD_RENOIR_XHCI 0x1639 74 #define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9 ··· 272 "QUIRK: Fresco Logic revision %u " 273 "has broken MSI implementation", 274 pdev->revision); 275 - xhci->quirks |= XHCI_TRUST_TX_LENGTH; 276 } 277 278 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && 279 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1009) 280 xhci->quirks |= XHCI_BROKEN_STREAMS; 281 - 282 - if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && 283 - pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1100) 284 - xhci->quirks |= XHCI_TRUST_TX_LENGTH; 285 286 if (pdev->vendor == PCI_VENDOR_ID_NEC) 287 xhci->quirks |= XHCI_NEC_HOST; ··· 304 xhci->quirks |= XHCI_RESET_ON_RESUME; 305 } 306 307 - if (pdev->vendor == PCI_VENDOR_ID_AMD) { 308 - xhci->quirks |= XHCI_TRUST_TX_LENGTH; 309 - if (pdev->device == 0x43f7) 310 - xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW; 311 - } 312 313 if ((pdev->vendor == PCI_VENDOR_ID_AMD) && 314 ((pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4) || ··· 350 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI || 351 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI || 352 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI || 353 - pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI || 354 - pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI || 355 - pdev->device == PCI_DEVICE_ID_INTEL_CML_XHCI)) { 356 xhci->quirks |= XHCI_PME_STUCK_QUIRK; 357 } 358 if (pdev->vendor == PCI_VENDOR_ID_INTEL && ··· 361 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 362 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI || 363 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI || 364 - pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI)) 365 xhci->quirks |= XHCI_INTEL_USB_ROLE_SW; 366 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 367 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI || 368 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI || 369 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI || 370 - pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI || 371 - pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI)) 372 xhci->quirks |= XHCI_MISSING_CAS; 373 374 if (pdev->vendor == PCI_VENDOR_ID_INTEL && ··· 393 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 394 pdev->device == PCI_DEVICE_ID_EJ168) { 395 xhci->quirks |= XHCI_RESET_ON_RESUME; 396 - xhci->quirks |= XHCI_TRUST_TX_LENGTH; 397 xhci->quirks |= XHCI_BROKEN_STREAMS; 398 } 399 if (pdev->vendor == PCI_VENDOR_ID_RENESAS && 400 pdev->device == 0x0014) { 401 - xhci->quirks |= XHCI_TRUST_TX_LENGTH; 402 xhci->quirks |= XHCI_ZERO_64B_REGS; 403 } 404 if (pdev->vendor == PCI_VENDOR_ID_RENESAS && ··· 426 } 427 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && 428 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042A_XHCI) { 429 - xhci->quirks |= XHCI_TRUST_TX_LENGTH; 430 xhci->quirks |= XHCI_NO_64BIT_SUPPORT; 431 } 432 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && ··· 880 881 /* PCI driver selection metadata; PCI hotplugging uses this */ 882 static const struct pci_device_id pci_ids[] = { 883 - { PCI_DEVICE(0x1912, 0x0014), 884 .driver_data = (unsigned long)&reneses_data, 885 }, 886 - { PCI_DEVICE(0x1912, 0x0015), 887 .driver_data = (unsigned long)&reneses_data, 888 }, 889 /* handle any USB 3.0 xHCI controller */
··· 45 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f 46 #define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI 0x0aa8 47 #define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI 0x1aa8 48 + #define PCI_DEVICE_ID_INTEL_APOLLO_LAKE_XHCI 0x5aa8 49 + #define PCI_DEVICE_ID_INTEL_DENVERTON_XHCI 0x19d0 50 + #define PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI 0x8a13 51 + #define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13 52 + #define PCI_DEVICE_ID_INTEL_COMET_LAKE_XHCI 0xa3af 53 + #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI 0x51ed 54 + #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_PCH_XHCI 0x54ed 55 + 56 + /* Thunderbolt */ 57 + #define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI 0x1138 58 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI 0x15b5 59 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI 0x15b6 60 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_XHCI 0x15c1 ··· 55 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI 0x15e9 56 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI 0x15ec 57 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI 0x15f0 58 59 #define PCI_DEVICE_ID_AMD_RENOIR_XHCI 0x1639 60 #define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9 ··· 270 "QUIRK: Fresco Logic revision %u " 271 "has broken MSI implementation", 272 pdev->revision); 273 } 274 275 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && 276 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1009) 277 xhci->quirks |= XHCI_BROKEN_STREAMS; 278 279 if (pdev->vendor == PCI_VENDOR_ID_NEC) 280 xhci->quirks |= XHCI_NEC_HOST; ··· 307 xhci->quirks |= XHCI_RESET_ON_RESUME; 308 } 309 310 + if (pdev->vendor == PCI_VENDOR_ID_AMD && pdev->device == 0x43f7) 311 + xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW; 312 313 if ((pdev->vendor == PCI_VENDOR_ID_AMD) && 314 ((pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4) || ··· 356 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI || 357 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI || 358 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI || 359 + pdev->device == PCI_DEVICE_ID_INTEL_APOLLO_LAKE_XHCI || 360 + pdev->device == PCI_DEVICE_ID_INTEL_DENVERTON_XHCI || 361 + pdev->device == PCI_DEVICE_ID_INTEL_COMET_LAKE_XHCI)) { 362 xhci->quirks |= XHCI_PME_STUCK_QUIRK; 363 } 364 if (pdev->vendor == PCI_VENDOR_ID_INTEL && ··· 367 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 368 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI || 369 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI || 370 + pdev->device == PCI_DEVICE_ID_INTEL_APOLLO_LAKE_XHCI)) 371 xhci->quirks |= XHCI_INTEL_USB_ROLE_SW; 372 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 373 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI || 374 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI || 375 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI || 376 + pdev->device == PCI_DEVICE_ID_INTEL_APOLLO_LAKE_XHCI || 377 + pdev->device == PCI_DEVICE_ID_INTEL_DENVERTON_XHCI)) 378 xhci->quirks |= XHCI_MISSING_CAS; 379 380 if (pdev->vendor == PCI_VENDOR_ID_INTEL && ··· 399 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 400 pdev->device == PCI_DEVICE_ID_EJ168) { 401 xhci->quirks |= XHCI_RESET_ON_RESUME; 402 xhci->quirks |= XHCI_BROKEN_STREAMS; 403 } 404 if (pdev->vendor == PCI_VENDOR_ID_RENESAS && 405 pdev->device == 0x0014) { 406 xhci->quirks |= XHCI_ZERO_64B_REGS; 407 } 408 if (pdev->vendor == PCI_VENDOR_ID_RENESAS && ··· 434 } 435 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && 436 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042A_XHCI) { 437 xhci->quirks |= XHCI_NO_64BIT_SUPPORT; 438 } 439 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && ··· 889 890 /* PCI driver selection metadata; PCI hotplugging uses this */ 891 static const struct pci_device_id pci_ids[] = { 892 + { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, 0x0014), 893 .driver_data = (unsigned long)&reneses_data, 894 }, 895 + { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, 0x0015), 896 .driver_data = (unsigned long)&reneses_data, 897 }, 898 /* handle any USB 3.0 xHCI controller */
+2 -4
drivers/usb/host/xhci-rcar.c
··· 214 */ 215 #define SET_XHCI_PLAT_PRIV_FOR_RCAR(firmware) \ 216 .firmware_name = firmware, \ 217 - .quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH | \ 218 - XHCI_SLOW_SUSPEND, \ 219 .init_quirk = xhci_rcar_init_quirk, \ 220 .plat_start = xhci_rcar_start, \ 221 .resume_quirk = xhci_rcar_resume_quirk, ··· 228 }; 229 230 static const struct xhci_plat_priv xhci_plat_renesas_rzv2m = { 231 - .quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH | 232 - XHCI_SLOW_SUSPEND, 233 .init_quirk = xhci_rzv2m_init_quirk, 234 .plat_start = xhci_rzv2m_start, 235 };
··· 214 */ 215 #define SET_XHCI_PLAT_PRIV_FOR_RCAR(firmware) \ 216 .firmware_name = firmware, \ 217 + .quirks = XHCI_NO_64BIT_SUPPORT | XHCI_SLOW_SUSPEND, \ 218 .init_quirk = xhci_rcar_init_quirk, \ 219 .plat_start = xhci_rcar_start, \ 220 .resume_quirk = xhci_rcar_resume_quirk, ··· 229 }; 230 231 static const struct xhci_plat_priv xhci_plat_renesas_rzv2m = { 232 + .quirks = XHCI_NO_64BIT_SUPPORT | XHCI_SLOW_SUSPEND, 233 .init_quirk = xhci_rzv2m_init_quirk, 234 .plat_start = xhci_rzv2m_start, 235 };
+58 -80
drivers/usb/host/xhci-ring.c
··· 308 free += last_on_seg - enq; 309 enq_seg = enq_seg->next; 310 enq = enq_seg->trbs; 311 - } while (i++ <= ring->num_segs); 312 313 return free; 314 } ··· 351 while (new_segs > 0) { 352 seg = seg->next; 353 if (seg == ring->deq_seg) { 354 - xhci_dbg(xhci, "Ring expansion by %d segments needed\n", 355 - new_segs); 356 - xhci_dbg(xhci, "Adding %d trbs moves enq %d trbs into deq seg\n", 357 - num_trbs, trbs_past_seg % TRBS_PER_SEGMENT); 358 return new_segs; 359 } 360 new_segs--; ··· 1024 td->urb->stream_id); 1025 hw_deq &= ~0xf; 1026 1027 - if (td->cancel_status == TD_HALTED || 1028 - trb_in_td(xhci, td->start_seg, td->first_trb, td->last_trb, hw_deq, false)) { 1029 switch (td->cancel_status) { 1030 case TD_CLEARED: /* TD is already no-op */ 1031 case TD_CLEARING_CACHE: /* set TR deq command already queued */ ··· 1081 hw_deq = xhci_get_hw_deq(ep->xhci, ep->vdev, ep->ep_index, 0); 1082 hw_deq &= ~0xf; 1083 td = list_first_entry(&ep->ring->td_list, struct xhci_td, td_list); 1084 - if (trb_in_td(ep->xhci, td->start_seg, td->first_trb, 1085 - td->last_trb, hw_deq, false)) 1086 return td; 1087 } 1088 return NULL; ··· 2047 } 2048 2049 /* 2050 - * This TD is defined by the TRBs starting at start_trb in start_seg and ending 2051 - * at end_trb, which may be in another segment. If the suspect DMA address is a 2052 - * TRB in this TD, this function returns that TRB's segment. Otherwise it 2053 - * returns 0. 2054 */ 2055 - struct xhci_segment *trb_in_td(struct xhci_hcd *xhci, 2056 - struct xhci_segment *start_seg, 2057 - union xhci_trb *start_trb, 2058 - union xhci_trb *end_trb, 2059 - dma_addr_t suspect_dma, 2060 - bool debug) 2061 { 2062 dma_addr_t start_dma; 2063 dma_addr_t end_seg_dma; 2064 dma_addr_t end_trb_dma; 2065 struct xhci_segment *cur_seg; 2066 2067 - start_dma = xhci_trb_virt_to_dma(start_seg, start_trb); 2068 - cur_seg = start_seg; 2069 2070 do { 2071 if (start_dma == 0) ··· 2068 end_seg_dma = xhci_trb_virt_to_dma(cur_seg, 2069 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]); 2070 /* If the end TRB isn't in this segment, this is set to 0 */ 2071 - end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb); 2072 2073 if (debug) 2074 xhci_warn(xhci, ··· 2102 } 2103 cur_seg = cur_seg->next; 2104 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]); 2105 - } while (cur_seg != start_seg); 2106 2107 return NULL; 2108 } ··· 2389 break; 2390 if (remaining) { 2391 frame->status = short_framestatus; 2392 - if (xhci->quirks & XHCI_TRUST_TX_LENGTH) 2393 - sum_trbs_for_length = true; 2394 break; 2395 } 2396 frame->status = 0; ··· 2579 struct xhci_ep_ctx *ep_ctx; 2580 u32 trb_comp_code; 2581 int td_num = 0; 2582 - bool handling_skipped_tds = false; 2583 2584 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); 2585 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1; ··· 2616 else 2617 xhci_handle_halted_endpoint(xhci, ep, NULL, 2618 EP_SOFT_RESET); 2619 - goto cleanup; 2620 case COMP_RING_UNDERRUN: 2621 case COMP_RING_OVERRUN: 2622 case COMP_STOPPED_LENGTH_INVALID: 2623 - goto cleanup; 2624 default: 2625 xhci_err(xhci, "ERROR Transfer event for unknown stream ring slot %u ep %u\n", 2626 slot_id, ep_index); 2627 goto err_out; 2628 } 2629 } 2630 2631 /* Count current td numbers if ep->skip is set */ ··· 2639 * transfer type 2640 */ 2641 case COMP_SUCCESS: 2642 - if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) 2643 - break; 2644 - if (xhci->quirks & XHCI_TRUST_TX_LENGTH || 2645 - ep_ring->last_td_was_short) 2646 trb_comp_code = COMP_SHORT_PACKET; 2647 - else 2648 - xhci_warn_ratelimited(xhci, 2649 - "WARN Successful completion on short TX for slot %u ep %u: needs XHCI_TRUST_TX_LENGTH quirk?\n", 2650 - slot_id, ep_index); 2651 break; 2652 case COMP_SHORT_PACKET: 2653 break; ··· 2715 */ 2716 xhci_dbg(xhci, "underrun event on endpoint\n"); 2717 if (!list_empty(&ep_ring->td_list)) 2718 - xhci_dbg(xhci, "Underrun Event for slot %d ep %d " 2719 - "still with TDs queued?\n", 2720 - TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), 2721 - ep_index); 2722 - goto cleanup; 2723 case COMP_RING_OVERRUN: 2724 xhci_dbg(xhci, "overrun event on endpoint\n"); 2725 if (!list_empty(&ep_ring->td_list)) 2726 - xhci_dbg(xhci, "Overrun Event for slot %d ep %d " 2727 - "still with TDs queued?\n", 2728 - TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), 2729 - ep_index); 2730 - goto cleanup; 2731 case COMP_MISSED_SERVICE_ERROR: 2732 /* 2733 * When encounter missed service error, one or more isoc tds ··· 2739 xhci_dbg(xhci, 2740 "Miss service interval error for slot %u ep %u, set skip flag\n", 2741 slot_id, ep_index); 2742 - goto cleanup; 2743 case COMP_NO_PING_RESPONSE_ERROR: 2744 ep->skip = true; 2745 xhci_dbg(xhci, 2746 "No Ping response error for slot %u ep %u, Skip one Isoc TD\n", 2747 slot_id, ep_index); 2748 - goto cleanup; 2749 2750 case COMP_INCOMPATIBLE_DEVICE_ERROR: 2751 /* needs disable slot command to recover */ ··· 2762 xhci_warn(xhci, 2763 "ERROR Unknown event condition %u for slot %u ep %u , HC probably busted\n", 2764 trb_comp_code, slot_id, ep_index); 2765 - goto cleanup; 2766 } 2767 2768 do { ··· 2783 if (!(trb_comp_code == COMP_STOPPED || 2784 trb_comp_code == COMP_STOPPED_LENGTH_INVALID || 2785 ep_ring->last_td_was_short)) { 2786 - xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n", 2787 - TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), 2788 - ep_index); 2789 } 2790 if (ep->skip) { 2791 ep->skip = false; ··· 2797 xhci_handle_halted_endpoint(xhci, ep, NULL, 2798 EP_HARD_RESET); 2799 } 2800 - goto cleanup; 2801 } 2802 2803 /* We've skipped all the TDs on the ep ring when ep->skip set */ ··· 2805 ep->skip = false; 2806 xhci_dbg(xhci, "All tds on the ep_ring skipped. Clear skip flag for slot %u ep %u.\n", 2807 slot_id, ep_index); 2808 - goto cleanup; 2809 } 2810 2811 td = list_first_entry(&ep_ring->td_list, struct xhci_td, ··· 2814 td_num--; 2815 2816 /* Is this a TRB in the currently executing TD? */ 2817 - ep_seg = trb_in_td(xhci, td->start_seg, td->first_trb, 2818 - td->last_trb, ep_trb_dma, false); 2819 2820 /* 2821 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE ··· 2826 */ 2827 if (!ep_seg && (trb_comp_code == COMP_STOPPED || 2828 trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) { 2829 - goto cleanup; 2830 } 2831 2832 if (!ep_seg) { 2833 2834 if (ep->skip && usb_endpoint_xfer_isoc(&td->urb->ep->desc)) { 2835 skip_isoc_td(xhci, td, ep, status); 2836 - goto cleanup; 2837 } 2838 2839 /* ··· 2843 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) && 2844 ep_ring->last_td_was_short) { 2845 ep_ring->last_td_was_short = false; 2846 - goto cleanup; 2847 } 2848 2849 /* ··· 2861 !list_is_last(&td->td_list, &ep_ring->td_list)) { 2862 struct xhci_td *td_next = list_next_entry(td, td_list); 2863 2864 - ep_seg = trb_in_td(xhci, td_next->start_seg, td_next->first_trb, 2865 - td_next->last_trb, ep_trb_dma, false); 2866 if (ep_seg) { 2867 /* give back previous TD, start handling new */ 2868 xhci_dbg(xhci, "Missing TD completion event after mid TD error\n"); ··· 2880 "part of current TD ep_index %d " 2881 "comp_code %u\n", ep_index, 2882 trb_comp_code); 2883 - trb_in_td(xhci, td->start_seg, td->first_trb, 2884 - td->last_trb, ep_trb_dma, true); 2885 return -ESHUTDOWN; 2886 } 2887 } ··· 2917 trb_comp_code)) 2918 xhci_handle_halted_endpoint(xhci, ep, td, 2919 EP_HARD_RESET); 2920 - goto cleanup; 2921 } 2922 - 2923 - td->status = status; 2924 - 2925 - /* update the urb's actual_length and give back to the core */ 2926 - if (usb_endpoint_xfer_control(&td->urb->ep->desc)) 2927 - process_ctrl_td(xhci, ep, ep_ring, td, ep_trb, event); 2928 - else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc)) 2929 - process_isoc_td(xhci, ep, ep_ring, td, ep_trb, event); 2930 - else 2931 - process_bulk_intr_td(xhci, ep, ep_ring, td, ep_trb, event); 2932 - cleanup: 2933 - handling_skipped_tds = ep->skip && 2934 - trb_comp_code != COMP_MISSED_SERVICE_ERROR && 2935 - trb_comp_code != COMP_NO_PING_RESPONSE_ERROR; 2936 - 2937 /* 2938 * If ep->skip is set, it means there are missed tds on the 2939 * endpoint ring need to take care of. 2940 * Process them as short transfer until reach the td pointed by 2941 * the event. 2942 */ 2943 - } while (handling_skipped_tds); 2944 2945 return 0; 2946
··· 308 free += last_on_seg - enq; 309 enq_seg = enq_seg->next; 310 enq = enq_seg->trbs; 311 + } while (i++ < ring->num_segs); 312 313 return free; 314 } ··· 351 while (new_segs > 0) { 352 seg = seg->next; 353 if (seg == ring->deq_seg) { 354 + xhci_dbg(xhci, "Adding %d trbs requires expanding ring by %d segments\n", 355 + num_trbs, new_segs); 356 return new_segs; 357 } 358 new_segs--; ··· 1026 td->urb->stream_id); 1027 hw_deq &= ~0xf; 1028 1029 + if (td->cancel_status == TD_HALTED || trb_in_td(xhci, td, hw_deq, false)) { 1030 switch (td->cancel_status) { 1031 case TD_CLEARED: /* TD is already no-op */ 1032 case TD_CLEARING_CACHE: /* set TR deq command already queued */ ··· 1084 hw_deq = xhci_get_hw_deq(ep->xhci, ep->vdev, ep->ep_index, 0); 1085 hw_deq &= ~0xf; 1086 td = list_first_entry(&ep->ring->td_list, struct xhci_td, td_list); 1087 + if (trb_in_td(ep->xhci, td, hw_deq, false)) 1088 return td; 1089 } 1090 return NULL; ··· 2051 } 2052 2053 /* 2054 + * If the suspect DMA address is a TRB in this TD, this function returns that 2055 + * TRB's segment. Otherwise it returns 0. 2056 */ 2057 + struct xhci_segment *trb_in_td(struct xhci_hcd *xhci, struct xhci_td *td, dma_addr_t suspect_dma, 2058 + bool debug) 2059 { 2060 dma_addr_t start_dma; 2061 dma_addr_t end_seg_dma; 2062 dma_addr_t end_trb_dma; 2063 struct xhci_segment *cur_seg; 2064 2065 + start_dma = xhci_trb_virt_to_dma(td->start_seg, td->first_trb); 2066 + cur_seg = td->start_seg; 2067 2068 do { 2069 if (start_dma == 0) ··· 2078 end_seg_dma = xhci_trb_virt_to_dma(cur_seg, 2079 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]); 2080 /* If the end TRB isn't in this segment, this is set to 0 */ 2081 + end_trb_dma = xhci_trb_virt_to_dma(cur_seg, td->last_trb); 2082 2083 if (debug) 2084 xhci_warn(xhci, ··· 2112 } 2113 cur_seg = cur_seg->next; 2114 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]); 2115 + } while (cur_seg != td->start_seg); 2116 2117 return NULL; 2118 } ··· 2399 break; 2400 if (remaining) { 2401 frame->status = short_framestatus; 2402 + sum_trbs_for_length = true; 2403 break; 2404 } 2405 frame->status = 0; ··· 2590 struct xhci_ep_ctx *ep_ctx; 2591 u32 trb_comp_code; 2592 int td_num = 0; 2593 2594 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); 2595 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1; ··· 2628 else 2629 xhci_handle_halted_endpoint(xhci, ep, NULL, 2630 EP_SOFT_RESET); 2631 + break; 2632 case COMP_RING_UNDERRUN: 2633 case COMP_RING_OVERRUN: 2634 case COMP_STOPPED_LENGTH_INVALID: 2635 + break; 2636 default: 2637 xhci_err(xhci, "ERROR Transfer event for unknown stream ring slot %u ep %u\n", 2638 slot_id, ep_index); 2639 goto err_out; 2640 } 2641 + return 0; 2642 } 2643 2644 /* Count current td numbers if ep->skip is set */ ··· 2650 * transfer type 2651 */ 2652 case COMP_SUCCESS: 2653 + if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) { 2654 trb_comp_code = COMP_SHORT_PACKET; 2655 + xhci_dbg(xhci, "Successful completion on short TX for slot %u ep %u with last td short %d\n", 2656 + slot_id, ep_index, ep_ring->last_td_was_short); 2657 + } 2658 break; 2659 case COMP_SHORT_PACKET: 2660 break; ··· 2730 */ 2731 xhci_dbg(xhci, "underrun event on endpoint\n"); 2732 if (!list_empty(&ep_ring->td_list)) 2733 + xhci_dbg(xhci, "Underrun Event for slot %u ep %d still with TDs queued?\n", 2734 + slot_id, ep_index); 2735 + if (ep->skip) 2736 + break; 2737 + return 0; 2738 case COMP_RING_OVERRUN: 2739 xhci_dbg(xhci, "overrun event on endpoint\n"); 2740 if (!list_empty(&ep_ring->td_list)) 2741 + xhci_dbg(xhci, "Overrun Event for slot %u ep %d still with TDs queued?\n", 2742 + slot_id, ep_index); 2743 + if (ep->skip) 2744 + break; 2745 + return 0; 2746 case COMP_MISSED_SERVICE_ERROR: 2747 /* 2748 * When encounter missed service error, one or more isoc tds ··· 2754 xhci_dbg(xhci, 2755 "Miss service interval error for slot %u ep %u, set skip flag\n", 2756 slot_id, ep_index); 2757 + return 0; 2758 case COMP_NO_PING_RESPONSE_ERROR: 2759 ep->skip = true; 2760 xhci_dbg(xhci, 2761 "No Ping response error for slot %u ep %u, Skip one Isoc TD\n", 2762 slot_id, ep_index); 2763 + return 0; 2764 2765 case COMP_INCOMPATIBLE_DEVICE_ERROR: 2766 /* needs disable slot command to recover */ ··· 2777 xhci_warn(xhci, 2778 "ERROR Unknown event condition %u for slot %u ep %u , HC probably busted\n", 2779 trb_comp_code, slot_id, ep_index); 2780 + if (ep->skip) 2781 + break; 2782 + return 0; 2783 } 2784 2785 do { ··· 2796 if (!(trb_comp_code == COMP_STOPPED || 2797 trb_comp_code == COMP_STOPPED_LENGTH_INVALID || 2798 ep_ring->last_td_was_short)) { 2799 + xhci_warn(xhci, "WARN Event TRB for slot %u ep %d with no TDs queued?\n", 2800 + slot_id, ep_index); 2801 } 2802 if (ep->skip) { 2803 ep->skip = false; ··· 2811 xhci_handle_halted_endpoint(xhci, ep, NULL, 2812 EP_HARD_RESET); 2813 } 2814 + return 0; 2815 } 2816 2817 /* We've skipped all the TDs on the ep ring when ep->skip set */ ··· 2819 ep->skip = false; 2820 xhci_dbg(xhci, "All tds on the ep_ring skipped. Clear skip flag for slot %u ep %u.\n", 2821 slot_id, ep_index); 2822 + return 0; 2823 } 2824 2825 td = list_first_entry(&ep_ring->td_list, struct xhci_td, ··· 2828 td_num--; 2829 2830 /* Is this a TRB in the currently executing TD? */ 2831 + ep_seg = trb_in_td(xhci, td, ep_trb_dma, false); 2832 2833 /* 2834 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE ··· 2841 */ 2842 if (!ep_seg && (trb_comp_code == COMP_STOPPED || 2843 trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) { 2844 + continue; 2845 } 2846 2847 if (!ep_seg) { 2848 2849 if (ep->skip && usb_endpoint_xfer_isoc(&td->urb->ep->desc)) { 2850 skip_isoc_td(xhci, td, ep, status); 2851 + continue; 2852 } 2853 2854 /* ··· 2858 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) && 2859 ep_ring->last_td_was_short) { 2860 ep_ring->last_td_was_short = false; 2861 + return 0; 2862 } 2863 2864 /* ··· 2876 !list_is_last(&td->td_list, &ep_ring->td_list)) { 2877 struct xhci_td *td_next = list_next_entry(td, td_list); 2878 2879 + ep_seg = trb_in_td(xhci, td_next, ep_trb_dma, false); 2880 if (ep_seg) { 2881 /* give back previous TD, start handling new */ 2882 xhci_dbg(xhci, "Missing TD completion event after mid TD error\n"); ··· 2896 "part of current TD ep_index %d " 2897 "comp_code %u\n", ep_index, 2898 trb_comp_code); 2899 + trb_in_td(xhci, td, ep_trb_dma, true); 2900 + 2901 return -ESHUTDOWN; 2902 } 2903 } ··· 2933 trb_comp_code)) 2934 xhci_handle_halted_endpoint(xhci, ep, td, 2935 EP_HARD_RESET); 2936 + } else { 2937 + td->status = status; 2938 + 2939 + /* update the urb's actual_length and give back to the core */ 2940 + if (usb_endpoint_xfer_control(&td->urb->ep->desc)) 2941 + process_ctrl_td(xhci, ep, ep_ring, td, ep_trb, event); 2942 + else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc)) 2943 + process_isoc_td(xhci, ep, ep_ring, td, ep_trb, event); 2944 + else 2945 + process_bulk_intr_td(xhci, ep, ep_ring, td, ep_trb, event); 2946 } 2947 /* 2948 * If ep->skip is set, it means there are missed tds on the 2949 * endpoint ring need to take care of. 2950 * Process them as short transfer until reach the td pointed by 2951 * the event. 2952 */ 2953 + } while (ep->skip); 2954 2955 return 0; 2956
+8 -30
drivers/usb/host/xhci.c
··· 4507 return 0; 4508 } 4509 4510 - /* check if a usb2 port supports a given extened capability protocol 4511 - * only USB2 ports extended protocol capability values are cached. 4512 - * Return 1 if capability is supported 4513 - */ 4514 - static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port, 4515 - unsigned capability) 4516 - { 4517 - u32 port_offset, port_count; 4518 - int i; 4519 - 4520 - for (i = 0; i < xhci->num_ext_caps; i++) { 4521 - if (xhci->ext_caps[i] & capability) { 4522 - /* port offsets starts at 1 */ 4523 - port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1; 4524 - port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]); 4525 - if (port >= port_offset && 4526 - port < port_offset + port_count) 4527 - return 1; 4528 - } 4529 - } 4530 - return 0; 4531 - } 4532 - 4533 static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev) 4534 { 4535 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 4536 - int portnum = udev->portnum - 1; 4537 4538 - if (hcd->speed >= HCD_USB3 || !udev->lpm_capable) 4539 return 0; 4540 4541 /* we only support lpm for non-hub device connected to root hub yet */ ··· 4521 udev->descriptor.bDeviceClass == USB_CLASS_HUB) 4522 return 0; 4523 4524 - if (xhci->hw_lpm_support == 1 && 4525 - xhci_check_usb2_port_capability( 4526 - xhci, portnum, XHCI_HLC)) { 4527 udev->usb2_hw_lpm_capable = 1; 4528 udev->l1_params.timeout = XHCI_L1_TIMEOUT; 4529 udev->l1_params.besl = XHCI_DEFAULT_BESL; 4530 - if (xhci_check_usb2_port_capability(xhci, portnum, 4531 - XHCI_BLC)) 4532 udev->usb2_hw_lpm_besl_capable = 1; 4533 } 4534
··· 4507 return 0; 4508 } 4509 4510 static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev) 4511 { 4512 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 4513 + struct xhci_port *port; 4514 + u32 capability; 4515 4516 + if (hcd->speed >= HCD_USB3 || !udev->lpm_capable || !xhci->hw_lpm_support) 4517 return 0; 4518 4519 /* we only support lpm for non-hub device connected to root hub yet */ ··· 4543 udev->descriptor.bDeviceClass == USB_CLASS_HUB) 4544 return 0; 4545 4546 + port = xhci->usb2_rhub.ports[udev->portnum - 1]; 4547 + capability = port->port_cap->protocol_caps; 4548 + 4549 + if (capability & XHCI_HLC) { 4550 udev->usb2_hw_lpm_capable = 1; 4551 udev->l1_params.timeout = XHCI_L1_TIMEOUT; 4552 udev->l1_params.besl = XHCI_DEFAULT_BESL; 4553 + if (capability & XHCI_BLC) 4554 udev->usb2_hw_lpm_besl_capable = 1; 4555 } 4556
+13 -15
drivers/usb/host/xhci.h
··· 1376 unsigned int num_entries; 1377 /* xhci->event_ring keeps track of segment dma addresses */ 1378 dma_addr_t erst_dma_addr; 1379 - /* Num entries the ERST can contain */ 1380 - unsigned int erst_size; 1381 }; 1382 1383 struct xhci_scratchpad { ··· 1390 struct xhci_td td[] __counted_by(num_tds); 1391 }; 1392 1393 - /* Reasonable limit for number of Event Ring segments (spec allows 32k) */ 1394 - #define ERST_MAX_SEGS 2 1395 /* Poll every 60 seconds */ 1396 #define POLL_TIMEOUT 60 1397 /* Stop endpoint command timeout (secs) for URB cancellation watchdog timer */ ··· 1449 u8 psi_uid_count; 1450 u8 maj_rev; 1451 u8 min_rev; 1452 }; 1453 1454 struct xhci_port { ··· 1588 #define XHCI_RESET_ON_RESUME BIT_ULL(7) 1589 #define XHCI_SW_BW_CHECKING BIT_ULL(8) 1590 #define XHCI_AMD_0x96_HOST BIT_ULL(9) 1591 - #define XHCI_TRUST_TX_LENGTH BIT_ULL(10) 1592 #define XHCI_LPM_SUPPORT BIT_ULL(11) 1593 #define XHCI_INTEL_HOST BIT_ULL(12) 1594 #define XHCI_SPURIOUS_REBOOT BIT_ULL(13) ··· 1639 unsigned broken_suspend:1; 1640 /* Indicates that omitting hcd is supported if root hub has no ports */ 1641 unsigned allow_single_roothub:1; 1642 - /* cached usb2 extened protocol capabilites */ 1643 - u32 *ext_caps; 1644 - unsigned int num_ext_caps; 1645 /* cached extended protocol port capabilities */ 1646 struct xhci_port_cap *port_caps; 1647 unsigned int num_port_caps; ··· 1725 dev_err(xhci_to_hcd(xhci)->self.controller , fmt , ## args) 1726 #define xhci_warn(xhci, fmt, args...) \ 1727 dev_warn(xhci_to_hcd(xhci)->self.controller , fmt , ## args) 1728 - #define xhci_warn_ratelimited(xhci, fmt, args...) \ 1729 - dev_warn_ratelimited(xhci_to_hcd(xhci)->self.controller , fmt , ## args) 1730 #define xhci_info(xhci, fmt, args...) \ 1731 dev_info(xhci_to_hcd(xhci)->self.controller , fmt , ## args) 1732 ··· 1827 void xhci_free_container_ctx(struct xhci_hcd *xhci, 1828 struct xhci_container_ctx *ctx); 1829 struct xhci_interrupter * 1830 - xhci_create_secondary_interrupter(struct usb_hcd *hcd, int num_seg); 1831 void xhci_remove_secondary_interrupter(struct usb_hcd 1832 *hcd, struct xhci_interrupter *ir); 1833 ··· 1870 1871 /* xHCI ring, segment, TRB, and TD functions */ 1872 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg, union xhci_trb *trb); 1873 - struct xhci_segment *trb_in_td(struct xhci_hcd *xhci, 1874 - struct xhci_segment *start_seg, union xhci_trb *start_trb, 1875 - union xhci_trb *end_trb, dma_addr_t suspect_dma, bool debug); 1876 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code); 1877 void xhci_ring_cmd_db(struct xhci_hcd *xhci); 1878 int xhci_queue_slot_control(struct xhci_hcd *xhci, struct xhci_command *cmd, ··· 2333 { 2334 int ret; 2335 2336 - ret = sprintf(str, "%s %s %s Link:%s PortSpeed:%d ", 2337 portsc & PORT_POWER ? "Powered" : "Powered-off", 2338 portsc & PORT_CONNECT ? "Connected" : "Not-connected", 2339 portsc & PORT_PE ? "Enabled" : "Disabled",
··· 1376 unsigned int num_entries; 1377 /* xhci->event_ring keeps track of segment dma addresses */ 1378 dma_addr_t erst_dma_addr; 1379 }; 1380 1381 struct xhci_scratchpad { ··· 1392 struct xhci_td td[] __counted_by(num_tds); 1393 }; 1394 1395 + /* Number of Event Ring segments to allocate, when amount is not specified. (spec allows 32k) */ 1396 + #define ERST_DEFAULT_SEGS 2 1397 /* Poll every 60 seconds */ 1398 #define POLL_TIMEOUT 60 1399 /* Stop endpoint command timeout (secs) for URB cancellation watchdog timer */ ··· 1451 u8 psi_uid_count; 1452 u8 maj_rev; 1453 u8 min_rev; 1454 + u32 protocol_caps; 1455 }; 1456 1457 struct xhci_port { ··· 1589 #define XHCI_RESET_ON_RESUME BIT_ULL(7) 1590 #define XHCI_SW_BW_CHECKING BIT_ULL(8) 1591 #define XHCI_AMD_0x96_HOST BIT_ULL(9) 1592 + #define XHCI_TRUST_TX_LENGTH BIT_ULL(10) /* Deprecated */ 1593 #define XHCI_LPM_SUPPORT BIT_ULL(11) 1594 #define XHCI_INTEL_HOST BIT_ULL(12) 1595 #define XHCI_SPURIOUS_REBOOT BIT_ULL(13) ··· 1640 unsigned broken_suspend:1; 1641 /* Indicates that omitting hcd is supported if root hub has no ports */ 1642 unsigned allow_single_roothub:1; 1643 /* cached extended protocol port capabilities */ 1644 struct xhci_port_cap *port_caps; 1645 unsigned int num_port_caps; ··· 1729 dev_err(xhci_to_hcd(xhci)->self.controller , fmt , ## args) 1730 #define xhci_warn(xhci, fmt, args...) \ 1731 dev_warn(xhci_to_hcd(xhci)->self.controller , fmt , ## args) 1732 #define xhci_info(xhci, fmt, args...) \ 1733 dev_info(xhci_to_hcd(xhci)->self.controller , fmt , ## args) 1734 ··· 1833 void xhci_free_container_ctx(struct xhci_hcd *xhci, 1834 struct xhci_container_ctx *ctx); 1835 struct xhci_interrupter * 1836 + xhci_create_secondary_interrupter(struct usb_hcd *hcd, unsigned int segs); 1837 void xhci_remove_secondary_interrupter(struct usb_hcd 1838 *hcd, struct xhci_interrupter *ir); 1839 ··· 1876 1877 /* xHCI ring, segment, TRB, and TD functions */ 1878 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg, union xhci_trb *trb); 1879 + struct xhci_segment *trb_in_td(struct xhci_hcd *xhci, struct xhci_td *td, 1880 + dma_addr_t suspect_dma, bool debug); 1881 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code); 1882 void xhci_ring_cmd_db(struct xhci_hcd *xhci); 1883 int xhci_queue_slot_control(struct xhci_hcd *xhci, struct xhci_command *cmd, ··· 2340 { 2341 int ret; 2342 2343 + ret = sprintf(str, "0x%08x ", portsc); 2344 + 2345 + if (portsc == ~(u32)0) 2346 + return str; 2347 + 2348 + ret += sprintf(str + ret, "%s %s %s Link:%s PortSpeed:%d ", 2349 portsc & PORT_POWER ? "Powered" : "Powered-off", 2350 portsc & PORT_CONNECT ? "Connected" : "Not-connected", 2351 portsc & PORT_PE ? "Enabled" : "Disabled",
+8 -8
drivers/usb/misc/Kconfig
··· 316 signals, which are typically on dedicated pins on the chip, 317 to any gpio. 318 319 - config USB_ONBOARD_HUB 320 - tristate "Onboard USB hub support" 321 depends on OF 322 help 323 - Say Y here if you want to support discrete onboard USB hubs that 324 - don't require an additional control bus for initialization, but 325 - need some non-trivial form of initialization, such as enabling a 326 - power regulator. An example for such a hub is the Realtek 327 - RTS5411. 328 329 This driver can be used as a module but its state (module vs 330 builtin) must match the state of the USB subsystem. Enabling 331 this config will enable the driver and it will automatically 332 match the state of the USB subsystem. If this driver is a 333 - module it will be called onboard_usb_hub.
··· 316 signals, which are typically on dedicated pins on the chip, 317 to any gpio. 318 319 + config USB_ONBOARD_DEV 320 + tristate "Onboard USB device support" 321 depends on OF 322 help 323 + Say Y here if you want to support discrete onboard USB devices 324 + that don't require an additional control bus for initialization, 325 + but need some non-trivial form of initialization, such as 326 + enabling a power regulator. An example for such device is the 327 + Realtek RTS5411 hub. 328 329 This driver can be used as a module but its state (module vs 330 builtin) must match the state of the USB subsystem. Enabling 331 this config will enable the driver and it will automatically 332 match the state of the USB subsystem. If this driver is a 333 + module it will be called onboard_usb_dev.
+1 -1
drivers/usb/misc/Makefile
··· 33 obj-$(CONFIG_USB_SISUSBVGA) += sisusbvga/ 34 obj-$(CONFIG_USB_LINK_LAYER_TEST) += lvstest.o 35 obj-$(CONFIG_BRCM_USB_PINMAP) += brcmstb-usb-pinmap.o 36 - obj-$(CONFIG_USB_ONBOARD_HUB) += onboard_usb_hub.o
··· 33 obj-$(CONFIG_USB_SISUSBVGA) += sisusbvga/ 34 obj-$(CONFIG_USB_LINK_LAYER_TEST) += lvstest.o 35 obj-$(CONFIG_BRCM_USB_PINMAP) += brcmstb-usb-pinmap.o 36 + obj-$(CONFIG_USB_ONBOARD_DEV) += onboard_usb_dev.o
+550
drivers/usb/misc/onboard_usb_dev.c
···
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * Driver for onboard USB devices 4 + * 5 + * Copyright (c) 2022, Google LLC 6 + */ 7 + 8 + #include <linux/clk.h> 9 + #include <linux/device.h> 10 + #include <linux/export.h> 11 + #include <linux/err.h> 12 + #include <linux/gpio/consumer.h> 13 + #include <linux/init.h> 14 + #include <linux/kernel.h> 15 + #include <linux/list.h> 16 + #include <linux/module.h> 17 + #include <linux/mutex.h> 18 + #include <linux/of.h> 19 + #include <linux/of_platform.h> 20 + #include <linux/platform_device.h> 21 + #include <linux/regulator/consumer.h> 22 + #include <linux/slab.h> 23 + #include <linux/suspend.h> 24 + #include <linux/sysfs.h> 25 + #include <linux/usb.h> 26 + #include <linux/usb/hcd.h> 27 + #include <linux/usb/onboard_dev.h> 28 + #include <linux/workqueue.h> 29 + 30 + #include "onboard_usb_dev.h" 31 + 32 + static void onboard_dev_attach_usb_driver(struct work_struct *work); 33 + 34 + static struct usb_device_driver onboard_dev_usbdev_driver; 35 + static DECLARE_WORK(attach_usb_driver_work, onboard_dev_attach_usb_driver); 36 + 37 + /************************** Platform driver **************************/ 38 + 39 + struct usbdev_node { 40 + struct usb_device *udev; 41 + struct list_head list; 42 + }; 43 + 44 + struct onboard_dev { 45 + struct regulator_bulk_data supplies[MAX_SUPPLIES]; 46 + struct device *dev; 47 + const struct onboard_dev_pdata *pdata; 48 + struct gpio_desc *reset_gpio; 49 + bool always_powered_in_suspend; 50 + bool is_powered_on; 51 + bool going_away; 52 + struct list_head udev_list; 53 + struct mutex lock; 54 + struct clk *clk; 55 + }; 56 + 57 + static int onboard_dev_get_regulators(struct onboard_dev *onboard_dev) 58 + { 59 + const char * const *supply_names = onboard_dev->pdata->supply_names; 60 + unsigned int num_supplies = onboard_dev->pdata->num_supplies; 61 + struct device *dev = onboard_dev->dev; 62 + unsigned int i; 63 + int err; 64 + 65 + if (num_supplies > MAX_SUPPLIES) 66 + return dev_err_probe(dev, -EINVAL, "max %d supplies supported!\n", 67 + MAX_SUPPLIES); 68 + 69 + for (i = 0; i < num_supplies; i++) 70 + onboard_dev->supplies[i].supply = supply_names[i]; 71 + 72 + err = devm_regulator_bulk_get(dev, num_supplies, onboard_dev->supplies); 73 + if (err) 74 + dev_err(dev, "Failed to get regulator supplies: %pe\n", 75 + ERR_PTR(err)); 76 + 77 + return err; 78 + } 79 + 80 + static int onboard_dev_power_on(struct onboard_dev *onboard_dev) 81 + { 82 + int err; 83 + 84 + err = clk_prepare_enable(onboard_dev->clk); 85 + if (err) { 86 + dev_err(onboard_dev->dev, "failed to enable clock: %pe\n", 87 + ERR_PTR(err)); 88 + return err; 89 + } 90 + 91 + err = regulator_bulk_enable(onboard_dev->pdata->num_supplies, 92 + onboard_dev->supplies); 93 + if (err) { 94 + dev_err(onboard_dev->dev, "failed to enable supplies: %pe\n", 95 + ERR_PTR(err)); 96 + goto disable_clk; 97 + } 98 + 99 + fsleep(onboard_dev->pdata->reset_us); 100 + gpiod_set_value_cansleep(onboard_dev->reset_gpio, 0); 101 + 102 + onboard_dev->is_powered_on = true; 103 + 104 + return 0; 105 + 106 + disable_clk: 107 + clk_disable_unprepare(onboard_dev->clk); 108 + return err; 109 + } 110 + 111 + static int onboard_dev_power_off(struct onboard_dev *onboard_dev) 112 + { 113 + int err; 114 + 115 + gpiod_set_value_cansleep(onboard_dev->reset_gpio, 1); 116 + 117 + err = regulator_bulk_disable(onboard_dev->pdata->num_supplies, 118 + onboard_dev->supplies); 119 + if (err) { 120 + dev_err(onboard_dev->dev, "failed to disable supplies: %pe\n", 121 + ERR_PTR(err)); 122 + return err; 123 + } 124 + 125 + clk_disable_unprepare(onboard_dev->clk); 126 + 127 + onboard_dev->is_powered_on = false; 128 + 129 + return 0; 130 + } 131 + 132 + static int __maybe_unused onboard_dev_suspend(struct device *dev) 133 + { 134 + struct onboard_dev *onboard_dev = dev_get_drvdata(dev); 135 + struct usbdev_node *node; 136 + bool power_off = true; 137 + 138 + if (onboard_dev->always_powered_in_suspend) 139 + return 0; 140 + 141 + mutex_lock(&onboard_dev->lock); 142 + 143 + list_for_each_entry(node, &onboard_dev->udev_list, list) { 144 + if (!device_may_wakeup(node->udev->bus->controller)) 145 + continue; 146 + 147 + if (usb_wakeup_enabled_descendants(node->udev)) { 148 + power_off = false; 149 + break; 150 + } 151 + } 152 + 153 + mutex_unlock(&onboard_dev->lock); 154 + 155 + if (!power_off) 156 + return 0; 157 + 158 + return onboard_dev_power_off(onboard_dev); 159 + } 160 + 161 + static int __maybe_unused onboard_dev_resume(struct device *dev) 162 + { 163 + struct onboard_dev *onboard_dev = dev_get_drvdata(dev); 164 + 165 + if (onboard_dev->is_powered_on) 166 + return 0; 167 + 168 + return onboard_dev_power_on(onboard_dev); 169 + } 170 + 171 + static inline void get_udev_link_name(const struct usb_device *udev, char *buf, 172 + size_t size) 173 + { 174 + snprintf(buf, size, "usb_dev.%s", dev_name(&udev->dev)); 175 + } 176 + 177 + static int onboard_dev_add_usbdev(struct onboard_dev *onboard_dev, 178 + struct usb_device *udev) 179 + { 180 + struct usbdev_node *node; 181 + char link_name[64]; 182 + int err; 183 + 184 + mutex_lock(&onboard_dev->lock); 185 + 186 + if (onboard_dev->going_away) { 187 + err = -EINVAL; 188 + goto error; 189 + } 190 + 191 + node = kzalloc(sizeof(*node), GFP_KERNEL); 192 + if (!node) { 193 + err = -ENOMEM; 194 + goto error; 195 + } 196 + 197 + node->udev = udev; 198 + 199 + list_add(&node->list, &onboard_dev->udev_list); 200 + 201 + mutex_unlock(&onboard_dev->lock); 202 + 203 + get_udev_link_name(udev, link_name, sizeof(link_name)); 204 + WARN_ON(sysfs_create_link(&onboard_dev->dev->kobj, &udev->dev.kobj, 205 + link_name)); 206 + 207 + return 0; 208 + 209 + error: 210 + mutex_unlock(&onboard_dev->lock); 211 + 212 + return err; 213 + } 214 + 215 + static void onboard_dev_remove_usbdev(struct onboard_dev *onboard_dev, 216 + const struct usb_device *udev) 217 + { 218 + struct usbdev_node *node; 219 + char link_name[64]; 220 + 221 + get_udev_link_name(udev, link_name, sizeof(link_name)); 222 + sysfs_remove_link(&onboard_dev->dev->kobj, link_name); 223 + 224 + mutex_lock(&onboard_dev->lock); 225 + 226 + list_for_each_entry(node, &onboard_dev->udev_list, list) { 227 + if (node->udev == udev) { 228 + list_del(&node->list); 229 + kfree(node); 230 + break; 231 + } 232 + } 233 + 234 + mutex_unlock(&onboard_dev->lock); 235 + } 236 + 237 + static ssize_t always_powered_in_suspend_show(struct device *dev, 238 + struct device_attribute *attr, 239 + char *buf) 240 + { 241 + const struct onboard_dev *onboard_dev = dev_get_drvdata(dev); 242 + 243 + return sysfs_emit(buf, "%d\n", onboard_dev->always_powered_in_suspend); 244 + } 245 + 246 + static ssize_t always_powered_in_suspend_store(struct device *dev, 247 + struct device_attribute *attr, 248 + const char *buf, size_t count) 249 + { 250 + struct onboard_dev *onboard_dev = dev_get_drvdata(dev); 251 + bool val; 252 + int ret; 253 + 254 + ret = kstrtobool(buf, &val); 255 + if (ret < 0) 256 + return ret; 257 + 258 + onboard_dev->always_powered_in_suspend = val; 259 + 260 + return count; 261 + } 262 + static DEVICE_ATTR_RW(always_powered_in_suspend); 263 + 264 + static struct attribute *onboard_dev_attrs[] = { 265 + &dev_attr_always_powered_in_suspend.attr, 266 + NULL, 267 + }; 268 + 269 + static umode_t onboard_dev_attrs_are_visible(struct kobject *kobj, 270 + struct attribute *attr, 271 + int n) 272 + { 273 + struct device *dev = kobj_to_dev(kobj); 274 + struct onboard_dev *onboard_dev = dev_get_drvdata(dev); 275 + 276 + if (attr == &dev_attr_always_powered_in_suspend.attr && 277 + !onboard_dev->pdata->is_hub) 278 + return 0; 279 + 280 + return attr->mode; 281 + } 282 + 283 + static const struct attribute_group onboard_dev_group = { 284 + .is_visible = onboard_dev_attrs_are_visible, 285 + .attrs = onboard_dev_attrs, 286 + }; 287 + __ATTRIBUTE_GROUPS(onboard_dev); 288 + 289 + 290 + static void onboard_dev_attach_usb_driver(struct work_struct *work) 291 + { 292 + int err; 293 + 294 + err = driver_attach(&onboard_dev_usbdev_driver.driver); 295 + if (err) 296 + pr_err("Failed to attach USB driver: %pe\n", ERR_PTR(err)); 297 + } 298 + 299 + static int onboard_dev_probe(struct platform_device *pdev) 300 + { 301 + struct device *dev = &pdev->dev; 302 + struct onboard_dev *onboard_dev; 303 + int err; 304 + 305 + onboard_dev = devm_kzalloc(dev, sizeof(*onboard_dev), GFP_KERNEL); 306 + if (!onboard_dev) 307 + return -ENOMEM; 308 + 309 + onboard_dev->pdata = device_get_match_data(dev); 310 + if (!onboard_dev->pdata) 311 + return -EINVAL; 312 + 313 + if (!onboard_dev->pdata->is_hub) 314 + onboard_dev->always_powered_in_suspend = true; 315 + 316 + onboard_dev->dev = dev; 317 + 318 + err = onboard_dev_get_regulators(onboard_dev); 319 + if (err) 320 + return err; 321 + 322 + onboard_dev->clk = devm_clk_get_optional(dev, NULL); 323 + if (IS_ERR(onboard_dev->clk)) 324 + return dev_err_probe(dev, PTR_ERR(onboard_dev->clk), 325 + "failed to get clock\n"); 326 + 327 + onboard_dev->reset_gpio = devm_gpiod_get_optional(dev, "reset", 328 + GPIOD_OUT_HIGH); 329 + if (IS_ERR(onboard_dev->reset_gpio)) 330 + return dev_err_probe(dev, PTR_ERR(onboard_dev->reset_gpio), 331 + "failed to get reset GPIO\n"); 332 + 333 + mutex_init(&onboard_dev->lock); 334 + INIT_LIST_HEAD(&onboard_dev->udev_list); 335 + 336 + dev_set_drvdata(dev, onboard_dev); 337 + 338 + err = onboard_dev_power_on(onboard_dev); 339 + if (err) 340 + return err; 341 + 342 + /* 343 + * The USB driver might have been detached from the USB devices by 344 + * onboard_dev_remove() (e.g. through an 'unbind' by userspace), 345 + * make sure to re-attach it if needed. 346 + * 347 + * This needs to be done deferred to avoid self-deadlocks on systems 348 + * with nested onboard hubs. 349 + */ 350 + schedule_work(&attach_usb_driver_work); 351 + 352 + return 0; 353 + } 354 + 355 + static void onboard_dev_remove(struct platform_device *pdev) 356 + { 357 + struct onboard_dev *onboard_dev = dev_get_drvdata(&pdev->dev); 358 + struct usbdev_node *node; 359 + struct usb_device *udev; 360 + 361 + onboard_dev->going_away = true; 362 + 363 + mutex_lock(&onboard_dev->lock); 364 + 365 + /* unbind the USB devices to avoid dangling references to this device */ 366 + while (!list_empty(&onboard_dev->udev_list)) { 367 + node = list_first_entry(&onboard_dev->udev_list, 368 + struct usbdev_node, list); 369 + udev = node->udev; 370 + 371 + /* 372 + * Unbinding the driver will call onboard_dev_remove_usbdev(), 373 + * which acquires onboard_dev->lock. We must release the lock 374 + * first. 375 + */ 376 + get_device(&udev->dev); 377 + mutex_unlock(&onboard_dev->lock); 378 + device_release_driver(&udev->dev); 379 + put_device(&udev->dev); 380 + mutex_lock(&onboard_dev->lock); 381 + } 382 + 383 + mutex_unlock(&onboard_dev->lock); 384 + 385 + onboard_dev_power_off(onboard_dev); 386 + } 387 + 388 + MODULE_DEVICE_TABLE(of, onboard_dev_match); 389 + 390 + static const struct dev_pm_ops __maybe_unused onboard_dev_pm_ops = { 391 + SET_LATE_SYSTEM_SLEEP_PM_OPS(onboard_dev_suspend, onboard_dev_resume) 392 + }; 393 + 394 + static struct platform_driver onboard_dev_driver = { 395 + .probe = onboard_dev_probe, 396 + .remove_new = onboard_dev_remove, 397 + 398 + .driver = { 399 + .name = "onboard-usb-dev", 400 + .of_match_table = onboard_dev_match, 401 + .pm = pm_ptr(&onboard_dev_pm_ops), 402 + .dev_groups = onboard_dev_groups, 403 + }, 404 + }; 405 + 406 + /************************** USB driver **************************/ 407 + 408 + #define VENDOR_ID_CYPRESS 0x04b4 409 + #define VENDOR_ID_GENESYS 0x05e3 410 + #define VENDOR_ID_MICROCHIP 0x0424 411 + #define VENDOR_ID_REALTEK 0x0bda 412 + #define VENDOR_ID_TI 0x0451 413 + #define VENDOR_ID_VIA 0x2109 414 + #define VENDOR_ID_XMOS 0x20B1 415 + 416 + /* 417 + * Returns the onboard_dev platform device that is associated with the USB 418 + * device passed as parameter. 419 + */ 420 + static struct onboard_dev *_find_onboard_dev(struct device *dev) 421 + { 422 + struct platform_device *pdev; 423 + struct device_node *np; 424 + struct onboard_dev *onboard_dev; 425 + 426 + pdev = of_find_device_by_node(dev->of_node); 427 + if (!pdev) { 428 + np = of_parse_phandle(dev->of_node, "peer-hub", 0); 429 + if (!np) { 430 + dev_err(dev, "failed to find device node for peer hub\n"); 431 + return ERR_PTR(-EINVAL); 432 + } 433 + 434 + pdev = of_find_device_by_node(np); 435 + of_node_put(np); 436 + 437 + if (!pdev) 438 + return ERR_PTR(-ENODEV); 439 + } 440 + 441 + onboard_dev = dev_get_drvdata(&pdev->dev); 442 + put_device(&pdev->dev); 443 + 444 + /* 445 + * The presence of drvdata indicates that the platform driver finished 446 + * probing. This handles the case where (conceivably) we could be 447 + * running at the exact same time as the platform driver's probe. If 448 + * we detect the race we request probe deferral and we'll come back and 449 + * try again. 450 + */ 451 + if (!onboard_dev) 452 + return ERR_PTR(-EPROBE_DEFER); 453 + 454 + return onboard_dev; 455 + } 456 + 457 + static int onboard_dev_usbdev_probe(struct usb_device *udev) 458 + { 459 + struct device *dev = &udev->dev; 460 + struct onboard_dev *onboard_dev; 461 + int err; 462 + 463 + /* ignore supported devices without device tree node */ 464 + if (!dev->of_node) 465 + return -ENODEV; 466 + 467 + onboard_dev = _find_onboard_dev(dev); 468 + if (IS_ERR(onboard_dev)) 469 + return PTR_ERR(onboard_dev); 470 + 471 + dev_set_drvdata(dev, onboard_dev); 472 + 473 + err = onboard_dev_add_usbdev(onboard_dev, udev); 474 + if (err) 475 + return err; 476 + 477 + return 0; 478 + } 479 + 480 + static void onboard_dev_usbdev_disconnect(struct usb_device *udev) 481 + { 482 + struct onboard_dev *onboard_dev = dev_get_drvdata(&udev->dev); 483 + 484 + onboard_dev_remove_usbdev(onboard_dev, udev); 485 + } 486 + 487 + static const struct usb_device_id onboard_dev_id_table[] = { 488 + { USB_DEVICE(VENDOR_ID_CYPRESS, 0x6504) }, /* CYUSB33{0,1,2}x/CYUSB230x 3.0 HUB */ 489 + { USB_DEVICE(VENDOR_ID_CYPRESS, 0x6506) }, /* CYUSB33{0,1,2}x/CYUSB230x 2.0 HUB */ 490 + { USB_DEVICE(VENDOR_ID_CYPRESS, 0x6570) }, /* CY7C6563x 2.0 HUB */ 491 + { USB_DEVICE(VENDOR_ID_GENESYS, 0x0608) }, /* Genesys Logic GL850G USB 2.0 HUB */ 492 + { USB_DEVICE(VENDOR_ID_GENESYS, 0x0610) }, /* Genesys Logic GL852G USB 2.0 HUB */ 493 + { USB_DEVICE(VENDOR_ID_GENESYS, 0x0620) }, /* Genesys Logic GL3523 USB 3.1 HUB */ 494 + { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2412) }, /* USB2412 USB 2.0 HUB */ 495 + { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2514) }, /* USB2514B USB 2.0 HUB */ 496 + { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2517) }, /* USB2517 USB 2.0 HUB */ 497 + { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2744) }, /* USB5744 USB 2.0 HUB */ 498 + { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x5744) }, /* USB5744 USB 3.0 HUB */ 499 + { USB_DEVICE(VENDOR_ID_REALTEK, 0x0411) }, /* RTS5411 USB 3.1 HUB */ 500 + { USB_DEVICE(VENDOR_ID_REALTEK, 0x5411) }, /* RTS5411 USB 2.1 HUB */ 501 + { USB_DEVICE(VENDOR_ID_REALTEK, 0x0414) }, /* RTS5414 USB 3.2 HUB */ 502 + { USB_DEVICE(VENDOR_ID_REALTEK, 0x5414) }, /* RTS5414 USB 2.1 HUB */ 503 + { USB_DEVICE(VENDOR_ID_TI, 0x8025) }, /* TI USB8020B 3.0 HUB */ 504 + { USB_DEVICE(VENDOR_ID_TI, 0x8027) }, /* TI USB8020B 2.0 HUB */ 505 + { USB_DEVICE(VENDOR_ID_TI, 0x8140) }, /* TI USB8041 3.0 HUB */ 506 + { USB_DEVICE(VENDOR_ID_TI, 0x8142) }, /* TI USB8041 2.0 HUB */ 507 + { USB_DEVICE(VENDOR_ID_VIA, 0x0817) }, /* VIA VL817 3.1 HUB */ 508 + { USB_DEVICE(VENDOR_ID_VIA, 0x2817) }, /* VIA VL817 2.0 HUB */ 509 + { USB_DEVICE(VENDOR_ID_XMOS, 0x0013) }, /* XMOS XVF3500 Voice Processor */ 510 + {} 511 + }; 512 + MODULE_DEVICE_TABLE(usb, onboard_dev_id_table); 513 + 514 + static struct usb_device_driver onboard_dev_usbdev_driver = { 515 + .name = "onboard-usb-dev", 516 + .probe = onboard_dev_usbdev_probe, 517 + .disconnect = onboard_dev_usbdev_disconnect, 518 + .generic_subclass = 1, 519 + .supports_autosuspend = 1, 520 + .id_table = onboard_dev_id_table, 521 + }; 522 + 523 + static int __init onboard_dev_init(void) 524 + { 525 + int ret; 526 + 527 + ret = usb_register_device_driver(&onboard_dev_usbdev_driver, THIS_MODULE); 528 + if (ret) 529 + return ret; 530 + 531 + ret = platform_driver_register(&onboard_dev_driver); 532 + if (ret) 533 + usb_deregister_device_driver(&onboard_dev_usbdev_driver); 534 + 535 + return ret; 536 + } 537 + module_init(onboard_dev_init); 538 + 539 + static void __exit onboard_dev_exit(void) 540 + { 541 + usb_deregister_device_driver(&onboard_dev_usbdev_driver); 542 + platform_driver_unregister(&onboard_dev_driver); 543 + 544 + cancel_work_sync(&attach_usb_driver_work); 545 + } 546 + module_exit(onboard_dev_exit); 547 + 548 + MODULE_AUTHOR("Matthias Kaehlcke <mka@chromium.org>"); 549 + MODULE_DESCRIPTION("Driver for discrete onboard USB devices"); 550 + MODULE_LICENSE("GPL v2");
-507
drivers/usb/misc/onboard_usb_hub.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * Driver for onboard USB hubs 4 - * 5 - * Copyright (c) 2022, Google LLC 6 - */ 7 - 8 - #include <linux/clk.h> 9 - #include <linux/device.h> 10 - #include <linux/export.h> 11 - #include <linux/err.h> 12 - #include <linux/gpio/consumer.h> 13 - #include <linux/init.h> 14 - #include <linux/kernel.h> 15 - #include <linux/list.h> 16 - #include <linux/module.h> 17 - #include <linux/mutex.h> 18 - #include <linux/of.h> 19 - #include <linux/of_platform.h> 20 - #include <linux/platform_device.h> 21 - #include <linux/regulator/consumer.h> 22 - #include <linux/slab.h> 23 - #include <linux/suspend.h> 24 - #include <linux/sysfs.h> 25 - #include <linux/usb.h> 26 - #include <linux/usb/hcd.h> 27 - #include <linux/usb/onboard_hub.h> 28 - #include <linux/workqueue.h> 29 - 30 - #include "onboard_usb_hub.h" 31 - 32 - /* 33 - * Use generic names, as the actual names might differ between hubs. If a new 34 - * hub requires more than the currently supported supplies, add a new one here. 35 - */ 36 - static const char * const supply_names[] = { 37 - "vdd", 38 - "vdd2", 39 - }; 40 - 41 - #define MAX_SUPPLIES ARRAY_SIZE(supply_names) 42 - 43 - static void onboard_hub_attach_usb_driver(struct work_struct *work); 44 - 45 - static struct usb_device_driver onboard_hub_usbdev_driver; 46 - static DECLARE_WORK(attach_usb_driver_work, onboard_hub_attach_usb_driver); 47 - 48 - /************************** Platform driver **************************/ 49 - 50 - struct usbdev_node { 51 - struct usb_device *udev; 52 - struct list_head list; 53 - }; 54 - 55 - struct onboard_hub { 56 - struct regulator_bulk_data supplies[MAX_SUPPLIES]; 57 - struct device *dev; 58 - const struct onboard_hub_pdata *pdata; 59 - struct gpio_desc *reset_gpio; 60 - bool always_powered_in_suspend; 61 - bool is_powered_on; 62 - bool going_away; 63 - struct list_head udev_list; 64 - struct mutex lock; 65 - struct clk *clk; 66 - }; 67 - 68 - static int onboard_hub_power_on(struct onboard_hub *hub) 69 - { 70 - int err; 71 - 72 - err = clk_prepare_enable(hub->clk); 73 - if (err) { 74 - dev_err(hub->dev, "failed to enable clock: %pe\n", ERR_PTR(err)); 75 - return err; 76 - } 77 - 78 - err = regulator_bulk_enable(hub->pdata->num_supplies, hub->supplies); 79 - if (err) { 80 - dev_err(hub->dev, "failed to enable supplies: %pe\n", ERR_PTR(err)); 81 - goto disable_clk; 82 - } 83 - 84 - fsleep(hub->pdata->reset_us); 85 - gpiod_set_value_cansleep(hub->reset_gpio, 0); 86 - 87 - hub->is_powered_on = true; 88 - 89 - return 0; 90 - 91 - disable_clk: 92 - clk_disable_unprepare(hub->clk); 93 - return err; 94 - } 95 - 96 - static int onboard_hub_power_off(struct onboard_hub *hub) 97 - { 98 - int err; 99 - 100 - gpiod_set_value_cansleep(hub->reset_gpio, 1); 101 - 102 - err = regulator_bulk_disable(hub->pdata->num_supplies, hub->supplies); 103 - if (err) { 104 - dev_err(hub->dev, "failed to disable supplies: %pe\n", ERR_PTR(err)); 105 - return err; 106 - } 107 - 108 - clk_disable_unprepare(hub->clk); 109 - 110 - hub->is_powered_on = false; 111 - 112 - return 0; 113 - } 114 - 115 - static int __maybe_unused onboard_hub_suspend(struct device *dev) 116 - { 117 - struct onboard_hub *hub = dev_get_drvdata(dev); 118 - struct usbdev_node *node; 119 - bool power_off = true; 120 - 121 - if (hub->always_powered_in_suspend) 122 - return 0; 123 - 124 - mutex_lock(&hub->lock); 125 - 126 - list_for_each_entry(node, &hub->udev_list, list) { 127 - if (!device_may_wakeup(node->udev->bus->controller)) 128 - continue; 129 - 130 - if (usb_wakeup_enabled_descendants(node->udev)) { 131 - power_off = false; 132 - break; 133 - } 134 - } 135 - 136 - mutex_unlock(&hub->lock); 137 - 138 - if (!power_off) 139 - return 0; 140 - 141 - return onboard_hub_power_off(hub); 142 - } 143 - 144 - static int __maybe_unused onboard_hub_resume(struct device *dev) 145 - { 146 - struct onboard_hub *hub = dev_get_drvdata(dev); 147 - 148 - if (hub->is_powered_on) 149 - return 0; 150 - 151 - return onboard_hub_power_on(hub); 152 - } 153 - 154 - static inline void get_udev_link_name(const struct usb_device *udev, char *buf, size_t size) 155 - { 156 - snprintf(buf, size, "usb_dev.%s", dev_name(&udev->dev)); 157 - } 158 - 159 - static int onboard_hub_add_usbdev(struct onboard_hub *hub, struct usb_device *udev) 160 - { 161 - struct usbdev_node *node; 162 - char link_name[64]; 163 - int err; 164 - 165 - mutex_lock(&hub->lock); 166 - 167 - if (hub->going_away) { 168 - err = -EINVAL; 169 - goto error; 170 - } 171 - 172 - node = kzalloc(sizeof(*node), GFP_KERNEL); 173 - if (!node) { 174 - err = -ENOMEM; 175 - goto error; 176 - } 177 - 178 - node->udev = udev; 179 - 180 - list_add(&node->list, &hub->udev_list); 181 - 182 - mutex_unlock(&hub->lock); 183 - 184 - get_udev_link_name(udev, link_name, sizeof(link_name)); 185 - WARN_ON(sysfs_create_link(&hub->dev->kobj, &udev->dev.kobj, link_name)); 186 - 187 - return 0; 188 - 189 - error: 190 - mutex_unlock(&hub->lock); 191 - 192 - return err; 193 - } 194 - 195 - static void onboard_hub_remove_usbdev(struct onboard_hub *hub, const struct usb_device *udev) 196 - { 197 - struct usbdev_node *node; 198 - char link_name[64]; 199 - 200 - get_udev_link_name(udev, link_name, sizeof(link_name)); 201 - sysfs_remove_link(&hub->dev->kobj, link_name); 202 - 203 - mutex_lock(&hub->lock); 204 - 205 - list_for_each_entry(node, &hub->udev_list, list) { 206 - if (node->udev == udev) { 207 - list_del(&node->list); 208 - kfree(node); 209 - break; 210 - } 211 - } 212 - 213 - mutex_unlock(&hub->lock); 214 - } 215 - 216 - static ssize_t always_powered_in_suspend_show(struct device *dev, struct device_attribute *attr, 217 - char *buf) 218 - { 219 - const struct onboard_hub *hub = dev_get_drvdata(dev); 220 - 221 - return sysfs_emit(buf, "%d\n", hub->always_powered_in_suspend); 222 - } 223 - 224 - static ssize_t always_powered_in_suspend_store(struct device *dev, struct device_attribute *attr, 225 - const char *buf, size_t count) 226 - { 227 - struct onboard_hub *hub = dev_get_drvdata(dev); 228 - bool val; 229 - int ret; 230 - 231 - ret = kstrtobool(buf, &val); 232 - if (ret < 0) 233 - return ret; 234 - 235 - hub->always_powered_in_suspend = val; 236 - 237 - return count; 238 - } 239 - static DEVICE_ATTR_RW(always_powered_in_suspend); 240 - 241 - static struct attribute *onboard_hub_attrs[] = { 242 - &dev_attr_always_powered_in_suspend.attr, 243 - NULL, 244 - }; 245 - ATTRIBUTE_GROUPS(onboard_hub); 246 - 247 - static void onboard_hub_attach_usb_driver(struct work_struct *work) 248 - { 249 - int err; 250 - 251 - err = driver_attach(&onboard_hub_usbdev_driver.driver); 252 - if (err) 253 - pr_err("Failed to attach USB driver: %pe\n", ERR_PTR(err)); 254 - } 255 - 256 - static int onboard_hub_probe(struct platform_device *pdev) 257 - { 258 - struct device *dev = &pdev->dev; 259 - struct onboard_hub *hub; 260 - unsigned int i; 261 - int err; 262 - 263 - hub = devm_kzalloc(dev, sizeof(*hub), GFP_KERNEL); 264 - if (!hub) 265 - return -ENOMEM; 266 - 267 - hub->pdata = device_get_match_data(dev); 268 - if (!hub->pdata) 269 - return -EINVAL; 270 - 271 - if (hub->pdata->num_supplies > MAX_SUPPLIES) 272 - return dev_err_probe(dev, -EINVAL, "max %zu supplies supported!\n", 273 - MAX_SUPPLIES); 274 - 275 - for (i = 0; i < hub->pdata->num_supplies; i++) 276 - hub->supplies[i].supply = supply_names[i]; 277 - 278 - err = devm_regulator_bulk_get(dev, hub->pdata->num_supplies, hub->supplies); 279 - if (err) { 280 - dev_err(dev, "Failed to get regulator supplies: %pe\n", ERR_PTR(err)); 281 - return err; 282 - } 283 - 284 - hub->clk = devm_clk_get_optional(dev, NULL); 285 - if (IS_ERR(hub->clk)) 286 - return dev_err_probe(dev, PTR_ERR(hub->clk), "failed to get clock\n"); 287 - 288 - hub->reset_gpio = devm_gpiod_get_optional(dev, "reset", 289 - GPIOD_OUT_HIGH); 290 - if (IS_ERR(hub->reset_gpio)) 291 - return dev_err_probe(dev, PTR_ERR(hub->reset_gpio), "failed to get reset GPIO\n"); 292 - 293 - hub->dev = dev; 294 - mutex_init(&hub->lock); 295 - INIT_LIST_HEAD(&hub->udev_list); 296 - 297 - dev_set_drvdata(dev, hub); 298 - 299 - err = onboard_hub_power_on(hub); 300 - if (err) 301 - return err; 302 - 303 - /* 304 - * The USB driver might have been detached from the USB devices by 305 - * onboard_hub_remove() (e.g. through an 'unbind' by userspace), 306 - * make sure to re-attach it if needed. 307 - * 308 - * This needs to be done deferred to avoid self-deadlocks on systems 309 - * with nested onboard hubs. 310 - */ 311 - schedule_work(&attach_usb_driver_work); 312 - 313 - return 0; 314 - } 315 - 316 - static void onboard_hub_remove(struct platform_device *pdev) 317 - { 318 - struct onboard_hub *hub = dev_get_drvdata(&pdev->dev); 319 - struct usbdev_node *node; 320 - struct usb_device *udev; 321 - 322 - hub->going_away = true; 323 - 324 - mutex_lock(&hub->lock); 325 - 326 - /* unbind the USB devices to avoid dangling references to this device */ 327 - while (!list_empty(&hub->udev_list)) { 328 - node = list_first_entry(&hub->udev_list, struct usbdev_node, list); 329 - udev = node->udev; 330 - 331 - /* 332 - * Unbinding the driver will call onboard_hub_remove_usbdev(), 333 - * which acquires hub->lock. We must release the lock first. 334 - */ 335 - get_device(&udev->dev); 336 - mutex_unlock(&hub->lock); 337 - device_release_driver(&udev->dev); 338 - put_device(&udev->dev); 339 - mutex_lock(&hub->lock); 340 - } 341 - 342 - mutex_unlock(&hub->lock); 343 - 344 - onboard_hub_power_off(hub); 345 - } 346 - 347 - MODULE_DEVICE_TABLE(of, onboard_hub_match); 348 - 349 - static const struct dev_pm_ops __maybe_unused onboard_hub_pm_ops = { 350 - SET_LATE_SYSTEM_SLEEP_PM_OPS(onboard_hub_suspend, onboard_hub_resume) 351 - }; 352 - 353 - static struct platform_driver onboard_hub_driver = { 354 - .probe = onboard_hub_probe, 355 - .remove_new = onboard_hub_remove, 356 - 357 - .driver = { 358 - .name = "onboard-usb-hub", 359 - .of_match_table = onboard_hub_match, 360 - .pm = pm_ptr(&onboard_hub_pm_ops), 361 - .dev_groups = onboard_hub_groups, 362 - }, 363 - }; 364 - 365 - /************************** USB driver **************************/ 366 - 367 - #define VENDOR_ID_CYPRESS 0x04b4 368 - #define VENDOR_ID_GENESYS 0x05e3 369 - #define VENDOR_ID_MICROCHIP 0x0424 370 - #define VENDOR_ID_REALTEK 0x0bda 371 - #define VENDOR_ID_TI 0x0451 372 - #define VENDOR_ID_VIA 0x2109 373 - 374 - /* 375 - * Returns the onboard_hub platform device that is associated with the USB 376 - * device passed as parameter. 377 - */ 378 - static struct onboard_hub *_find_onboard_hub(struct device *dev) 379 - { 380 - struct platform_device *pdev; 381 - struct device_node *np; 382 - struct onboard_hub *hub; 383 - 384 - pdev = of_find_device_by_node(dev->of_node); 385 - if (!pdev) { 386 - np = of_parse_phandle(dev->of_node, "peer-hub", 0); 387 - if (!np) { 388 - dev_err(dev, "failed to find device node for peer hub\n"); 389 - return ERR_PTR(-EINVAL); 390 - } 391 - 392 - pdev = of_find_device_by_node(np); 393 - of_node_put(np); 394 - 395 - if (!pdev) 396 - return ERR_PTR(-ENODEV); 397 - } 398 - 399 - hub = dev_get_drvdata(&pdev->dev); 400 - put_device(&pdev->dev); 401 - 402 - /* 403 - * The presence of drvdata ('hub') indicates that the platform driver 404 - * finished probing. This handles the case where (conceivably) we could 405 - * be running at the exact same time as the platform driver's probe. If 406 - * we detect the race we request probe deferral and we'll come back and 407 - * try again. 408 - */ 409 - if (!hub) 410 - return ERR_PTR(-EPROBE_DEFER); 411 - 412 - return hub; 413 - } 414 - 415 - static int onboard_hub_usbdev_probe(struct usb_device *udev) 416 - { 417 - struct device *dev = &udev->dev; 418 - struct onboard_hub *hub; 419 - int err; 420 - 421 - /* ignore supported hubs without device tree node */ 422 - if (!dev->of_node) 423 - return -ENODEV; 424 - 425 - hub = _find_onboard_hub(dev); 426 - if (IS_ERR(hub)) 427 - return PTR_ERR(hub); 428 - 429 - dev_set_drvdata(dev, hub); 430 - 431 - err = onboard_hub_add_usbdev(hub, udev); 432 - if (err) 433 - return err; 434 - 435 - return 0; 436 - } 437 - 438 - static void onboard_hub_usbdev_disconnect(struct usb_device *udev) 439 - { 440 - struct onboard_hub *hub = dev_get_drvdata(&udev->dev); 441 - 442 - onboard_hub_remove_usbdev(hub, udev); 443 - } 444 - 445 - static const struct usb_device_id onboard_hub_id_table[] = { 446 - { USB_DEVICE(VENDOR_ID_CYPRESS, 0x6504) }, /* CYUSB33{0,1,2}x/CYUSB230x 3.0 */ 447 - { USB_DEVICE(VENDOR_ID_CYPRESS, 0x6506) }, /* CYUSB33{0,1,2}x/CYUSB230x 2.0 */ 448 - { USB_DEVICE(VENDOR_ID_CYPRESS, 0x6570) }, /* CY7C6563x 2.0 */ 449 - { USB_DEVICE(VENDOR_ID_GENESYS, 0x0608) }, /* Genesys Logic GL850G USB 2.0 */ 450 - { USB_DEVICE(VENDOR_ID_GENESYS, 0x0610) }, /* Genesys Logic GL852G USB 2.0 */ 451 - { USB_DEVICE(VENDOR_ID_GENESYS, 0x0620) }, /* Genesys Logic GL3523 USB 3.1 */ 452 - { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2412) }, /* USB2412 USB 2.0 */ 453 - { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2514) }, /* USB2514B USB 2.0 */ 454 - { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2517) }, /* USB2517 USB 2.0 */ 455 - { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2744) }, /* USB5744 USB 2.0 */ 456 - { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x5744) }, /* USB5744 USB 3.0 */ 457 - { USB_DEVICE(VENDOR_ID_REALTEK, 0x0411) }, /* RTS5411 USB 3.1 */ 458 - { USB_DEVICE(VENDOR_ID_REALTEK, 0x5411) }, /* RTS5411 USB 2.1 */ 459 - { USB_DEVICE(VENDOR_ID_REALTEK, 0x0414) }, /* RTS5414 USB 3.2 */ 460 - { USB_DEVICE(VENDOR_ID_REALTEK, 0x5414) }, /* RTS5414 USB 2.1 */ 461 - { USB_DEVICE(VENDOR_ID_TI, 0x8025) }, /* TI USB8020B 3.0 */ 462 - { USB_DEVICE(VENDOR_ID_TI, 0x8027) }, /* TI USB8020B 2.0 */ 463 - { USB_DEVICE(VENDOR_ID_TI, 0x8140) }, /* TI USB8041 3.0 */ 464 - { USB_DEVICE(VENDOR_ID_TI, 0x8142) }, /* TI USB8041 2.0 */ 465 - { USB_DEVICE(VENDOR_ID_VIA, 0x0817) }, /* VIA VL817 3.1 */ 466 - { USB_DEVICE(VENDOR_ID_VIA, 0x2817) }, /* VIA VL817 2.0 */ 467 - {} 468 - }; 469 - MODULE_DEVICE_TABLE(usb, onboard_hub_id_table); 470 - 471 - static struct usb_device_driver onboard_hub_usbdev_driver = { 472 - .name = "onboard-usb-hub", 473 - .probe = onboard_hub_usbdev_probe, 474 - .disconnect = onboard_hub_usbdev_disconnect, 475 - .generic_subclass = 1, 476 - .supports_autosuspend = 1, 477 - .id_table = onboard_hub_id_table, 478 - }; 479 - 480 - static int __init onboard_hub_init(void) 481 - { 482 - int ret; 483 - 484 - ret = usb_register_device_driver(&onboard_hub_usbdev_driver, THIS_MODULE); 485 - if (ret) 486 - return ret; 487 - 488 - ret = platform_driver_register(&onboard_hub_driver); 489 - if (ret) 490 - usb_deregister_device_driver(&onboard_hub_usbdev_driver); 491 - 492 - return ret; 493 - } 494 - module_init(onboard_hub_init); 495 - 496 - static void __exit onboard_hub_exit(void) 497 - { 498 - usb_deregister_device_driver(&onboard_hub_usbdev_driver); 499 - platform_driver_unregister(&onboard_hub_driver); 500 - 501 - cancel_work_sync(&attach_usb_driver_work); 502 - } 503 - module_exit(onboard_hub_exit); 504 - 505 - MODULE_AUTHOR("Matthias Kaehlcke <mka@chromium.org>"); 506 - MODULE_DESCRIPTION("Driver for discrete onboard USB hubs"); 507 - MODULE_LICENSE("GPL v2");
···
+47 -15
drivers/usb/misc/onboard_usb_hub.h drivers/usb/misc/onboard_usb_dev.h
··· 3 * Copyright (c) 2022, Google LLC 4 */ 5 6 - #ifndef _USB_MISC_ONBOARD_USB_HUB_H 7 - #define _USB_MISC_ONBOARD_USB_HUB_H 8 9 - struct onboard_hub_pdata { 10 unsigned long reset_us; /* reset pulse width in us */ 11 unsigned int num_supplies; /* number of supplies */ 12 }; 13 14 - static const struct onboard_hub_pdata microchip_usb424_data = { 15 .reset_us = 1, 16 .num_supplies = 1, 17 }; 18 19 - static const struct onboard_hub_pdata microchip_usb5744_data = { 20 .reset_us = 0, 21 .num_supplies = 2, 22 }; 23 24 - static const struct onboard_hub_pdata realtek_rts5411_data = { 25 .reset_us = 0, 26 .num_supplies = 1, 27 }; 28 29 - static const struct onboard_hub_pdata ti_tusb8020b_data = { 30 .reset_us = 3000, 31 .num_supplies = 1, 32 }; 33 34 - static const struct onboard_hub_pdata ti_tusb8041_data = { 35 .reset_us = 3000, 36 .num_supplies = 1, 37 }; 38 39 - static const struct onboard_hub_pdata cypress_hx3_data = { 40 .reset_us = 10000, 41 .num_supplies = 2, 42 }; 43 44 - static const struct onboard_hub_pdata cypress_hx2vl_data = { 45 .reset_us = 1, 46 .num_supplies = 1, 47 }; 48 49 - static const struct onboard_hub_pdata genesys_gl850g_data = { 50 .reset_us = 3, 51 .num_supplies = 1, 52 }; 53 54 - static const struct onboard_hub_pdata genesys_gl852g_data = { 55 .reset_us = 50, 56 .num_supplies = 1, 57 }; 58 59 - static const struct onboard_hub_pdata vialab_vl817_data = { 60 .reset_us = 10, 61 .num_supplies = 1, 62 }; 63 64 - static const struct of_device_id onboard_hub_match[] = { 65 { .compatible = "usb424,2412", .data = &microchip_usb424_data, }, 66 { .compatible = "usb424,2514", .data = &microchip_usb424_data, }, 67 { .compatible = "usb424,2517", .data = &microchip_usb424_data, }, ··· 115 { .compatible = "usbbda,5414", .data = &realtek_rts5411_data, }, 116 { .compatible = "usb2109,817", .data = &vialab_vl817_data, }, 117 { .compatible = "usb2109,2817", .data = &vialab_vl817_data, }, 118 {} 119 }; 120 121 - #endif /* _USB_MISC_ONBOARD_USB_HUB_H */
··· 3 * Copyright (c) 2022, Google LLC 4 */ 5 6 + #ifndef _USB_MISC_ONBOARD_USB_DEV_H 7 + #define _USB_MISC_ONBOARD_USB_DEV_H 8 9 + #define MAX_SUPPLIES 2 10 + 11 + struct onboard_dev_pdata { 12 unsigned long reset_us; /* reset pulse width in us */ 13 unsigned int num_supplies; /* number of supplies */ 14 + const char * const supply_names[MAX_SUPPLIES]; 15 + bool is_hub; 16 }; 17 18 + static const struct onboard_dev_pdata microchip_usb424_data = { 19 .reset_us = 1, 20 .num_supplies = 1, 21 + .supply_names = { "vdd" }, 22 + .is_hub = true, 23 }; 24 25 + static const struct onboard_dev_pdata microchip_usb5744_data = { 26 .reset_us = 0, 27 .num_supplies = 2, 28 + .supply_names = { "vdd", "vdd2" }, 29 + .is_hub = true, 30 }; 31 32 + static const struct onboard_dev_pdata realtek_rts5411_data = { 33 .reset_us = 0, 34 .num_supplies = 1, 35 + .supply_names = { "vdd" }, 36 + .is_hub = true, 37 }; 38 39 + static const struct onboard_dev_pdata ti_tusb8020b_data = { 40 .reset_us = 3000, 41 .num_supplies = 1, 42 + .supply_names = { "vdd" }, 43 + .is_hub = true, 44 }; 45 46 + static const struct onboard_dev_pdata ti_tusb8041_data = { 47 .reset_us = 3000, 48 .num_supplies = 1, 49 + .supply_names = { "vdd" }, 50 + .is_hub = true, 51 }; 52 53 + static const struct onboard_dev_pdata cypress_hx3_data = { 54 .reset_us = 10000, 55 .num_supplies = 2, 56 + .supply_names = { "vdd", "vdd2" }, 57 + .is_hub = true, 58 }; 59 60 + static const struct onboard_dev_pdata cypress_hx2vl_data = { 61 .reset_us = 1, 62 .num_supplies = 1, 63 + .supply_names = { "vdd" }, 64 + .is_hub = true, 65 }; 66 67 + static const struct onboard_dev_pdata genesys_gl850g_data = { 68 .reset_us = 3, 69 .num_supplies = 1, 70 + .supply_names = { "vdd" }, 71 + .is_hub = true, 72 }; 73 74 + static const struct onboard_dev_pdata genesys_gl852g_data = { 75 .reset_us = 50, 76 .num_supplies = 1, 77 + .supply_names = { "vdd" }, 78 + .is_hub = true, 79 }; 80 81 + static const struct onboard_dev_pdata vialab_vl817_data = { 82 .reset_us = 10, 83 .num_supplies = 1, 84 + .supply_names = { "vdd" }, 85 + .is_hub = true, 86 }; 87 88 + static const struct onboard_dev_pdata xmos_xvf3500_data = { 89 + .reset_us = 1, 90 + .num_supplies = 2, 91 + .supply_names = { "vdd", "vddio" }, 92 + .is_hub = false, 93 + }; 94 + 95 + static const struct of_device_id onboard_dev_match[] = { 96 { .compatible = "usb424,2412", .data = &microchip_usb424_data, }, 97 { .compatible = "usb424,2514", .data = &microchip_usb424_data, }, 98 { .compatible = "usb424,2517", .data = &microchip_usb424_data, }, ··· 84 { .compatible = "usbbda,5414", .data = &realtek_rts5411_data, }, 85 { .compatible = "usb2109,817", .data = &vialab_vl817_data, }, 86 { .compatible = "usb2109,2817", .data = &vialab_vl817_data, }, 87 + { .compatible = "usb20b1,0013", .data = &xmos_xvf3500_data, }, 88 {} 89 }; 90 91 + #endif /* _USB_MISC_ONBOARD_USB_DEV_H */
+24 -23
drivers/usb/misc/onboard_usb_hub_pdevs.c drivers/usb/misc/onboard_usb_dev_pdevs.c
··· 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 - * API for creating and destroying USB onboard hub platform devices 4 * 5 * Copyright (c) 2022, Google LLC 6 */ ··· 15 #include <linux/usb.h> 16 #include <linux/usb/hcd.h> 17 #include <linux/usb/of.h> 18 - #include <linux/usb/onboard_hub.h> 19 20 - #include "onboard_usb_hub.h" 21 22 struct pdev_list_entry { 23 struct platform_device *pdev; 24 struct list_head node; 25 }; 26 27 - static bool of_is_onboard_usb_hub(const struct device_node *np) 28 { 29 - return !!of_match_node(onboard_hub_match, np); 30 } 31 32 /** 33 - * onboard_hub_create_pdevs -- create platform devices for onboard USB hubs 34 - * @parent_hub : parent hub to scan for connected onboard hubs 35 - * @pdev_list : list of onboard hub platform devices owned by the parent hub 36 * 37 - * Creates a platform device for each supported onboard hub that is connected to 38 - * the given parent hub. The platform device is in charge of initializing the 39 - * hub (enable regulators, take the hub out of reset, ...) and can optionally 40 - * control whether the hub remains powered during system suspend or not. 41 * 42 * To keep track of the platform devices they are added to a list that is owned 43 * by the parent hub. ··· 51 * node. That means the root hubs of the primary and secondary HCD share the 52 * same device tree node (the HCD node). As a result this function can be called 53 * twice with the same DT node for root hubs. We only want to create a single 54 - * platform device for each physical onboard hub, hence for root hubs the loop 55 - * is only executed for the root hub of the primary HCD. Since the function 56 - * scans through all child nodes it still creates pdevs for onboard hubs 57 * connected to the root hub of the secondary HCD if needed. 58 * 59 * Further there must be only one platform device for onboard hubs with a peer ··· 64 * the function processes the nodes of both peers. A platform device is only 65 * created if the peer hub doesn't have one already. 66 */ 67 - void onboard_hub_create_pdevs(struct usb_device *parent_hub, struct list_head *pdev_list) 68 { 69 int i; 70 struct usb_hcd *hcd = bus_to_hcd(parent_hub->bus); ··· 83 if (!np) 84 continue; 85 86 - if (!of_is_onboard_usb_hub(np)) 87 goto node_put; 88 89 npc = of_parse_phandle(np, "peer-hub", 0); ··· 105 pdev = of_platform_device_create(np, NULL, &parent_hub->dev); 106 if (!pdev) { 107 dev_err(&parent_hub->dev, 108 - "failed to create platform device for onboard hub '%pOF'\n", np); 109 goto node_put; 110 } 111 ··· 122 of_node_put(np); 123 } 124 } 125 - EXPORT_SYMBOL_GPL(onboard_hub_create_pdevs); 126 127 /** 128 - * onboard_hub_destroy_pdevs -- free resources of onboard hub platform devices 129 - * @pdev_list : list of onboard hub platform devices 130 * 131 * Destroys the platform devices in the given list and frees the memory associated 132 * with the list entry. 133 */ 134 - void onboard_hub_destroy_pdevs(struct list_head *pdev_list) 135 { 136 struct pdev_list_entry *pdle, *tmp; 137 ··· 141 kfree(pdle); 142 } 143 } 144 - EXPORT_SYMBOL_GPL(onboard_hub_destroy_pdevs);
··· 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 + * API for creating and destroying USB onboard platform devices 4 * 5 * Copyright (c) 2022, Google LLC 6 */ ··· 15 #include <linux/usb.h> 16 #include <linux/usb/hcd.h> 17 #include <linux/usb/of.h> 18 + #include <linux/usb/onboard_dev.h> 19 20 + #include "onboard_usb_dev.h" 21 22 struct pdev_list_entry { 23 struct platform_device *pdev; 24 struct list_head node; 25 }; 26 27 + static bool of_is_onboard_usb_dev(struct device_node *np) 28 { 29 + return !!of_match_node(onboard_dev_match, np); 30 } 31 32 /** 33 + * onboard_dev_create_pdevs -- create platform devices for onboard USB devices 34 + * @parent_hub : parent hub to scan for connected onboard devices 35 + * @pdev_list : list of onboard platform devices owned by the parent hub 36 * 37 + * Creates a platform device for each supported onboard device that is connected 38 + * to the given parent hub. The platform device is in charge of initializing the 39 + * device (enable regulators, take the device out of reset, ...). For onboard 40 + * hubs, it can optionally control whether the device remains powered during 41 + * system suspend or not. 42 * 43 * To keep track of the platform devices they are added to a list that is owned 44 * by the parent hub. ··· 50 * node. That means the root hubs of the primary and secondary HCD share the 51 * same device tree node (the HCD node). As a result this function can be called 52 * twice with the same DT node for root hubs. We only want to create a single 53 + * platform device for each physical onboard device, hence for root hubs the 54 + * loop is only executed for the root hub of the primary HCD. Since the function 55 + * scans through all child nodes it still creates pdevs for onboard devices 56 * connected to the root hub of the secondary HCD if needed. 57 * 58 * Further there must be only one platform device for onboard hubs with a peer ··· 63 * the function processes the nodes of both peers. A platform device is only 64 * created if the peer hub doesn't have one already. 65 */ 66 + void onboard_dev_create_pdevs(struct usb_device *parent_hub, struct list_head *pdev_list) 67 { 68 int i; 69 struct usb_hcd *hcd = bus_to_hcd(parent_hub->bus); ··· 82 if (!np) 83 continue; 84 85 + if (!of_is_onboard_usb_dev(np)) 86 goto node_put; 87 88 npc = of_parse_phandle(np, "peer-hub", 0); ··· 104 pdev = of_platform_device_create(np, NULL, &parent_hub->dev); 105 if (!pdev) { 106 dev_err(&parent_hub->dev, 107 + "failed to create platform device for onboard dev '%pOF'\n", np); 108 goto node_put; 109 } 110 ··· 121 of_node_put(np); 122 } 123 } 124 + EXPORT_SYMBOL_GPL(onboard_dev_create_pdevs); 125 126 /** 127 + * onboard_dev_destroy_pdevs -- free resources of onboard platform devices 128 + * @pdev_list : list of onboard platform devices 129 * 130 * Destroys the platform devices in the given list and frees the memory associated 131 * with the list entry. 132 */ 133 + void onboard_dev_destroy_pdevs(struct list_head *pdev_list) 134 { 135 struct pdev_list_entry *pdle, *tmp; 136 ··· 140 kfree(pdle); 141 } 142 } 143 + EXPORT_SYMBOL_GPL(onboard_dev_destroy_pdevs);
+26 -16
drivers/usb/misc/uss720.c
··· 677 struct parport_uss720_private *priv; 678 struct parport *pp; 679 unsigned char reg; 680 - int i; 681 682 dev_dbg(&intf->dev, "probe: vendor id 0x%x, device id 0x%x\n", 683 le16_to_cpu(usbdev->descriptor.idVendor), ··· 688 usb_put_dev(usbdev); 689 return -ENODEV; 690 } 691 - i = usb_set_interface(usbdev, intf->altsetting->desc.bInterfaceNumber, 2); 692 - dev_dbg(&intf->dev, "set interface result %d\n", i); 693 694 interface = intf->cur_altsetting; 695 696 - if (interface->desc.bNumEndpoints < 3) { 697 usb_put_dev(usbdev); 698 return -ENODEV; 699 } ··· 719 720 priv->pp = pp; 721 pp->private_data = priv; 722 - pp->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_TRISTATE | PARPORT_MODE_EPP | PARPORT_MODE_ECP | PARPORT_MODE_COMPAT; 723 724 /* set the USS720 control register to manual mode, no ECP compression, enable all ints */ 725 set_1284_register(pp, 7, 0x00, GFP_KERNEL); 726 set_1284_register(pp, 6, 0x30, GFP_KERNEL); /* PS/2 mode */ 727 set_1284_register(pp, 2, 0x0c, GFP_KERNEL); 728 - /* debugging */ 729 - get_1284_register(pp, 0, &reg, GFP_KERNEL); 730 - dev_dbg(&intf->dev, "reg: %7ph\n", priv->reg); 731 732 - i = usb_find_last_int_in_endpoint(interface, &epd); 733 - if (!i) { 734 dev_dbg(&intf->dev, "epaddr %d interval %d\n", 735 epd->bEndpointAddress, epd->bInterval); 736 } ··· 775 776 /* table of cables that work through this driver */ 777 static const struct usb_device_id uss720_table[] = { 778 - { USB_DEVICE(0x047e, 0x1001) }, 779 - { USB_DEVICE(0x04b8, 0x0002) }, 780 - { USB_DEVICE(0x04b8, 0x0003) }, 781 { USB_DEVICE(0x050d, 0x0002) }, 782 - { USB_DEVICE(0x050d, 0x1202) }, 783 { USB_DEVICE(0x0557, 0x2001) }, 784 - { USB_DEVICE(0x05ab, 0x0002) }, 785 - { USB_DEVICE(0x06c6, 0x0100) }, 786 { USB_DEVICE(0x0729, 0x1284) }, 787 { USB_DEVICE(0x1293, 0x0002) }, 788 { } /* Terminating entry */
··· 677 struct parport_uss720_private *priv; 678 struct parport *pp; 679 unsigned char reg; 680 + int ret; 681 682 dev_dbg(&intf->dev, "probe: vendor id 0x%x, device id 0x%x\n", 683 le16_to_cpu(usbdev->descriptor.idVendor), ··· 688 usb_put_dev(usbdev); 689 return -ENODEV; 690 } 691 + ret = usb_set_interface(usbdev, intf->altsetting->desc.bInterfaceNumber, 2); 692 + dev_dbg(&intf->dev, "set interface result %d\n", ret); 693 694 interface = intf->cur_altsetting; 695 696 + if (interface->desc.bNumEndpoints < 2) { 697 usb_put_dev(usbdev); 698 return -ENODEV; 699 } ··· 719 720 priv->pp = pp; 721 pp->private_data = priv; 722 + pp->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_TRISTATE | PARPORT_MODE_EPP | PARPORT_MODE_COMPAT; 723 + if (interface->desc.bNumEndpoints >= 3) 724 + pp->modes |= PARPORT_MODE_ECP; 725 + pp->dev = &usbdev->dev; 726 727 /* set the USS720 control register to manual mode, no ECP compression, enable all ints */ 728 set_1284_register(pp, 7, 0x00, GFP_KERNEL); 729 set_1284_register(pp, 6, 0x30, GFP_KERNEL); /* PS/2 mode */ 730 set_1284_register(pp, 2, 0x0c, GFP_KERNEL); 731 732 + /* The Belkin F5U002 Rev 2 P80453-B USB parallel port adapter shares the 733 + * device ID 050d:0002 with some other device that works with this 734 + * driver, but it itself does not. Detect and handle the bad cable 735 + * here. */ 736 + ret = get_1284_register(pp, 0, &reg, GFP_KERNEL); 737 + dev_dbg(&intf->dev, "reg: %7ph\n", priv->reg); 738 + if (ret < 0) 739 + return ret; 740 + 741 + ret = usb_find_last_int_in_endpoint(interface, &epd); 742 + if (!ret) { 743 dev_dbg(&intf->dev, "epaddr %d interval %d\n", 744 epd->bEndpointAddress, epd->bInterval); 745 } ··· 766 767 /* table of cables that work through this driver */ 768 static const struct usb_device_id uss720_table[] = { 769 + { USB_DEVICE(0x047e, 0x1001) }, /* Infowave 901-0030 */ 770 + { USB_DEVICE(0x04b8, 0x0002) }, /* Epson CAEUL0002 ISD-103 */ 771 + { USB_DEVICE(0x04b8, 0x0003) }, /* Epson ISD-101 */ 772 { USB_DEVICE(0x050d, 0x0002) }, 773 + { USB_DEVICE(0x050d, 0x1202) }, /* Belkin F5U120-PC */ 774 { USB_DEVICE(0x0557, 0x2001) }, 775 + { USB_DEVICE(0x05ab, 0x0002) }, /* Belkin F5U002 ISD-101 */ 776 + { USB_DEVICE(0x05ab, 0x1001) }, /* Belkin F5U002 P80453-A */ 777 + { USB_DEVICE(0x06c6, 0x0100) }, /* Infowave ISD-103 */ 778 { USB_DEVICE(0x0729, 0x1284) }, 779 { USB_DEVICE(0x1293, 0x0002) }, 780 { } /* Terminating entry */
-9
drivers/usb/musb/musb_gadget.c
··· 1156 kfree(request); 1157 } 1158 1159 - static LIST_HEAD(buffers); 1160 - 1161 - struct free_record { 1162 - struct list_head list; 1163 - struct device *dev; 1164 - unsigned bytes; 1165 - dma_addr_t dma; 1166 - }; 1167 - 1168 /* 1169 * Context: controller locked, IRQs blocked. 1170 */
··· 1156 kfree(request); 1157 } 1158 1159 /* 1160 * Context: controller locked, IRQs blocked. 1161 */
-1
drivers/usb/phy/phy-fsl-usb.c
··· 1005 .remove_new = fsl_otg_remove, 1006 .driver = { 1007 .name = driver_name, 1008 - .owner = THIS_MODULE, 1009 }, 1010 }; 1011
··· 1005 .remove_new = fsl_otg_remove, 1006 .driver = { 1007 .name = driver_name, 1008 }, 1009 }; 1010
+1
drivers/usb/phy/phy-generic.c
··· 71 gpiod_set_value_cansleep(nop->gpiod_reset, 1); 72 usleep_range(10000, 20000); 73 gpiod_set_value_cansleep(nop->gpiod_reset, 0); 74 } 75 76 /* interface to regulator framework */
··· 71 gpiod_set_value_cansleep(nop->gpiod_reset, 1); 72 usleep_range(10000, 20000); 73 gpiod_set_value_cansleep(nop->gpiod_reset, 0); 74 + usleep_range(10000, 30000); 75 } 76 77 /* interface to regulator framework */
+26 -15
drivers/usb/renesas_usbhs/common.c
··· 363 * platform default param 364 */ 365 366 - /* commonly used on old SH-Mobile SoCs */ 367 static struct renesas_usbhs_driver_pipe_config usbhsc_default_pipe[] = { 368 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_CONTROL, 64, 0x00, false), 369 - RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_ISOC, 1024, 0x08, false), 370 - RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_ISOC, 1024, 0x18, false), 371 - RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_BULK, 512, 0x28, true), 372 - RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_BULK, 512, 0x38, true), 373 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_BULK, 512, 0x48, true), 374 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_INT, 64, 0x04, false), 375 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_INT, 64, 0x05, false), 376 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_INT, 64, 0x06, false), ··· 566 .data = &usbhs_rcar_gen3_with_pll_plat_info, 567 }, 568 { 569 .compatible = "renesas,rcar-gen2-usbhs", 570 .data = &usbhs_rcar_gen2_plat_info, 571 }, ··· 593 .compatible = "renesas,rza2-usbhs", 594 .data = &usbhs_rza2_plat_info, 595 }, 596 - { }, 597 }; 598 MODULE_DEVICE_TABLE(of, usbhs_of_match); 599 ··· 611 u32 tmp; 612 int irq; 613 614 - /* check device node */ 615 - if (dev_of_node(dev)) 616 - info = of_device_get_match_data(dev); 617 - else 618 - info = renesas_usbhs_get_info(pdev); 619 - 620 - /* check platform information */ 621 if (!info) { 622 - dev_err(dev, "no platform information\n"); 623 - return -EINVAL; 624 } 625 626 /* platform data */
··· 363 * platform default param 364 */ 365 366 + /* commonly used on old SH-Mobile and RZ/G2L family SoCs */ 367 static struct renesas_usbhs_driver_pipe_config usbhsc_default_pipe[] = { 368 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_CONTROL, 64, 0x00, false), 369 + RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_ISOC, 1024, 0x08, true), 370 + RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_ISOC, 1024, 0x28, true), 371 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_BULK, 512, 0x48, true), 372 + RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_BULK, 512, 0x58, true), 373 + RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_BULK, 512, 0x68, true), 374 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_INT, 64, 0x04, false), 375 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_INT, 64, 0x05, false), 376 RENESAS_USBHS_PIPE(USB_ENDPOINT_XFER_INT, 64, 0x06, false), ··· 566 .data = &usbhs_rcar_gen3_with_pll_plat_info, 567 }, 568 { 569 + .compatible = "renesas,usbhs-r9a07g043", 570 + .data = &usbhs_rzg2l_plat_info, 571 + }, 572 + { 573 + .compatible = "renesas,usbhs-r9a07g044", 574 + .data = &usbhs_rzg2l_plat_info, 575 + }, 576 + { 577 + .compatible = "renesas,usbhs-r9a07g054", 578 + .data = &usbhs_rzg2l_plat_info, 579 + }, 580 + { 581 .compatible = "renesas,rcar-gen2-usbhs", 582 .data = &usbhs_rcar_gen2_plat_info, 583 }, ··· 581 .compatible = "renesas,rza2-usbhs", 582 .data = &usbhs_rza2_plat_info, 583 }, 584 + { 585 + .compatible = "renesas,rzg2l-usbhs", 586 + .data = &usbhs_rzg2l_plat_info, 587 + }, 588 + { } 589 }; 590 MODULE_DEVICE_TABLE(of, usbhs_of_match); 591 ··· 595 u32 tmp; 596 int irq; 597 598 + info = of_device_get_match_data(dev); 599 if (!info) { 600 + info = dev_get_platdata(dev); 601 + if (!info) 602 + return dev_err_probe(dev, -EINVAL, "no platform info\n"); 603 } 604 605 /* platform data */
+1
drivers/usb/renesas_usbhs/rza.h
··· 3 4 extern const struct renesas_usbhs_platform_info usbhs_rza1_plat_info; 5 extern const struct renesas_usbhs_platform_info usbhs_rza2_plat_info;
··· 3 4 extern const struct renesas_usbhs_platform_info usbhs_rza1_plat_info; 5 extern const struct renesas_usbhs_platform_info usbhs_rza2_plat_info; 6 + extern const struct renesas_usbhs_platform_info usbhs_rzg2l_plat_info;
+13
drivers/usb/renesas_usbhs/rza2.c
··· 71 .has_new_pipe_configs = 1, 72 }, 73 };
··· 71 .has_new_pipe_configs = 1, 72 }, 73 }; 74 + 75 + const struct renesas_usbhs_platform_info usbhs_rzg2l_plat_info = { 76 + .platform_callback = { 77 + .hardware_init = usbhs_rza2_hardware_init, 78 + .hardware_exit = usbhs_rza2_hardware_exit, 79 + .power_ctrl = usbhs_rza2_power_ctrl, 80 + .get_id = usbhs_get_id_as_gadget, 81 + }, 82 + .driver_param = { 83 + .has_cnen = 1, 84 + .cfifo_byte_addr = 1, 85 + }, 86 + };
-1
drivers/usb/typec/altmodes/displayport.c
··· 802 .remove = dp_altmode_remove, 803 .driver = { 804 .name = "typec_displayport", 805 - .owner = THIS_MODULE, 806 .dev_groups = displayport_groups, 807 }, 808 };
··· 802 .remove = dp_altmode_remove, 803 .driver = { 804 .name = "typec_displayport", 805 .dev_groups = displayport_groups, 806 }, 807 };
-1
drivers/usb/typec/altmodes/nvidia.c
··· 35 .remove = nvidia_altmode_remove, 36 .driver = { 37 .name = "typec_nvidia", 38 - .owner = THIS_MODULE, 39 }, 40 }; 41 module_typec_altmode_driver(nvidia_altmode_driver);
··· 35 .remove = nvidia_altmode_remove, 36 .driver = { 37 .name = "typec_nvidia", 38 }, 39 }; 40 module_typec_altmode_driver(nvidia_altmode_driver);
+1 -1
drivers/usb/typec/mux/Kconfig
··· 60 tristate "NXP PTN36502 Type-C redriver driver" 61 depends on I2C 62 depends on DRM || DRM=n 63 - select DRM_PANEL_BRIDGE if DRM 64 select REGMAP_I2C 65 help 66 Say Y or M if your system has a NXP PTN36502 Type-C redriver chip
··· 60 tristate "NXP PTN36502 Type-C redriver driver" 61 depends on I2C 62 depends on DRM || DRM=n 63 + select DRM_AUX_BRIDGE if DRM_BRIDGE && OF 64 select REGMAP_I2C 65 help 66 Say Y or M if your system has a NXP PTN36502 Type-C redriver chip
+4 -4
drivers/usb/typec/mux/gpio-sbu-mux.c
··· 48 } 49 50 if (enabled != sbu_mux->enabled) 51 - gpiod_set_value(sbu_mux->enable_gpio, enabled); 52 53 if (swapped != sbu_mux->swapped) 54 - gpiod_set_value(sbu_mux->select_gpio, swapped); 55 56 sbu_mux->enabled = enabled; 57 sbu_mux->swapped = swapped; ··· 82 break; 83 } 84 85 - gpiod_set_value(sbu_mux->enable_gpio, sbu_mux->enabled); 86 87 mutex_unlock(&sbu_mux->lock); 88 ··· 141 { 142 struct gpio_sbu_mux *sbu_mux = platform_get_drvdata(pdev); 143 144 - gpiod_set_value(sbu_mux->enable_gpio, 0); 145 146 typec_mux_unregister(sbu_mux->mux); 147 typec_switch_unregister(sbu_mux->sw);
··· 48 } 49 50 if (enabled != sbu_mux->enabled) 51 + gpiod_set_value_cansleep(sbu_mux->enable_gpio, enabled); 52 53 if (swapped != sbu_mux->swapped) 54 + gpiod_set_value_cansleep(sbu_mux->select_gpio, swapped); 55 56 sbu_mux->enabled = enabled; 57 sbu_mux->swapped = swapped; ··· 82 break; 83 } 84 85 + gpiod_set_value_cansleep(sbu_mux->enable_gpio, sbu_mux->enabled); 86 87 mutex_unlock(&sbu_mux->lock); 88 ··· 141 { 142 struct gpio_sbu_mux *sbu_mux = platform_get_drvdata(pdev); 143 144 + gpiod_set_value_cansleep(sbu_mux->enable_gpio, 0); 145 146 typec_mux_unregister(sbu_mux->mux); 147 typec_switch_unregister(sbu_mux->sw);
+2 -42
drivers/usb/typec/mux/ptn36502.c
··· 8 * Copyright (C) 2023 Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 9 */ 10 11 - #include <drm/drm_bridge.h> 12 #include <linux/bitfield.h> 13 #include <linux/i2c.h> 14 #include <linux/kernel.h> ··· 67 struct typec_retimer *retimer; 68 69 struct typec_switch *typec_switch; 70 - 71 - struct drm_bridge bridge; 72 73 struct mutex lock; /* protect non-concurrent retimer & switch */ 74 ··· 281 return 0; 282 } 283 284 - #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_DRM_PANEL_BRIDGE) 285 - static int ptn36502_bridge_attach(struct drm_bridge *bridge, 286 - enum drm_bridge_attach_flags flags) 287 - { 288 - struct ptn36502 *ptn = container_of(bridge, struct ptn36502, bridge); 289 - struct drm_bridge *next_bridge; 290 - 291 - if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) 292 - return -EINVAL; 293 - 294 - next_bridge = devm_drm_of_get_bridge(&ptn->client->dev, ptn->client->dev.of_node, 0, 0); 295 - if (IS_ERR(next_bridge)) { 296 - dev_err(&ptn->client->dev, "failed to acquire drm_bridge: %pe\n", next_bridge); 297 - return PTR_ERR(next_bridge); 298 - } 299 - 300 - return drm_bridge_attach(bridge->encoder, next_bridge, bridge, 301 - DRM_BRIDGE_ATTACH_NO_CONNECTOR); 302 - } 303 - 304 - static const struct drm_bridge_funcs ptn36502_bridge_funcs = { 305 - .attach = ptn36502_bridge_attach, 306 - }; 307 - 308 - static int ptn36502_register_bridge(struct ptn36502 *ptn) 309 - { 310 - ptn->bridge.funcs = &ptn36502_bridge_funcs; 311 - ptn->bridge.of_node = ptn->client->dev.of_node; 312 - 313 - return devm_drm_bridge_add(&ptn->client->dev, &ptn->bridge); 314 - } 315 - #else 316 - static int ptn36502_register_bridge(struct ptn36502 *ptn) 317 - { 318 - return 0; 319 - } 320 - #endif 321 - 322 static const struct regmap_config ptn36502_regmap = { 323 .max_register = 0x0d, 324 .reg_bits = 8, ··· 329 if (ret) 330 goto err_disable_regulator; 331 332 - ret = ptn36502_register_bridge(ptn); 333 if (ret) 334 goto err_disable_regulator; 335
··· 8 * Copyright (C) 2023 Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 9 */ 10 11 + #include <drm/bridge/aux-bridge.h> 12 #include <linux/bitfield.h> 13 #include <linux/i2c.h> 14 #include <linux/kernel.h> ··· 67 struct typec_retimer *retimer; 68 69 struct typec_switch *typec_switch; 70 71 struct mutex lock; /* protect non-concurrent retimer & switch */ 72 ··· 283 return 0; 284 } 285 286 static const struct regmap_config ptn36502_regmap = { 287 .max_register = 0x0d, 288 .reg_bits = 8, ··· 369 if (ret) 370 goto err_disable_regulator; 371 372 + ret = drm_aux_bridge_register(dev); 373 if (ret) 374 goto err_disable_regulator; 375
+1 -1
drivers/usb/typec/stusb160x.c
··· 234 .readable_reg = stusb160x_reg_readable, 235 .volatile_reg = stusb160x_reg_volatile, 236 .precious_reg = stusb160x_reg_precious, 237 - .cache_type = REGCACHE_RBTREE, 238 }; 239 240 static bool stusb160x_get_vconn(struct stusb160x *chip)
··· 234 .readable_reg = stusb160x_reg_readable, 235 .volatile_reg = stusb160x_reg_volatile, 236 .precious_reg = stusb160x_reg_precious, 237 + .cache_type = REGCACHE_MAPLE, 238 }; 239 240 static bool stusb160x_get_vconn(struct stusb160x *chip)
+8 -2
drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c
··· 41 struct device_node *np = dev->of_node; 42 const struct pmic_typec_resources *res; 43 struct regmap *regmap; 44 - struct device *bridge_dev; 45 u32 base; 46 int ret; 47 ··· 92 if (!tcpm->tcpc.fwnode) 93 return -EINVAL; 94 95 - bridge_dev = drm_dp_hpd_bridge_register(tcpm->dev, to_of_node(tcpm->tcpc.fwnode)); 96 if (IS_ERR(bridge_dev)) 97 return PTR_ERR(bridge_dev); 98 ··· 110 if (ret) 111 goto port_stop; 112 113 return 0; 114 115 port_stop: 116 tcpm->port_stop(tcpm); 117 port_unregister:
··· 41 struct device_node *np = dev->of_node; 42 const struct pmic_typec_resources *res; 43 struct regmap *regmap; 44 + struct auxiliary_device *bridge_dev; 45 u32 base; 46 int ret; 47 ··· 92 if (!tcpm->tcpc.fwnode) 93 return -EINVAL; 94 95 + bridge_dev = devm_drm_dp_hpd_bridge_alloc(tcpm->dev, to_of_node(tcpm->tcpc.fwnode)); 96 if (IS_ERR(bridge_dev)) 97 return PTR_ERR(bridge_dev); 98 ··· 110 if (ret) 111 goto port_stop; 112 113 + ret = devm_drm_dp_hpd_bridge_add(tcpm->dev, bridge_dev); 114 + if (ret) 115 + goto pdphy_stop; 116 + 117 return 0; 118 119 + pdphy_stop: 120 + tcpm->pdphy_stop(tcpm); 121 port_stop: 122 tcpm->port_stop(tcpm); 123 port_unregister:
+36 -20
drivers/usb/typec/tipd/core.c
··· 28 #define TPS_REG_MODE 0x03 29 #define TPS_REG_CMD1 0x08 30 #define TPS_REG_DATA1 0x09 31 #define TPS_REG_INT_EVENT1 0x14 32 #define TPS_REG_INT_EVENT2 0x15 33 #define TPS_REG_INT_MASK1 0x16 ··· 605 if (!tps6598x_read_status(tps, &status)) 606 goto err_clear_ints; 607 608 - if ((event[0] | event[1]) & TPS_REG_INT_POWER_STATUS_UPDATE) 609 if (!tps6598x_read_power_status(tps)) 610 goto err_clear_ints; 611 612 - if ((event[0] | event[1]) & TPS_REG_INT_DATA_STATUS_UPDATE) 613 if (!tps6598x_read_data_status(tps)) 614 goto err_clear_ints; 615 ··· 618 * a plug event. Therefore, we need to check 619 * for pr/dr status change to set TypeC dr/pr accordingly. 620 */ 621 - if ((event[0] | event[1]) & TPS_REG_INT_PLUG_EVENT || 622 tps6598x_has_role_changed(tps, status)) 623 tps6598x_handle_plug_event(tps, status); 624 ··· 637 638 static irqreturn_t tps6598x_interrupt(int irq, void *data) 639 { 640 struct tps6598x *tps = data; 641 - u64 event1 = 0; 642 - u64 event2 = 0; 643 u32 status; 644 int ret; 645 646 mutex_lock(&tps->lock); 647 648 - ret = tps6598x_read64(tps, TPS_REG_INT_EVENT1, &event1); 649 - ret |= tps6598x_read64(tps, TPS_REG_INT_EVENT2, &event2); 650 if (ret) { 651 - dev_err(tps->dev, "%s: failed to read events\n", __func__); 652 goto err_unlock; 653 } 654 - trace_tps6598x_irq(event1, event2); 655 656 - if (!(event1 | event2)) 657 goto err_unlock; 658 659 if (!tps6598x_read_status(tps, &status)) 660 goto err_clear_ints; 661 662 - if ((event1 | event2) & TPS_REG_INT_POWER_STATUS_UPDATE) 663 if (!tps6598x_read_power_status(tps)) 664 goto err_clear_ints; 665 666 - if ((event1 | event2) & TPS_REG_INT_DATA_STATUS_UPDATE) 667 if (!tps6598x_read_data_status(tps)) 668 goto err_clear_ints; 669 670 /* Handle plug insert or removal */ 671 - if ((event1 | event2) & TPS_REG_INT_PLUG_EVENT) 672 tps6598x_handle_plug_event(tps, status); 673 674 err_clear_ints: 675 - tps6598x_write64(tps, TPS_REG_INT_CLEAR1, event1); 676 - tps6598x_write64(tps, TPS_REG_INT_CLEAR2, event2); 677 678 err_unlock: 679 mutex_unlock(&tps->lock); 680 681 - if (event1 | event2) 682 return IRQ_HANDLED; 683 return IRQ_NONE; 684 } 685 ··· 1365 TPS_REG_INT_PLUG_EVENT; 1366 } 1367 1368 - if (dev_fwnode(tps->dev)) 1369 - tps->data = device_get_match_data(tps->dev); 1370 - else 1371 - tps->data = i2c_get_match_data(client); 1372 if (!tps->data) 1373 return -EINVAL; 1374
··· 28 #define TPS_REG_MODE 0x03 29 #define TPS_REG_CMD1 0x08 30 #define TPS_REG_DATA1 0x09 31 + #define TPS_REG_VERSION 0x0F 32 #define TPS_REG_INT_EVENT1 0x14 33 #define TPS_REG_INT_EVENT2 0x15 34 #define TPS_REG_INT_MASK1 0x16 ··· 604 if (!tps6598x_read_status(tps, &status)) 605 goto err_clear_ints; 606 607 + if (event[0] & TPS_REG_INT_POWER_STATUS_UPDATE) 608 if (!tps6598x_read_power_status(tps)) 609 goto err_clear_ints; 610 611 + if (event[0] & TPS_REG_INT_DATA_STATUS_UPDATE) 612 if (!tps6598x_read_data_status(tps)) 613 goto err_clear_ints; 614 ··· 617 * a plug event. Therefore, we need to check 618 * for pr/dr status change to set TypeC dr/pr accordingly. 619 */ 620 + if (event[0] & TPS_REG_INT_PLUG_EVENT || 621 tps6598x_has_role_changed(tps, status)) 622 tps6598x_handle_plug_event(tps, status); 623 ··· 636 637 static irqreturn_t tps6598x_interrupt(int irq, void *data) 638 { 639 + int intev_len = TPS_65981_2_6_INTEVENT_LEN; 640 struct tps6598x *tps = data; 641 + u64 event1[2] = { }; 642 + u64 event2[2] = { }; 643 + u32 version; 644 u32 status; 645 int ret; 646 647 mutex_lock(&tps->lock); 648 649 + ret = tps6598x_read32(tps, TPS_REG_VERSION, &version); 650 + if (ret) 651 + dev_warn(tps->dev, "%s: failed to read version (%d)\n", 652 + __func__, ret); 653 + 654 + if (TPS_VERSION_HW_VERSION(version) == TPS_VERSION_HW_65987_8_DH || 655 + TPS_VERSION_HW_VERSION(version) == TPS_VERSION_HW_65987_8_DK) 656 + intev_len = TPS_65987_8_INTEVENT_LEN; 657 + 658 + ret = tps6598x_block_read(tps, TPS_REG_INT_EVENT1, event1, intev_len); 659 + 660 + ret = tps6598x_block_read(tps, TPS_REG_INT_EVENT1, event1, intev_len); 661 if (ret) { 662 + dev_err(tps->dev, "%s: failed to read event1\n", __func__); 663 goto err_unlock; 664 } 665 + ret = tps6598x_block_read(tps, TPS_REG_INT_EVENT2, event2, intev_len); 666 + if (ret) { 667 + dev_err(tps->dev, "%s: failed to read event2\n", __func__); 668 + goto err_unlock; 669 + } 670 + trace_tps6598x_irq(event1[0], event2[0]); 671 672 + if (!(event1[0] | event1[1] | event2[0] | event2[1])) 673 goto err_unlock; 674 675 if (!tps6598x_read_status(tps, &status)) 676 goto err_clear_ints; 677 678 + if ((event1[0] | event2[0]) & TPS_REG_INT_POWER_STATUS_UPDATE) 679 if (!tps6598x_read_power_status(tps)) 680 goto err_clear_ints; 681 682 + if ((event1[0] | event2[0]) & TPS_REG_INT_DATA_STATUS_UPDATE) 683 if (!tps6598x_read_data_status(tps)) 684 goto err_clear_ints; 685 686 /* Handle plug insert or removal */ 687 + if ((event1[0] | event2[0]) & TPS_REG_INT_PLUG_EVENT) 688 tps6598x_handle_plug_event(tps, status); 689 690 err_clear_ints: 691 + tps6598x_block_write(tps, TPS_REG_INT_CLEAR1, event1, intev_len); 692 + tps6598x_block_write(tps, TPS_REG_INT_CLEAR2, event2, intev_len); 693 694 err_unlock: 695 mutex_unlock(&tps->lock); 696 697 + if (event1[0] | event1[1] | event2[0] | event2[1]) 698 return IRQ_HANDLED; 699 + 700 return IRQ_NONE; 701 } 702 ··· 1346 TPS_REG_INT_PLUG_EVENT; 1347 } 1348 1349 + tps->data = i2c_get_match_data(client); 1350 if (!tps->data) 1351 return -EINVAL; 1352
+11
drivers/usb/typec/tipd/tps6598x.h
··· 253 #define TPS_PTCC_DEV 2 254 #define TPS_PTCC_APP 3 255 256 #endif /* __TPS6598X_H__ */
··· 253 #define TPS_PTCC_DEV 2 254 #define TPS_PTCC_APP 3 255 256 + /* Version Register */ 257 + #define TPS_VERSION_HW_VERSION_MASK GENMASK(31, 24) 258 + #define TPS_VERSION_HW_VERSION(x) TPS_FIELD_GET(TPS_VERSION_HW_VERSION_MASK, (x)) 259 + #define TPS_VERSION_HW_65981_2_6 0x00 260 + #define TPS_VERSION_HW_65987_8_DH 0xF7 261 + #define TPS_VERSION_HW_65987_8_DK 0xF9 262 + 263 + /* Int Event Register length */ 264 + #define TPS_65981_2_6_INTEVENT_LEN 8 265 + #define TPS_65987_8_INTEVENT_LEN 11 266 + 267 #endif /* __TPS6598X_H__ */
-4
drivers/usb/typec/ucsi/displayport.c
··· 275 struct ucsi_dp *dp = container_of(work, struct ucsi_dp, work); 276 int ret; 277 278 - mutex_lock(&dp->con->lock); 279 - 280 ret = typec_altmode_vdm(dp->alt, dp->header, 281 dp->vdo_data, dp->vdo_size); 282 if (ret) ··· 283 dp->vdo_data = NULL; 284 dp->vdo_size = 0; 285 dp->header = 0; 286 - 287 - mutex_unlock(&dp->con->lock); 288 } 289 290 void ucsi_displayport_remove_partner(struct typec_altmode *alt)
··· 275 struct ucsi_dp *dp = container_of(work, struct ucsi_dp, work); 276 int ret; 277 278 ret = typec_altmode_vdm(dp->alt, dp->header, 279 dp->vdo_data, dp->vdo_size); 280 if (ret) ··· 285 dp->vdo_data = NULL; 286 dp->vdo_size = 0; 287 dp->header = 0; 288 } 289 290 void ucsi_displayport_remove_partner(struct typec_altmode *alt)
+118 -107
drivers/usb/typec/ucsi/ucsi.c
··· 49 return ucsi->ops->read(ucsi, UCSI_MESSAGE_IN, buf, buf_size); 50 } 51 52 - static int ucsi_acknowledge_command(struct ucsi *ucsi) 53 { 54 u64 ctrl; 55 56 ctrl = UCSI_ACK_CC_CI; 57 ctrl |= UCSI_ACK_COMMAND_COMPLETE; 58 - 59 - return ucsi->ops->sync_write(ucsi, UCSI_CONTROL, &ctrl, sizeof(ctrl)); 60 - } 61 - 62 - static int ucsi_acknowledge_connector_change(struct ucsi *ucsi) 63 - { 64 - u64 ctrl; 65 - 66 - ctrl = UCSI_ACK_CC_CI; 67 - ctrl |= UCSI_ACK_CONNECTOR_CHANGE; 68 69 return ucsi->ops->sync_write(ucsi, UCSI_CONTROL, &ctrl, sizeof(ctrl)); 70 } ··· 71 int ret; 72 73 /* Acknowledge the command that failed */ 74 - ret = ucsi_acknowledge_command(ucsi); 75 if (ret) 76 return ret; 77 ··· 83 if (ret) 84 return ret; 85 86 - ret = ucsi_acknowledge_command(ucsi); 87 if (ret) 88 return ret; 89 ··· 146 return -EIO; 147 148 if (cci & UCSI_CCI_NOT_SUPPORTED) { 149 - if (ucsi_acknowledge_command(ucsi) < 0) 150 dev_err(ucsi->dev, 151 "ACK of unsupported command failed\n"); 152 return -EOPNOTSUPP; ··· 159 } 160 161 if (cmd == UCSI_CANCEL && cci & UCSI_CCI_CANCEL_COMPLETE) { 162 - ret = ucsi_acknowledge_command(ucsi); 163 return ret ? ret : -EBUSY; 164 } 165 166 return UCSI_CCI_LENGTH(cci); 167 } 168 169 - int ucsi_send_command(struct ucsi *ucsi, u64 command, 170 - void *data, size_t size) 171 { 172 u8 length; 173 int ret; ··· 186 goto out; 187 } 188 189 - ret = ucsi_acknowledge_command(ucsi); 190 if (ret) 191 goto out; 192 ··· 194 out: 195 mutex_unlock(&ucsi->ppm_lock); 196 return ret; 197 } 198 EXPORT_SYMBOL_GPL(ucsi_send_command); 199 ··· 619 u64 command; 620 int ret; 621 622 - if (ucsi->quirks & UCSI_NO_PARTNER_PDOS) 623 return 0; 624 625 command = UCSI_COMMAND(UCSI_GET_PDOS) | UCSI_CONNECTOR_NUMBER(con->num); ··· 675 ucsi_port_psy_changed(con); 676 677 return ret; 678 } 679 680 static int ucsi_read_identity(struct ucsi_connector *con, u8 recipient, ··· 821 return ret; 822 } 823 824 static int ucsi_register_partner_pdos(struct ucsi_connector *con) 825 { 826 struct usb_power_delivery_desc desc = { con->ucsi->cap.pd_version }; 827 - struct usb_power_delivery_capabilities_desc caps; 828 struct usb_power_delivery_capabilities *cap; 829 - int ret; 830 831 if (con->partner_pd) 832 return 0; 833 834 - con->partner_pd = usb_power_delivery_register(NULL, &desc); 835 if (IS_ERR(con->partner_pd)) 836 return PTR_ERR(con->partner_pd); 837 838 - ret = ucsi_get_pdos(con, TYPEC_SOURCE, 1, caps.pdo); 839 - if (ret > 0) { 840 - if (ret < PDO_MAX_OBJECTS) 841 - caps.pdo[ret] = 0; 842 843 - caps.role = TYPEC_SOURCE; 844 - cap = usb_power_delivery_register_capabilities(con->partner_pd, &caps); 845 - if (IS_ERR(cap)) 846 - return PTR_ERR(cap); 847 848 - con->partner_source_caps = cap; 849 850 - ret = typec_partner_set_usb_power_delivery(con->partner, con->partner_pd); 851 - if (ret) { 852 - usb_power_delivery_unregister_capabilities(con->partner_source_caps); 853 - return ret; 854 - } 855 - } 856 857 - ret = ucsi_get_pdos(con, TYPEC_SINK, 1, caps.pdo); 858 - if (ret > 0) { 859 - if (ret < PDO_MAX_OBJECTS) 860 - caps.pdo[ret] = 0; 861 - 862 - caps.role = TYPEC_SINK; 863 - 864 - cap = usb_power_delivery_register_capabilities(con->partner_pd, &caps); 865 - if (IS_ERR(cap)) 866 - return PTR_ERR(cap); 867 - 868 - con->partner_sink_caps = cap; 869 - 870 - ret = typec_partner_set_usb_power_delivery(con->partner, con->partner_pd); 871 - if (ret) { 872 - usb_power_delivery_unregister_capabilities(con->partner_sink_caps); 873 - return ret; 874 - } 875 - } 876 - 877 - return 0; 878 } 879 880 static void ucsi_unregister_partner_pdos(struct ucsi_connector *con) ··· 1002 default: 1003 break; 1004 } 1005 1006 desc.identity = &con->partner_identity; 1007 desc.usb_pd = pwr_opmode == UCSI_CONSTAT_PWR_OPMODE_PD; ··· 1187 mutex_lock(&con->lock); 1188 1189 command = UCSI_GET_CONNECTOR_STATUS | UCSI_CONNECTOR_NUMBER(con->num); 1190 - ret = ucsi_send_command(ucsi, command, &con->status, sizeof(con->status)); 1191 if (ret < 0) { 1192 dev_err(ucsi->dev, "%s: GET_CONNECTOR_STATUS failed (%d)\n", 1193 __func__, ret); ··· 1198 } 1199 1200 trace_ucsi_connector_change(con->num, &con->status); 1201 1202 role = !!(con->status.flags & UCSI_CONSTAT_PWR_DIR); 1203 ··· 1248 1249 if (con->status.change & UCSI_CONSTAT_CAM_CHANGE) 1250 ucsi_partner_task(con, ucsi_check_altmodes, 1, 0); 1251 - 1252 - mutex_lock(&ucsi->ppm_lock); 1253 - clear_bit(EVENT_PENDING, &con->ucsi->flags); 1254 - ret = ucsi_acknowledge_connector_change(ucsi); 1255 - mutex_unlock(&ucsi->ppm_lock); 1256 - 1257 - if (ret) 1258 - dev_err(ucsi->dev, "%s: ACK failed (%d)", __func__, ret); 1259 1260 out_unlock: 1261 mutex_unlock(&con->lock); ··· 1340 goto out; 1341 } 1342 1343 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); 1344 if (ret) 1345 goto out; ··· 1356 goto out; 1357 } 1358 1359 - msleep(20); 1360 } while (!(cci & UCSI_CCI_RESET_COMPLETE)); 1361 1362 out: ··· 1495 1496 static int ucsi_register_port(struct ucsi *ucsi, struct ucsi_connector *con) 1497 { 1498 - struct usb_power_delivery_desc desc = { ucsi->cap.pd_version}; 1499 - struct usb_power_delivery_capabilities_desc pd_caps; 1500 - struct usb_power_delivery_capabilities *pd_cap; 1501 struct typec_capability *cap = &con->typec_cap; 1502 enum typec_accessory *accessory = cap->accessory; 1503 enum usb_role u_role = USB_ROLE_NONE; ··· 1561 cap->driver_data = con; 1562 cap->ops = &ucsi_ops; 1563 1564 ret = ucsi_register_port_psy(con); 1565 if (ret) 1566 goto out; ··· 1575 goto out; 1576 } 1577 1578 - con->pd = usb_power_delivery_register(ucsi->dev, &desc); 1579 - 1580 - ret = ucsi_get_pdos(con, TYPEC_SOURCE, 0, pd_caps.pdo); 1581 - if (ret > 0) { 1582 - if (ret < PDO_MAX_OBJECTS) 1583 - pd_caps.pdo[ret] = 0; 1584 - 1585 - pd_caps.role = TYPEC_SOURCE; 1586 - pd_cap = usb_power_delivery_register_capabilities(con->pd, &pd_caps); 1587 - if (IS_ERR(pd_cap)) { 1588 - ret = PTR_ERR(pd_cap); 1589 - goto out; 1590 - } 1591 - 1592 - con->port_source_caps = pd_cap; 1593 - typec_port_set_usb_power_delivery(con->port, con->pd); 1594 - } 1595 - 1596 - memset(&pd_caps, 0, sizeof(pd_caps)); 1597 - ret = ucsi_get_pdos(con, TYPEC_SINK, 0, pd_caps.pdo); 1598 - if (ret > 0) { 1599 - if (ret < PDO_MAX_OBJECTS) 1600 - pd_caps.pdo[ret] = 0; 1601 - 1602 - pd_caps.role = TYPEC_SINK; 1603 - pd_cap = usb_power_delivery_register_capabilities(con->pd, &pd_caps); 1604 - if (IS_ERR(pd_cap)) { 1605 - ret = PTR_ERR(pd_cap); 1606 - goto out; 1607 - } 1608 - 1609 - con->port_sink_caps = pd_cap; 1610 - typec_port_set_usb_power_delivery(con->port, con->pd); 1611 - } 1612 1613 /* Alternate modes */ 1614 ret = ucsi_register_altmodes(con, UCSI_RECIPIENT_CON); ··· 1595 goto out; 1596 } 1597 ret = 0; /* ucsi_send_command() returns length on success */ 1598 1599 switch (UCSI_CONSTAT_PARTNER_TYPE(con->status.flags)) { 1600 case UCSI_CONSTAT_PARTNER_TYPE_UFP: ··· 1642 if (con->partner && 1643 UCSI_CONSTAT_PWR_OPMODE(con->status.flags) == 1644 UCSI_CONSTAT_PWR_OPMODE_PD) { 1645 ucsi_get_src_pdos(con); 1646 ucsi_check_altmodes(con); 1647 } ··· 1660 } 1661 1662 return ret; 1663 } 1664 1665 /** ··· 1737 goto err_unregister; 1738 } 1739 1740 - /* Enable all notifications */ 1741 - ntfy = UCSI_ENABLE_NTFY_ALL; 1742 command = UCSI_SET_NOTIFICATION_ENABLE | ntfy; 1743 ret = ucsi_send_command(ucsi, command, NULL, 0); 1744 if (ret < 0)
··· 49 return ucsi->ops->read(ucsi, UCSI_MESSAGE_IN, buf, buf_size); 50 } 51 52 + static int ucsi_acknowledge(struct ucsi *ucsi, bool conn_ack) 53 { 54 u64 ctrl; 55 56 ctrl = UCSI_ACK_CC_CI; 57 ctrl |= UCSI_ACK_COMMAND_COMPLETE; 58 + if (conn_ack) { 59 + clear_bit(EVENT_PENDING, &ucsi->flags); 60 + ctrl |= UCSI_ACK_CONNECTOR_CHANGE; 61 + } 62 63 return ucsi->ops->sync_write(ucsi, UCSI_CONTROL, &ctrl, sizeof(ctrl)); 64 } ··· 77 int ret; 78 79 /* Acknowledge the command that failed */ 80 + ret = ucsi_acknowledge(ucsi, false); 81 if (ret) 82 return ret; 83 ··· 89 if (ret) 90 return ret; 91 92 + ret = ucsi_acknowledge(ucsi, false); 93 if (ret) 94 return ret; 95 ··· 152 return -EIO; 153 154 if (cci & UCSI_CCI_NOT_SUPPORTED) { 155 + if (ucsi_acknowledge(ucsi, false) < 0) 156 dev_err(ucsi->dev, 157 "ACK of unsupported command failed\n"); 158 return -EOPNOTSUPP; ··· 165 } 166 167 if (cmd == UCSI_CANCEL && cci & UCSI_CCI_CANCEL_COMPLETE) { 168 + ret = ucsi_acknowledge(ucsi, false); 169 return ret ? ret : -EBUSY; 170 } 171 172 return UCSI_CCI_LENGTH(cci); 173 } 174 175 + static int ucsi_send_command_common(struct ucsi *ucsi, u64 command, 176 + void *data, size_t size, bool conn_ack) 177 { 178 u8 length; 179 int ret; ··· 192 goto out; 193 } 194 195 + ret = ucsi_acknowledge(ucsi, conn_ack); 196 if (ret) 197 goto out; 198 ··· 200 out: 201 mutex_unlock(&ucsi->ppm_lock); 202 return ret; 203 + } 204 + 205 + int ucsi_send_command(struct ucsi *ucsi, u64 command, 206 + void *data, size_t size) 207 + { 208 + return ucsi_send_command_common(ucsi, command, data, size, false); 209 } 210 EXPORT_SYMBOL_GPL(ucsi_send_command); 211 ··· 619 u64 command; 620 int ret; 621 622 + if (is_partner && 623 + ucsi->quirks & UCSI_NO_PARTNER_PDOS && 624 + ((con->status.flags & UCSI_CONSTAT_PWR_DIR) || 625 + !is_source(role))) 626 return 0; 627 628 command = UCSI_COMMAND(UCSI_GET_PDOS) | UCSI_CONNECTOR_NUMBER(con->num); ··· 672 ucsi_port_psy_changed(con); 673 674 return ret; 675 + } 676 + 677 + static struct usb_power_delivery_capabilities *ucsi_get_pd_caps(struct ucsi_connector *con, 678 + enum typec_role role, 679 + bool is_partner) 680 + { 681 + struct usb_power_delivery_capabilities_desc pd_caps; 682 + int ret; 683 + 684 + ret = ucsi_get_pdos(con, role, is_partner, pd_caps.pdo); 685 + if (ret <= 0) 686 + return ERR_PTR(ret); 687 + 688 + if (ret < PDO_MAX_OBJECTS) 689 + pd_caps.pdo[ret] = 0; 690 + 691 + pd_caps.role = role; 692 + 693 + return usb_power_delivery_register_capabilities(is_partner ? con->partner_pd : con->pd, 694 + &pd_caps); 695 } 696 697 static int ucsi_read_identity(struct ucsi_connector *con, u8 recipient, ··· 798 return ret; 799 } 800 801 + static void ucsi_register_device_pdos(struct ucsi_connector *con) 802 + { 803 + struct ucsi *ucsi = con->ucsi; 804 + struct usb_power_delivery_desc desc = { ucsi->cap.pd_version }; 805 + struct usb_power_delivery_capabilities *pd_cap; 806 + 807 + if (con->pd) 808 + return; 809 + 810 + con->pd = usb_power_delivery_register(ucsi->dev, &desc); 811 + 812 + pd_cap = ucsi_get_pd_caps(con, TYPEC_SOURCE, false); 813 + if (!IS_ERR(pd_cap)) 814 + con->port_source_caps = pd_cap; 815 + 816 + pd_cap = ucsi_get_pd_caps(con, TYPEC_SINK, false); 817 + if (!IS_ERR(pd_cap)) 818 + con->port_sink_caps = pd_cap; 819 + 820 + typec_port_set_usb_power_delivery(con->port, con->pd); 821 + } 822 + 823 static int ucsi_register_partner_pdos(struct ucsi_connector *con) 824 { 825 struct usb_power_delivery_desc desc = { con->ucsi->cap.pd_version }; 826 struct usb_power_delivery_capabilities *cap; 827 828 if (con->partner_pd) 829 return 0; 830 831 + con->partner_pd = typec_partner_usb_power_delivery_register(con->partner, &desc); 832 if (IS_ERR(con->partner_pd)) 833 return PTR_ERR(con->partner_pd); 834 835 + cap = ucsi_get_pd_caps(con, TYPEC_SOURCE, true); 836 + if (IS_ERR(cap)) 837 + return PTR_ERR(cap); 838 839 + con->partner_source_caps = cap; 840 841 + cap = ucsi_get_pd_caps(con, TYPEC_SINK, true); 842 + if (IS_ERR(cap)) 843 + return PTR_ERR(cap); 844 845 + con->partner_sink_caps = cap; 846 847 + return typec_partner_set_usb_power_delivery(con->partner, con->partner_pd); 848 } 849 850 static void ucsi_unregister_partner_pdos(struct ucsi_connector *con) ··· 986 default: 987 break; 988 } 989 + 990 + if (pwr_opmode == UCSI_CONSTAT_PWR_OPMODE_PD) 991 + ucsi_register_device_pdos(con); 992 993 desc.identity = &con->partner_identity; 994 desc.usb_pd = pwr_opmode == UCSI_CONSTAT_PWR_OPMODE_PD; ··· 1168 mutex_lock(&con->lock); 1169 1170 command = UCSI_GET_CONNECTOR_STATUS | UCSI_CONNECTOR_NUMBER(con->num); 1171 + 1172 + ret = ucsi_send_command_common(ucsi, command, &con->status, 1173 + sizeof(con->status), true); 1174 if (ret < 0) { 1175 dev_err(ucsi->dev, "%s: GET_CONNECTOR_STATUS failed (%d)\n", 1176 __func__, ret); ··· 1177 } 1178 1179 trace_ucsi_connector_change(con->num, &con->status); 1180 + 1181 + if (ucsi->ops->connector_status) 1182 + ucsi->ops->connector_status(con); 1183 1184 role = !!(con->status.flags & UCSI_CONSTAT_PWR_DIR); 1185 ··· 1224 1225 if (con->status.change & UCSI_CONSTAT_CAM_CHANGE) 1226 ucsi_partner_task(con, ucsi_check_altmodes, 1, 0); 1227 1228 out_unlock: 1229 mutex_unlock(&con->lock); ··· 1324 goto out; 1325 } 1326 1327 + /* Give the PPM time to process a reset before reading CCI */ 1328 + msleep(20); 1329 + 1330 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); 1331 if (ret) 1332 goto out; ··· 1337 goto out; 1338 } 1339 1340 } while (!(cci & UCSI_CCI_RESET_COMPLETE)); 1341 1342 out: ··· 1477 1478 static int ucsi_register_port(struct ucsi *ucsi, struct ucsi_connector *con) 1479 { 1480 struct typec_capability *cap = &con->typec_cap; 1481 enum typec_accessory *accessory = cap->accessory; 1482 enum usb_role u_role = USB_ROLE_NONE; ··· 1546 cap->driver_data = con; 1547 cap->ops = &ucsi_ops; 1548 1549 + if (ucsi->ops->update_connector) 1550 + ucsi->ops->update_connector(con); 1551 + 1552 ret = ucsi_register_port_psy(con); 1553 if (ret) 1554 goto out; ··· 1557 goto out; 1558 } 1559 1560 + if (!(ucsi->quirks & UCSI_DELAY_DEVICE_PDOS)) 1561 + ucsi_register_device_pdos(con); 1562 1563 /* Alternate modes */ 1564 ret = ucsi_register_altmodes(con, UCSI_RECIPIENT_CON); ··· 1609 goto out; 1610 } 1611 ret = 0; /* ucsi_send_command() returns length on success */ 1612 + 1613 + if (ucsi->ops->connector_status) 1614 + ucsi->ops->connector_status(con); 1615 1616 switch (UCSI_CONSTAT_PARTNER_TYPE(con->status.flags)) { 1617 case UCSI_CONSTAT_PARTNER_TYPE_UFP: ··· 1653 if (con->partner && 1654 UCSI_CONSTAT_PWR_OPMODE(con->status.flags) == 1655 UCSI_CONSTAT_PWR_OPMODE_PD) { 1656 + ucsi_register_device_pdos(con); 1657 ucsi_get_src_pdos(con); 1658 ucsi_check_altmodes(con); 1659 } ··· 1670 } 1671 1672 return ret; 1673 + } 1674 + 1675 + static u64 ucsi_get_supported_notifications(struct ucsi *ucsi) 1676 + { 1677 + u8 features = ucsi->cap.features; 1678 + u64 ntfy = UCSI_ENABLE_NTFY_ALL; 1679 + 1680 + if (!(features & UCSI_CAP_ALT_MODE_DETAILS)) 1681 + ntfy &= ~UCSI_ENABLE_NTFY_CAM_CHANGE; 1682 + 1683 + if (!(features & UCSI_CAP_PDO_DETAILS)) 1684 + ntfy &= ~(UCSI_ENABLE_NTFY_PWR_LEVEL_CHANGE | 1685 + UCSI_ENABLE_NTFY_CAP_CHANGE); 1686 + 1687 + if (!(features & UCSI_CAP_EXT_SUPPLY_NOTIFICATIONS)) 1688 + ntfy &= ~UCSI_ENABLE_NTFY_EXT_PWR_SRC_CHANGE; 1689 + 1690 + if (!(features & UCSI_CAP_PD_RESET)) 1691 + ntfy &= ~UCSI_ENABLE_NTFY_PD_RESET_COMPLETE; 1692 + 1693 + return ntfy; 1694 } 1695 1696 /** ··· 1726 goto err_unregister; 1727 } 1728 1729 + /* Enable all supported notifications */ 1730 + ntfy = ucsi_get_supported_notifications(ucsi); 1731 command = UCSI_SET_NOTIFICATION_ENABLE | ntfy; 1732 ret = ucsi_send_command(ucsi, command, NULL, 0); 1733 if (ret < 0)
+6 -2
drivers/usb/typec/ucsi/ucsi.h
··· 16 17 struct ucsi; 18 struct ucsi_altmode; 19 struct dentry; 20 21 /* UCSI offsets (Bytes) */ ··· 60 * @sync_write: Blocking write operation 61 * @async_write: Non-blocking write operation 62 * @update_altmodes: Squashes duplicate DP altmodes 63 * 64 * Read and write routines for UCSI interface. @sync_write must wait for the 65 * Command Completion Event from the PPM before returning, and @async_write must ··· 76 const void *val, size_t val_len); 77 bool (*update_altmodes)(struct ucsi *ucsi, struct ucsi_altmode *orig, 78 struct ucsi_altmode *updated); 79 }; 80 81 struct ucsi *ucsi_create(struct device *dev, const struct ucsi_operations *ops); ··· 408 /* PPM communication flags */ 409 unsigned long flags; 410 #define EVENT_PENDING 0 411 - #define COMMAND_PENDING 1 412 - #define ACK_PENDING 2 413 414 unsigned long quirks; 415 #define UCSI_NO_PARTNER_PDOS BIT(0) /* Don't read partner's PDOs */ 416 }; 417 418 #define UCSI_MAX_SVID 5
··· 16 17 struct ucsi; 18 struct ucsi_altmode; 19 + struct ucsi_connector; 20 struct dentry; 21 22 /* UCSI offsets (Bytes) */ ··· 59 * @sync_write: Blocking write operation 60 * @async_write: Non-blocking write operation 61 * @update_altmodes: Squashes duplicate DP altmodes 62 + * @update_connector: Update connector capabilities before registering 63 + * @connector_status: Updates connector status, called holding connector lock 64 * 65 * Read and write routines for UCSI interface. @sync_write must wait for the 66 * Command Completion Event from the PPM before returning, and @async_write must ··· 73 const void *val, size_t val_len); 74 bool (*update_altmodes)(struct ucsi *ucsi, struct ucsi_altmode *orig, 75 struct ucsi_altmode *updated); 76 + void (*update_connector)(struct ucsi_connector *con); 77 + void (*connector_status)(struct ucsi_connector *con); 78 }; 79 80 struct ucsi *ucsi_create(struct device *dev, const struct ucsi_operations *ops); ··· 403 /* PPM communication flags */ 404 unsigned long flags; 405 #define EVENT_PENDING 0 406 407 unsigned long quirks; 408 #define UCSI_NO_PARTNER_PDOS BIT(0) /* Don't read partner's PDOs */ 409 + #define UCSI_DELAY_DEVICE_PDOS BIT(1) /* Reading PDOs fails until the parter is in PD mode */ 410 }; 411 412 #define UCSI_MAX_SVID 5
+3 -53
drivers/usb/typec/ucsi/ucsi_acpi.c
··· 23 void *base; 24 struct completion complete; 25 unsigned long flags; 26 - #define UCSI_ACPI_SUPPRESS_EVENT 0 27 #define UCSI_ACPI_COMMAND_PENDING 1 28 #define UCSI_ACPI_ACK_PENDING 2 29 guid_t guid; ··· 128 .async_write = ucsi_acpi_async_write 129 }; 130 131 - /* 132 - * Some Dell laptops don't like ACK commands with the 133 - * UCSI_ACK_CONNECTOR_CHANGE but not the UCSI_ACK_COMMAND_COMPLETE 134 - * bit set. To work around this send a dummy command and bundle the 135 - * UCSI_ACK_CONNECTOR_CHANGE with the UCSI_ACK_COMMAND_COMPLETE 136 - * for the dummy command. 137 - */ 138 - static int 139 - ucsi_dell_sync_write(struct ucsi *ucsi, unsigned int offset, 140 - const void *val, size_t val_len) 141 - { 142 - struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi); 143 - u64 cmd = *(u64 *)val; 144 - u64 dummycmd = UCSI_GET_CAPABILITY; 145 - int ret; 146 - 147 - if (cmd == (UCSI_ACK_CC_CI | UCSI_ACK_CONNECTOR_CHANGE)) { 148 - cmd |= UCSI_ACK_COMMAND_COMPLETE; 149 - 150 - /* 151 - * The UCSI core thinks it is sending a connector change ack 152 - * and will accept new connector change events. We don't want 153 - * this to happen for the dummy command as its response will 154 - * still report the very event that the core is trying to clear. 155 - */ 156 - set_bit(UCSI_ACPI_SUPPRESS_EVENT, &ua->flags); 157 - ret = ucsi_acpi_sync_write(ucsi, UCSI_CONTROL, &dummycmd, 158 - sizeof(dummycmd)); 159 - clear_bit(UCSI_ACPI_SUPPRESS_EVENT, &ua->flags); 160 - 161 - if (ret < 0) 162 - return ret; 163 - } 164 - 165 - return ucsi_acpi_sync_write(ucsi, UCSI_CONTROL, &cmd, sizeof(cmd)); 166 - } 167 - 168 - static const struct ucsi_operations ucsi_dell_ops = { 169 - .read = ucsi_acpi_read, 170 - .sync_write = ucsi_dell_sync_write, 171 - .async_write = ucsi_acpi_async_write 172 - }; 173 - 174 static const struct dmi_system_id ucsi_acpi_quirks[] = { 175 { 176 .matches = { ··· 135 DMI_MATCH(DMI_PRODUCT_NAME, "ZenBook UX325UA_UM325UA"), 136 }, 137 .driver_data = (void *)&ucsi_zenbook_ops, 138 - }, 139 - { 140 - .matches = { 141 - DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 142 - }, 143 - .driver_data = (void *)&ucsi_dell_ops, 144 }, 145 { } 146 }; ··· 149 if (ret) 150 return; 151 152 - if (UCSI_CCI_CONNECTOR(cci) && 153 - !test_bit(UCSI_ACPI_SUPPRESS_EVENT, &ua->flags)) 154 ucsi_connector_change(ua->ucsi, UCSI_CCI_CONNECTOR(cci)); 155 156 - if (cci & UCSI_CCI_ACK_COMPLETE && test_bit(ACK_PENDING, &ua->flags)) 157 complete(&ua->complete); 158 if (cci & UCSI_CCI_COMMAND_COMPLETE && 159 test_bit(UCSI_ACPI_COMMAND_PENDING, &ua->flags))
··· 23 void *base; 24 struct completion complete; 25 unsigned long flags; 26 #define UCSI_ACPI_COMMAND_PENDING 1 27 #define UCSI_ACPI_ACK_PENDING 2 28 guid_t guid; ··· 129 .async_write = ucsi_acpi_async_write 130 }; 131 132 static const struct dmi_system_id ucsi_acpi_quirks[] = { 133 { 134 .matches = { ··· 179 DMI_MATCH(DMI_PRODUCT_NAME, "ZenBook UX325UA_UM325UA"), 180 }, 181 .driver_data = (void *)&ucsi_zenbook_ops, 182 }, 183 { } 184 }; ··· 199 if (ret) 200 return; 201 202 + if (UCSI_CCI_CONNECTOR(cci)) 203 ucsi_connector_change(ua->ucsi, UCSI_CCI_CONNECTOR(cci)); 204 205 + if (cci & UCSI_CCI_ACK_COMPLETE && 206 + test_bit(UCSI_ACPI_ACK_PENDING, &ua->flags)) 207 complete(&ua->complete); 208 if (cci & UCSI_CCI_COMMAND_COMPLETE && 209 test_bit(UCSI_ACPI_COMMAND_PENDING, &ua->flags))
+47 -45
drivers/usb/typec/ucsi/ucsi_glink.c
··· 58 struct device *dev; 59 60 struct gpio_desc *port_orientation[PMIC_GLINK_MAX_PORTS]; 61 - struct typec_switch *port_switch[PMIC_GLINK_MAX_PORTS]; 62 63 struct pmic_glink_client *client; 64 ··· 175 left = wait_for_completion_timeout(&ucsi->sync_ack, 5 * HZ); 176 if (!left) { 177 dev_err(ucsi->dev, "timeout waiting for UCSI sync write response\n"); 178 - ret = -ETIMEDOUT; 179 } else if (ucsi->sync_val) { 180 dev_err(ucsi->dev, "sync write returned: %d\n", ucsi->sync_val); 181 } ··· 186 return ret; 187 } 188 189 static const struct ucsi_operations pmic_glink_ucsi_ops = { 190 .read = pmic_glink_ucsi_read, 191 .sync_write = pmic_glink_ucsi_sync_write, 192 - .async_write = pmic_glink_ucsi_async_write 193 }; 194 195 static void pmic_glink_ucsi_read_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len) ··· 259 } 260 261 con_num = UCSI_CCI_CONNECTOR(cci); 262 - if (con_num) { 263 - if (con_num <= PMIC_GLINK_MAX_PORTS && 264 - ucsi->port_orientation[con_num - 1]) { 265 - int orientation = gpiod_get_value(ucsi->port_orientation[con_num - 1]); 266 - 267 - if (orientation >= 0) { 268 - typec_switch_set(ucsi->port_switch[con_num - 1], 269 - orientation ? TYPEC_ORIENTATION_REVERSE 270 - : TYPEC_ORIENTATION_NORMAL); 271 - } 272 - } 273 - 274 ucsi_connector_change(ucsi->ucsi, con_num); 275 - } 276 277 - if (ucsi->sync_pending && cci & UCSI_CCI_BUSY) { 278 - ucsi->sync_val = -EBUSY; 279 - complete(&ucsi->sync_ack); 280 - } else if (ucsi->sync_pending && 281 (cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE))) { 282 complete(&ucsi->sync_ack); 283 } ··· 271 static void pmic_glink_ucsi_register(struct work_struct *work) 272 { 273 struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, register_work); 274 - int orientation; 275 - int i; 276 - 277 - for (i = 0; i < PMIC_GLINK_MAX_PORTS; i++) { 278 - if (!ucsi->port_orientation[i]) 279 - continue; 280 - orientation = gpiod_get_value(ucsi->port_orientation[i]); 281 - 282 - if (orientation >= 0) { 283 - typec_switch_set(ucsi->port_switch[i], 284 - orientation ? TYPEC_ORIENTATION_REVERSE 285 - : TYPEC_ORIENTATION_NORMAL); 286 - } 287 - } 288 289 ucsi_register(ucsi->ucsi); 290 } ··· 313 mutex_unlock(&ucsi->lock); 314 } 315 316 static const struct of_device_id pmic_glink_ucsi_of_quirks[] = { 317 - { .compatible = "qcom,qcm6490-pmic-glink", .data = (void *)UCSI_NO_PARTNER_PDOS, }, 318 - { .compatible = "qcom,sc8180x-pmic-glink", .data = (void *)UCSI_NO_PARTNER_PDOS, }, 319 - { .compatible = "qcom,sc8280xp-pmic-glink", .data = (void *)UCSI_NO_PARTNER_PDOS, }, 320 - { .compatible = "qcom,sm8350-pmic-glink", .data = (void *)UCSI_NO_PARTNER_PDOS, }, 321 - { .compatible = "qcom,sm8550-pmic-glink", .data = (void *)UCSI_NO_PARTNER_PDOS, }, 322 {} 323 }; 324 ··· 361 362 match = of_match_device(pmic_glink_ucsi_of_quirks, dev->parent); 363 if (match) 364 - ucsi->ucsi->quirks = (unsigned long)match->data; 365 366 ucsi_set_drvdata(ucsi->ucsi, ucsi); 367 ··· 390 return dev_err_probe(dev, PTR_ERR(desc), 391 "unable to acquire orientation gpio\n"); 392 ucsi->port_orientation[port] = desc; 393 - 394 - ucsi->port_switch[port] = fwnode_typec_switch_get(fwnode); 395 - if (IS_ERR(ucsi->port_switch[port])) 396 - return dev_err_probe(dev, PTR_ERR(ucsi->port_switch[port]), 397 - "failed to acquire orientation-switch\n"); 398 } 399 400 ucsi->client = devm_pmic_glink_register_client(dev,
··· 58 struct device *dev; 59 60 struct gpio_desc *port_orientation[PMIC_GLINK_MAX_PORTS]; 61 62 struct pmic_glink_client *client; 63 ··· 176 left = wait_for_completion_timeout(&ucsi->sync_ack, 5 * HZ); 177 if (!left) { 178 dev_err(ucsi->dev, "timeout waiting for UCSI sync write response\n"); 179 + /* return 0 here and let core UCSI code handle the CCI_BUSY */ 180 + ret = 0; 181 } else if (ucsi->sync_val) { 182 dev_err(ucsi->dev, "sync write returned: %d\n", ucsi->sync_val); 183 } ··· 186 return ret; 187 } 188 189 + static void pmic_glink_ucsi_update_connector(struct ucsi_connector *con) 190 + { 191 + struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(con->ucsi); 192 + int i; 193 + 194 + for (i = 0; i < PMIC_GLINK_MAX_PORTS; i++) { 195 + if (ucsi->port_orientation[i]) 196 + con->typec_cap.orientation_aware = true; 197 + } 198 + } 199 + 200 + static void pmic_glink_ucsi_connector_status(struct ucsi_connector *con) 201 + { 202 + struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(con->ucsi); 203 + int orientation; 204 + 205 + if (con->num >= PMIC_GLINK_MAX_PORTS || 206 + !ucsi->port_orientation[con->num - 1]) 207 + return; 208 + 209 + orientation = gpiod_get_value(ucsi->port_orientation[con->num - 1]); 210 + if (orientation >= 0) { 211 + typec_set_orientation(con->port, 212 + orientation ? 213 + TYPEC_ORIENTATION_REVERSE : 214 + TYPEC_ORIENTATION_NORMAL); 215 + } 216 + } 217 + 218 static const struct ucsi_operations pmic_glink_ucsi_ops = { 219 .read = pmic_glink_ucsi_read, 220 .sync_write = pmic_glink_ucsi_sync_write, 221 + .async_write = pmic_glink_ucsi_async_write, 222 + .update_connector = pmic_glink_ucsi_update_connector, 223 + .connector_status = pmic_glink_ucsi_connector_status, 224 }; 225 226 static void pmic_glink_ucsi_read_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len) ··· 228 } 229 230 con_num = UCSI_CCI_CONNECTOR(cci); 231 + if (con_num) 232 ucsi_connector_change(ucsi->ucsi, con_num); 233 234 + if (ucsi->sync_pending && 235 (cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE))) { 236 complete(&ucsi->sync_ack); 237 } ··· 255 static void pmic_glink_ucsi_register(struct work_struct *work) 256 { 257 struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, register_work); 258 259 ucsi_register(ucsi->ucsi); 260 } ··· 311 mutex_unlock(&ucsi->lock); 312 } 313 314 + static unsigned long quirk_sc8180x = UCSI_NO_PARTNER_PDOS; 315 + static unsigned long quirk_sc8280xp = UCSI_NO_PARTNER_PDOS | UCSI_DELAY_DEVICE_PDOS; 316 + static unsigned long quirk_sm8450 = UCSI_DELAY_DEVICE_PDOS; 317 + 318 static const struct of_device_id pmic_glink_ucsi_of_quirks[] = { 319 + { .compatible = "qcom,qcm6490-pmic-glink", .data = &quirk_sc8280xp, }, 320 + { .compatible = "qcom,sc8180x-pmic-glink", .data = &quirk_sc8180x, }, 321 + { .compatible = "qcom,sc8280xp-pmic-glink", .data = &quirk_sc8280xp, }, 322 + { .compatible = "qcom,sm8350-pmic-glink", .data = &quirk_sc8180x, }, 323 + { .compatible = "qcom,sm8450-pmic-glink", .data = &quirk_sm8450, }, 324 + { .compatible = "qcom,sm8550-pmic-glink", .data = &quirk_sm8450, }, 325 {} 326 }; 327 ··· 354 355 match = of_match_device(pmic_glink_ucsi_of_quirks, dev->parent); 356 if (match) 357 + ucsi->ucsi->quirks = *(unsigned long *)match->data; 358 359 ucsi_set_drvdata(ucsi->ucsi, ucsi); 360 ··· 383 return dev_err_probe(dev, PTR_ERR(desc), 384 "unable to acquire orientation gpio\n"); 385 ucsi->port_orientation[port] = desc; 386 } 387 388 ucsi->client = devm_pmic_glink_register_client(dev,
+1
drivers/usb/typec/ucsi/ucsi_stm32g0.c
··· 64 struct completion complete; 65 struct device *dev; 66 unsigned long flags; 67 const char *fw_name; 68 struct ucsi *ucsi; 69 bool suspended;
··· 64 struct completion complete; 65 struct device *dev; 66 unsigned long flags; 67 + #define COMMAND_PENDING 1 68 const char *fw_name; 69 struct ucsi *ucsi; 70 bool suspended;
+1 -1
include/drm/bridge/aux-bridge.h
··· 33 return NULL; 34 } 35 36 - static inline int devm_drm_dp_hpd_bridge_add(struct auxiliary_device *adev) 37 { 38 return 0; 39 }
··· 33 return NULL; 34 } 35 36 + static inline int devm_drm_dp_hpd_bridge_add(struct device *dev, struct auxiliary_device *adev) 37 { 38 return 0; 39 }
-1
include/linux/thunderbolt.h
··· 33 TB_CFG_PKG_ICM_EVENT = 10, 34 TB_CFG_PKG_ICM_CMD = 11, 35 TB_CFG_PKG_ICM_RESP = 12, 36 - TB_CFG_PKG_PREPARE_TO_SLEEP = 13, 37 }; 38 39 /**
··· 33 TB_CFG_PKG_ICM_EVENT = 10, 34 TB_CFG_PKG_ICM_CMD = 11, 35 TB_CFG_PKG_ICM_RESP = 12, 36 }; 37 38 /**
+1 -6
include/linux/usb.h
··· 440 441 /* ----------------------------------------------------------------------- */ 442 443 - /* USB device number allocation bitmap */ 444 - struct usb_devmap { 445 - unsigned long devicemap[128 / (8*sizeof(unsigned long))]; 446 - }; 447 - 448 /* 449 * Allocated per bus (tree of devices) we have: 450 */ ··· 467 * round-robin allocation */ 468 struct mutex devnum_next_mutex; /* devnum_next mutex */ 469 470 - struct usb_devmap devmap; /* device address allocation map */ 471 struct usb_device *root_hub; /* Root hub */ 472 struct usb_bus *hs_companion; /* Companion EHCI bus, if any */ 473
··· 440 441 /* ----------------------------------------------------------------------- */ 442 443 /* 444 * Allocated per bus (tree of devices) we have: 445 */ ··· 472 * round-robin allocation */ 473 struct mutex devnum_next_mutex; /* devnum_next mutex */ 474 475 + DECLARE_BITMAP(devmap, 128); /* USB device number allocation bitmap */ 476 struct usb_device *root_hub; /* Root hub */ 477 struct usb_bus *hs_companion; /* Companion EHCI bus, if any */ 478
+18
include/linux/usb/onboard_dev.h
···
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + 3 + #ifndef __LINUX_USB_ONBOARD_DEV_H 4 + #define __LINUX_USB_ONBOARD_DEV_H 5 + 6 + struct usb_device; 7 + struct list_head; 8 + 9 + #if IS_ENABLED(CONFIG_USB_ONBOARD_DEV) 10 + void onboard_dev_create_pdevs(struct usb_device *parent_dev, struct list_head *pdev_list); 11 + void onboard_dev_destroy_pdevs(struct list_head *pdev_list); 12 + #else 13 + static inline void onboard_dev_create_pdevs(struct usb_device *parent_dev, 14 + struct list_head *pdev_list) {} 15 + static inline void onboard_dev_destroy_pdevs(struct list_head *pdev_list) {} 16 + #endif 17 + 18 + #endif /* __LINUX_USB_ONBOARD_DEV_H */
-18
include/linux/usb/onboard_hub.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - 3 - #ifndef __LINUX_USB_ONBOARD_HUB_H 4 - #define __LINUX_USB_ONBOARD_HUB_H 5 - 6 - struct usb_device; 7 - struct list_head; 8 - 9 - #if IS_ENABLED(CONFIG_USB_ONBOARD_HUB) 10 - void onboard_hub_create_pdevs(struct usb_device *parent_hub, struct list_head *pdev_list); 11 - void onboard_hub_destroy_pdevs(struct list_head *pdev_list); 12 - #else 13 - static inline void onboard_hub_create_pdevs(struct usb_device *parent_hub, 14 - struct list_head *pdev_list) {} 15 - static inline void onboard_hub_destroy_pdevs(struct list_head *pdev_list) {} 16 - #endif 17 - 18 - #endif /* __LINUX_USB_ONBOARD_HUB_H */
···
-5
include/linux/usb/renesas_usbhs.h
··· 194 struct renesas_usbhs_driver_param driver_param; 195 }; 196 197 - /* 198 - * macro for platform 199 - */ 200 - #define renesas_usbhs_get_info(pdev)\ 201 - ((struct renesas_usbhs_platform_info *)(pdev)->dev.platform_data) 202 #endif /* RENESAS_USB_H */
··· 194 struct renesas_usbhs_driver_param driver_param; 195 }; 196 197 #endif /* RENESAS_USB_H */
+2 -1
include/linux/usb/tegra_usb_phy.h
··· 7 #define __TEGRA_USB_PHY_H 8 9 #include <linux/clk.h> 10 - #include <linux/gpio.h> 11 #include <linux/regmap.h> 12 #include <linux/reset.h> 13 #include <linux/usb/otg.h> 14 15 /* 16 * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers
··· 7 #define __TEGRA_USB_PHY_H 8 9 #include <linux/clk.h> 10 #include <linux/regmap.h> 11 #include <linux/reset.h> 12 #include <linux/usb/otg.h> 13 + 14 + struct gpio_desc; 15 16 /* 17 * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers