tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

drm: Use new DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags

The DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE and
DRM_BUS_FLAG_SYNC_(POS|NEG)EDGE flags are deprecated in favour of the
new DRM_BUS_FLAG_PIXDATA_(DRIVE|SAMPLE)_(POS|NEG)EDGE and
new DRM_BUS_FLAG_SYNC_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags. Replace them
through the code.

This effectively changes the value of the .sampling_edge bridge timings
field in the dumb-vga-dac driver. This is safe to do as no driver
consumes these values yet.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

authored by

Laurent Pinchart and committed by
Tomi Valkeinen 88bc4178 a792fa0e

+77 -68
+3 -3
drivers/gpu/drm/bridge/dumb-vga-dac.c
··· 234 234 */ 235 235 static const struct drm_bridge_timings default_dac_timings = { 236 236 /* Timing specifications, datasheet page 7 */ 237 - .sampling_edge = DRM_BUS_FLAG_PIXDATA_POSEDGE, 237 + .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, 238 238 .setup_time_ps = 500, 239 239 .hold_time_ps = 1500, 240 240 }; ··· 245 245 */ 246 246 static const struct drm_bridge_timings ti_ths8134_dac_timings = { 247 247 /* From timing diagram, datasheet page 9 */ 248 - .sampling_edge = DRM_BUS_FLAG_PIXDATA_POSEDGE, 248 + .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, 249 249 /* From datasheet, page 12 */ 250 250 .setup_time_ps = 3000, 251 251 /* I guess this means latched input */ ··· 258 258 */ 259 259 static const struct drm_bridge_timings ti_ths8135_dac_timings = { 260 260 /* From timing diagram, datasheet page 14 */ 261 - .sampling_edge = DRM_BUS_FLAG_PIXDATA_POSEDGE, 261 + .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, 262 262 /* From datasheet, page 16 */ 263 263 .setup_time_ps = 2000, 264 264 .hold_time_ps = 500,
+2 -2
drivers/gpu/drm/bridge/tc358767.c
··· 1222 1222 &bus_format, 1); 1223 1223 tc->connector.display_info.bus_flags = 1224 1224 DRM_BUS_FLAG_DE_HIGH | 1225 - DRM_BUS_FLAG_PIXDATA_NEGEDGE | 1226 - DRM_BUS_FLAG_SYNC_NEGEDGE; 1225 + DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE | 1226 + DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE; 1227 1227 drm_connector_attach_encoder(&tc->connector, tc->bridge.encoder); 1228 1228 1229 1229 return 0;
+6 -6
drivers/gpu/drm/drm_modes.c
··· 655 655 * @bus_flags: information about pixelclk, sync and DE polarity will be stored 656 656 * here 657 657 * 658 - * Sets DRM_BUS_FLAG_DE_(LOW|HIGH), DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE and 659 - * DISPLAY_FLAGS_SYNC_(POS|NEG)EDGE in @bus_flags according to DISPLAY_FLAGS 658 + * Sets DRM_BUS_FLAG_DE_(LOW|HIGH), DRM_BUS_FLAG_PIXDATA_DRIVE_(POS|NEG)EDGE 659 + * and DISPLAY_FLAGS_SYNC_(POS|NEG)EDGE in @bus_flags according to DISPLAY_FLAGS 660 660 * found in @vm 661 661 */ 662 662 void drm_bus_flags_from_videomode(const struct videomode *vm, u32 *bus_flags) 663 663 { 664 664 *bus_flags = 0; 665 665 if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE) 666 - *bus_flags |= DRM_BUS_FLAG_PIXDATA_POSEDGE; 666 + *bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 667 667 if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) 668 - *bus_flags |= DRM_BUS_FLAG_PIXDATA_NEGEDGE; 668 + *bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 669 669 670 670 if (vm->flags & DISPLAY_FLAGS_SYNC_POSEDGE) 671 - *bus_flags |= DRM_BUS_FLAG_SYNC_POSEDGE; 671 + *bus_flags |= DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE; 672 672 if (vm->flags & DISPLAY_FLAGS_SYNC_NEGEDGE) 673 - *bus_flags |= DRM_BUS_FLAG_SYNC_NEGEDGE; 673 + *bus_flags |= DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE; 674 674 675 675 if (vm->flags & DISPLAY_FLAGS_DE_LOW) 676 676 *bus_flags |= DRM_BUS_FLAG_DE_LOW;
+1 -1
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
··· 94 94 drm_display_mode_to_videomode(mode, &vm); 95 95 96 96 /* INV_PXCK as default (most display sample data on rising edge) */ 97 - if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) 97 + if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE)) 98 98 pol |= DCU_SYN_POL_INV_PXCK; 99 99 100 100 if (vm.flags & DISPLAY_FLAGS_HSYNC_LOW)
+1 -1
drivers/gpu/drm/imx/ipuv3-crtc.c
··· 295 295 sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW); 296 296 /* Default to driving pixel data on negative clock edges */ 297 297 sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags & 298 - DRM_BUS_FLAG_PIXDATA_POSEDGE); 298 + DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE); 299 299 sig_cfg.bus_format = imx_crtc_state->bus_format; 300 300 sig_cfg.v_to_h_sync = 0; 301 301 sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
+3 -3
drivers/gpu/drm/mxsfb/mxsfb_crtc.c
··· 253 253 if (!(bus_flags & DRM_BUS_FLAG_DE_LOW)) 254 254 vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH; 255 255 /* 256 - * DRM_BUS_FLAG_PIXDATA_ defines are controller centric, 256 + * DRM_BUS_FLAG_PIXDATA_DRIVE_ defines are controller centric, 257 257 * controllers VDCTRL0_DOTCLK is display centric. 258 258 * Drive on positive edge -> display samples on falling edge 259 - * DRM_BUS_FLAG_PIXDATA_POSEDGE -> VDCTRL0_DOTCLK_ACT_FALLING 259 + * DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE -> VDCTRL0_DOTCLK_ACT_FALLING 260 260 */ 261 - if (bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE) 261 + if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE) 262 262 vdctrl0 |= VDCTRL0_DOTCLK_ACT_FALLING; 263 263 264 264 writel(vdctrl0, mxsfb->base + LCDC_VDCTRL0);
+3 -2
drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
··· 86 86 dssdev->type = OMAP_DISPLAY_TYPE_DPI; 87 87 dssdev->owner = THIS_MODULE; 88 88 dssdev->of_ports = BIT(1) | BIT(0); 89 - dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_POSEDGE 90 - | DRM_BUS_FLAG_PIXDATA_POSEDGE; 89 + dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH 90 + | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE 91 + | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 91 92 92 93 dssdev->next = omapdss_of_find_connected_device(pdev->dev.of_node, 1); 93 94 if (IS_ERR(dssdev->next)) {
+3 -2
drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
··· 207 207 * DE is active LOW 208 208 * DATA needs to be driven on the FALLING edge 209 209 */ 210 - dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_NEGEDGE 211 - | DRM_BUS_FLAG_PIXDATA_POSEDGE; 210 + dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH 211 + | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE 212 + | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 212 213 213 214 omapdss_display_init(dssdev); 214 215 omapdss_device_register(dssdev);
+3 -2
drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
··· 196 196 dssdev->owner = THIS_MODULE; 197 197 dssdev->of_ports = BIT(0); 198 198 dssdev->ops_flags = OMAP_DSS_DEVICE_OP_MODES; 199 - dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_POSEDGE 200 - | DRM_BUS_FLAG_PIXDATA_POSEDGE; 199 + dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH 200 + | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE 201 + | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 201 202 202 203 omapdss_display_init(dssdev); 203 204 omapdss_device_register(dssdev);
+3 -2
drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
··· 216 216 * Note: According to the panel documentation: 217 217 * DATA needs to be driven on the FALLING edge 218 218 */ 219 - dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_NEGEDGE 220 - | DRM_BUS_FLAG_PIXDATA_POSEDGE; 219 + dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH 220 + | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE 221 + | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 221 222 222 223 omapdss_display_init(dssdev); 223 224 omapdss_device_register(dssdev);
+3 -2
drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
··· 710 710 dssdev->owner = THIS_MODULE; 711 711 dssdev->of_ports = BIT(0); 712 712 dssdev->ops_flags = OMAP_DSS_DEVICE_OP_MODES; 713 - dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_NEGEDGE 714 - | DRM_BUS_FLAG_PIXDATA_POSEDGE; 713 + dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH 714 + | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE 715 + | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 715 716 716 717 omapdss_display_init(dssdev); 717 718 omapdss_device_register(dssdev);
+3 -2
drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
··· 330 330 * Note: According to the panel documentation: 331 331 * SYNC needs to be driven on the FALLING edge 332 332 */ 333 - dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_POSEDGE 334 - | DRM_BUS_FLAG_PIXDATA_NEGEDGE; 333 + dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH 334 + | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE 335 + | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 335 336 336 337 omapdss_display_init(dssdev); 337 338 omapdss_device_register(dssdev);
+3 -2
drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
··· 429 429 * Note: According to the panel documentation: 430 430 * SYNC needs to be driven on the FALLING edge 431 431 */ 432 - dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_POSEDGE 433 - | DRM_BUS_FLAG_PIXDATA_NEGEDGE; 432 + dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH 433 + | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE 434 + | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 434 435 435 436 omapdss_display_init(dssdev); 436 437 omapdss_device_register(dssdev);
+2 -2
drivers/gpu/drm/omapdrm/dss/dsi.c
··· 5127 5127 out->ops = &dsi_ops; 5128 5128 out->owner = THIS_MODULE; 5129 5129 out->of_ports = BIT(0); 5130 - out->bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE 5130 + out->bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE 5131 5131 | DRM_BUS_FLAG_DE_HIGH 5132 - | DRM_BUS_FLAG_SYNC_NEGEDGE; 5132 + | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE; 5133 5133 5134 5134 r = omapdss_device_init_output(out); 5135 5135 if (r < 0)
+2 -2
drivers/gpu/drm/omapdrm/dss/sdi.c
··· 279 279 out->of_ports = BIT(1); 280 280 out->ops = &sdi_ops; 281 281 out->owner = THIS_MODULE; 282 - out->bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE /* 15.5.9.1.2 */ 283 - | DRM_BUS_FLAG_SYNC_POSEDGE; 282 + out->bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE /* 15.5.9.1.2 */ 283 + | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE; 284 284 285 285 r = omapdss_device_init_output(out); 286 286 if (r < 0)
+4 -4
drivers/gpu/drm/omapdrm/omap_encoder.c
··· 114 114 115 115 if (!(vm.flags & (DISPLAY_FLAGS_PIXDATA_POSEDGE | 116 116 DISPLAY_FLAGS_PIXDATA_NEGEDGE))) { 117 - if (bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE) 117 + if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE) 118 118 vm.flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE; 119 - else if (bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE) 119 + else if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) 120 120 vm.flags |= DISPLAY_FLAGS_PIXDATA_NEGEDGE; 121 121 } 122 122 123 123 if (!(vm.flags & (DISPLAY_FLAGS_SYNC_POSEDGE | 124 124 DISPLAY_FLAGS_SYNC_NEGEDGE))) { 125 - if (bus_flags & DRM_BUS_FLAG_SYNC_POSEDGE) 125 + if (bus_flags & DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE) 126 126 vm.flags |= DISPLAY_FLAGS_SYNC_POSEDGE; 127 - else if (bus_flags & DRM_BUS_FLAG_SYNC_NEGEDGE) 127 + else if (bus_flags & DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE) 128 128 vm.flags |= DISPLAY_FLAGS_SYNC_NEGEDGE; 129 129 } 130 130 }
+2 -2
drivers/gpu/drm/panel/panel-arm-versatile.c
··· 191 191 .vrefresh = 390, 192 192 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 193 193 }, 194 - .bus_flags = DRM_BUS_FLAG_PIXDATA_NEGEDGE, 194 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, 195 195 }, 196 196 /* 197 197 * Sanyo ALR252RGT 240x320 portrait display found on the ··· 215 215 .vrefresh = 116, 216 216 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, 217 217 }, 218 - .bus_flags = DRM_BUS_FLAG_PIXDATA_NEGEDGE, 218 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, 219 219 .ib2 = true, 220 220 }, 221 221 };
+2 -2
drivers/gpu/drm/panel/panel-ilitek-ili9322.c
··· 412 412 if (ili->conf->dclk_active_high) { 413 413 reg = ILI9322_POL_DCLK; 414 414 connector->display_info.bus_flags |= 415 - DRM_BUS_FLAG_PIXDATA_POSEDGE; 415 + DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 416 416 } else { 417 417 reg = 0; 418 418 connector->display_info.bus_flags |= 419 - DRM_BUS_FLAG_PIXDATA_NEGEDGE; 419 + DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 420 420 } 421 421 if (ili->conf->de_active_high) { 422 422 reg |= ILI9322_POL_DE;
+1 -1
drivers/gpu/drm/panel/panel-seiko-43wvf1g.c
··· 328 328 .height = 57, 329 329 }, 330 330 .bus_format = MEDIA_BUS_FMT_RGB888_1X24, 331 - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE, 331 + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, 332 332 }; 333 333 334 334 static const struct of_device_id platform_of_match[] = {
+12 -12
drivers/gpu/drm/panel/panel-simple.c
··· 914 914 .width = 95, 915 915 .height = 54, 916 916 }, 917 - .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, 917 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 918 918 }; 919 919 920 920 static const struct drm_display_mode cdtech_s070wv95_ct16_mode = { ··· 1034 1034 .height = 91, 1035 1035 }, 1036 1036 .bus_format = MEDIA_BUS_FMT_RGB888_1X24, 1037 - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE, 1037 + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 1038 1038 }; 1039 1039 1040 1040 static const struct display_timing dlc_dlc0700yzg_1_timing = { ··· 1119 1119 .height = 86, 1120 1120 }, 1121 1121 .bus_format = MEDIA_BUS_FMT_RGB666_1X18, 1122 - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE, 1122 + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, 1123 1123 }; 1124 1124 1125 1125 static const struct drm_display_mode edt_etm0700g0dh6_mode = { ··· 1145 1145 .height = 91, 1146 1146 }, 1147 1147 .bus_format = MEDIA_BUS_FMT_RGB666_1X18, 1148 - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE, 1148 + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, 1149 1149 }; 1150 1150 1151 1151 static const struct panel_desc edt_etm0700g0bdh6 = { ··· 1157 1157 .height = 91, 1158 1158 }, 1159 1159 .bus_format = MEDIA_BUS_FMT_RGB666_1X18, 1160 - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE, 1160 + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 1161 1161 }; 1162 1162 1163 1163 static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = { ··· 1311 1311 .height = 54, 1312 1312 }, 1313 1313 .bus_format = MEDIA_BUS_FMT_RGB888_1X24, 1314 - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE, 1314 + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 1315 1315 }; 1316 1316 1317 1317 static const struct drm_display_mode innolux_at070tn92_mode = { ··· 1818 1818 .height = 54, 1819 1819 }, 1820 1820 .bus_format = MEDIA_BUS_FMT_RGB888_1X24, 1821 - .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, 1821 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 1822 1822 }; 1823 1823 1824 1824 static const struct drm_display_mode netron_dy_e231732_mode = { ··· 1867 1867 .height = 54, 1868 1868 }, 1869 1869 .bus_format = MEDIA_BUS_FMT_RGB888_1X24, 1870 - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE | 1871 - DRM_BUS_FLAG_SYNC_POSEDGE, 1870 + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE | 1871 + DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE, 1872 1872 }; 1873 1873 1874 1874 static const struct display_timing nlt_nl192108ac18_02d_timing = { ··· 2029 2029 .height = 93, 2030 2030 }, 2031 2031 .bus_format = MEDIA_BUS_FMT_RGB888_1X24, 2032 - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE, 2032 + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 2033 2033 }; 2034 2034 2035 2035 static const struct drm_display_mode pda_91_00156_a0_mode = { ··· 2398 2398 .height = 116, 2399 2399 }, 2400 2400 .bus_format = MEDIA_BUS_FMT_RGB888_1X24, 2401 - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE, 2401 + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 2402 2402 }; 2403 2403 2404 2404 static const struct drm_display_mode tpk_f07a_0102_mode = { ··· 2421 2421 .width = 152, 2422 2422 .height = 91, 2423 2423 }, 2424 - .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, 2424 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 2425 2425 }; 2426 2426 2427 2427 static const struct drm_display_mode tpk_f10a_0102_mode = {
+5 -5
drivers/gpu/drm/panel/panel-tpo-tpg110.c
··· 118 118 .vtotal = 480 + 10 + 1 + 35, 119 119 .vrefresh = 60, 120 120 }, 121 - .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, 121 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 122 122 }, 123 123 { 124 124 .name = "640x480 RGB", ··· 135 135 .vtotal = 480 + 18 + 1 + 27, 136 136 .vrefresh = 60, 137 137 }, 138 - .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, 138 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 139 139 }, 140 140 { 141 141 .name = "480x272 RGB", ··· 152 152 .vtotal = 272 + 2 + 1 + 12, 153 153 .vrefresh = 60, 154 154 }, 155 - .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, 155 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 156 156 }, 157 157 { 158 158 .name = "480x640 RGB", ··· 169 169 .vtotal = 640 + 4 + 1 + 8, 170 170 .vrefresh = 60, 171 171 }, 172 - .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, 172 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 173 173 }, 174 174 { 175 175 .name = "400x240 RGB", ··· 186 186 .vtotal = 240 + 2 + 1 + 20, 187 187 .vrefresh = 60, 188 188 }, 189 - .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, 189 + .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, 190 190 }, 191 191 }; 192 192
+1 -1
drivers/gpu/drm/pl111/pl111_display.c
··· 188 188 tim2 |= TIM2_IOE; 189 189 190 190 if (connector->display_info.bus_flags & 191 - DRM_BUS_FLAG_PIXDATA_NEGEDGE) 191 + DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) 192 192 tim2 |= TIM2_IPC; 193 193 } 194 194
+2 -2
drivers/gpu/drm/sun4i/sun4i_tcon.c
··· 561 561 * Following code is a way to avoid quirks all around TCON 562 562 * and DOTCLOCK drivers. 563 563 */ 564 - if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE) 564 + if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE) 565 565 clk_set_phase(tcon->dclk, 240); 566 566 567 - if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE) 567 + if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) 568 568 clk_set_phase(tcon->dclk, 0); 569 569 570 570 regmap_update_bits(tcon->regs, SUN4I_TCON0_IO_POL_REG,
+2 -1
drivers/gpu/drm/tve200/tve200_display.c
··· 149 149 /* Vsync IRQ at start of Vsync at first */ 150 150 ctrl1 |= TVE200_VSTSTYPE_VSYNC; 151 151 152 - if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE) 152 + if (connector->display_info.bus_flags & 153 + DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) 153 154 ctrl1 |= TVE200_CTRL_TVCLKP; 154 155 155 156 if ((mode->hdisplay == 352 && mode->vdisplay == 240) || /* SIF(525) */
+5 -4
include/drm/drm_bridge.h
··· 246 246 /** 247 247 * @sampling_edge: 248 248 * 249 - * Tells whether the bridge samples the digital input signal 250 - * from the display engine on the positive or negative edge of the 251 - * clock, this should reuse the DRM_BUS_FLAG_PIXDATA_[POS|NEG]EDGE 252 - * bitwise flags from the DRM connector (bit 2 and 3 valid). 249 + * Tells whether the bridge samples the digital input signals from the 250 + * display engine on the positive or negative edge of the clock. This 251 + * should use the DRM_BUS_FLAG_PIXDATA_SAMPLE_[POS|NEG]EDGE and 252 + * DRM_BUS_FLAG_SYNC_SAMPLE_[POS|NEG]EDGE bitwise flags from the DRM 253 + * connector (bit 2, 3, 6 and 7 valid). 253 254 */ 254 255 u32 sampling_edge; 255 256 /**