Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

mmc: wmt-sdmmc: Fix settting BM_EIGHTBIT_MODE bit in wmt_mci_set_ios()

For MMC_BUS_WIDTH_8 case, current code missed setting BM_EIGHTBIT_MODE bit.
Also has a small refactor to make the code looks better in readability.

So the bit settings witch below logic:

SDMMC_BUSMODE register:
Set EIGHTBIT_MODE bit for 8 bit mode, Set FOURBIT_MODE bit for 4 bit mode.
Clear both EIGHTBIT_MODE and FOURBIT_MODE bits for 1 bit mode.

SDMMC_EXTCTRL register:
Set EXT_EIGHTBIT bit for 8 bit mode, Clear EXT_EIGHTBIT bit for 1/4 bit mode.

Add define for EXT_EIGHTBIT to avoid using magic number.
BM_ONEBIT_MASK is no longer used, thus remove it.

This patch is untested due to lack of platform with 8-bit hardware.
However since the code is there, it's good to make the code match the document.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

authored by

Axel Lin and committed by
Ulf Hansson
889c9e04 5e863662

+15 -16
+15 -16
drivers/mmc/host/wmt-sdmmc.c
··· 72 72 #define BM_SPI_CS 0x20 73 73 #define BM_SD_POWER 0x40 74 74 #define BM_SOFT_RESET 0x80 75 - #define BM_ONEBIT_MASK 0xFD 76 75 77 76 /* SDMMC_BLKLEN bit fields */ 78 77 #define BLKL_CRCERR_ABORT 0x0800 ··· 119 120 #define STS2_DATARSP_BUSY 0x20 120 121 #define STS2_DIS_FORCECLK 0x80 121 122 123 + /* SDMMC_EXTCTRL bit fields */ 124 + #define EXT_EIGHTBIT 0x04 122 125 123 126 /* MMC/SD DMA Controller Registers */ 124 127 #define SDDMA_GCR 0x100 ··· 673 672 static void wmt_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 674 673 { 675 674 struct wmt_mci_priv *priv; 676 - u32 reg_tmp; 675 + u32 busmode, extctrl; 677 676 678 677 priv = mmc_priv(mmc); 679 678 ··· 688 687 if (ios->clock != 0) 689 688 clk_set_rate(priv->clk_sdmmc, ios->clock); 690 689 690 + busmode = readb(priv->sdmmc_base + SDMMC_BUSMODE); 691 + extctrl = readb(priv->sdmmc_base + SDMMC_EXTCTRL); 692 + 693 + busmode &= ~(BM_EIGHTBIT_MODE | BM_FOURBIT_MODE); 694 + extctrl &= ~EXT_EIGHTBIT; 695 + 691 696 switch (ios->bus_width) { 692 697 case MMC_BUS_WIDTH_8: 693 - reg_tmp = readb(priv->sdmmc_base + SDMMC_EXTCTRL); 694 - writeb(reg_tmp | 0x04, priv->sdmmc_base + SDMMC_EXTCTRL); 698 + busmode |= BM_EIGHTBIT_MODE; 699 + extctrl |= EXT_EIGHTBIT; 695 700 break; 696 701 case MMC_BUS_WIDTH_4: 697 - reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); 698 - writeb(reg_tmp | BM_FOURBIT_MODE, priv->sdmmc_base + 699 - SDMMC_BUSMODE); 700 - 701 - reg_tmp = readb(priv->sdmmc_base + SDMMC_EXTCTRL); 702 - writeb(reg_tmp & 0xFB, priv->sdmmc_base + SDMMC_EXTCTRL); 702 + busmode |= BM_FOURBIT_MODE; 703 703 break; 704 704 case MMC_BUS_WIDTH_1: 705 - reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); 706 - writeb(reg_tmp & BM_ONEBIT_MASK, priv->sdmmc_base + 707 - SDMMC_BUSMODE); 708 - 709 - reg_tmp = readb(priv->sdmmc_base + SDMMC_EXTCTRL); 710 - writeb(reg_tmp & 0xFB, priv->sdmmc_base + SDMMC_EXTCTRL); 711 705 break; 712 706 } 707 + 708 + writeb(busmode, priv->sdmmc_base + SDMMC_BUSMODE); 709 + writeb(extctrl, priv->sdmmc_base + SDMMC_EXTCTRL); 713 710 } 714 711 715 712 static int wmt_mci_get_ro(struct mmc_host *mmc)