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linux
drm/amdgpu/mes10.1: add ip block mes10.1 (v2)
MES takes over the scheduling capability of GFX and SDMA,
add MES as a standalone ip.
v2: squash in updates (Alex)
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Jack Xiao
and committed by
Alex Deucher
886f82aa
5f84cc63
+138
-1
+4
drivers/gpu/drm/amd/amdgpu/Makefile
+4
drivers/gpu/drm/amd/amdgpu/Makefile
+103
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
+103
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
···
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/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "amdgpu.h"
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static int mes_v10_1_add_hw_queue(struct amdgpu_mes *mes,
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struct mes_add_queue_input *input)
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{
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return 0;
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}
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static int mes_v10_1_remove_hw_queue(struct amdgpu_mes *mes,
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struct mes_remove_queue_input *input)
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{
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return 0;
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}
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static int mes_v10_1_suspend_gang(struct amdgpu_mes *mes,
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struct mes_suspend_gang_input *input)
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{
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return 0;
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}
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static int mes_v10_1_resume_gang(struct amdgpu_mes *mes,
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struct mes_resume_gang_input *input)
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{
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return 0;
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}
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static const struct amdgpu_mes_funcs mes_v10_1_funcs = {
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.add_hw_queue = mes_v10_1_add_hw_queue,
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.remove_hw_queue = mes_v10_1_remove_hw_queue,
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.suspend_gang = mes_v10_1_suspend_gang,
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.resume_gang = mes_v10_1_resume_gang,
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};
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static int mes_v10_1_sw_init(void *handle)
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{
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return 0;
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}
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static int mes_v10_1_sw_fini(void *handle)
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{
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return 0;
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}
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static int mes_v10_1_hw_init(void *handle)
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{
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return 0;
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}
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static int mes_v10_1_hw_fini(void *handle)
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{
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return 0;
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}
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static int mes_v10_1_suspend(void *handle)
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{
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return 0;
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}
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static int mes_v10_1_resume(void *handle)
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{
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return 0;
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}
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static const struct amd_ip_funcs mes_v10_1_ip_funcs = {
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.name = "mes_v10_1",
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.sw_init = mes_v10_1_sw_init,
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.sw_fini = mes_v10_1_sw_fini,
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.hw_init = mes_v10_1_hw_init,
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.hw_fini = mes_v10_1_hw_fini,
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.suspend = mes_v10_1_suspend,
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.resume = mes_v10_1_resume,
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};
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const struct amdgpu_ip_block_version mes_v10_1_ip_block = {
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.type = AMD_IP_BLOCK_TYPE_MES,
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.major = 10,
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.minor = 1,
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.rev = 0,
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.funcs = &mes_v10_1_ip_funcs,
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};
+29
drivers/gpu/drm/amd/amdgpu/mes_v10_1.h
+29
drivers/gpu/drm/amd/amdgpu/mes_v10_1.h
···
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/*
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+
* Copyright 2019 Advanced Micro Devices, Inc.
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+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
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+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
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+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
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+
*
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*/
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#ifndef __MES_V10_1_H__
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#define __MES_v10_1_H__
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extern const struct amdgpu_ip_block_version mes_v10_1_ip_block;
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#endif