Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

net: stmmac: remove pcs_get_adv_lp() support

It appears that the GMAC_ANE_ADV and GMAC_ANE_LPA registers are only
available for TBI and RTBI PHY interfaces. In commit 482b3c3ba757
("net: stmmac: Drop TBI/RTBI PCS flags") support for these was dropped,
and thus it no longer makes sense to access these registers.

Remove the *_get_adv_lp() functions, and the now redundant struct
rgmii_adv and STMMAC_PCS_* definitions.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Link: https://patch.msgid.link/E1uPkbT-004EyG-OQ@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Russell King (Oracle) and committed by
Jakub Kicinski
883af789 3cfbde04

+4 -104
-11
drivers/net/ethernet/stmicro/stmmac/common.h
··· 396 396 397 397 #define CORE_IRQ_MTL_RX_OVERFLOW BIT(8) 398 398 399 - /* Physical Coding Sublayer */ 400 - struct rgmii_adv { 401 - unsigned int pause; 402 - unsigned int duplex; 403 - unsigned int lp_pause; 404 - unsigned int lp_duplex; 405 - }; 406 - 407 - #define STMMAC_PCS_PAUSE 1 408 - #define STMMAC_PCS_ASYM_PAUSE 2 409 - 410 399 /* DMA HW capabilities */ 411 400 struct dma_features { 412 401 unsigned int mbps_10_100;
-6
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
··· 399 399 dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback); 400 400 } 401 401 402 - static void dwmac1000_get_adv_lp(void __iomem *ioaddr, struct rgmii_adv *adv) 403 - { 404 - dwmac_get_adv_lp(ioaddr, GMAC_PCS_BASE, adv); 405 - } 406 - 407 402 static void dwmac1000_debug(struct stmmac_priv *priv, void __iomem *ioaddr, 408 403 struct stmmac_extra_stats *x, 409 404 u32 rx_queues, u32 tx_queues) ··· 503 508 .set_eee_pls = dwmac1000_set_eee_pls, 504 509 .debug = dwmac1000_debug, 505 510 .pcs_ctrl_ane = dwmac1000_ctrl_ane, 506 - .pcs_get_adv_lp = dwmac1000_get_adv_lp, 507 511 .set_mac_loopback = dwmac1000_set_mac_loopback, 508 512 }; 509 513
-8
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
··· 589 589 dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback); 590 590 } 591 591 592 - static void dwmac4_get_adv_lp(void __iomem *ioaddr, struct rgmii_adv *adv) 593 - { 594 - dwmac_get_adv_lp(ioaddr, GMAC_PCS_BASE, adv); 595 - } 596 - 597 592 /* RGMII or SMII interface */ 598 593 static void dwmac4_phystatus(void __iomem *ioaddr, struct stmmac_extra_stats *x) 599 594 { ··· 953 958 .set_eee_timer = dwmac4_set_eee_timer, 954 959 .set_eee_pls = dwmac4_set_eee_pls, 955 960 .pcs_ctrl_ane = dwmac4_ctrl_ane, 956 - .pcs_get_adv_lp = dwmac4_get_adv_lp, 957 961 .debug = dwmac4_debug, 958 962 .set_filter = dwmac4_set_filter, 959 963 .set_mac_loopback = dwmac4_set_mac_loopback, ··· 987 993 .set_eee_timer = dwmac4_set_eee_timer, 988 994 .set_eee_pls = dwmac4_set_eee_pls, 989 995 .pcs_ctrl_ane = dwmac4_ctrl_ane, 990 - .pcs_get_adv_lp = dwmac4_get_adv_lp, 991 996 .debug = dwmac4_debug, 992 997 .set_filter = dwmac4_set_filter, 993 998 .flex_pps_config = dwmac5_flex_pps_config, ··· 1023 1030 .set_eee_timer = dwmac4_set_eee_timer, 1024 1031 .set_eee_pls = dwmac4_set_eee_pls, 1025 1032 .pcs_ctrl_ane = dwmac4_ctrl_ane, 1026 - .pcs_get_adv_lp = dwmac4_get_adv_lp, 1027 1033 .debug = dwmac4_debug, 1028 1034 .set_filter = dwmac4_set_filter, 1029 1035 .safety_feat_config = dwmac5_safety_feat_config,
-4
drivers/net/ethernet/stmicro/stmmac/hwif.h
··· 300 300 301 301 struct mac_device_info; 302 302 struct net_device; 303 - struct rgmii_adv; 304 303 struct stmmac_tc_entry; 305 304 struct stmmac_pps_cfg; 306 305 struct stmmac_rss; ··· 376 377 /* PCS calls */ 377 378 void (*pcs_ctrl_ane)(void __iomem *ioaddr, bool ane, bool srgmi_ral, 378 379 bool loopback); 379 - void (*pcs_get_adv_lp)(void __iomem *ioaddr, struct rgmii_adv *adv); 380 380 /* Safety Features */ 381 381 int (*safety_feat_config)(void __iomem *ioaddr, unsigned int asp, 382 382 struct stmmac_safety_feature_cfg *safety_cfg); ··· 465 467 stmmac_do_void_callback(__priv, mac, debug, __priv, __args) 466 468 #define stmmac_pcs_ctrl_ane(__priv, __args...) \ 467 469 stmmac_do_void_callback(__priv, mac, pcs_ctrl_ane, __args) 468 - #define stmmac_pcs_get_adv_lp(__priv, __args...) \ 469 - stmmac_do_void_callback(__priv, mac, pcs_get_adv_lp, __args) 470 470 #define stmmac_safety_feat_config(__priv, __args...) \ 471 471 stmmac_do_callback(__priv, mac, safety_feat_config, __args) 472 472 #define stmmac_safety_feat_irq_status(__priv, __args...) \
+2 -45
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
··· 325 325 if (!(priv->plat->flags & STMMAC_FLAG_HAS_INTEGRATED_PCS) && 326 326 (priv->hw->pcs & STMMAC_PCS_RGMII || 327 327 priv->hw->pcs & STMMAC_PCS_SGMII)) { 328 - struct rgmii_adv adv; 329 328 u32 supported, advertising, lp_advertising; 330 329 331 330 if (!priv->xstats.pcs_link) { ··· 336 337 337 338 cmd->base.speed = priv->xstats.pcs_speed; 338 339 339 - /* Get and convert ADV/LP_ADV from the HW AN registers */ 340 - if (stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv)) 341 - return -EOPNOTSUPP; /* should never happen indeed */ 342 - 343 340 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */ 344 341 345 342 ethtool_convert_link_mode_to_legacy_u32( ··· 345 350 ethtool_convert_link_mode_to_legacy_u32( 346 351 &lp_advertising, cmd->link_modes.lp_advertising); 347 352 348 - if (adv.pause & STMMAC_PCS_PAUSE) 349 - advertising |= ADVERTISED_Pause; 350 - if (adv.pause & STMMAC_PCS_ASYM_PAUSE) 351 - advertising |= ADVERTISED_Asym_Pause; 352 - if (adv.lp_pause & STMMAC_PCS_PAUSE) 353 - lp_advertising |= ADVERTISED_Pause; 354 - if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE) 355 - lp_advertising |= ADVERTISED_Asym_Pause; 356 - 357 353 /* Reg49[3] always set because ANE is always supported */ 358 354 cmd->base.autoneg = ADVERTISED_Autoneg; 359 355 supported |= SUPPORTED_Autoneg; 360 356 advertising |= ADVERTISED_Autoneg; 361 357 lp_advertising |= ADVERTISED_Autoneg; 362 358 363 - if (adv.duplex) { 364 - supported |= (SUPPORTED_1000baseT_Full | 365 - SUPPORTED_100baseT_Full | 366 - SUPPORTED_10baseT_Full); 367 - advertising |= (ADVERTISED_1000baseT_Full | 368 - ADVERTISED_100baseT_Full | 369 - ADVERTISED_10baseT_Full); 370 - } else { 371 - supported |= (SUPPORTED_1000baseT_Half | 372 - SUPPORTED_100baseT_Half | 373 - SUPPORTED_10baseT_Half); 374 - advertising |= (ADVERTISED_1000baseT_Half | 375 - ADVERTISED_100baseT_Half | 376 - ADVERTISED_10baseT_Half); 377 - } 378 - if (adv.lp_duplex) 379 - lp_advertising |= (ADVERTISED_1000baseT_Full | 380 - ADVERTISED_100baseT_Full | 381 - ADVERTISED_10baseT_Full); 382 - else 383 - lp_advertising |= (ADVERTISED_1000baseT_Half | 384 - ADVERTISED_100baseT_Half | 385 - ADVERTISED_10baseT_Half); 386 359 cmd->base.port = PORT_OTHER; 387 360 388 361 ethtool_convert_legacy_u32_to_link_mode( ··· 478 515 struct ethtool_pauseparam *pause) 479 516 { 480 517 struct stmmac_priv *priv = netdev_priv(netdev); 481 - struct rgmii_adv adv_lp; 482 518 483 - if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) { 519 + if (priv->hw->pcs) { 484 520 pause->autoneg = 1; 485 - if (!adv_lp.pause) 486 - return; 487 521 } else { 488 522 phylink_ethtool_get_pauseparam(priv->phylink, pause); 489 523 } ··· 491 531 struct ethtool_pauseparam *pause) 492 532 { 493 533 struct stmmac_priv *priv = netdev_priv(netdev); 494 - struct rgmii_adv adv_lp; 495 534 496 - if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) { 535 + if (priv->hw->pcs) { 497 536 pause->autoneg = 1; 498 - if (!adv_lp.pause) 499 - return -EOPNOTSUPP; 500 537 return 0; 501 538 } else { 502 539 return phylink_ethtool_set_pauseparam(priv->phylink, pause);
+2 -30
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
··· 16 16 /* PCS registers (AN/TBI/SGMII/RGMII) offsets */ 17 17 #define GMAC_AN_CTRL(x) (x) /* AN control */ 18 18 #define GMAC_AN_STATUS(x) (x + 0x4) /* AN status */ 19 + 20 + /* ADV, LPA and EXP are only available for the TBI and RTBI interfaces */ 19 21 #define GMAC_ANE_ADV(x) (x + 0x8) /* ANE Advertisement */ 20 22 #define GMAC_ANE_LPA(x) (x + 0xc) /* ANE link partener ability */ 21 23 #define GMAC_ANE_EXP(x) (x + 0x10) /* ANE expansion */ ··· 108 106 value |= GMAC_AN_CTRL_ELE; 109 107 110 108 writel(value, ioaddr + GMAC_AN_CTRL(reg)); 111 - } 112 - 113 - /** 114 - * dwmac_get_adv_lp - Get ADV and LP cap 115 - * @ioaddr: IO registers pointer 116 - * @reg: Base address of the AN Control Register. 117 - * @adv_lp: structure to store the adv,lp status 118 - * Description: this is to expose the ANE advertisement and Link partner ability 119 - * status to ethtool support. 120 - */ 121 - static inline void dwmac_get_adv_lp(void __iomem *ioaddr, u32 reg, 122 - struct rgmii_adv *adv_lp) 123 - { 124 - u32 value = readl(ioaddr + GMAC_ANE_ADV(reg)); 125 - 126 - if (value & GMAC_ANE_FD) 127 - adv_lp->duplex = DUPLEX_FULL; 128 - if (value & GMAC_ANE_HD) 129 - adv_lp->duplex |= DUPLEX_HALF; 130 - 131 - adv_lp->pause = (value & GMAC_ANE_PSE) >> GMAC_ANE_PSE_SHIFT; 132 - 133 - value = readl(ioaddr + GMAC_ANE_LPA(reg)); 134 - 135 - if (value & GMAC_ANE_FD) 136 - adv_lp->lp_duplex = DUPLEX_FULL; 137 - if (value & GMAC_ANE_HD) 138 - adv_lp->lp_duplex = DUPLEX_HALF; 139 - 140 - adv_lp->lp_pause = (value & GMAC_ANE_PSE) >> GMAC_ANE_PSE_SHIFT; 141 109 } 142 110 #endif /* __STMMAC_PCS_H__ */