tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

x86/cpu: Fix Gracemont uarch

Alderlake N is an E-core only product using Gracemont
micro-architecture. It fits the pre-existing naming scheme perfectly
fine, adhere to it.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20230807150405.686834933@infradead.org

Peter Zijlstra 882cdb06 62af0322

+19 -18
+1 -1
arch/x86/events/intel/core.c
··· 6167 6167 name = "Tremont"; 6168 6168 break; 6169 6169 6170 - case INTEL_FAM6_ALDERLAKE_N: 6170 + case INTEL_FAM6_ATOM_GRACEMONT: 6171 6171 x86_pmu.mid_ack = true; 6172 6172 memcpy(hw_cache_event_ids, glp_hw_cache_event_ids, 6173 6173 sizeof(hw_cache_event_ids));
+1 -1
arch/x86/events/intel/cstate.c
··· 669 669 X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates), 670 670 X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates), 671 671 X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates), 672 + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_cstates), 672 673 673 674 X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates), 674 675 X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates), ··· 685 684 X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &icl_cstates), 686 685 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_cstates), 687 686 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_cstates), 688 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_cstates), 689 687 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_cstates), 690 688 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_cstates), 691 689 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_cstates),
+1 -1
arch/x86/events/intel/uncore.c
··· 1858 1858 X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rkl_uncore_init), 1859 1859 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_uncore_init), 1860 1860 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_uncore_init), 1861 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_uncore_init), 1862 1861 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_uncore_init), 1863 1862 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_uncore_init), 1864 1863 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_uncore_init), ··· 1866 1867 X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &spr_uncore_init), 1867 1868 X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &spr_uncore_init), 1868 1869 X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &snr_uncore_init), 1870 + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_uncore_init), 1869 1871 {}, 1870 1872 }; 1871 1873 MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);
+1 -1
arch/x86/events/msr.c
··· 106 106 case INTEL_FAM6_ROCKETLAKE: 107 107 case INTEL_FAM6_ALDERLAKE: 108 108 case INTEL_FAM6_ALDERLAKE_L: 109 - case INTEL_FAM6_ALDERLAKE_N: 109 + case INTEL_FAM6_ATOM_GRACEMONT: 110 110 case INTEL_FAM6_RAPTORLAKE: 111 111 case INTEL_FAM6_RAPTORLAKE_P: 112 112 case INTEL_FAM6_RAPTORLAKE_S:
+1 -1
arch/x86/events/rapl.c
··· 804 804 X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &model_skl), 805 805 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &model_skl), 806 806 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &model_skl), 807 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &model_skl), 807 + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &model_skl), 808 808 X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &model_spr), 809 809 X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &model_spr), 810 810 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &model_skl),
+2 -1
arch/x86/include/asm/intel-family.h
··· 114 114 115 115 #define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */ 116 116 #define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */ 117 - #define INTEL_FAM6_ALDERLAKE_N 0xBE 118 117 119 118 #define INTEL_FAM6_RAPTORLAKE 0xB7 120 119 #define INTEL_FAM6_RAPTORLAKE_P 0xBA ··· 152 153 #define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */ 153 154 #define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */ 154 155 #define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */ 156 + 157 + #define INTEL_FAM6_ATOM_GRACEMONT 0xBE /* Alderlake N */ 155 158 156 159 #define INTEL_FAM6_SIERRAFOREST_X 0xAF 157 160
+1 -1
arch/x86/kernel/cpu/intel_epb.c
··· 206 206 static const struct x86_cpu_id intel_epb_normal[] = { 207 207 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, 208 208 ENERGY_PERF_BIAS_NORMAL_POWERSAVE), 209 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, 209 + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, 210 210 ENERGY_PERF_BIAS_NORMAL_POWERSAVE), 211 211 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, 212 212 ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
+1 -1
arch/x86/mm/init.c
··· 273 273 static const struct x86_cpu_id invlpg_miss_ids[] = { 274 274 INTEL_MATCH(INTEL_FAM6_ALDERLAKE ), 275 275 INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ), 276 - INTEL_MATCH(INTEL_FAM6_ALDERLAKE_N ), 276 + INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT ), 277 277 INTEL_MATCH(INTEL_FAM6_RAPTORLAKE ), 278 278 INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P), 279 279 INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),
+5 -5
drivers/idle/intel_idle.c
··· 960 960 .enter = NULL } 961 961 }; 962 962 963 - static struct cpuidle_state adl_n_cstates[] __initdata = { 963 + static struct cpuidle_state gmt_cstates[] __initdata = { 964 964 { 965 965 .name = "C1", 966 966 .desc = "MWAIT 0x00", ··· 1405 1405 .state_table = adl_l_cstates, 1406 1406 }; 1407 1407 1408 - static const struct idle_cpu idle_cpu_adl_n __initconst = { 1409 - .state_table = adl_n_cstates, 1408 + static const struct idle_cpu idle_cpu_gmt __initconst = { 1409 + .state_table = gmt_cstates, 1410 1410 }; 1411 1411 1412 1412 static const struct idle_cpu idle_cpu_spr __initconst = { ··· 1479 1479 X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &idle_cpu_icx), 1480 1480 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &idle_cpu_adl), 1481 1481 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &idle_cpu_adl_l), 1482 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &idle_cpu_adl_n), 1482 + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &idle_cpu_gmt), 1483 1483 X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &idle_cpu_spr), 1484 1484 X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &idle_cpu_spr), 1485 1485 X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &idle_cpu_knl), ··· 1979 1979 break; 1980 1980 case INTEL_FAM6_ALDERLAKE: 1981 1981 case INTEL_FAM6_ALDERLAKE_L: 1982 - case INTEL_FAM6_ALDERLAKE_N: 1982 + case INTEL_FAM6_ATOM_GRACEMONT: 1983 1983 adl_idle_state_table_update(); 1984 1984 break; 1985 1985 }
+1 -1
drivers/platform/x86/intel/pmc/core.c
··· 1123 1123 X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, icl_core_init), 1124 1124 X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, tgl_core_init), 1125 1125 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, tgl_core_init), 1126 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, tgl_core_init), 1126 + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, tgl_core_init), 1127 1127 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, adl_core_init), 1128 1128 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, tgl_core_init), 1129 1129 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, adl_core_init),
+1 -1
drivers/powercap/intel_rapl_common.c
··· 1250 1250 X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rapl_defaults_core), 1251 1251 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &rapl_defaults_core), 1252 1252 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &rapl_defaults_core), 1253 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &rapl_defaults_core), 1253 + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &rapl_defaults_core), 1254 1254 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &rapl_defaults_core), 1255 1255 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &rapl_defaults_core), 1256 1256 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &rapl_defaults_core),
+1 -1
drivers/powercap/intel_rapl_msr.c
··· 141 141 X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL), 142 142 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL), 143 143 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL), 144 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, NULL), 144 + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL), 145 145 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL), 146 146 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL), 147 147 X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, NULL),
+1 -1
drivers/thermal/intel/intel_tcc_cooling.c
··· 60 60 X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, NULL), 61 61 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL), 62 62 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL), 63 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, NULL), 63 + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL), 64 64 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL), 65 65 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL), 66 66 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL),
+1 -1
tools/power/x86/turbostat/turbostat.c
··· 5447 5447 case INTEL_FAM6_LAKEFIELD: 5448 5448 case INTEL_FAM6_ALDERLAKE: 5449 5449 case INTEL_FAM6_ALDERLAKE_L: 5450 - case INTEL_FAM6_ALDERLAKE_N: 5450 + case INTEL_FAM6_ATOM_GRACEMONT: 5451 5451 case INTEL_FAM6_RAPTORLAKE: 5452 5452 case INTEL_FAM6_RAPTORLAKE_P: 5453 5453 case INTEL_FAM6_RAPTORLAKE_S: