perf tools: Just pr_debug() about not being able to read cacheline_size

So far the cacheline_size is only useful for the "dcacheline" --sort
order, i.e. if that is not used, which is the norm, then the user
shouldn't care that he is running this, say, on an Android system where
sysconf(_SC_LEVEL1_DCACHE_LINESIZE) and the
/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size sysfs file
isn't available.

An upcoming patch will emit an warning only for "--sort ...,dcacheline,...".

Cc: Adrian Hunter <[e-mail]>
Cc: Chris Phlipot <[e-mail]>
Cc: David Ahern <[e-mail]>
Cc: Jiri Olsa <[e-mail]>
Cc: Namhyung Kim <[e-mail]>
Cc: Wang Nan <[e-mail]>
Link: http://lkml.kernel.org/n/[e-mail]
Signed-off-by: Arnaldo Carvalho de Melo <[e-mail]>

tools/perf/perf.c

···
 static void cache_line_size(int *cacheline_sizep)
 {
 	if (sysfs__read_int("devices/system/cpu/cpu0/cache/index0/coherency_line_size", cacheline_sizep))
-		perror("cannot determine cache line size");
+		pr_debug("cannot determine cache line size");
 }
 #endif