tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'devicetree-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull DeviceTree updates from Rob Herring:
- update changeset documentation on locking to reflect current code
- fix alphabetizing of vendor-prefixes.txt
- add various vendor prefixes
- add ESP8089 WiFi binding
- add new variable sized array parsing functions
* tag 'devicetree-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (21 commits)
DT: irqchip: renesas-irqc: document R8A7743/5 support
dt-bindings: Add Keith&Koep vendor prefix
dt-bindings: add vendor prefix for Auvidea GmbH
of: Add vendor prefix for Engicam s.r.l company
devicetree: Add vendor-prefix for Silead Inc.
devicetree: bindings: Add vendor prefix for Topeet.
dt-bindings: Add summit vendor id
of/platform: Initialise dev->fwnode appropriately
of: Add array read functions with min/max size limits
of: Make of_find_property_value_of_size take a length range
dt: net: enhance DWC EQoS binding to support Tegra186
bindings: PCI: artpec: correct pci binding example
Documentation: devicetree: Fix max77693 spelling errors
dt: bindings: Add binding for ESP8089 wifi chips
PCI: Xilinx NWL PCIe: Updating device tree documentation with prefetchable memory space
Documentation: devicetree: spi: fix wrong spi-bus documentation
dt-bindings: Add Japan Display Inc vendor id
dt-bindings: vendor-prefixes: Add Sierra Wireless
devicetree: Add vendor prefix for Shenzhen Sunchip Technology Co., Ltd
devicetree: Sort vendor prefixes in alphabetical order
...
+423
-108
+3
-1
Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
+3
-1
Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
···
1
-
DT bindings for the R-Mobile/R-Car interrupt controller
1
+
DT bindings for the R-Mobile/R-Car/RZ/G interrupt controller
2
2
3
3
Required properties:
4
4
5
5
- compatible: has to be "renesas,irqc-<soctype>", "renesas,irqc" as fallback.
6
6
Examples with soctypes are:
7
7
- "renesas,irqc-r8a73a4" (R-Mobile APE6)
8
+
- "renesas,irqc-r8a7743" (RZ/G1M)
9
+
- "renesas,irqc-r8a7745" (RZ/G1E)
8
10
- "renesas,irqc-r8a7790" (R-Car H2)
9
11
- "renesas,irqc-r8a7791" (R-Car M2-W)
10
12
- "renesas,irqc-r8a7792" (R-Car V2H)
+6
-6
Documentation/devicetree/bindings/mfd/max77693.txt
+6
-6
Documentation/devicetree/bindings/mfd/max77693.txt
···
17
17
- interrupt-parent : The parent interrupt controller.
18
18
19
19
Optional properties:
20
-
- regulators : The regulators of max77693 have to be instantiated under subnod
20
+
- regulators : The regulators of max77693 have to be instantiated under subnode
21
21
named "regulators" using the following format.
22
22
23
23
regulators {
24
-
regualtor-compatible = ESAFEOUT1/ESAFEOUT2/CHARGER
25
-
standard regulator constratints[*].
24
+
regulator-compatible = ESAFEOUT1/ESAFEOUT2/CHARGER
25
+
standard regulator constraints[*].
26
26
};
27
27
28
28
[*] refer Documentation/devicetree/bindings/regulator/regulator.txt
29
29
30
30
- haptic : The MAX77693 haptic device utilises a PWM controlled motor to provide
31
31
users with tactile feedback. PWM period and duty-cycle are varied in
32
-
order to provide the approprite level of feedback.
32
+
order to provide the appropriate level of feedback.
33
33
34
34
Required properties:
35
-
- compatible : Must be "maxim,max77693-hpatic"
35
+
- compatible : Must be "maxim,max77693-haptic"
36
36
- haptic-supply : power supply for the haptic motor
37
37
[*] refer Documentation/devicetree/bindings/regulator/regulator.txt
38
38
- pwms : phandle to the physical PWM(Pulse Width Modulation) device.
39
39
PWM properties should be named "pwms". And number of cell is different
40
40
for each pwm device.
41
-
To get more informations, please refer to documentaion.
41
+
To get more information, please refer to documentation.
42
42
[*] refer Documentation/devicetree/bindings/pwm/pwm.txt
43
43
44
44
- charger : Node configuring the charger driver.
+95
-4
Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
+95
-4
Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
···
1
1
* Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
2
2
3
+
This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
4
+
IP block. The IP supports multiple options for bus type, clocking and reset
5
+
structure, and feature list. Consequently, a number of properties and list
6
+
entries in properties are marked as optional, or only required in specific HW
7
+
configurations.
3
8
4
9
Required properties:
5
-
- compatible: Should be "snps,dwc-qos-ethernet-4.10"
10
+
- compatible: One of:
11
+
- "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
12
+
Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
13
+
- "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
14
+
Represents the IP core when integrated into the NVIDIA Tegra186 SoC.
15
+
- "snps,dwc-qos-ethernet-4.10"
16
+
This combination is deprecated. It should be treated as equivalent to
17
+
"axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
18
+
compatible with earlier revisions of this binding.
6
19
- reg: Address and length of the register set for the device
7
-
- clocks: Phandles to the reference clock and the bus clock
8
-
- clock-names: Should be "phy_ref_clk" for the reference clock and "apb_pclk"
9
-
for the bus clock.
20
+
- clocks: Phandle and clock specifiers for each entry in clock-names, in the
21
+
same order. See ../clock/clock-bindings.txt.
22
+
- clock-names: May contain any/all of the following depending on the IP
23
+
configuration, in any order:
24
+
- "tx"
25
+
The EQOS transmit path clock. The HW signal name is clk_tx_i.
26
+
In some configurations (e.g. GMII/RGMII), this clock also drives the PHY TX
27
+
path. In other configurations, other clocks (such as tx_125, rmii) may
28
+
drive the PHY TX path.
29
+
- "rx"
30
+
The EQOS receive path clock. The HW signal name is clk_rx_i.
31
+
In some configurations (e.g. GMII/RGMII), this clock is derived from the
32
+
PHY's RX clock output. In other configurations, other clocks (such as
33
+
rx_125, rmii) may drive the EQOS RX path.
34
+
In cases where the PHY clock is directly fed into the EQOS receive path
35
+
without intervening logic, the DT need not represent this clock, since it
36
+
is assumed to be fully under the control of the PHY device/driver. In
37
+
cases where SoC integration adds additional logic to this path, such as a
38
+
SW-controlled clock gate, this clock should be represented in DT.
39
+
- "slave_bus"
40
+
The CPU/slave-bus (CSR) interface clock. This applies to any bus type;
41
+
APB, AHB, AXI, etc. The HW signal name is hclk_i (AHB) or clk_csr_i (other
42
+
buses).
43
+
- "master_bus"
44
+
The master bus interface clock. Only required in configurations that use a
45
+
separate clock for the master and slave bus interfaces. The HW signal name
46
+
is hclk_i (AHB) or aclk_i (AXI).
47
+
- "ptp_ref"
48
+
The PTP reference clock. The HW signal name is clk_ptp_ref_i.
49
+
- "phy_ref_clk"
50
+
This clock is deprecated and should not be used by new compatible values.
51
+
It is equivalent to "tx".
52
+
- "apb_pclk"
53
+
This clock is deprecated and should not be used by new compatible values.
54
+
It is equivalent to "slave_bus".
55
+
56
+
Note: Support for additional IP configurations may require adding the
57
+
following clocks to this list in the future: clk_rx_125_i, clk_tx_125_i,
58
+
clk_pmarx_0_i, clk_pmarx1_i, clk_rmii_i, clk_revmii_rx_i, clk_revmii_tx_i.
59
+
Configurations exist where multiple similar clocks are used at once, e.g. all
60
+
of clk_rx_125_i, clk_pmarx_0_i, clk_pmarx1_i. For this reason it is best to
61
+
extend the binding with a separate clock-names entry for each of those RX
62
+
clocks, rather than repurposing the existing "rx" clock-names entry as a
63
+
generic/logical clock in a similar fashion to "master_bus" and "slave_bus".
64
+
This will allow easy support for configurations that support multiple PHY
65
+
interfaces using a mux, and hence need to have explicit control over
66
+
specific RX clocks.
67
+
68
+
The following compatible values require the following set of clocks:
69
+
- "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10":
70
+
- "slave_bus"
71
+
- "master_bus"
72
+
- "rx"
73
+
- "tx"
74
+
- "ptp_ref"
75
+
- "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10":
76
+
- "slave_bus"
77
+
- "master_bus"
78
+
- "tx"
79
+
- "ptp_ref"
80
+
- "snps,dwc-qos-ethernet-4.10" (deprecated):
81
+
- "phy_ref_clk"
82
+
- "apb_clk"
10
83
- interrupt-parent: Should be the phandle for the interrupt controller
11
84
that services interrupts for this device
12
85
- interrupts: Should contain the core's combined interrupt signal
13
86
- phy-mode: See ethernet.txt file in the same directory
87
+
- resets: Phandle and reset specifiers for each entry in reset-names, in the
88
+
same order. See ../reset/reset.txt.
89
+
- reset-names: May contain any/all of the following depending on the IP
90
+
configuration, in any order:
91
+
- "eqos". The reset to the entire module. The HW signal name is hreset_n
92
+
(AHB) or aresetn_i (AXI).
93
+
94
+
The following compatible values require the following set of resets:
95
+
(the reset properties may be omitted if empty)
96
+
- "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10":
97
+
- "eqos".
98
+
- "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10":
99
+
- None.
100
+
- "snps,dwc-qos-ethernet-4.10" (deprecated):
101
+
- None.
14
102
15
103
Optional properties:
16
104
- dma-coherent: Present if dma operations are coherent
17
105
- mac-address: See ethernet.txt in the same directory
18
106
- local-mac-address: See ethernet.txt in the same directory
107
+
- phy-reset-gpios: Phandle and specifier for any GPIO used to reset the PHY.
108
+
See ../gpio/gpio.txt.
19
109
- snps,en-lpi: If present it enables use of the AXI low-power interface
20
110
- snps,write-requests: Number of write requests that the AXI port can issue.
21
111
It depends on the SoC configuration.
···
142
52
reg = <0x40010000 0x4000>;
143
53
phy-handle = <&phy2>;
144
54
phy-mode = "gmii";
55
+
phy-reset-gpios = <&gpioctlr 43 GPIO_ACTIVE_LOW>;
145
56
146
57
snps,en-tx-lpi-clockgating;
147
58
snps,en-lpi;
+31
Documentation/devicetree/bindings/net/wireless/esp,esp8089.txt
+31
Documentation/devicetree/bindings/net/wireless/esp,esp8089.txt
···
1
+
Espressif ESP8089 wireless SDIO devices
2
+
3
+
This node provides properties for controlling the ESP8089 wireless device.
4
+
The node is expected to be specified as a child node to the SDIO controller
5
+
that connects the device to the system.
6
+
7
+
Required properties:
8
+
9
+
- compatible : Should be "esp,esp8089".
10
+
11
+
Optional properties:
12
+
- esp,crystal-26M-en: Integer value for the crystal_26M_en firmware parameter
13
+
14
+
Example:
15
+
16
+
&mmc1 {
17
+
#address-cells = <1>;
18
+
#size-cells = <0>;
19
+
20
+
vmmc-supply = <®_dldo1>;
21
+
mmc-pwrseq = <&wifi_pwrseq>;
22
+
bus-width = <4>;
23
+
non-removable;
24
+
status = "okay";
25
+
26
+
esp8089: sdio_wifi@1 {
27
+
compatible = "esp,esp8089";
28
+
reg = <1>;
29
+
esp,crystal-26M-en = <2>;
30
+
};
31
+
};
+4
-3
Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
+4
-3
Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
···
24
24
compatible = "axis,artpec6-pcie", "snps,dw-pcie";
25
25
reg = <0xf8050000 0x2000
26
26
0xf8040000 0x1000
27
-
0xc0000000 0x1000>;
27
+
0xc0000000 0x2000>;
28
28
reg-names = "dbi", "phy", "config";
29
29
#address-cells = <3>;
30
30
#size-cells = <2>;
31
31
device_type = "pci";
32
32
/* downstream I/O */
33
-
ranges = <0x81000000 0 0x00010000 0xc0010000 0 0x00010000
33
+
ranges = <0x81000000 0 0 0xc0002000 0 0x00010000
34
34
/* non-prefetchable memory */
35
-
0x82000000 0 0xc0020000 0xc0020000 0 0x1ffe0000>;
35
+
0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>;
36
36
num-lanes = <2>;
37
+
bus-range = <0x00 0xff>;
37
38
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
38
39
interrupt-names = "msi";
39
40
#interrupt-cells = <1>;
+3
-2
Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt
+3
-2
Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt
···
55
55
msi-parent = <&nwl_pcie>;
56
56
reg = <0x0 0xfd0e0000 0x0 0x1000>,
57
57
<0x0 0xfd480000 0x0 0x1000>,
58
-
<0x0 0xe0000000 0x0 0x1000000>;
58
+
<0x80 0x00000000 0x0 0x1000000>;
59
59
reg-names = "breg", "pcireg", "cfg";
60
-
ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
60
+
ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
61
+
0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
61
62
62
63
pcie_intc: legacy-interrupt-controller {
63
64
interrupt-controller;
+1
-1
Documentation/devicetree/bindings/spi/spi-bus.txt
+1
-1
Documentation/devicetree/bindings/spi/spi-bus.txt
···
31
31
So if for example the controller has 2 CS lines, and the cs-gpios
32
32
property looks like this:
33
33
34
-
cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;
34
+
cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;
35
35
36
36
Then it should be configured so that num_chipselect = 4 with the
37
37
following mapping:
+22
-13
Documentation/devicetree/bindings/vendor-prefixes.txt
+22
-13
Documentation/devicetree/bindings/vendor-prefixes.txt
···
3
3
This isn't an exhaustive list, but you should add new prefixes to it before
4
4
using them to avoid name-space collisions.
5
5
6
-
abilis Abilis Systems
7
6
abcn Abracon Corporation
7
+
abilis Abilis Systems
8
8
active-semi Active-Semi International Inc
9
9
ad Avionic Design GmbH
10
10
adapteva Adapteva, Inc.
···
36
36
atlas Atlas Scientific LLC
37
37
atmel Atmel Corporation
38
38
auo AU Optronics Corporation
39
+
auvidea Auvidea GmbH
39
40
avago Avago Technologies
40
41
avic Shanghai AVIC Optoelectronics Co., Ltd.
41
42
axis Axis Communications AB
···
86
85
embest Shenzhen Embest Technology Co., Ltd.
87
86
emmicro EM Microelectronic
88
87
energymicro Silicon Laboratories (formerly Energy Micro AS)
88
+
engicam Engicam S.r.l.
89
89
epcos EPCOS AG
90
90
epfl Ecole Polytechnique Fédérale de Lausanne
91
91
epson Seiko Epson Corp.
···
103
101
fsl Freescale Semiconductor
104
102
ge General Electric Company
105
103
geekbuying GeekBuying
106
-
GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
107
104
gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
105
+
GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
108
106
geniatech Geniatech, Inc.
109
107
giantplus Giantplus Technology Co., Ltd.
110
108
globalscale Globalscale Technologies, Inc.
···
128
126
ibm International Business Machines (IBM)
129
127
idt Integrated Device Technologies, Inc.
130
128
ifi Ingenieurburo Fur Ic-Technologie (I/F/I)
131
-
iom Iomega Corporation
132
129
img Imagination Technologies Ltd.
133
130
infineon Infineon Technologies
134
131
inforce Inforce Computing
···
136
135
intel Intel Corporation
137
136
intercontrol Inter Control Group
138
137
invensense InvenSense Inc.
138
+
iom Iomega Corporation
139
139
isee ISEE 2007 S.L.
140
140
isil Intersil
141
141
issi Integrated Silicon Solutions Inc.
142
+
jdi Japan Display Inc.
142
143
jedec JEDEC Solid State Technology Association
143
144
karo Ka-Ro electronics GmbH
145
+
keithkoep Keith & Koep GmbH
144
146
keymile Keymile GmbH
145
147
kinetic Kinetic Technologies
146
148
kosagi Sutajio Ko-Usagi PTE Ltd.
···
153
149
lenovo Lenovo Group Ltd.
154
150
lg LG Corporation
155
151
linux Linux-specific binding
156
-
lsi LSI Corp. (LSI Logic)
157
152
lltc Linear Technology Corporation
153
+
lsi LSI Corp. (LSI Logic)
158
154
marvell Marvell Technology Group Ltd.
159
155
maxim Maxim Integrated Products
160
156
meas Measurement Specialties
···
194
190
ontat On Tat Industrial Company
195
191
opencores OpenCores.org
196
192
option Option NV
193
+
ORCL Oracle Corporation
197
194
ortustech Ortus Technology Co., Ltd.
198
195
ovti OmniVision Technologies
199
-
ORCL Oracle Corporation
200
196
oxsemi Oxford Semiconductor, Ltd.
201
197
panasonic Panasonic Corporation
202
198
parade Parade Technologies Inc.
203
199
pericom Pericom Technology Inc.
204
200
phytec PHYTEC Messtechnik GmbH
205
201
picochip Picochip Ltd
202
+
pixcir PIXCIR MICROELECTRONICS Co., Ltd
206
203
plathome Plat'Home Co., Ltd.
207
204
plda PLDA
208
-
pixcir PIXCIR MICROELECTRONICS Co., Ltd
209
-
pulsedlight PulsedLight, Inc
210
205
powervr PowerVR (deprecated, use img)
206
+
pulsedlight PulsedLight, Inc
211
207
qca Qualcomm Atheros, Inc.
212
208
qcom Qualcomm Technologies, Inc
213
209
qemu QEMU, a generic and open source machine emulator and virtualizer
···
235
231
sharp Sharp Corporation
236
232
si-en Si-En Technology Ltd.
237
233
sigma Sigma Designs, Inc.
234
+
sii Seiko Instruments, Inc.
238
235
sil Silicon Image
239
236
silabs Silicon Laboratories
237
+
silead Silead Inc.
238
+
silergy Silergy Corp.
240
239
siliconmitus Silicon Mitus, Inc.
241
240
simtek
242
-
sii Seiko Instruments, Inc.
243
-
silergy Silergy Corp.
244
241
sirf SiRF Technology, Inc.
245
242
sis Silicon Integrated Systems Corp.
246
243
sitronix Sitronix Technology Corporation
···
259
254
startek Startek
260
255
ste ST-Ericsson
261
256
stericsson ST-Ericsson
257
+
summit Summit microelectronics
258
+
sunchip Shenzhen Sunchip Technology Co., Ltd
259
+
SUNW Sun Microsystems, Inc
260
+
swir Sierra Wireless
262
261
syna Synaptics Inc.
263
262
synology Synology, Inc.
264
-
SUNW Sun Microsystems, Inc
265
263
tbs TBS Technologies
266
264
tcg Trusted Computing Group
267
265
tcl Toby Churchill Ltd.
···
273
265
thine THine Electronics, Inc.
274
266
ti Texas Instruments
275
267
tlm Trusted Logic Mobility
268
+
topeet Topeet
276
269
toradex Toradex AG
277
270
toshiba Toshiba Corporation
278
271
toumaz Toumaz
279
-
tplink TP-LINK Technologies Co., Ltd.
280
272
tpk TPK U.S.A. LLC
273
+
tplink TP-LINK Technologies Co., Ltd.
281
274
tronfy Tronfy
282
275
tronsmart Tronsmart
283
276
truly Truly Semiconductors Limited
284
277
tyan Tyan Computer Corporation
285
-
upisemi uPI Semiconductor Corp.
286
278
uniwest United Western Technologies Corp (UniWest)
279
+
upisemi uPI Semiconductor Corp.
287
280
urt United Radiant Technology Corporation
288
281
usi Universal Scientific Industrial Co., Ltd.
289
282
v3 V3 Semiconductor
···
302
293
xes Extreme Engineering Solutions (X-ES)
303
294
xillybus Xillybus Ltd.
304
295
xlnx Xilinx
305
-
zyxel ZyXEL Communications Corp.
306
296
zarlink Zarlink Semiconductor
307
297
zii Zodiac Inflight Innovations
308
298
zte ZTE Corp.
299
+
zyxel ZyXEL Communications Corp.
+5
-14
Documentation/devicetree/changesets.txt
+5
-14
Documentation/devicetree/changesets.txt
···
21
21
All the change operations are recorded in the of_changeset 'entries'
22
22
list.
23
23
24
-
3. mutex_lock(of_mutex) - starts a changeset; The global of_mutex
25
-
ensures there can only be one editor at a time.
26
-
27
-
4. of_changeset_apply() - Apply the changes to the tree. Either the
24
+
3. of_changeset_apply() - Apply the changes to the tree. Either the
28
25
entire changeset will get applied, or if there is an error the tree will
29
-
be restored to the previous state
30
-
31
-
5. mutex_unlock(of_mutex) - All operations complete, release the mutex
26
+
be restored to the previous state. The core ensures proper serialization
27
+
through locking. An unlocked version __of_changeset_apply is available,
28
+
if needed.
32
29
33
30
If a successfully applied changeset needs to be removed, it can be done
34
-
with the following sequence.
35
-
36
-
1. mutex_lock(of_mutex)
37
-
38
-
2. of_changeset_revert()
39
-
40
-
3. mutex_unlock(of_mutex)
31
+
with of_changeset_revert().
+119
-52
drivers/of/base.c
+119
-52
drivers/of/base.c
···
1146
1146
*
1147
1147
* @np: device node from which the property value is to be read.
1148
1148
* @propname: name of the property to be searched.
1149
-
* @len: requested length of property value
1149
+
* @min: minimum allowed length of property value
1150
+
* @max: maximum allowed length of property value (0 means unlimited)
1151
+
* @len: if !=NULL, actual length is written to here
1150
1152
*
1151
1153
* Search for a property in a device node and valid the requested size.
1152
1154
* Returns the property value on success, -EINVAL if the property does not
1153
1155
* exist, -ENODATA if property does not have a value, and -EOVERFLOW if the
1154
-
* property data isn't large enough.
1156
+
* property data is too small or too large.
1155
1157
*
1156
1158
*/
1157
1159
static void *of_find_property_value_of_size(const struct device_node *np,
1158
-
const char *propname, u32 len)
1160
+
const char *propname, u32 min, u32 max, size_t *len)
1159
1161
{
1160
1162
struct property *prop = of_find_property(np, propname, NULL);
1161
1163
···
1165
1163
return ERR_PTR(-EINVAL);
1166
1164
if (!prop->value)
1167
1165
return ERR_PTR(-ENODATA);
1168
-
if (len > prop->length)
1166
+
if (prop->length < min)
1169
1167
return ERR_PTR(-EOVERFLOW);
1168
+
if (max && prop->length > max)
1169
+
return ERR_PTR(-EOVERFLOW);
1170
+
1171
+
if (len)
1172
+
*len = prop->length;
1170
1173
1171
1174
return prop->value;
1172
1175
}
···
1196
1189
u32 index, u32 *out_value)
1197
1190
{
1198
1191
const u32 *val = of_find_property_value_of_size(np, propname,
1199
-
((index + 1) * sizeof(*out_value)));
1192
+
((index + 1) * sizeof(*out_value)),
1193
+
0,
1194
+
NULL);
1200
1195
1201
1196
if (IS_ERR(val))
1202
1197
return PTR_ERR(val);
···
1209
1200
EXPORT_SYMBOL_GPL(of_property_read_u32_index);
1210
1201
1211
1202
/**
1212
-
* of_property_read_u8_array - Find and read an array of u8 from a property.
1203
+
* of_property_read_variable_u8_array - Find and read an array of u8 from a
1204
+
* property, with bounds on the minimum and maximum array size.
1213
1205
*
1214
1206
* @np: device node from which the property value is to be read.
1215
1207
* @propname: name of the property to be searched.
1216
1208
* @out_values: pointer to return value, modified only if return value is 0.
1217
-
* @sz: number of array elements to read
1209
+
* @sz_min: minimum number of array elements to read
1210
+
* @sz_max: maximum number of array elements to read, if zero there is no
1211
+
* upper limit on the number of elements in the dts entry but only
1212
+
* sz_min will be read.
1218
1213
*
1219
1214
* Search for a property in a device node and read 8-bit value(s) from
1220
-
* it. Returns 0 on success, -EINVAL if the property does not exist,
1221
-
* -ENODATA if property does not have a value, and -EOVERFLOW if the
1222
-
* property data isn't large enough.
1215
+
* it. Returns number of elements read on success, -EINVAL if the property
1216
+
* does not exist, -ENODATA if property does not have a value, and -EOVERFLOW
1217
+
* if the property data is smaller than sz_min or longer than sz_max.
1223
1218
*
1224
1219
* dts entry of array should be like:
1225
1220
* property = /bits/ 8 <0x50 0x60 0x70>;
1226
1221
*
1227
1222
* The out_values is modified only if a valid u8 value can be decoded.
1228
1223
*/
1229
-
int of_property_read_u8_array(const struct device_node *np,
1230
-
const char *propname, u8 *out_values, size_t sz)
1224
+
int of_property_read_variable_u8_array(const struct device_node *np,
1225
+
const char *propname, u8 *out_values,
1226
+
size_t sz_min, size_t sz_max)
1231
1227
{
1228
+
size_t sz, count;
1232
1229
const u8 *val = of_find_property_value_of_size(np, propname,
1233
-
(sz * sizeof(*out_values)));
1230
+
(sz_min * sizeof(*out_values)),
1231
+
(sz_max * sizeof(*out_values)),
1232
+
&sz);
1234
1233
1235
1234
if (IS_ERR(val))
1236
1235
return PTR_ERR(val);
1237
1236
1238
-
while (sz--)
1237
+
if (!sz_max)
1238
+
sz = sz_min;
1239
+
else
1240
+
sz /= sizeof(*out_values);
1241
+
1242
+
count = sz;
1243
+
while (count--)
1239
1244
*out_values++ = *val++;
1240
-
return 0;
1245
+
1246
+
return sz;
1241
1247
}
1242
-
EXPORT_SYMBOL_GPL(of_property_read_u8_array);
1248
+
EXPORT_SYMBOL_GPL(of_property_read_variable_u8_array);
1243
1249
1244
1250
/**
1245
-
* of_property_read_u16_array - Find and read an array of u16 from a property.
1251
+
* of_property_read_variable_u16_array - Find and read an array of u16 from a
1252
+
* property, with bounds on the minimum and maximum array size.
1246
1253
*
1247
1254
* @np: device node from which the property value is to be read.
1248
1255
* @propname: name of the property to be searched.
1249
1256
* @out_values: pointer to return value, modified only if return value is 0.
1250
-
* @sz: number of array elements to read
1257
+
* @sz_min: minimum number of array elements to read
1258
+
* @sz_max: maximum number of array elements to read, if zero there is no
1259
+
* upper limit on the number of elements in the dts entry but only
1260
+
* sz_min will be read.
1251
1261
*
1252
1262
* Search for a property in a device node and read 16-bit value(s) from
1253
-
* it. Returns 0 on success, -EINVAL if the property does not exist,
1254
-
* -ENODATA if property does not have a value, and -EOVERFLOW if the
1255
-
* property data isn't large enough.
1263
+
* it. Returns number of elements read on success, -EINVAL if the property
1264
+
* does not exist, -ENODATA if property does not have a value, and -EOVERFLOW
1265
+
* if the property data is smaller than sz_min or longer than sz_max.
1256
1266
*
1257
1267
* dts entry of array should be like:
1258
1268
* property = /bits/ 16 <0x5000 0x6000 0x7000>;
1259
1269
*
1260
1270
* The out_values is modified only if a valid u16 value can be decoded.
1261
1271
*/
1262
-
int of_property_read_u16_array(const struct device_node *np,
1263
-
const char *propname, u16 *out_values, size_t sz)
1272
+
int of_property_read_variable_u16_array(const struct device_node *np,
1273
+
const char *propname, u16 *out_values,
1274
+
size_t sz_min, size_t sz_max)
1264
1275
{
1276
+
size_t sz, count;
1265
1277
const __be16 *val = of_find_property_value_of_size(np, propname,
1266
-
(sz * sizeof(*out_values)));
1278
+
(sz_min * sizeof(*out_values)),
1279
+
(sz_max * sizeof(*out_values)),
1280
+
&sz);
1267
1281
1268
1282
if (IS_ERR(val))
1269
1283
return PTR_ERR(val);
1270
1284
1271
-
while (sz--)
1285
+
if (!sz_max)
1286
+
sz = sz_min;
1287
+
else
1288
+
sz /= sizeof(*out_values);
1289
+
1290
+
count = sz;
1291
+
while (count--)
1272
1292
*out_values++ = be16_to_cpup(val++);
1273
-
return 0;
1293
+
1294
+
return sz;
1274
1295
}
1275
-
EXPORT_SYMBOL_GPL(of_property_read_u16_array);
1296
+
EXPORT_SYMBOL_GPL(of_property_read_variable_u16_array);
1276
1297
1277
1298
/**
1278
-
* of_property_read_u32_array - Find and read an array of 32 bit integers
1279
-
* from a property.
1299
+
* of_property_read_variable_u32_array - Find and read an array of 32 bit
1300
+
* integers from a property, with bounds on the minimum and maximum array size.
1280
1301
*
1281
1302
* @np: device node from which the property value is to be read.
1282
1303
* @propname: name of the property to be searched.
1283
1304
* @out_values: pointer to return value, modified only if return value is 0.
1284
-
* @sz: number of array elements to read
1305
+
* @sz_min: minimum number of array elements to read
1306
+
* @sz_max: maximum number of array elements to read, if zero there is no
1307
+
* upper limit on the number of elements in the dts entry but only
1308
+
* sz_min will be read.
1285
1309
*
1286
1310
* Search for a property in a device node and read 32-bit value(s) from
1287
-
* it. Returns 0 on success, -EINVAL if the property does not exist,
1288
-
* -ENODATA if property does not have a value, and -EOVERFLOW if the
1289
-
* property data isn't large enough.
1311
+
* it. Returns number of elements read on success, -EINVAL if the property
1312
+
* does not exist, -ENODATA if property does not have a value, and -EOVERFLOW
1313
+
* if the property data is smaller than sz_min or longer than sz_max.
1290
1314
*
1291
1315
* The out_values is modified only if a valid u32 value can be decoded.
1292
1316
*/
1293
-
int of_property_read_u32_array(const struct device_node *np,
1317
+
int of_property_read_variable_u32_array(const struct device_node *np,
1294
1318
const char *propname, u32 *out_values,
1295
-
size_t sz)
1319
+
size_t sz_min, size_t sz_max)
1296
1320
{
1321
+
size_t sz, count;
1297
1322
const __be32 *val = of_find_property_value_of_size(np, propname,
1298
-
(sz * sizeof(*out_values)));
1323
+
(sz_min * sizeof(*out_values)),
1324
+
(sz_max * sizeof(*out_values)),
1325
+
&sz);
1299
1326
1300
1327
if (IS_ERR(val))
1301
1328
return PTR_ERR(val);
1302
1329
1303
-
while (sz--)
1330
+
if (!sz_max)
1331
+
sz = sz_min;
1332
+
else
1333
+
sz /= sizeof(*out_values);
1334
+
1335
+
count = sz;
1336
+
while (count--)
1304
1337
*out_values++ = be32_to_cpup(val++);
1305
-
return 0;
1338
+
1339
+
return sz;
1306
1340
}
1307
-
EXPORT_SYMBOL_GPL(of_property_read_u32_array);
1341
+
EXPORT_SYMBOL_GPL(of_property_read_variable_u32_array);
1308
1342
1309
1343
/**
1310
1344
* of_property_read_u64 - Find and read a 64 bit integer from a property
···
1366
1314
u64 *out_value)
1367
1315
{
1368
1316
const __be32 *val = of_find_property_value_of_size(np, propname,
1369
-
sizeof(*out_value));
1317
+
sizeof(*out_value),
1318
+
0,
1319
+
NULL);
1370
1320
1371
1321
if (IS_ERR(val))
1372
1322
return PTR_ERR(val);
···
1379
1325
EXPORT_SYMBOL_GPL(of_property_read_u64);
1380
1326
1381
1327
/**
1382
-
* of_property_read_u64_array - Find and read an array of 64 bit integers
1383
-
* from a property.
1328
+
* of_property_read_variable_u64_array - Find and read an array of 64 bit
1329
+
* integers from a property, with bounds on the minimum and maximum array size.
1384
1330
*
1385
1331
* @np: device node from which the property value is to be read.
1386
1332
* @propname: name of the property to be searched.
1387
1333
* @out_values: pointer to return value, modified only if return value is 0.
1388
-
* @sz: number of array elements to read
1334
+
* @sz_min: minimum number of array elements to read
1335
+
* @sz_max: maximum number of array elements to read, if zero there is no
1336
+
* upper limit on the number of elements in the dts entry but only
1337
+
* sz_min will be read.
1389
1338
*
1390
1339
* Search for a property in a device node and read 64-bit value(s) from
1391
-
* it. Returns 0 on success, -EINVAL if the property does not exist,
1392
-
* -ENODATA if property does not have a value, and -EOVERFLOW if the
1393
-
* property data isn't large enough.
1340
+
* it. Returns number of elements read on success, -EINVAL if the property
1341
+
* does not exist, -ENODATA if property does not have a value, and -EOVERFLOW
1342
+
* if the property data is smaller than sz_min or longer than sz_max.
1394
1343
*
1395
1344
* The out_values is modified only if a valid u64 value can be decoded.
1396
1345
*/
1397
-
int of_property_read_u64_array(const struct device_node *np,
1346
+
int of_property_read_variable_u64_array(const struct device_node *np,
1398
1347
const char *propname, u64 *out_values,
1399
-
size_t sz)
1348
+
size_t sz_min, size_t sz_max)
1400
1349
{
1350
+
size_t sz, count;
1401
1351
const __be32 *val = of_find_property_value_of_size(np, propname,
1402
-
(sz * sizeof(*out_values)));
1352
+
(sz_min * sizeof(*out_values)),
1353
+
(sz_max * sizeof(*out_values)),
1354
+
&sz);
1403
1355
1404
1356
if (IS_ERR(val))
1405
1357
return PTR_ERR(val);
1406
1358
1407
-
while (sz--) {
1359
+
if (!sz_max)
1360
+
sz = sz_min;
1361
+
else
1362
+
sz /= sizeof(*out_values);
1363
+
1364
+
count = sz;
1365
+
while (count--) {
1408
1366
*out_values++ = of_read_number(val, 2);
1409
1367
val += 2;
1410
1368
}
1411
-
return 0;
1369
+
1370
+
return sz;
1412
1371
}
1413
-
EXPORT_SYMBOL_GPL(of_property_read_u64_array);
1372
+
EXPORT_SYMBOL_GPL(of_property_read_variable_u64_array);
1414
1373
1415
1374
/**
1416
1375
* of_property_read_string - Find and read a string from a property
+2
drivers/of/platform.c
+2
drivers/of/platform.c
···
142
142
}
143
143
144
144
dev->dev.of_node = of_node_get(np);
145
+
dev->dev.fwnode = &np->fwnode;
145
146
dev->dev.parent = parent ? : &platform_bus;
146
147
147
148
if (bus_id)
···
242
241
243
242
/* setup generic device info */
244
243
dev->dev.of_node = of_node_get(node);
244
+
dev->dev.fwnode = &node->fwnode;
245
245
dev->dev.parent = parent ? : &platform_bus;
246
246
dev->dev.platform_data = platform_data;
247
247
if (bus_id)
+132
-12
include/linux/of.h
+132
-12
include/linux/of.h
···
291
291
extern int of_property_read_u32_index(const struct device_node *np,
292
292
const char *propname,
293
293
u32 index, u32 *out_value);
294
-
extern int of_property_read_u8_array(const struct device_node *np,
295
-
const char *propname, u8 *out_values, size_t sz);
296
-
extern int of_property_read_u16_array(const struct device_node *np,
297
-
const char *propname, u16 *out_values, size_t sz);
298
-
extern int of_property_read_u32_array(const struct device_node *np,
299
-
const char *propname,
300
-
u32 *out_values,
301
-
size_t sz);
294
+
extern int of_property_read_variable_u8_array(const struct device_node *np,
295
+
const char *propname, u8 *out_values,
296
+
size_t sz_min, size_t sz_max);
297
+
extern int of_property_read_variable_u16_array(const struct device_node *np,
298
+
const char *propname, u16 *out_values,
299
+
size_t sz_min, size_t sz_max);
300
+
extern int of_property_read_variable_u32_array(const struct device_node *np,
301
+
const char *propname,
302
+
u32 *out_values,
303
+
size_t sz_min,
304
+
size_t sz_max);
302
305
extern int of_property_read_u64(const struct device_node *np,
303
306
const char *propname, u64 *out_value);
304
-
extern int of_property_read_u64_array(const struct device_node *np,
305
-
const char *propname,
306
-
u64 *out_values,
307
-
size_t sz);
307
+
extern int of_property_read_variable_u64_array(const struct device_node *np,
308
+
const char *propname,
309
+
u64 *out_values,
310
+
size_t sz_min,
311
+
size_t sz_max);
308
312
309
313
extern int of_property_read_string(const struct device_node *np,
310
314
const char *propname,
···
383
379
extern int of_detach_node(struct device_node *);
384
380
385
381
#define of_match_ptr(_ptr) (_ptr)
382
+
383
+
/**
384
+
* of_property_read_u8_array - Find and read an array of u8 from a property.
385
+
*
386
+
* @np: device node from which the property value is to be read.
387
+
* @propname: name of the property to be searched.
388
+
* @out_values: pointer to return value, modified only if return value is 0.
389
+
* @sz: number of array elements to read
390
+
*
391
+
* Search for a property in a device node and read 8-bit value(s) from
392
+
* it. Returns 0 on success, -EINVAL if the property does not exist,
393
+
* -ENODATA if property does not have a value, and -EOVERFLOW if the
394
+
* property data isn't large enough.
395
+
*
396
+
* dts entry of array should be like:
397
+
* property = /bits/ 8 <0x50 0x60 0x70>;
398
+
*
399
+
* The out_values is modified only if a valid u8 value can be decoded.
400
+
*/
401
+
static inline int of_property_read_u8_array(const struct device_node *np,
402
+
const char *propname,
403
+
u8 *out_values, size_t sz)
404
+
{
405
+
int ret = of_property_read_variable_u8_array(np, propname, out_values,
406
+
sz, 0);
407
+
if (ret >= 0)
408
+
return 0;
409
+
else
410
+
return ret;
411
+
}
412
+
413
+
/**
414
+
* of_property_read_u16_array - Find and read an array of u16 from a property.
415
+
*
416
+
* @np: device node from which the property value is to be read.
417
+
* @propname: name of the property to be searched.
418
+
* @out_values: pointer to return value, modified only if return value is 0.
419
+
* @sz: number of array elements to read
420
+
*
421
+
* Search for a property in a device node and read 16-bit value(s) from
422
+
* it. Returns 0 on success, -EINVAL if the property does not exist,
423
+
* -ENODATA if property does not have a value, and -EOVERFLOW if the
424
+
* property data isn't large enough.
425
+
*
426
+
* dts entry of array should be like:
427
+
* property = /bits/ 16 <0x5000 0x6000 0x7000>;
428
+
*
429
+
* The out_values is modified only if a valid u16 value can be decoded.
430
+
*/
431
+
static inline int of_property_read_u16_array(const struct device_node *np,
432
+
const char *propname,
433
+
u16 *out_values, size_t sz)
434
+
{
435
+
int ret = of_property_read_variable_u16_array(np, propname, out_values,
436
+
sz, 0);
437
+
if (ret >= 0)
438
+
return 0;
439
+
else
440
+
return ret;
441
+
}
442
+
443
+
/**
444
+
* of_property_read_u32_array - Find and read an array of 32 bit integers
445
+
* from a property.
446
+
*
447
+
* @np: device node from which the property value is to be read.
448
+
* @propname: name of the property to be searched.
449
+
* @out_values: pointer to return value, modified only if return value is 0.
450
+
* @sz: number of array elements to read
451
+
*
452
+
* Search for a property in a device node and read 32-bit value(s) from
453
+
* it. Returns 0 on success, -EINVAL if the property does not exist,
454
+
* -ENODATA if property does not have a value, and -EOVERFLOW if the
455
+
* property data isn't large enough.
456
+
*
457
+
* The out_values is modified only if a valid u32 value can be decoded.
458
+
*/
459
+
static inline int of_property_read_u32_array(const struct device_node *np,
460
+
const char *propname,
461
+
u32 *out_values, size_t sz)
462
+
{
463
+
int ret = of_property_read_variable_u32_array(np, propname, out_values,
464
+
sz, 0);
465
+
if (ret >= 0)
466
+
return 0;
467
+
else
468
+
return ret;
469
+
}
470
+
471
+
/**
472
+
* of_property_read_u64_array - Find and read an array of 64 bit integers
473
+
* from a property.
474
+
*
475
+
* @np: device node from which the property value is to be read.
476
+
* @propname: name of the property to be searched.
477
+
* @out_values: pointer to return value, modified only if return value is 0.
478
+
* @sz: number of array elements to read
479
+
*
480
+
* Search for a property in a device node and read 64-bit value(s) from
481
+
* it. Returns 0 on success, -EINVAL if the property does not exist,
482
+
* -ENODATA if property does not have a value, and -EOVERFLOW if the
483
+
* property data isn't large enough.
484
+
*
485
+
* The out_values is modified only if a valid u64 value can be decoded.
486
+
*/
487
+
static inline int of_property_read_u64_array(const struct device_node *np,
488
+
const char *propname,
489
+
u64 *out_values, size_t sz)
490
+
{
491
+
int ret = of_property_read_variable_u64_array(np, propname, out_values,
492
+
sz, 0);
493
+
if (ret >= 0)
494
+
return 0;
495
+
else
496
+
return ret;
497
+
}
386
498
387
499
/*
388
500
* struct property *prop;