Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915: Preserve the DDI link reversal configuration

Similarly to:

commit 6a0d1df3d3a0d2370541164eb0595fe35dcd6de3
Author: Damien Lespiau <damien.lespiau@intel.com>
Date: Tue Dec 11 15:18:28 2012 +0000

drm/i915: Preserve the FDI line reversal override bit on CPT

DDI port support lane reversal to easy the PCB layouting work. Let's
preserve the bit configured by the BIOS (until we find how to correctly
retrieve the information from the VBT, but this does sound more fragile
then just relying on the BIOS that has, hopefully, been validated
already.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

authored by

Damien Lespiau and committed by
Daniel Vetter
876a8cdf 3e68320e

+18 -3
+1
drivers/gpu/drm/i915/i915_reg.h
··· 4510 4510 #define DDI_BUF_EMP_800MV_0DB_HSW (7<<24) /* Sel7 */ 4511 4511 #define DDI_BUF_EMP_800MV_3_5DB_HSW (8<<24) /* Sel8 */ 4512 4512 #define DDI_BUF_EMP_MASK (0xf<<24) 4513 + #define DDI_BUF_PORT_REVERSAL (1<<16) 4513 4514 #define DDI_BUF_IS_IDLE (1<<7) 4514 4515 #define DDI_A_4_LANES (1<<4) 4515 4516 #define DDI_PORT_WIDTH_X1 (0<<1)
+16 -3
drivers/gpu/drm/i915/intel_ddi.c
··· 203 203 DP_TP_CTL_LINK_TRAIN_PAT1 | 204 204 DP_TP_CTL_ENABLE); 205 205 206 - /* Configure and enable DDI_BUF_CTL for DDI E with next voltage */ 206 + /* Configure and enable DDI_BUF_CTL for DDI E with next voltage. 207 + * DDI E does not support port reversal, the functionality is 208 + * achieved on the PCH side in FDI_RX_CTL, so no need to set the 209 + * port reversal bit */ 207 210 I915_WRITE(DDI_BUF_CTL(PORT_E), 208 211 DDI_BUF_CTL_ENABLE | 209 212 ((intel_crtc->fdi_lanes - 1) << 1) | ··· 681 678 intel_crtc->eld_vld = false; 682 679 if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) { 683 680 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 681 + struct intel_digital_port *intel_dig_port = 682 + enc_to_dig_port(encoder); 684 683 685 - intel_dp->DP = DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW; 684 + intel_dp->DP = intel_dig_port->port_reversal | 685 + DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW; 686 686 switch (intel_dp->lane_count) { 687 687 case 1: 688 688 intel_dp->DP |= DDI_PORT_WIDTH_X1; ··· 1308 1302 uint32_t tmp; 1309 1303 1310 1304 if (type == INTEL_OUTPUT_HDMI) { 1305 + struct intel_digital_port *intel_dig_port = 1306 + enc_to_dig_port(encoder); 1307 + 1311 1308 /* In HDMI/DVI mode, the port width, and swing/emphasis values 1312 1309 * are ignored so nothing special needs to be done besides 1313 1310 * enabling the port. 1314 1311 */ 1315 - I915_WRITE(DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE); 1312 + I915_WRITE(DDI_BUF_CTL(port), 1313 + intel_dig_port->port_reversal | DDI_BUF_CTL_ENABLE); 1316 1314 } else if (type == INTEL_OUTPUT_EDP) { 1317 1315 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1318 1316 ··· 1494 1484 1495 1485 void intel_ddi_init(struct drm_device *dev, enum port port) 1496 1486 { 1487 + struct drm_i915_private *dev_priv = dev->dev_private; 1497 1488 struct intel_digital_port *intel_dig_port; 1498 1489 struct intel_encoder *intel_encoder; 1499 1490 struct drm_encoder *encoder; ··· 1535 1524 intel_encoder->get_hw_state = intel_ddi_get_hw_state; 1536 1525 1537 1526 intel_dig_port->port = port; 1527 + intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) & 1528 + DDI_BUF_PORT_REVERSAL; 1538 1529 if (hdmi_connector) 1539 1530 intel_dig_port->hdmi.sdvox_reg = DDI_BUF_CTL(port); 1540 1531 else
+1
drivers/gpu/drm/i915/intel_drv.h
··· 393 393 struct intel_digital_port { 394 394 struct intel_encoder base; 395 395 enum port port; 396 + u32 port_reversal; 396 397 struct intel_dp dp; 397 398 struct intel_hdmi hdmi; 398 399 };