Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi

Pull SCSI updates from James Bottomley:
"Updates to the usual drivers (ufs, lpfc, qla2xxx, libsas).

The major core change is a rework to remove the two helpers around
scsi_execute_cmd and use it as the only submission interface along
with other minor fixes and updates"

* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (142 commits)
scsi: ufs: core: Fix an error handling path in ufshcd_read_desc_param()
scsi: ufs: core: Fix device management cmd timeout flow
scsi: aic94xx: Add missing check for dma_map_single()
scsi: smartpqi: Replace one-element array with flexible-array member
scsi: mpt3sas: Fix a memory leak
scsi: qla2xxx: Remove the unused variable wwn
scsi: ufs: core: Fix kernel-doc syntax
scsi: ufs: core: Add hibernation callbacks
scsi: snic: Fix memory leak with using debugfs_lookup()
scsi: ufs: core: Limit DMA alignment check
scsi: Documentation: Correct spelling
scsi: Documentation: Correct spelling
scsi: target: Documentation: Correct spelling
scsi: aacraid: Allocate cmd_priv with scsicmd
scsi: ufs: qcom: dt-bindings: Add SM8550 compatible string
scsi: ufs: ufs-qcom: Clear qunipro_g4_sel for HW version major 5
scsi: ufs: qcom: fix platform_msi_domain_free_irqs() reference
scsi: ufs: core: Enable DMA clustering
scsi: ufs: exynos: Fix the maximum segment size
scsi: ufs: exynos: Fix DMA alignment for PAGE_SIZE != 4096
...

+4234 -1847
+4
Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
··· 33 33 - qcom,sm8250-ufshc 34 34 - qcom,sm8350-ufshc 35 35 - qcom,sm8450-ufshc 36 + - qcom,sm8550-ufshc 36 37 - const: qcom,ufshc 37 38 - const: jedec,ufs-2.0 38 39 ··· 44 43 clock-names: 45 44 minItems: 8 46 45 maxItems: 11 46 + 47 + dma-coherent: true 47 48 48 49 interconnects: 49 50 minItems: 2 ··· 106 103 - qcom,sm8250-ufshc 107 104 - qcom,sm8350-ufshc 108 105 - qcom,sm8450-ufshc 106 + - qcom,sm8550-ufshc 109 107 then: 110 108 properties: 111 109 clocks:
+79
Documentation/devicetree/bindings/ufs/sprd,ums9620-ufs.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/ufs/sprd,ums9620-ufs.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Unisoc Universal Flash Storage (UFS) Controller 8 + 9 + maintainers: 10 + - Zhe Wang <zhe.wang1@unisoc.com> 11 + 12 + allOf: 13 + - $ref: ufs-common.yaml 14 + 15 + properties: 16 + compatible: 17 + const: sprd,ums9620-ufs 18 + 19 + reg: 20 + maxItems: 1 21 + 22 + clocks: 23 + maxItems: 3 24 + 25 + clock-names: 26 + items: 27 + - const: controller_eb 28 + - const: cfg_eb 29 + - const: core 30 + 31 + resets: 32 + maxItems: 2 33 + 34 + reset-names: 35 + items: 36 + - const: controller 37 + - const: device 38 + 39 + vdd-mphy-supply: 40 + description: 41 + Phandle to vdd-mphy supply regulator node. 42 + 43 + sprd,ufs-anlg-syscon: 44 + $ref: /schemas/types.yaml#/definitions/phandle 45 + description: phandle of syscon used to control ufs analog regs. 46 + 47 + sprd,aon-apb-syscon: 48 + $ref: /schemas/types.yaml#/definitions/phandle 49 + description: phandle of syscon used to control always-on regs. 50 + 51 + required: 52 + - compatible 53 + - reg 54 + - clocks 55 + - clock-names 56 + - resets 57 + - reset-names 58 + 59 + unevaluatedProperties: false 60 + 61 + examples: 62 + - | 63 + #include <dt-bindings/interrupt-controller/arm-gic.h> 64 + 65 + ufs: ufs@22000000 { 66 + compatible = "sprd,ums9620-ufs"; 67 + reg = <0x22000000 0x3000>; 68 + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 69 + vcc-supply = <&vddemmccore>; 70 + vdd-mphy-supply = <&vddufs1v2>; 71 + clocks = <&apahb_gate 5>, <&apahb_gate 22>, <&aonapb_clk 52>; 72 + clock-names = "controller_eb", "cfg_eb", "core"; 73 + assigned-clocks = <&aonapb_clk 52>; 74 + assigned-clock-parents = <&g5l_pll 12>; 75 + resets = <&apahb_gate 4>, <&aonapb_gate 69>; 76 + reset-names = "controller", "device"; 77 + sprd,ufs-anlg-syscon = <&anlg_phy_g12_regs>; 78 + sprd,aon-apb-syscon = <&aon_apb_regs>; 79 + };
+18 -18
Documentation/scsi/ChangeLog.lpfc
··· 174 174 lpfc_sli_chipset_init static. 175 175 * Cleaned up references to list_head->next field in the driver. 176 176 * Replaced lpfc_discq_post_event with lpfc_workq_post_event. 177 - * Implmented Christoph Hellwig's review from 2/5: Check for return 177 + * Implemented Christoph Hellwig's review from 2/5: Check for return 178 178 values of kmalloc. 179 179 * Integrated Christoph Hellwig's patch from 1/30: Protecting 180 180 scan_tmo and friends in !FC_TRANSPORT_PATCHES_V2 && ··· 182 182 * Integrated Christoph Hellwig's patch from 1/30: Some fixes in 183 183 the evt handling area. 184 184 * Integrated Christoph Hellwig's patch from 1/30: Remove usage of 185 - intr_inited variable. The interrupt initilization from OS side 185 + intr_inited variable. The interrupt initialization from OS side 186 186 now happens in lpfc_probe_one(). 187 187 * Integrated Christoph Hellwig's patch from 1/30: remove shim 188 188 lpfc_alloc_transport_attr - remove shim lpfc_alloc_shost_attrs - ··· 389 389 moved to kthread. kthread_stop() is not able to wake up thread 390 390 waiting on a semaphore and "modprobe -r lpfc" is not always 391 391 (most of the times) able to complete. Fix is in not using 392 - semaphore for the interruptable sleep. 392 + semaphore for the interruptible sleep. 393 393 * Small Makefile cleanup - Remove remnants of 2.4 vs. 2.6 394 394 determination. 395 395 ··· 439 439 hardware actually found). 440 440 * Integrate Christoph Hellwig's patch for 8.0.14: Add missing 441 441 __iomem annotations, remove broken casts, mark functions static. 442 - Only major changes is chaning of some offsets from word-based to 443 - byte-based so we cans simply do void pointer arithmetics (gcc 442 + Only major changes is changing of some offsets from word-based to 443 + byte-based so we can simply do void pointer arithmetic (gcc 444 444 extension) instead of casting to uint32_t. 445 445 * Integrate Christoph Hellwig's patch for 8.0.14: flag is always 446 446 LPFC_SLI_ABORT_IMED, aka 0 - remove dead code. ··· 515 515 a result of removing from the txcmpl list item which was already 516 516 removed (100100 is a LIST_POISON1 value from the next pointer 517 517 and 8 is an offset of the "prev") Driver runs out of iotags and 518 - does not handle that case well. The root of the proble is in the 518 + does not handle that case well. The root of the problem is in the 519 519 initialization code in lpfc_sli.c 520 520 * Changes to work with proposed linux kernel patch to support 521 521 hotplug. ··· 570 570 associated I/Os to complete before returning. 571 571 * Fix memset byte count in lpfc_hba_init so that 572 572 LP1050 would initialize correctly. 573 - * Backround nodev_timeout processing to DPC This enables us to 574 - unblock (stop dev_loss_tmo) when appopriate. 573 + * Background nodev_timeout processing to DPC. This enables us to 574 + unblock (stop dev_loss_tmo) when appropriate. 575 575 * Fix array discovery with multiple luns. The max_luns was 0 at 576 576 the time the host structure was initialized. lpfc_cfg_params 577 577 then set the max_luns to the correct value afterwards. ··· 1012 1012 LINK_[UP|DOWN] and RSCN events. 1013 1013 * Get rid of delay_iodone timer. 1014 1014 * Remove qfull timers and qfull logic. 1015 - * Convert mbox_tmo, nlp_xri_tmo to 1 argment clock handler 1015 + * Convert mbox_tmo, nlp_xri_tmo to 1 argument clock handler 1016 1016 * Removed duplicate extern defs of the bind variables. 1017 1017 * Streamline usage of the defines CLASS2 and CLASS3, removing 1018 1018 un-necessary checks on config[LPFC_CFG_FCP_CLASS]. ··· 1369 1369 * Removed lpfc_max_target from lpfc_linux_attach 1370 1370 * Replace references to lpfcDRVR.pHba[] with lpfc_get_phba_by_inst() 1371 1371 * Change lpfc_param to lpfc-param 1372 - * Partially removed 32 HBA restriction within driver. Incorported 1372 + * Partially removed 32 HBA restriction within driver. Incorporated 1373 1373 lpfc_instcnt, lpfc_instance[], and pHba[] into lpfcDRVR 1374 1374 structure Added routines lpfc_get_phba_by_inst() 1375 1375 lpfc_get_inst_by_phba() lpfc_check_valid_phba() ··· 1535 1535 * Use Linux list macros for DMABUF_t 1536 1536 * Break up ioctls into 3 sections, dfc, util, hbaapi 1537 1537 rearranged code so this could be easily separated into a 1538 - differnet module later All 3 are currently turned on by 1538 + different module later. All 3 are currently turned on by 1539 1539 defines in lpfc_ioctl.c LPFC_DFC_IOCTL, LPFC_UTIL_IOCTL, 1540 1540 LPFC_HBAAPI_IOCTL 1541 1541 * Misc cleanup: some goto's; add comments; clarify function ··· 1562 1562 * Remove unused log message. 1563 1563 * Collapse elx_crtn.h and prod_crtn.h into lpfc_crtn.h 1564 1564 * Ifdef Scheduler specific routines 1565 - * Removed following ununsed ioclt's: ELX_READ_IOCB 1565 + * Removed following unused ioctl's: ELX_READ_IOCB 1566 1566 ELX_READ_MEMSEG ELX_READ_BINFO ELX_READ_EINVAL ELX_READ_LHBA 1567 1567 ELX_READ_LXHBA ELX_SET ELX_DBG LPFC_TRACE 1568 1568 * Removed variable fc_dbg_flg ··· 1570 1570 3-digit HBAs. Also changed can_queue so midlayer will only 1571 1571 send (HBA_Q_DEPTH - 10) cmds. 1572 1572 * Clean up code in the error path, check condition. Remove 1573 - ununsed sense-related fields in lun structure. 1573 + unused sense-related fields in lun structure. 1574 1574 * Added code for safety pools for following objects: mbuf/bpl, 1575 1575 mbox, iocb, ndlp, bind 1576 1576 * Wrapped '#include <elx_sched.h>' in '#ifdef USE_SCHEDULER'. ··· 1592 1592 ELX_READ_HBA ELX_INSTANCE ELX_LIP. Also introduced 1593 1593 attribute "set" to be used in conjunction with the above 1594 1594 attributes. 1595 - * Removed DLINK, enque and deque declarations now that clock 1595 + * Removed DLINK, enqueue and dequeue declarations now that clock 1596 1596 doesn't use them anymore 1597 1597 * Separated install rule so that BUILD_IPFC has to be set when 1598 1598 make is called in order for the install rule to attempt to ··· 1662 1662 * Create utility clock function elx_start_timer() and 1663 1663 elx_stop_timer(). All timeout routines now use these common 1664 1664 routines. 1665 - * Minor formating changes fix up comments 1665 + * Minor formatting changes fix up comments 1666 1666 * Minor formatting changes get rid of failover defines for 1667 1667 syntax checking 1668 1668 * Minor formatting changes remove ISCSI defines. ··· 1676 1676 will not exist otherwise. 1677 1677 * Removed unused malloc counters from lpfcLINUXfcp.c. 1678 1678 * Remove some unnecessary #includes in lpfcLINUXfcp.c 1679 - * Remove unncessary #includes in elxLINUXfcp.c 1679 + * Remove unnecessary #includes in elxLINUXfcp.c 1680 1680 * Minor formatting cleanups in Makefile to avoid some 1681 1681 linewrapping. 1682 1682 * Removed unused elx_mem_pool data structure. ··· 1753 1753 elx_str_atox). 1754 1754 * Replaced DLINK_t and SLINK_t by standard Linux list_head 1755 1755 * Removed deque macro 1756 - * Replaced ELX_DLINK_t ans ELX_SLINK_t by Linux struct list_head 1756 + * Replaced ELX_DLINK_t and ELX_SLINK_t by Linux struct list_head 1757 1757 (except for clock) 1758 1758 * Removed following functions from code: linux_kmalloc linux_kfree 1759 1759 elx_alloc_bigbuf elx_free_bigbuf ··· 1801 1801 * Correct Iocbq completion routine for 2.6 kernel case 1802 1802 * Change void *pOSCmd to Scsi_Smnd *pCmd 1803 1803 * Change void *pOScmd to struct sk_buff *pCmd 1804 - * Remove data directon code. 1804 + * Remove data direction code. 1805 1805 * Removed memory pool for buf/bpl buffers and use kmalloc/kfree 1806 1806 pci_pool_alloc/free directly. 1807 1807 * Move PPC check for DMA address 0 in scatter-gather list, into
+4 -4
Documentation/scsi/ChangeLog.megaraid
··· 22 22 Customer reported "garbage in file on x86_64 platform". 23 23 Root Cause: the driver registered controllers as 64-bit DMA capable 24 24 for those which are not support it. 25 - Fix: Made change in the function inserting identification machanism 25 + Fix: Made change in the function inserting identification mechanism 26 26 identifying 64-bit DMA capable controllers. 27 27 28 28 > -----Original Message----- ··· 82 82 Fix: MegaRAID F/W has fixed the problem and being process of release, 83 83 soon. Meanwhile, driver will filter out the request. 84 84 85 - 3. One of member in the data structure of the driver leads unaligne 85 + 3. One member in the data structure of the driver leads to unaligned 86 86 issue on 64-bit platform. 87 - Customer reporeted "kernel unaligned access addrss" issue when 87 + Customer reported "kernel unaligned access address" issue when 88 88 application communicates with MegaRAID HBA driver. 89 89 Root Cause: in uioc_t structure, one of member had misaligned and it 90 90 led system to display the error message. ··· 441 441 avoid getting the stale values for busy bit. We want to set the busy 442 442 bit just before issuing command to the FW. 443 443 444 - ii. In the reset handling, if the reseted command is not owned by the 444 + ii. In the reset handling, if the reset command is not owned by the 445 445 driver, do not (wrongly) print information for the "attached" driver 446 446 packet. 447 447
+2 -2
Documentation/scsi/ChangeLog.megaraid_sas
··· 517 517 518 518 1. Added new memory management module to support the IOCTL memory allocation. For IOCTL we try to allocate from the memory pool created during driver initialization. If mem pool is empty then we allocate at run time. 519 519 2. Added check in megasas_queue_command and dpc/isr routine to see if we have already declared adapter dead 520 - (hw_crit_error=1). If hw_crit_error==1, now we donot accept any processing of pending cmds/accept any cmd from OS 520 + (hw_crit_error=1). If hw_crit_error==1, now we do not accept any processing of pending cmds/accept any cmd from OS 521 521 522 522 1 Release Date : Mon Oct 02 11:21:32 PDT 2006 - Sumant Patro <Sumant.Patro@lsil.com> 523 523 2 Current Version : 00.00.03.05 ··· 562 562 2 Current Version : 00.00.03.02 563 563 3 Older Version : 00.00.03.01 564 564 565 - i. Added FW tranistion state for Hotplug scenario 565 + i. Added FW transition state for Hotplug scenario 566 566 567 567 1 Release Date : Sun May 14 22:49:52 PDT 2006 - Sumant Patro <Sumant.Patro@lsil.com> 568 568 2 Current Version : 00.00.03.01
+8 -8
Documentation/scsi/ChangeLog.ncr53c8xx
··· 230 230 - Still a buglet in the tags initial settings that needed to be fixed. 231 231 It was not possible to disable TGQ at system startup for devices 232 232 that claim TGQ support. The driver used at least 2 for the queue 233 - depth but did'nt keep track of user settings for tags depth lower 233 + depth but didn't keep track of user settings for tags depth lower 234 234 than 2. 235 235 236 236 Wed Nov 11 10:00 1998 Gerard Roudier (groudier@club-internet.fr) ··· 270 270 were due to a SCSI selection problem triggered by a clearly 271 271 documented feature that in fact seems not to work: (53C8XX chips 272 272 are claimed by the manuals to be able to execute SCSI scripts just 273 - after abitration while the SCSI core is performing SCSI selection). 273 + after arbitration while the SCSI core is performing SCSI selection). 274 274 This optimization is broken and has been removed. 275 275 - Some broken scsi devices are confused when a negotiation is started 276 276 on a LUN that does not correspond to a real device. According to ··· 347 347 - Code cleanup and simplification: 348 348 Remove kernel 1.2.X and 1.3.X support. 349 349 Remove the _old_ target capabilities table. 350 - Remove the error recovery code that have'nt been really useful. 350 + Remove the error recovery code that hasn't been really useful. 351 351 Use a single alignment boundary (CACHE_LINE_SIZE) for data 352 352 structures. 353 353 - Several aggressive SCRIPTS optimizations and changes: ··· 367 367 - Some simplification for 64 bit arch done ccb address testing. 368 368 - Add a check of the MSG_OUT phase after Selection with ATN. 369 369 - The new tagged queue stuff seems ok, so some informationnal 370 - message have been conditionned by verbose >= 3. 371 - - Donnot reset if a SBMC interrupt reports the same bus mode. 370 + message have been conditioned by verbose >= 3. 371 + - Do not reset if a SBMC interrupt reports the same bus mode. 372 372 - Print out the whole driver set-up. Some options were missing and 373 373 the print statement was misplaced for modules. 374 374 - Ignore a SCSI parity interrupt if the chip is not connected to ··· 392 392 context on phase mismatch. 393 393 - The above allows now to use the on-chip RAM without requiring 394 394 to get access to the on-chip RAM from the C code. This makes 395 - on-chip RAM useable for linux-1.2.13 and for Linux-Alpha for 395 + on-chip RAM usable for linux-1.2.13 and for Linux-Alpha for 396 396 instance. 397 397 - Some simplifications and cleanups in the SCRIPTS and C code. 398 398 - Buglet fixed in parity error recovery SCRIPTS (never tested). ··· 433 433 434 434 Tue Mar 26 23:00 1998 Gerard Roudier (groudier@club-internet.fr) 435 435 * revision 2.6g 436 - - New done queue. 8 entries by default (6 always useable). 436 + - New done queue. 8 entries by default (6 always usable). 437 437 Can be increased if needed. 438 438 - Resources management using doubly linked queues. 439 439 - New auto-sense and QUEUE FULL handling that does not need to ··· 464 464 - generalization of the restart of CCB on special condition as 465 465 Abort, QUEUE FULL, CHECK CONDITION. 466 466 This has been called 'silly scheduler'. 467 - - make all the profiling code conditionned by a config option. 467 + - make all the profiling code conditioned by a config option. 468 468 This spare some PCI traffic and C code when this feature is not 469 469 needed. 470 470 - handle more cleanly the situation where direction is unknown.
+7 -7
Documentation/scsi/ChangeLog.sym53c8xx
··· 255 255 - Work-around PCI chips being reported twice on some platforms. 256 256 - Add some redundant PCI reads in order to deal with common 257 257 bridge misbehaviour regarding posted write flushing. 258 - - Add some other conditionnal code for people who have to deal 258 + - Add some other conditional code for people who have to deal 259 259 with really broken bridges (they will have to edit a source 260 260 file to try these options). 261 261 - Handle correctly (hopefully) jiffies wrap-around. ··· 300 300 Tue May 25 23:00 1999 Gerard Roudier (groudier@club-internet.fr) 301 301 * version sym53c8xx-1.5a 302 302 - Add support for task abort and bus device reset SCSI message 303 - and implement proper synchonisation with SCRIPTS to handle 303 + and implement proper synchronisation with SCRIPTS to handle 304 304 correctly task abortion without races. 305 305 - Send an ABORT message (if untagged) or ABORT TAG message (if tagged) 306 306 when the driver is told to abort a command that is disconnected and ··· 410 410 the support of non compliant SCSI removal, insertion and all 411 411 kinds of screw-up that may happen on the SCSI BUS. 412 412 Hopefully, the driver is now unbreakable or may-be, it is just 413 - quite brocken. :-) 413 + quite broken. :-) 414 414 Many thanks to Johnson Russel (Symbios) for having responded to 415 415 my questions and for his interesting advices and comments about 416 416 support of SCSI hot-plug. ··· 432 432 Sun Jan 24 18:00 1999 Gerard Roudier (groudier@club-internet.fr) 433 433 * version sym53c8xx-1.1 434 434 - Major rewrite of the SCSI parity error handling. 435 - The informations contained in the data manuals are incomplete about 435 + The information contained in the data manuals is incomplete about 436 436 this feature. 437 437 I asked SYMBIOS about and got in reply the explanations that are 438 438 _indeed_ missing in the data manuals. ··· 460 460 - Revamp slightly the Symbios NVRAM lay-out based on the excerpt of 461 461 the header file I received from Symbios. 462 462 - Check the PCI bus number for the boot order (Using a fast 463 - PCI controller behing a PCI-PCI bridge seems sub-optimal). 463 + PCI controller behind a PCI-PCI bridge seems sub-optimal). 464 464 - Disable overlapped PCI arbitration for the 896 revision 1. 465 465 - Reduce a bit the number of IO register reads for phase mismatch 466 466 by reading DWORDS at a time instead of BYTES. ··· 488 488 Tue Nov 24 23:00 1998 Gerard Roudier (groudier@club-internet.fr) 489 489 * version pre-sym53c8xx-0.16 490 490 - Add SCSI_NCR_OPTIMIZE_896_1 compile option and 'optim' boot option. 491 - When set, the driver unconditionnaly assumes that the interrupt 491 + When set, the driver unconditionally assumes that the interrupt 492 492 handler is called for command completion, then clears INTF, scans 493 493 the done queue and returns if some completed CCB is found. If no 494 494 completed CCB are found, interrupt handling will proceed normally. ··· 502 502 - Still a buglet in the tags initial settings that needed to be fixed. 503 503 It was not possible to disable TGQ at system startup for devices 504 504 that claim TGQ support. The driver used at least 2 for the queue 505 - depth but did'nt keep track of user settings for tags depth lower 505 + depth but didn't keep track of user settings for tags depth lower 506 506 than 2. 507 507 508 508 Thu Nov 19 23:00 1998 Gerard Roudier (groudier@club-internet.fr)
+5 -5
Documentation/scsi/ChangeLog.sym53c8xx_2
··· 40 40 - Call pci_enable_device() as wished by kernel maintainers. 41 41 - Change the sym_queue_scsiio() interface. 42 42 This is intended to simplify portability. 43 - - Move the code intended to deal with the dowloading of SCRIPTS 43 + - Move the code intended to deal with the downloading of SCRIPTS 44 44 from SCRIPTS :) in the patch method (was wrongly placed in 45 45 the SCRIPTS setup method). 46 46 - Add a missing cpu_to_scr() (np->abort_tbl.addr) ··· 53 53 Also move the code that sniffes INQUIRY to sym_misc.c. 54 54 This allows to share the corresponding code with NetBSD 55 55 without polluating the core driver source (sym_hipd.c). 56 - - Add optionnal code that handles IO timeouts from the driver. 56 + - Add optional code that handles IO timeouts from the driver. 57 57 (not used under Linux, but required for NetBSD) 58 - - Donnot assume any longer that PAGE_SHIFT and PAGE_SIZE are 58 + - Do not assume any longer that PAGE_SHIFT and PAGE_SIZE are 59 59 defined at compile time, as at least NetBSD uses variables 60 60 in memory for that. 61 61 - Refine a work-around for the C1010-33 that consists in ··· 104 104 - Change my email address. 105 105 - Add infrastructure for the forthcoming 64 bit DMA addressing support. 106 106 (Based on PCI 64 bit patch from David S. Miller) 107 - - Donnot use anymore vm_offset_t type. 107 + - Do not use anymore vm_offset_t type. 108 108 109 109 Sat Sep 15 20:00 2001 Gerard Roudier 110 110 * version sym-2.1.13-20010916 ··· 119 119 120 120 Sun Sep 30 17:00 2001 Gerard Roudier 121 121 * version sym-2.1.15-20010930 122 - - Include <linux/module.h> unconditionnaly as expected by latest 122 + - Include <linux/module.h> unconditionally as expected by latest 123 123 kernels. 124 124 - Use del_timer_sync() for recent kernels to kill the driver timer 125 125 on module release.
+2 -2
Documentation/scsi/ncr53c8xx.rst
··· 906 906 led:0 disable LED support 907 907 ===== =================== 908 908 909 - Donnot enable LED support if your scsi board does not use SDMS BIOS. 909 + Do not enable LED support if your scsi board does not use SDMS BIOS. 910 910 (See 'Configuration parameters') 911 911 912 912 10.2.13 Max wide ··· 1222 1222 - Bad quality terminators. 1223 1223 1224 1224 On the other hand, either bad cabling, broken devices, not conformant 1225 - devices, ... may cause a SCSI signal to be wrong when te driver reads it. 1225 + devices, ... may cause a SCSI signal to be wrong when the driver reads it. 1226 1226 1227 1227 10.7 IMMEDIATE ARBITRATION boot option 1228 1228 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+1 -1
Documentation/scsi/sym53c8xx_2.rst
··· 703 703 - Bad quality terminators. 704 704 705 705 On the other hand, either bad cabling, broken devices, not conformant 706 - devices, ... may cause a SCSI signal to be wrong when te driver reads it. 706 + devices, ... may cause a SCSI signal to be wrong when the driver reads it. 707 707 708 708 15. SCSI problem troubleshooting 709 709 ================================
+1 -1
Documentation/scsi/tcm_qla2xxx.rst
··· 6 6 7 7 tcm_qla2xxx jam_host attribute 8 8 ------------------------------ 9 - There is now a new module endpoint atribute called jam_host 9 + There is now a new module endpoint attribute called jam_host 10 10 attribute:: 11 11 12 12 jam_host: boolean=0/1
+1 -1
Documentation/scsi/ufs.rst
··· 206 206 is interpreted as frequency in Hz and must match one of the values given in 207 207 the UFS specification. UFS subsystem will attempt to read the value when 208 208 executing common controller initialization. If the value is available, UFS 209 - subsytem will ensure the bRefClkFreq attribute of the UFS storage device is 209 + subsystem will ensure the bRefClkFreq attribute of the UFS storage device is 210 210 set accordingly and will modify it if there is a mismatch.
+1 -1
Documentation/target/tcmu-design.rst
··· 171 171 tcmu_cmd_entry. Userspace finds the SCSI CDB (Command Data Block) via 172 172 tcmu_cmd_entry.req.cdb_off. This is an offset from the start of the 173 173 overall shared memory region, not the entry. The data in/out buffers 174 - are accessible via tht req.iov[] array. iov_cnt contains the number of 174 + are accessible via the req.iov[] array. iov_cnt contains the number of 175 175 entries in iov[] needed to describe either the Data-In or Data-Out 176 176 buffers. For bidirectional commands, iov_cnt specifies how many iovec 177 177 entries cover the Data-Out area, and iov_bidi_cnt specifies how many
+14
MAINTAINERS
··· 21337 21337 S: Supported 21338 21338 F: drivers/ufs/host/*dwc* 21339 21339 21340 + UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER EXYNOS HOOKS 21341 + M: Alim Akhtar <alim.akhtar@samsung.com> 21342 + L: linux-scsi@vger.kernel.org 21343 + S: Maintained 21344 + F: drivers/ufs/host/ufs-exynos* 21345 + 21340 21346 UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER MEDIATEK HOOKS 21341 21347 M: Stanley Chu <stanley.chu@mediatek.com> 21342 21348 L: linux-scsi@vger.kernel.org 21343 21349 L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) 21344 21350 S: Maintained 21345 21351 F: drivers/ufs/host/ufs-mediatek* 21352 + 21353 + UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER QUALCOMM HOOKS 21354 + M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 21355 + L: linux-arm-msm@vger.kernel.org 21356 + L: linux-scsi@vger.kernel.org 21357 + S: Maintained 21358 + F: Documentation/devicetree/bindings/ufs/qcom,ufs.yaml 21359 + F: drivers/ufs/host/ufs-qcom* 21346 21360 21347 21361 UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER RENESAS HOOKS 21348 21362 M: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+14 -9
drivers/ata/libata-scsi.c
··· 383 383 u8 scsi_cmd[MAX_COMMAND_SIZE]; 384 384 u8 args[4], *argbuf = NULL; 385 385 int argsize = 0; 386 - enum dma_data_direction data_dir; 387 386 struct scsi_sense_hdr sshdr; 387 + const struct scsi_exec_args exec_args = { 388 + .sshdr = &sshdr, 389 + .sense = sensebuf, 390 + .sense_len = sizeof(sensebuf), 391 + }; 388 392 int cmd_result; 389 393 390 394 if (arg == NULL) ··· 411 407 scsi_cmd[1] = (4 << 1); /* PIO Data-in */ 412 408 scsi_cmd[2] = 0x0e; /* no off.line or cc, read from dev, 413 409 block count in sector count field */ 414 - data_dir = DMA_FROM_DEVICE; 415 410 } else { 416 411 scsi_cmd[1] = (3 << 1); /* Non-data */ 417 412 scsi_cmd[2] = 0x20; /* cc but no off.line or data xfer */ 418 - data_dir = DMA_NONE; 419 413 } 420 414 421 415 scsi_cmd[0] = ATA_16; ··· 431 429 432 430 /* Good values for timeout and retries? Values below 433 431 from scsi_ioctl_send_command() for default case... */ 434 - cmd_result = scsi_execute(scsidev, scsi_cmd, data_dir, argbuf, argsize, 435 - sensebuf, &sshdr, (10*HZ), 5, 0, 0, NULL); 436 - 432 + cmd_result = scsi_execute_cmd(scsidev, scsi_cmd, REQ_OP_DRV_IN, argbuf, 433 + argsize, 10 * HZ, 5, &exec_args); 437 434 if (cmd_result < 0) { 438 435 rc = cmd_result; 439 436 goto error; ··· 492 491 u8 args[7]; 493 492 struct scsi_sense_hdr sshdr; 494 493 int cmd_result; 494 + const struct scsi_exec_args exec_args = { 495 + .sshdr = &sshdr, 496 + .sense = sensebuf, 497 + .sense_len = sizeof(sensebuf), 498 + }; 495 499 496 500 if (arg == NULL) 497 501 return -EINVAL; ··· 519 513 520 514 /* Good values for timeout and retries? Values below 521 515 from scsi_ioctl_send_command() for default case... */ 522 - cmd_result = scsi_execute(scsidev, scsi_cmd, DMA_NONE, NULL, 0, 523 - sensebuf, &sshdr, (10*HZ), 5, 0, 0, NULL); 524 - 516 + cmd_result = scsi_execute_cmd(scsidev, scsi_cmd, REQ_OP_DRV_IN, NULL, 517 + 0, 10 * HZ, 5, &exec_args); 525 518 if (cmd_result < 0) { 526 519 rc = cmd_result; 527 520 goto error;
+5 -6
drivers/hwmon/drivetemp.c
··· 164 164 u8 lba_low, u8 lba_mid, u8 lba_high) 165 165 { 166 166 u8 scsi_cmd[MAX_COMMAND_SIZE]; 167 - int data_dir; 167 + enum req_op op; 168 168 169 169 memset(scsi_cmd, 0, sizeof(scsi_cmd)); 170 170 scsi_cmd[0] = ATA_16; ··· 175 175 * field. 176 176 */ 177 177 scsi_cmd[2] = 0x06; 178 - data_dir = DMA_TO_DEVICE; 178 + op = REQ_OP_DRV_OUT; 179 179 } else { 180 180 scsi_cmd[1] = (4 << 1); /* PIO Data-in */ 181 181 /* ··· 183 183 * field. 184 184 */ 185 185 scsi_cmd[2] = 0x0e; 186 - data_dir = DMA_FROM_DEVICE; 186 + op = REQ_OP_DRV_IN; 187 187 } 188 188 scsi_cmd[4] = feature; 189 189 scsi_cmd[6] = 1; /* 1 sector */ ··· 192 192 scsi_cmd[12] = lba_high; 193 193 scsi_cmd[14] = ata_command; 194 194 195 - return scsi_execute_req(st->sdev, scsi_cmd, data_dir, 196 - st->smartdata, ATA_SECT_SIZE, NULL, HZ, 5, 197 - NULL); 195 + return scsi_execute_cmd(st->sdev, scsi_cmd, op, st->smartdata, 196 + ATA_SECT_SIZE, HZ, 5, NULL); 198 197 } 199 198 200 199 static int drivetemp_ata_command(struct drivetemp_data *st, u8 feature,
+6 -6
drivers/scsi/3w-sas.c
··· 690 690 newcommand->request_id__lunl = 691 691 cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->request_id__lunl), request_id)); 692 692 if (length) { 693 - newcommand->sg_list[0].address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1); 693 + newcommand->sg_list[0].address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache)); 694 694 newcommand->sg_list[0].length = TW_CPU_TO_SGL(length); 695 695 } 696 696 newcommand->sgl_entries__lunh = ··· 702 702 if (TW_SGL_OUT(oldcommand->opcode__sgloffset)) { 703 703 /* Load the sg list */ 704 704 sgl = (TW_SG_Entry_ISO *)((u32 *)oldcommand+oldcommand->size - (sizeof(TW_SG_Entry_ISO)/4) + pae + (sizeof(dma_addr_t) > 4 ? 1 : 0)); 705 - sgl->address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1); 705 + sgl->address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache)); 706 706 sgl->length = TW_CPU_TO_SGL(length); 707 707 oldcommand->size += pae; 708 708 oldcommand->size += sizeof(dma_addr_t) > 4 ? 1 : 0; ··· 748 748 data_buffer_length_adjusted = (driver_command.buffer_length + 511) & ~511; 749 749 750 750 /* Now allocate ioctl buf memory */ 751 - cpu_addr = dma_alloc_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted+sizeof(TW_Ioctl_Buf_Apache) - 1, &dma_handle, GFP_KERNEL); 751 + cpu_addr = dma_alloc_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted + sizeof(TW_Ioctl_Buf_Apache), &dma_handle, GFP_KERNEL); 752 752 if (!cpu_addr) { 753 753 retval = -ENOMEM; 754 754 goto out2; ··· 757 757 tw_ioctl = (TW_Ioctl_Buf_Apache *)cpu_addr; 758 758 759 759 /* Now copy down the entire ioctl */ 760 - if (copy_from_user(tw_ioctl, argp, driver_command.buffer_length + sizeof(TW_Ioctl_Buf_Apache) - 1)) 760 + if (copy_from_user(tw_ioctl, argp, driver_command.buffer_length + sizeof(TW_Ioctl_Buf_Apache))) 761 761 goto out3; 762 762 763 763 /* See which ioctl we are doing */ ··· 815 815 } 816 816 817 817 /* Now copy the entire response to userspace */ 818 - if (copy_to_user(argp, tw_ioctl, sizeof(TW_Ioctl_Buf_Apache) + driver_command.buffer_length - 1) == 0) 818 + if (copy_to_user(argp, tw_ioctl, sizeof(TW_Ioctl_Buf_Apache) + driver_command.buffer_length) == 0) 819 819 retval = 0; 820 820 out3: 821 821 /* Now free ioctl buf memory */ 822 - dma_free_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted+sizeof(TW_Ioctl_Buf_Apache) - 1, cpu_addr, dma_handle); 822 + dma_free_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted + sizeof(TW_Ioctl_Buf_Apache), cpu_addr, dma_handle); 823 823 out2: 824 824 mutex_unlock(&tw_dev->ioctl_lock); 825 825 out:
+2 -2
drivers/scsi/3w-sas.h
··· 335 335 TW_Ioctl_Driver_Command driver_command; 336 336 char padding[488]; 337 337 TW_Command_Full firmware_command; 338 - char data_buffer[1]; 338 + char data_buffer[]; 339 339 } TW_Ioctl_Buf_Apache; 340 340 341 341 /* GetParam descriptor */ ··· 344 344 unsigned short parameter_id; 345 345 unsigned short parameter_size_bytes; 346 346 unsigned short actual_parameter_size_bytes; 347 - unsigned char data[1]; 347 + unsigned char data[]; 348 348 } TW_Param_Apache; 349 349 350 350 /* Compatibility information structure */
+3 -2
drivers/scsi/aacraid/aachba.c
··· 818 818 819 819 int aac_probe_container(struct aac_dev *dev, int cid) 820 820 { 821 - struct scsi_cmnd *scsicmd = kzalloc(sizeof(*scsicmd), GFP_KERNEL); 822 - struct aac_cmd_priv *cmd_priv = aac_priv(scsicmd); 821 + struct aac_cmd_priv *cmd_priv; 822 + struct scsi_cmnd *scsicmd = kzalloc(sizeof(*scsicmd) + sizeof(*cmd_priv), GFP_KERNEL); 823 823 struct scsi_device *scsidev = kzalloc(sizeof(*scsidev), GFP_KERNEL); 824 824 int status; 825 825 ··· 838 838 while (scsicmd->device == scsidev) 839 839 schedule(); 840 840 kfree(scsidev); 841 + cmd_priv = aac_priv(scsicmd); 841 842 status = cmd_priv->status; 842 843 kfree(scsicmd); 843 844 return status;
+3
drivers/scsi/aic94xx/aic94xx_task.c
··· 50 50 dma_addr_t dma = dma_map_single(&asd_ha->pcidev->dev, p, 51 51 task->total_xfer_len, 52 52 task->data_dir); 53 + if (dma_mapping_error(&asd_ha->pcidev->dev, dma)) 54 + return -ENOMEM; 55 + 53 56 sg_arr[0].bus_addr = cpu_to_le64((u64)dma); 54 57 sg_arr[0].size = cpu_to_le32(task->total_xfer_len); 55 58 sg_arr[0].flags |= ASD_SG_EL_LIST_EOL;
+15 -15
drivers/scsi/ch.c
··· 184 184 185 185 static int 186 186 ch_do_scsi(scsi_changer *ch, unsigned char *cmd, int cmd_len, 187 - void *buffer, unsigned buflength, 188 - enum dma_data_direction direction) 187 + void *buffer, unsigned int buflength, enum req_op op) 189 188 { 190 189 int errno, retries = 0, timeout, result; 191 190 struct scsi_sense_hdr sshdr; 191 + const struct scsi_exec_args exec_args = { 192 + .sshdr = &sshdr, 193 + }; 192 194 193 195 timeout = (cmd[0] == INITIALIZE_ELEMENT_STATUS) 194 196 ? timeout_init : timeout_move; 195 197 196 198 retry: 197 199 errno = 0; 198 - result = scsi_execute_req(ch->device, cmd, direction, buffer, 199 - buflength, &sshdr, timeout * HZ, 200 - MAX_RETRIES, NULL); 200 + result = scsi_execute_cmd(ch->device, cmd, op, buffer, buflength, 201 + timeout * HZ, MAX_RETRIES, &exec_args); 201 202 if (result < 0) 202 203 return result; 203 204 if (scsi_sense_valid(&sshdr)) { ··· 255 254 cmd[5] = 1; 256 255 cmd[9] = 255; 257 256 if (0 == (result = ch_do_scsi(ch, cmd, 12, 258 - buffer, 256, DMA_FROM_DEVICE))) { 257 + buffer, 256, REQ_OP_DRV_IN))) { 259 258 if (((buffer[16] << 8) | buffer[17]) != elem) { 260 259 DPRINTK("asked for element 0x%02x, got 0x%02x\n", 261 260 elem,(buffer[16] << 8) | buffer[17]); ··· 285 284 memset(cmd,0,sizeof(cmd)); 286 285 cmd[0] = INITIALIZE_ELEMENT_STATUS; 287 286 cmd[1] = (ch->device->lun & 0x7) << 5; 288 - err = ch_do_scsi(ch, cmd, 6, NULL, 0, DMA_NONE); 287 + err = ch_do_scsi(ch, cmd, 6, NULL, 0, REQ_OP_DRV_IN); 289 288 VPRINTK(KERN_INFO, "... finished\n"); 290 289 return err; 291 290 } ··· 307 306 cmd[1] = (ch->device->lun & 0x7) << 5; 308 307 cmd[2] = 0x1d; 309 308 cmd[4] = 255; 310 - result = ch_do_scsi(ch, cmd, 10, buffer, 255, DMA_FROM_DEVICE); 309 + result = ch_do_scsi(ch, cmd, 10, buffer, 255, REQ_OP_DRV_IN); 311 310 if (0 != result) { 312 311 cmd[1] |= (1<<3); 313 - result = ch_do_scsi(ch, cmd, 10, buffer, 255, DMA_FROM_DEVICE); 312 + result = ch_do_scsi(ch, cmd, 10, buffer, 255, REQ_OP_DRV_IN); 314 313 } 315 314 if (0 == result) { 316 315 ch->firsts[CHET_MT] = ··· 435 434 cmd[4] = (elem >> 8) & 0xff; 436 435 cmd[5] = elem & 0xff; 437 436 cmd[8] = rotate ? 1 : 0; 438 - return ch_do_scsi(ch, cmd, 10, NULL, 0, DMA_NONE); 437 + return ch_do_scsi(ch, cmd, 10, NULL, 0, REQ_OP_DRV_IN); 439 438 } 440 439 441 440 static int ··· 456 455 cmd[6] = (dest >> 8) & 0xff; 457 456 cmd[7] = dest & 0xff; 458 457 cmd[10] = rotate ? 1 : 0; 459 - return ch_do_scsi(ch, cmd, 12, NULL,0, DMA_NONE); 458 + return ch_do_scsi(ch, cmd, 12, NULL, 0, REQ_OP_DRV_IN); 460 459 } 461 460 462 461 static int ··· 482 481 cmd[9] = dest2 & 0xff; 483 482 cmd[10] = (rotate1 ? 1 : 0) | (rotate2 ? 2 : 0); 484 483 485 - return ch_do_scsi(ch, cmd, 12, NULL, 0, DMA_NONE); 484 + return ch_do_scsi(ch, cmd, 12, NULL, 0, REQ_OP_DRV_IN); 486 485 } 487 486 488 487 static void ··· 532 531 memcpy(buffer,tag,32); 533 532 ch_check_voltag(buffer); 534 533 535 - result = ch_do_scsi(ch, cmd, 12, buffer, 256, DMA_TO_DEVICE); 534 + result = ch_do_scsi(ch, cmd, 12, buffer, 256, REQ_OP_DRV_OUT); 536 535 kfree(buffer); 537 536 return result; 538 537 } ··· 800 799 ch_cmd[5] = 1; 801 800 ch_cmd[9] = 255; 802 801 803 - result = ch_do_scsi(ch, ch_cmd, 12, 804 - buffer, 256, DMA_FROM_DEVICE); 802 + result = ch_do_scsi(ch, ch_cmd, 12, buffer, 256, REQ_OP_DRV_IN); 805 803 if (!result) { 806 804 cge.cge_status = buffer[18]; 807 805 cge.cge_flags = 0;
+18 -16
drivers/scsi/cxlflash/superpipe.c
··· 308 308 * @lli: LUN destined for capacity request. 309 309 * 310 310 * The READ_CAP16 can take quite a while to complete. Should an EEH occur while 311 - * in scsi_execute(), the EEH handler will attempt to recover. As part of the 312 - * recovery, the handler drains all currently running ioctls, waiting until they 313 - * have completed before proceeding with a reset. As this routine is used on the 314 - * ioctl path, this can create a condition where the EEH handler becomes stuck, 315 - * infinitely waiting for this ioctl thread. To avoid this behavior, temporarily 316 - * unmark this thread as an ioctl thread by releasing the ioctl read semaphore. 317 - * This will allow the EEH handler to proceed with a recovery while this thread 318 - * is still running. Once the scsi_execute() returns, reacquire the ioctl read 319 - * semaphore and check the adapter state in case it changed while inside of 320 - * scsi_execute(). The state check will wait if the adapter is still being 321 - * recovered or return a failure if the recovery failed. In the event that the 322 - * adapter reset failed, simply return the failure as the ioctl would be unable 323 - * to continue. 311 + * in scsi_execute_cmd(), the EEH handler will attempt to recover. As part of 312 + * the recovery, the handler drains all currently running ioctls, waiting until 313 + * they have completed before proceeding with a reset. As this routine is used 314 + * on the ioctl path, this can create a condition where the EEH handler becomes 315 + * stuck, infinitely waiting for this ioctl thread. To avoid this behavior, 316 + * temporarily unmark this thread as an ioctl thread by releasing the ioctl 317 + * read semaphore. This will allow the EEH handler to proceed with a recovery 318 + * while this thread is still running. Once the scsi_execute_cmd() returns, 319 + * reacquire the ioctl read semaphore and check the adapter state in case it 320 + * changed while inside of scsi_execute_cmd(). The state check will wait if the 321 + * adapter is still being recovered or return a failure if the recovery failed. 322 + * In the event that the adapter reset failed, simply return the failure as the 323 + * ioctl would be unable to continue. 324 324 * 325 325 * Note that the above puts a requirement on this routine to only be called on 326 326 * an ioctl thread. ··· 333 333 struct device *dev = &cfg->dev->dev; 334 334 struct glun_info *gli = lli->parent; 335 335 struct scsi_sense_hdr sshdr; 336 + const struct scsi_exec_args exec_args = { 337 + .sshdr = &sshdr, 338 + }; 336 339 u8 *cmd_buf = NULL; 337 340 u8 *scsi_cmd = NULL; 338 341 int rc = 0; ··· 360 357 361 358 /* Drop the ioctl read semahpore across lengthy call */ 362 359 up_read(&cfg->ioctl_rwsem); 363 - result = scsi_execute(sdev, scsi_cmd, DMA_FROM_DEVICE, cmd_buf, 364 - CMD_BUFSIZE, NULL, &sshdr, to, CMD_RETRIES, 365 - 0, 0, NULL); 360 + result = scsi_execute_cmd(sdev, scsi_cmd, REQ_OP_DRV_IN, cmd_buf, 361 + CMD_BUFSIZE, to, CMD_RETRIES, &exec_args); 366 362 down_read(&cfg->ioctl_rwsem); 367 363 rc = check_state(cfg); 368 364 if (rc) {
+16 -16
drivers/scsi/cxlflash/vlun.c
··· 397 397 * @nblks: Number of logical blocks to write same. 398 398 * 399 399 * The SCSI WRITE_SAME16 can take quite a while to complete. Should an EEH occur 400 - * while in scsi_execute(), the EEH handler will attempt to recover. As part of 401 - * the recovery, the handler drains all currently running ioctls, waiting until 402 - * they have completed before proceeding with a reset. As this routine is used 403 - * on the ioctl path, this can create a condition where the EEH handler becomes 404 - * stuck, infinitely waiting for this ioctl thread. To avoid this behavior, 405 - * temporarily unmark this thread as an ioctl thread by releasing the ioctl read 406 - * semaphore. This will allow the EEH handler to proceed with a recovery while 407 - * this thread is still running. Once the scsi_execute() returns, reacquire the 408 - * ioctl read semaphore and check the adapter state in case it changed while 409 - * inside of scsi_execute(). The state check will wait if the adapter is still 410 - * being recovered or return a failure if the recovery failed. In the event that 411 - * the adapter reset failed, simply return the failure as the ioctl would be 412 - * unable to continue. 400 + * while in scsi_execute_cmd(), the EEH handler will attempt to recover. As 401 + * part of the recovery, the handler drains all currently running ioctls, 402 + * waiting until they have completed before proceeding with a reset. As this 403 + * routine is used on the ioctl path, this can create a condition where the 404 + * EEH handler becomes stuck, infinitely waiting for this ioctl thread. To 405 + * avoid this behavior, temporarily unmark this thread as an ioctl thread by 406 + * releasing the ioctl read semaphore. This will allow the EEH handler to 407 + * proceed with a recovery while this thread is still running. Once the 408 + * scsi_execute_cmd() returns, reacquire the ioctl read semaphore and check the 409 + * adapter state in case it changed while inside of scsi_execute_cmd(). The 410 + * state check will wait if the adapter is still being recovered or return a 411 + * failure if the recovery failed. In the event that the adapter reset failed, 412 + * simply return the failure as the ioctl would be unable to continue. 413 413 * 414 414 * Note that the above puts a requirement on this routine to only be called on 415 415 * an ioctl thread. ··· 450 450 451 451 /* Drop the ioctl read semahpore across lengthy call */ 452 452 up_read(&cfg->ioctl_rwsem); 453 - result = scsi_execute(sdev, scsi_cmd, DMA_TO_DEVICE, cmd_buf, 454 - CMD_BUFSIZE, NULL, NULL, to, 455 - CMD_RETRIES, 0, 0, NULL); 453 + result = scsi_execute_cmd(sdev, scsi_cmd, REQ_OP_DRV_OUT, 454 + cmd_buf, CMD_BUFSIZE, to, 455 + CMD_RETRIES, NULL); 456 456 down_read(&cfg->ioctl_rwsem); 457 457 rc = check_state(cfg); 458 458 if (rc) {
+16 -10
drivers/scsi/device_handler/scsi_dh_alua.c
··· 127 127 int bufflen, struct scsi_sense_hdr *sshdr, int flags) 128 128 { 129 129 u8 cdb[MAX_COMMAND_SIZE]; 130 - blk_opf_t req_flags = REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT | 131 - REQ_FAILFAST_DRIVER; 130 + blk_opf_t opf = REQ_OP_DRV_IN | REQ_FAILFAST_DEV | 131 + REQ_FAILFAST_TRANSPORT | REQ_FAILFAST_DRIVER; 132 + const struct scsi_exec_args exec_args = { 133 + .sshdr = sshdr, 134 + }; 132 135 133 136 /* Prepare the command. */ 134 137 memset(cdb, 0x0, MAX_COMMAND_SIZE); ··· 142 139 cdb[1] = MI_REPORT_TARGET_PGS; 143 140 put_unaligned_be32(bufflen, &cdb[6]); 144 141 145 - return scsi_execute(sdev, cdb, DMA_FROM_DEVICE, buff, bufflen, NULL, 146 - sshdr, ALUA_FAILOVER_TIMEOUT * HZ, 147 - ALUA_FAILOVER_RETRIES, req_flags, 0, NULL); 142 + return scsi_execute_cmd(sdev, cdb, opf, buff, bufflen, 143 + ALUA_FAILOVER_TIMEOUT * HZ, 144 + ALUA_FAILOVER_RETRIES, &exec_args); 148 145 } 149 146 150 147 /* ··· 160 157 u8 cdb[MAX_COMMAND_SIZE]; 161 158 unsigned char stpg_data[8]; 162 159 int stpg_len = 8; 163 - blk_opf_t req_flags = REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT | 164 - REQ_FAILFAST_DRIVER; 160 + blk_opf_t opf = REQ_OP_DRV_OUT | REQ_FAILFAST_DEV | 161 + REQ_FAILFAST_TRANSPORT | REQ_FAILFAST_DRIVER; 162 + const struct scsi_exec_args exec_args = { 163 + .sshdr = sshdr, 164 + }; 165 165 166 166 /* Prepare the data buffer */ 167 167 memset(stpg_data, 0, stpg_len); ··· 177 171 cdb[1] = MO_SET_TARGET_PGS; 178 172 put_unaligned_be32(stpg_len, &cdb[6]); 179 173 180 - return scsi_execute(sdev, cdb, DMA_TO_DEVICE, stpg_data, stpg_len, NULL, 181 - sshdr, ALUA_FAILOVER_TIMEOUT * HZ, 182 - ALUA_FAILOVER_RETRIES, req_flags, 0, NULL); 174 + return scsi_execute_cmd(sdev, cdb, opf, stpg_data, 175 + stpg_len, ALUA_FAILOVER_TIMEOUT * HZ, 176 + ALUA_FAILOVER_RETRIES, &exec_args); 183 177 } 184 178 185 179 static struct alua_port_group *alua_find_get_pg(char *id_str, size_t id_size,
+8 -5
drivers/scsi/device_handler/scsi_dh_emc.c
··· 239 239 unsigned char cdb[MAX_COMMAND_SIZE]; 240 240 int err, res = SCSI_DH_OK, len; 241 241 struct scsi_sense_hdr sshdr; 242 - blk_opf_t req_flags = REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT | 243 - REQ_FAILFAST_DRIVER; 242 + blk_opf_t opf = REQ_OP_DRV_OUT | REQ_FAILFAST_DEV | 243 + REQ_FAILFAST_TRANSPORT | REQ_FAILFAST_DRIVER; 244 + const struct scsi_exec_args exec_args = { 245 + .sshdr = &sshdr, 246 + }; 244 247 245 248 if (csdev->flags & CLARIION_SHORT_TRESPASS) { 246 249 page22 = short_trespass; ··· 266 263 BUG_ON((len > CLARIION_BUFFER_SIZE)); 267 264 memcpy(csdev->buffer, page22, len); 268 265 269 - err = scsi_execute(sdev, cdb, DMA_TO_DEVICE, csdev->buffer, len, NULL, 270 - &sshdr, CLARIION_TIMEOUT * HZ, CLARIION_RETRIES, 271 - req_flags, 0, NULL); 266 + err = scsi_execute_cmd(sdev, cdb, opf, csdev->buffer, len, 267 + CLARIION_TIMEOUT * HZ, CLARIION_RETRIES, 268 + &exec_args); 272 269 if (err) { 273 270 if (scsi_sense_valid(&sshdr)) 274 271 res = trespass_endio(sdev, &sshdr);
+14 -8
drivers/scsi/device_handler/scsi_dh_hp_sw.c
··· 83 83 unsigned char cmd[6] = { TEST_UNIT_READY }; 84 84 struct scsi_sense_hdr sshdr; 85 85 int ret = SCSI_DH_OK, res; 86 - blk_opf_t req_flags = REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT | 87 - REQ_FAILFAST_DRIVER; 86 + blk_opf_t opf = REQ_OP_DRV_IN | REQ_FAILFAST_DEV | 87 + REQ_FAILFAST_TRANSPORT | REQ_FAILFAST_DRIVER; 88 + const struct scsi_exec_args exec_args = { 89 + .sshdr = &sshdr, 90 + }; 88 91 89 92 retry: 90 - res = scsi_execute(sdev, cmd, DMA_NONE, NULL, 0, NULL, &sshdr, 91 - HP_SW_TIMEOUT, HP_SW_RETRIES, req_flags, 0, NULL); 93 + res = scsi_execute_cmd(sdev, cmd, opf, NULL, 0, HP_SW_TIMEOUT, 94 + HP_SW_RETRIES, &exec_args); 92 95 if (res) { 93 96 if (scsi_sense_valid(&sshdr)) 94 97 ret = tur_done(sdev, h, &sshdr); ··· 124 121 struct scsi_device *sdev = h->sdev; 125 122 int res, rc = SCSI_DH_OK; 126 123 int retry_cnt = HP_SW_RETRIES; 127 - blk_opf_t req_flags = REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT | 128 - REQ_FAILFAST_DRIVER; 124 + blk_opf_t opf = REQ_OP_DRV_IN | REQ_FAILFAST_DEV | 125 + REQ_FAILFAST_TRANSPORT | REQ_FAILFAST_DRIVER; 126 + const struct scsi_exec_args exec_args = { 127 + .sshdr = &sshdr, 128 + }; 129 129 130 130 retry: 131 - res = scsi_execute(sdev, cmd, DMA_NONE, NULL, 0, NULL, &sshdr, 132 - HP_SW_TIMEOUT, HP_SW_RETRIES, req_flags, 0, NULL); 131 + res = scsi_execute_cmd(sdev, cmd, opf, NULL, 0, HP_SW_TIMEOUT, 132 + HP_SW_RETRIES, &exec_args); 133 133 if (res) { 134 134 if (!scsi_sense_valid(&sshdr)) { 135 135 sdev_printk(KERN_WARNING, sdev,
+7 -5
drivers/scsi/device_handler/scsi_dh_rdac.c
··· 536 536 unsigned char cdb[MAX_COMMAND_SIZE]; 537 537 struct scsi_sense_hdr sshdr; 538 538 unsigned int data_size; 539 - blk_opf_t req_flags = REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT | 540 - REQ_FAILFAST_DRIVER; 539 + blk_opf_t opf = REQ_OP_DRV_OUT | REQ_FAILFAST_DEV | 540 + REQ_FAILFAST_TRANSPORT | REQ_FAILFAST_DRIVER; 541 + const struct scsi_exec_args exec_args = { 542 + .sshdr = &sshdr, 543 + }; 541 544 542 545 spin_lock(&ctlr->ms_lock); 543 546 list_splice_init(&ctlr->ms_head, &list); ··· 558 555 (char *) h->ctlr->array_name, h->ctlr->index, 559 556 (retry_cnt == RDAC_RETRY_COUNT) ? "queueing" : "retrying"); 560 557 561 - if (scsi_execute(sdev, cdb, DMA_TO_DEVICE, &h->ctlr->mode_select, 562 - data_size, NULL, &sshdr, RDAC_TIMEOUT * HZ, 563 - RDAC_RETRIES, req_flags, 0, NULL)) { 558 + if (scsi_execute_cmd(sdev, cdb, opf, &h->ctlr->mode_select, data_size, 559 + RDAC_TIMEOUT * HZ, RDAC_RETRIES, &exec_args)) { 564 560 err = mode_select_handle_sense(sdev, &sshdr); 565 561 if (err == SCSI_DH_RETRY && retry_cnt--) 566 562 goto retry;
+1 -1
drivers/scsi/elx/libefc_sli/sli4.c
··· 4 4 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. 5 5 */ 6 6 7 - /** 7 + /* 8 8 * All common (i.e. transport-independent) SLI-4 functions are implemented 9 9 * in this file. 10 10 */
+2 -7
drivers/scsi/ipr.c
··· 3912 3912 { 3913 3913 int bsize_elem, i, result = 0; 3914 3914 struct scatterlist *sg; 3915 - void *kaddr; 3916 3915 3917 3916 /* Determine the actual number of bytes per element */ 3918 3917 bsize_elem = PAGE_SIZE * (1 << sglist->order); ··· 3922 3923 buffer += bsize_elem) { 3923 3924 struct page *page = sg_page(sg); 3924 3925 3925 - kaddr = kmap(page); 3926 - memcpy(kaddr, buffer, bsize_elem); 3927 - kunmap(page); 3926 + memcpy_to_page(page, 0, buffer, bsize_elem); 3928 3927 3929 3928 sg->length = bsize_elem; 3930 3929 ··· 3935 3938 if (len % bsize_elem) { 3936 3939 struct page *page = sg_page(sg); 3937 3940 3938 - kaddr = kmap(page); 3939 - memcpy(kaddr, buffer, len % bsize_elem); 3940 - kunmap(page); 3941 + memcpy_to_page(page, 0, buffer, len % bsize_elem); 3941 3942 3942 3943 sg->length = len % bsize_elem; 3943 3944 }
+5 -6
drivers/scsi/ips.c
··· 1499 1499 struct scatterlist *sg = scsi_sglist(SC); 1500 1500 char *buffer; 1501 1501 1502 - /* kmap_atomic() ensures addressability of the user buffer.*/ 1503 1502 /* local_irq_save() protects the KM_IRQ0 address slot. */ 1504 1503 local_irq_save(flags); 1505 - buffer = kmap_atomic(sg_page(sg)) + sg->offset; 1506 - if (buffer && buffer[0] == 'C' && buffer[1] == 'O' && 1507 - buffer[2] == 'P' && buffer[3] == 'P') { 1508 - kunmap_atomic(buffer - sg->offset); 1504 + buffer = kmap_local_page(sg_page(sg)) + sg->offset; 1505 + if (buffer && buffer[0] == 'C' && buffer[1] == 'O' && 1506 + buffer[2] == 'P' && buffer[3] == 'P') { 1507 + kunmap_local(buffer); 1509 1508 local_irq_restore(flags); 1510 1509 return 1; 1511 1510 } 1512 - kunmap_atomic(buffer - sg->offset); 1511 + kunmap_local(buffer); 1513 1512 local_irq_restore(flags); 1514 1513 } 1515 1514 return 0;
+73 -15
drivers/scsi/libsas/sas_ata.c
··· 238 238 return to_sas_internal(dev->port->ha->core.shost->transportt); 239 239 } 240 240 241 - static int sas_get_ata_command_set(struct domain_device *dev); 241 + static int sas_get_ata_command_set(struct domain_device *dev) 242 + { 243 + struct ata_taskfile tf; 244 + 245 + if (dev->dev_type == SAS_SATA_PENDING) 246 + return ATA_DEV_UNKNOWN; 247 + 248 + ata_tf_from_fis(dev->frame_rcvd, &tf); 249 + 250 + return ata_dev_classify(&tf); 251 + } 242 252 243 253 int sas_get_ata_info(struct domain_device *dev, struct ex_phy *phy) 244 254 { ··· 646 636 complete(waiting); 647 637 } 648 638 649 - static int sas_get_ata_command_set(struct domain_device *dev) 650 - { 651 - struct dev_to_host_fis *fis = 652 - (struct dev_to_host_fis *) dev->frame_rcvd; 653 - struct ata_taskfile tf; 654 - 655 - if (dev->dev_type == SAS_SATA_PENDING) 656 - return ATA_DEV_UNKNOWN; 657 - 658 - ata_tf_from_fis((const u8 *)fis, &tf); 659 - 660 - return ata_dev_classify(&tf); 661 - } 662 - 663 639 void sas_probe_sata(struct asd_sas_port *port) 664 640 { 665 641 struct domain_device *dev, *n; ··· 672 676 sas_fail_probe(dev, __func__, -ENODEV); 673 677 } 674 678 679 + } 680 + 681 + int sas_ata_add_dev(struct domain_device *parent, struct ex_phy *phy, 682 + struct domain_device *child, int phy_id) 683 + { 684 + struct sas_rphy *rphy; 685 + int ret; 686 + 687 + if (child->linkrate > parent->min_linkrate) { 688 + struct sas_phy *cphy = child->phy; 689 + enum sas_linkrate min_prate = cphy->minimum_linkrate, 690 + parent_min_lrate = parent->min_linkrate, 691 + min_linkrate = (min_prate > parent_min_lrate) ? 692 + parent_min_lrate : 0; 693 + struct sas_phy_linkrates rates = { 694 + .maximum_linkrate = parent->min_linkrate, 695 + .minimum_linkrate = min_linkrate, 696 + }; 697 + 698 + pr_notice("ex %016llx phy%02d SATA device linkrate > min pathway connection rate, attempting to lower device linkrate\n", 699 + SAS_ADDR(child->sas_addr), phy_id); 700 + ret = sas_smp_phy_control(parent, phy_id, 701 + PHY_FUNC_LINK_RESET, &rates); 702 + if (ret) { 703 + pr_err("ex %016llx phy%02d SATA device could not set linkrate (%d)\n", 704 + SAS_ADDR(child->sas_addr), phy_id, ret); 705 + return ret; 706 + } 707 + pr_notice("ex %016llx phy%02d SATA device set linkrate successfully\n", 708 + SAS_ADDR(child->sas_addr), phy_id); 709 + child->linkrate = child->min_linkrate; 710 + } 711 + ret = sas_get_ata_info(child, phy); 712 + if (ret) 713 + return ret; 714 + 715 + sas_init_dev(child); 716 + ret = sas_ata_init(child); 717 + if (ret) 718 + return ret; 719 + 720 + rphy = sas_end_device_alloc(phy->port); 721 + if (!rphy) 722 + return -ENOMEM; 723 + 724 + rphy->identify.phy_identifier = phy_id; 725 + child->rphy = rphy; 726 + get_device(&rphy->dev); 727 + 728 + list_add_tail(&child->disco_list_node, &parent->port->disco_list); 729 + 730 + ret = sas_discover_sata(child); 731 + if (ret) { 732 + pr_notice("sas_discover_sata() for device %16llx at %016llx:%02d returned 0x%x\n", 733 + SAS_ADDR(child->sas_addr), 734 + SAS_ADDR(parent->sas_addr), phy_id, ret); 735 + sas_rphy_free(child->rphy); 736 + list_del(&child->disco_list_node); 737 + return ret; 738 + } 739 + 740 + return 0; 675 741 } 676 742 677 743 static void sas_ata_flush_pm_eh(struct asd_sas_port *port, const char *func)
-6
drivers/scsi/libsas/sas_discover.c
··· 455 455 break; 456 456 case SAS_SATA_DEV: 457 457 case SAS_SATA_PM: 458 - #ifdef CONFIG_SCSI_SAS_ATA 459 458 error = sas_discover_sata(dev); 460 459 break; 461 - #else 462 - pr_notice("ATA device seen but CONFIG_SCSI_SAS_ATA=N so cannot attach\n"); 463 - fallthrough; 464 - #endif 465 - /* Fall through - only for the #else condition above. */ 466 460 default: 467 461 error = -ENXIO; 468 462 pr_err("unhandled device %d\n", dev->dev_type);
+41 -84
drivers/scsi/libsas/sas_expander.c
··· 751 751 child->pathways = min(child->pathways, parent->pathways); 752 752 } 753 753 754 + static int sas_ex_add_dev(struct domain_device *parent, struct ex_phy *phy, 755 + struct domain_device *child, int phy_id) 756 + { 757 + struct sas_rphy *rphy; 758 + int res; 759 + 760 + child->dev_type = SAS_END_DEVICE; 761 + rphy = sas_end_device_alloc(phy->port); 762 + if (!rphy) 763 + return -ENOMEM; 764 + 765 + child->tproto = phy->attached_tproto; 766 + sas_init_dev(child); 767 + 768 + child->rphy = rphy; 769 + get_device(&rphy->dev); 770 + rphy->identify.phy_identifier = phy_id; 771 + sas_fill_in_rphy(child, rphy); 772 + 773 + list_add_tail(&child->disco_list_node, &parent->port->disco_list); 774 + 775 + res = sas_notify_lldd_dev_found(child); 776 + if (res) { 777 + pr_notice("notify lldd for device %016llx at %016llx:%02d returned 0x%x\n", 778 + SAS_ADDR(child->sas_addr), 779 + SAS_ADDR(parent->sas_addr), phy_id, res); 780 + sas_rphy_free(child->rphy); 781 + list_del(&child->disco_list_node); 782 + return res; 783 + } 784 + 785 + return 0; 786 + } 787 + 754 788 static struct domain_device *sas_ex_discover_end_dev( 755 789 struct domain_device *parent, int phy_id) 756 790 { 757 791 struct expander_device *parent_ex = &parent->ex_dev; 758 792 struct ex_phy *phy = &parent_ex->ex_phy[phy_id]; 759 793 struct domain_device *child = NULL; 760 - struct sas_rphy *rphy; 761 794 int res; 762 795 763 796 if (phy->attached_sata_host || phy->attached_sata_ps) ··· 818 785 sas_ex_get_linkrate(parent, child, phy); 819 786 sas_device_set_phy(child, phy->port); 820 787 821 - #ifdef CONFIG_SCSI_SAS_ATA 822 788 if ((phy->attached_tproto & SAS_PROTOCOL_STP) || phy->attached_sata_dev) { 823 - if (child->linkrate > parent->min_linkrate) { 824 - struct sas_phy *cphy = child->phy; 825 - enum sas_linkrate min_prate = cphy->minimum_linkrate, 826 - parent_min_lrate = parent->min_linkrate, 827 - min_linkrate = (min_prate > parent_min_lrate) ? 828 - parent_min_lrate : 0; 829 - struct sas_phy_linkrates rates = { 830 - .maximum_linkrate = parent->min_linkrate, 831 - .minimum_linkrate = min_linkrate, 832 - }; 833 - int ret; 834 - 835 - pr_notice("ex %016llx phy%02d SATA device linkrate > min pathway connection rate, attempting to lower device linkrate\n", 836 - SAS_ADDR(child->sas_addr), phy_id); 837 - ret = sas_smp_phy_control(parent, phy_id, 838 - PHY_FUNC_LINK_RESET, &rates); 839 - if (ret) { 840 - pr_err("ex %016llx phy%02d SATA device could not set linkrate (%d)\n", 841 - SAS_ADDR(child->sas_addr), phy_id, ret); 842 - goto out_free; 843 - } 844 - pr_notice("ex %016llx phy%02d SATA device set linkrate successfully\n", 845 - SAS_ADDR(child->sas_addr), phy_id); 846 - child->linkrate = child->min_linkrate; 847 - } 848 - res = sas_get_ata_info(child, phy); 849 - if (res) 850 - goto out_free; 851 - 852 - sas_init_dev(child); 853 - res = sas_ata_init(child); 854 - if (res) 855 - goto out_free; 856 - rphy = sas_end_device_alloc(phy->port); 857 - if (!rphy) 858 - goto out_free; 859 - rphy->identify.phy_identifier = phy_id; 860 - 861 - child->rphy = rphy; 862 - get_device(&rphy->dev); 863 - 864 - list_add_tail(&child->disco_list_node, &parent->port->disco_list); 865 - 866 - res = sas_discover_sata(child); 867 - if (res) { 868 - pr_notice("sas_discover_sata() for device %16llx at %016llx:%02d returned 0x%x\n", 869 - SAS_ADDR(child->sas_addr), 870 - SAS_ADDR(parent->sas_addr), phy_id, res); 871 - goto out_list_del; 872 - } 873 - } else 874 - #endif 875 - if (phy->attached_tproto & SAS_PROTOCOL_SSP) { 876 - child->dev_type = SAS_END_DEVICE; 877 - rphy = sas_end_device_alloc(phy->port); 878 - /* FIXME: error handling */ 879 - if (unlikely(!rphy)) 880 - goto out_free; 881 - child->tproto = phy->attached_tproto; 882 - sas_init_dev(child); 883 - 884 - child->rphy = rphy; 885 - get_device(&rphy->dev); 886 - rphy->identify.phy_identifier = phy_id; 887 - sas_fill_in_rphy(child, rphy); 888 - 889 - list_add_tail(&child->disco_list_node, &parent->port->disco_list); 890 - 891 - res = sas_discover_end_dev(child); 892 - if (res) { 893 - pr_notice("sas_discover_end_dev() for device %016llx at %016llx:%02d returned 0x%x\n", 894 - SAS_ADDR(child->sas_addr), 895 - SAS_ADDR(parent->sas_addr), phy_id, res); 896 - goto out_list_del; 897 - } 789 + res = sas_ata_add_dev(parent, phy, child, phy_id); 790 + } else if (phy->attached_tproto & SAS_PROTOCOL_SSP) { 791 + res = sas_ex_add_dev(parent, phy, child, phy_id); 898 792 } else { 899 793 pr_notice("target proto 0x%x at %016llx:0x%x not handled\n", 900 794 phy->attached_tproto, SAS_ADDR(parent->sas_addr), 901 795 phy_id); 902 - goto out_free; 796 + res = -ENODEV; 903 797 } 798 + 799 + if (res) 800 + goto out_free; 904 801 905 802 list_add_tail(&child->siblings, &parent_ex->children); 906 803 return child; 907 804 908 - out_list_del: 909 - sas_rphy_free(child->rphy); 910 - list_del(&child->disco_list_node); 911 - spin_lock_irq(&parent->port->dev_list_lock); 912 - list_del(&child->dev_list_node); 913 - spin_unlock_irq(&parent->port->dev_list_lock); 914 805 out_free: 915 806 sas_port_delete(phy->port); 916 807 out_err:
+1 -3
drivers/scsi/lpfc/lpfc.h
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 1592 1592 struct timer_list cpuhp_poll_timer; 1593 1593 struct list_head poll_list; /* slowpath eq polling list */ 1594 1594 #define LPFC_POLL_HB 1 /* slowpath heartbeat */ 1595 - #define LPFC_POLL_FASTPATH 0 /* called from fastpath */ 1596 - #define LPFC_POLL_SLOWPATH 1 /* called from slowpath */ 1597 1595 1598 1596 char os_host_name[MAXHOSTNAMELEN]; 1599 1597
+25 -38
drivers/scsi/lpfc/lpfc_attr.c
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 1905 1905 goto out_free_rdp; 1906 1906 } 1907 1907 1908 - strncpy(chbuf, &rdp_context->page_a0[SSF_VENDOR_NAME], 16); 1909 - chbuf[16] = 0; 1908 + strscpy(chbuf, &rdp_context->page_a0[SSF_VENDOR_NAME], 16); 1910 1909 1911 1910 len = scnprintf(buf, PAGE_SIZE - len, "VendorName:\t%s\n", chbuf); 1912 1911 len += scnprintf(buf + len, PAGE_SIZE - len, ··· 1913 1914 (uint8_t)rdp_context->page_a0[SSF_VENDOR_OUI], 1914 1915 (uint8_t)rdp_context->page_a0[SSF_VENDOR_OUI + 1], 1915 1916 (uint8_t)rdp_context->page_a0[SSF_VENDOR_OUI + 2]); 1916 - strncpy(chbuf, &rdp_context->page_a0[SSF_VENDOR_PN], 16); 1917 - chbuf[16] = 0; 1917 + strscpy(chbuf, &rdp_context->page_a0[SSF_VENDOR_PN], 16); 1918 1918 len += scnprintf(buf + len, PAGE_SIZE - len, "VendorPN:\t%s\n", chbuf); 1919 - strncpy(chbuf, &rdp_context->page_a0[SSF_VENDOR_SN], 16); 1920 - chbuf[16] = 0; 1919 + strscpy(chbuf, &rdp_context->page_a0[SSF_VENDOR_SN], 16); 1921 1920 len += scnprintf(buf + len, PAGE_SIZE - len, "VendorSN:\t%s\n", chbuf); 1922 - strncpy(chbuf, &rdp_context->page_a0[SSF_VENDOR_REV], 4); 1923 - chbuf[4] = 0; 1921 + strscpy(chbuf, &rdp_context->page_a0[SSF_VENDOR_REV], 4); 1924 1922 len += scnprintf(buf + len, PAGE_SIZE - len, "VendorRev:\t%s\n", chbuf); 1925 - strncpy(chbuf, &rdp_context->page_a0[SSF_DATE_CODE], 8); 1926 - chbuf[8] = 0; 1923 + strscpy(chbuf, &rdp_context->page_a0[SSF_DATE_CODE], 8); 1927 1924 len += scnprintf(buf + len, PAGE_SIZE - len, "DateCode:\t%s\n", chbuf); 1928 1925 len += scnprintf(buf + len, PAGE_SIZE - len, "Identifier:\t%xh\n", 1929 1926 (uint8_t)rdp_context->page_a0[SSF_IDENTIFIER]); ··· 1936 1941 &rdp_context->page_a0[SSF_TRANSCEIVER_CODE_B7]; 1937 1942 1938 1943 len += scnprintf(buf + len, PAGE_SIZE - len, "Speeds: \t"); 1939 - if (*(uint8_t *)trasn_code_byte7 == 0) { 1940 - len += scnprintf(buf + len, PAGE_SIZE - len, 1941 - "Unknown\n"); 1942 - } else { 1943 - if (trasn_code_byte7->fc_sp_100MB) 1944 - len += scnprintf(buf + len, PAGE_SIZE - len, 1945 - "1 "); 1946 - if (trasn_code_byte7->fc_sp_200mb) 1947 - len += scnprintf(buf + len, PAGE_SIZE - len, 1948 - "2 "); 1949 - if (trasn_code_byte7->fc_sp_400MB) 1950 - len += scnprintf(buf + len, PAGE_SIZE - len, 1951 - "4 "); 1952 - if (trasn_code_byte7->fc_sp_800MB) 1953 - len += scnprintf(buf + len, PAGE_SIZE - len, 1954 - "8 "); 1955 - if (trasn_code_byte7->fc_sp_1600MB) 1956 - len += scnprintf(buf + len, PAGE_SIZE - len, 1957 - "16 "); 1958 - if (trasn_code_byte7->fc_sp_3200MB) 1959 - len += scnprintf(buf + len, PAGE_SIZE - len, 1960 - "32 "); 1961 - if (trasn_code_byte7->speed_chk_ecc) 1962 - len += scnprintf(buf + len, PAGE_SIZE - len, 1963 - "64 "); 1964 - len += scnprintf(buf + len, PAGE_SIZE - len, "GB\n"); 1965 - } 1944 + if (*(uint8_t *)trasn_code_byte7 == 0) { 1945 + len += scnprintf(buf + len, PAGE_SIZE - len, "Unknown\n"); 1946 + } else { 1947 + if (trasn_code_byte7->fc_sp_100MB) 1948 + len += scnprintf(buf + len, PAGE_SIZE - len, "1 "); 1949 + if (trasn_code_byte7->fc_sp_200mb) 1950 + len += scnprintf(buf + len, PAGE_SIZE - len, "2 "); 1951 + if (trasn_code_byte7->fc_sp_400MB) 1952 + len += scnprintf(buf + len, PAGE_SIZE - len, "4 "); 1953 + if (trasn_code_byte7->fc_sp_800MB) 1954 + len += scnprintf(buf + len, PAGE_SIZE - len, "8 "); 1955 + if (trasn_code_byte7->fc_sp_1600MB) 1956 + len += scnprintf(buf + len, PAGE_SIZE - len, "16 "); 1957 + if (trasn_code_byte7->fc_sp_3200MB) 1958 + len += scnprintf(buf + len, PAGE_SIZE - len, "32 "); 1959 + if (trasn_code_byte7->speed_chk_ecc) 1960 + len += scnprintf(buf + len, PAGE_SIZE - len, "64 "); 1961 + len += scnprintf(buf + len, PAGE_SIZE - len, "GB\n"); 1962 + } 1966 1963 temperature = (rdp_context->page_a2[SFF_TEMPERATURE_B1] << 8 | 1967 1964 rdp_context->page_a2[SFF_TEMPERATURE_B0]); 1968 1965 vcc = (rdp_context->page_a2[SFF_VCC_B1] << 8 |
+2 -2
drivers/scsi/lpfc/lpfc_crtn.h
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 253 253 uint32_t len); 254 254 255 255 void lpfc_sli4_cleanup_poll_list(struct lpfc_hba *phba); 256 - int lpfc_sli4_poll_eq(struct lpfc_queue *q, uint8_t path); 257 256 void lpfc_sli4_poll_hbtimer(struct timer_list *t); 258 257 void lpfc_sli4_start_polling(struct lpfc_queue *q); 259 258 void lpfc_sli4_stop_polling(struct lpfc_queue *q); ··· 683 684 union lpfc_vmid_io_tag *tag); 684 685 void lpfc_vmid_vport_cleanup(struct lpfc_vport *vport); 685 686 int lpfc_issue_els_qfpa(struct lpfc_vport *vport); 687 + void lpfc_reinit_vmid(struct lpfc_vport *vport); 686 688 687 689 void lpfc_sli_rpi_release(struct lpfc_vport *vport, 688 690 struct lpfc_nodelist *ndlp);
+30 -3
drivers/scsi/lpfc/lpfc_els.c
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 1123 1123 if (sp->cmn.priority_tagging) 1124 1124 vport->phba->pport->vmid_flag |= (LPFC_VMID_ISSUE_QFPA | 1125 1125 LPFC_VMID_TYPE_PRIO); 1126 + /* reinitialize the VMID datastructure before returning */ 1127 + if (lpfc_is_vmid_enabled(phba)) 1128 + lpfc_reinit_vmid(vport); 1126 1129 1127 1130 /* 1128 1131 * Address a timing race with dev_loss. If dev_loss is active on ··· 2376 2373 /* PRLI failed */ 2377 2374 lpfc_printf_vlog(vport, mode, loglevel, 2378 2375 "2754 PRLI failure DID:%06X Status:x%x/x%x, " 2379 - "data: x%x\n", 2376 + "data: x%x x%x\n", 2380 2377 ndlp->nlp_DID, ulp_status, 2381 - ulp_word4, ndlp->fc4_prli_sent); 2378 + ulp_word4, ndlp->nlp_state, 2379 + ndlp->fc4_prli_sent); 2382 2380 2383 2381 /* Do not call DSM for lpfc_els_abort'ed ELS cmds */ 2384 2382 if (!lpfc_error_lost_link(ulp_status, ulp_word4)) 2385 2383 lpfc_disc_state_machine(vport, ndlp, cmdiocb, 2386 2384 NLP_EVT_CMPL_PRLI); 2385 + 2386 + /* The following condition catches an inflight transition 2387 + * mismatch typically caused by an RSCN. Skip any 2388 + * processing to allow recovery. 2389 + */ 2390 + if (ndlp->nlp_state >= NLP_STE_PLOGI_ISSUE && 2391 + ndlp->nlp_state <= NLP_STE_REG_LOGIN_ISSUE) { 2392 + lpfc_printf_vlog(vport, KERN_WARNING, LOG_NODE, 2393 + "2784 PRLI cmpl: state mismatch " 2394 + "DID x%06x nstate x%x nflag x%x\n", 2395 + ndlp->nlp_DID, ndlp->nlp_state, 2396 + ndlp->nlp_flag); 2397 + goto out; 2398 + } 2387 2399 2388 2400 /* 2389 2401 * For P2P topology, retain the node so that PLOGI can be ··· 4691 4673 /* the nameserver fails */ 4692 4674 maxretry = 0; 4693 4675 delay = 100; 4676 + } else if (cmd == ELS_CMD_PRLI && 4677 + ndlp->nlp_state != NLP_STE_PRLI_ISSUE) { 4678 + /* State-command disagreement. The PRLI was 4679 + * failed with an invalid rpi meaning there 4680 + * some unexpected state change. Don't retry. 4681 + */ 4682 + maxretry = 0; 4683 + retry = 0; 4684 + break; 4694 4685 } 4695 4686 retry = 1; 4696 4687 break;
+1 -16
drivers/scsi/lpfc/lpfc_hbadisc.c
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 1129 1129 struct lpfc_nodelist *ndlp, *next_ndlp; 1130 1130 1131 1131 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { 1132 - if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) { 1133 - /* It's possible the FLOGI to the fabric node never 1134 - * successfully completed and never registered with the 1135 - * transport. In this case there is no way to clean up 1136 - * the node. 1137 - */ 1138 - if (ndlp->nlp_DID == Fabric_DID) { 1139 - if (ndlp->nlp_prev_state == 1140 - NLP_STE_UNUSED_NODE && 1141 - !ndlp->fc4_xpt_flags) 1142 - lpfc_nlp_put(ndlp); 1143 - } 1144 - continue; 1145 - } 1146 - 1147 1132 if ((phba->sli3_options & LPFC_SLI3_VPORT_TEARDOWN) || 1148 1133 ((vport->port_type == LPFC_NPIV_PORT) && 1149 1134 ((ndlp->nlp_DID == NameServer_DID) ||
+6 -1
drivers/scsi/lpfc/lpfc_hw4.h
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2009-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 4201 4201 #define LPFC_FC_LA_TYPE_MDS_LOOPBACK 0x5 4202 4202 #define LPFC_FC_LA_TYPE_UNEXP_WWPN 0x6 4203 4203 #define LPFC_FC_LA_TYPE_TRUNKING_EVENT 0x7 4204 + #define LPFC_FC_LA_TYPE_ACTIVATE_FAIL 0x8 4205 + #define LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT 0x9 4204 4206 #define lpfc_acqe_fc_la_port_type_SHIFT 6 4205 4207 #define lpfc_acqe_fc_la_port_type_MASK 0x00000003 4206 4208 #define lpfc_acqe_fc_la_port_type_WORD word0 ··· 4244 4242 #define lpfc_acqe_fc_la_fault_SHIFT 0 4245 4243 #define lpfc_acqe_fc_la_fault_MASK 0x000000FF 4246 4244 #define lpfc_acqe_fc_la_fault_WORD word1 4245 + #define lpfc_acqe_fc_la_link_status_SHIFT 8 4246 + #define lpfc_acqe_fc_la_link_status_MASK 0x0000007F 4247 + #define lpfc_acqe_fc_la_link_status_WORD word1 4247 4248 #define lpfc_acqe_fc_la_trunk_fault_SHIFT 0 4248 4249 #define lpfc_acqe_fc_la_trunk_fault_MASK 0x0000000F 4249 4250 #define lpfc_acqe_fc_la_trunk_fault_WORD word1
+78 -16
drivers/scsi/lpfc/lpfc_init.c
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 5190 5190 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, 5191 5191 struct lpfc_acqe_link *acqe_link) 5192 5192 { 5193 - switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { 5194 - case LPFC_ASYNC_LINK_FAULT_NONE: 5195 - case LPFC_ASYNC_LINK_FAULT_LOCAL: 5196 - case LPFC_ASYNC_LINK_FAULT_REMOTE: 5197 - case LPFC_ASYNC_LINK_FAULT_LR_LRR: 5193 + switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) { 5194 + case LPFC_FC_LA_TYPE_LINK_DOWN: 5195 + case LPFC_FC_LA_TYPE_TRUNKING_EVENT: 5196 + case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: 5197 + case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: 5198 5198 break; 5199 5199 default: 5200 - lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5201 - "0398 Unknown link fault code: x%x\n", 5202 - bf_get(lpfc_acqe_link_fault, acqe_link)); 5200 + switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { 5201 + case LPFC_ASYNC_LINK_FAULT_NONE: 5202 + case LPFC_ASYNC_LINK_FAULT_LOCAL: 5203 + case LPFC_ASYNC_LINK_FAULT_REMOTE: 5204 + case LPFC_ASYNC_LINK_FAULT_LR_LRR: 5205 + break; 5206 + default: 5207 + lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5208 + "0398 Unknown link fault code: x%x\n", 5209 + bf_get(lpfc_acqe_link_fault, acqe_link)); 5210 + break; 5211 + } 5203 5212 break; 5204 5213 } 5205 5214 } ··· 6291 6282 LPFC_MBOXQ_t *pmb; 6292 6283 MAILBOX_t *mb; 6293 6284 struct lpfc_mbx_read_top *la; 6285 + char *log_level; 6294 6286 int rc; 6295 6287 6296 6288 if (bf_get(lpfc_trailer_type, acqe_fc) != ··· 6323 6313 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); 6324 6314 phba->sli4_hba.link_state.fault = 6325 6315 bf_get(lpfc_acqe_link_fault, acqe_fc); 6316 + phba->sli4_hba.link_state.link_status = 6317 + bf_get(lpfc_acqe_fc_la_link_status, acqe_fc); 6326 6318 6327 - if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6328 - LPFC_FC_LA_TYPE_LINK_DOWN) 6329 - phba->sli4_hba.link_state.logical_speed = 0; 6330 - else if (!phba->sli4_hba.conf_trunk) 6331 - phba->sli4_hba.link_state.logical_speed = 6319 + /* 6320 + * Only select attention types need logical speed modification to what 6321 + * was previously set. 6322 + */ 6323 + if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP && 6324 + phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { 6325 + if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6326 + LPFC_FC_LA_TYPE_LINK_DOWN) 6327 + phba->sli4_hba.link_state.logical_speed = 0; 6328 + else if (!phba->sli4_hba.conf_trunk) 6329 + phba->sli4_hba.link_state.logical_speed = 6332 6330 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6331 + } 6333 6332 6334 6333 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6335 6334 "2896 Async FC event - Speed:%dGBaud Topology:x%x " 6336 6335 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" 6337 - "%dMbps Fault:%d\n", 6336 + "%dMbps Fault:x%x Link Status:x%x\n", 6338 6337 phba->sli4_hba.link_state.speed, 6339 6338 phba->sli4_hba.link_state.topology, 6340 6339 phba->sli4_hba.link_state.status, 6341 6340 phba->sli4_hba.link_state.type, 6342 6341 phba->sli4_hba.link_state.number, 6343 6342 phba->sli4_hba.link_state.logical_speed, 6344 - phba->sli4_hba.link_state.fault); 6343 + phba->sli4_hba.link_state.fault, 6344 + phba->sli4_hba.link_state.link_status); 6345 + 6346 + /* 6347 + * The following attention types are informational only, providing 6348 + * further details about link status. Overwrite the value of 6349 + * link_state.status appropriately. No further action is required. 6350 + */ 6351 + if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { 6352 + switch (phba->sli4_hba.link_state.status) { 6353 + case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: 6354 + log_level = KERN_WARNING; 6355 + phba->sli4_hba.link_state.status = 6356 + LPFC_FC_LA_TYPE_LINK_DOWN; 6357 + break; 6358 + case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: 6359 + /* 6360 + * During bb credit recovery establishment, receiving 6361 + * this attention type is normal. Link Up attention 6362 + * type is expected to occur before this informational 6363 + * attention type so keep the Link Up status. 6364 + */ 6365 + log_level = KERN_INFO; 6366 + phba->sli4_hba.link_state.status = 6367 + LPFC_FC_LA_TYPE_LINK_UP; 6368 + break; 6369 + default: 6370 + log_level = KERN_INFO; 6371 + break; 6372 + } 6373 + lpfc_log_msg(phba, log_level, LOG_SLI, 6374 + "2992 Async FC event - Informational Link " 6375 + "Attention Type x%x\n", 6376 + bf_get(lpfc_acqe_fc_la_att_type, acqe_fc)); 6377 + return; 6378 + } 6379 + 6345 6380 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 6346 6381 if (!pmb) { 6347 6382 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, ··· 13972 13917 /* Make sure that sge_supp_len can be handled by the driver */ 13973 13918 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) 13974 13919 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; 13920 + 13921 + rc = dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len); 13922 + if (unlikely(rc)) { 13923 + lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13924 + "6400 Can't set dma maximum segment size\n"); 13925 + return rc; 13926 + } 13975 13927 13976 13928 /* 13977 13929 * Check whether the adapter supports an embedded copy of the
+3 -5
drivers/scsi/lpfc/lpfc_scsi.c
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 1689 1689 struct lpfc_pde6 *pde6 = NULL; 1690 1690 struct lpfc_pde7 *pde7 = NULL; 1691 1691 dma_addr_t dataphysaddr, protphysaddr; 1692 - unsigned short curr_data = 0, curr_prot = 0; 1692 + unsigned short curr_prot = 0; 1693 1693 unsigned int split_offset; 1694 1694 unsigned int protgroup_len, protgroup_offset = 0, protgroup_remainder; 1695 1695 unsigned int protgrp_blks, protgrp_bytes; ··· 1858 1858 bpl->tus.w = le32_to_cpu(bpl->tus.w); 1859 1859 1860 1860 num_bde++; 1861 - curr_data++; 1862 1861 1863 1862 if (split_offset) 1864 1863 break; ··· 2118 2119 struct scatterlist *sgpe = NULL; /* s/g prot entry */ 2119 2120 struct sli4_sge_diseed *diseed = NULL; 2120 2121 dma_addr_t dataphysaddr, protphysaddr; 2121 - unsigned short curr_data = 0, curr_prot = 0; 2122 + unsigned short curr_prot = 0; 2122 2123 unsigned int split_offset; 2123 2124 unsigned int protgroup_len, protgroup_offset = 0, protgroup_remainder; 2124 2125 unsigned int protgrp_blks, protgrp_bytes; ··· 2363 2364 dma_offset += dma_len; 2364 2365 2365 2366 num_sge++; 2366 - curr_data++; 2367 2367 2368 2368 if (split_offset) { 2369 2369 sgl++;
+43 -40
drivers/scsi/lpfc/lpfc_sli.c
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 11270 11270 } 11271 11271 } 11272 11272 11273 + inline void lpfc_sli4_poll_eq(struct lpfc_queue *eq) 11274 + { 11275 + struct lpfc_hba *phba = eq->phba; 11276 + 11277 + /* 11278 + * Unlocking an irq is one of the entry point to check 11279 + * for re-schedule, but we are good for io submission 11280 + * path as midlayer does a get_cpu to glue us in. Flush 11281 + * out the invalidate queue so we can see the updated 11282 + * value for flag. 11283 + */ 11284 + smp_rmb(); 11285 + 11286 + if (READ_ONCE(eq->mode) == LPFC_EQ_POLL) 11287 + /* We will not likely get the completion for the caller 11288 + * during this iteration but i guess that's fine. 11289 + * Future io's coming on this eq should be able to 11290 + * pick it up. As for the case of single io's, they 11291 + * will be handled through a sched from polling timer 11292 + * function which is currently triggered every 1msec. 11293 + */ 11294 + lpfc_sli4_process_eq(phba, eq, LPFC_QUEUE_NOARM); 11295 + } 11296 + 11273 11297 /** 11274 11298 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb 11275 11299 * @phba: Pointer to HBA context object. ··· 11333 11309 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag); 11334 11310 spin_unlock_irqrestore(&pring->ring_lock, iflags); 11335 11311 11336 - lpfc_sli4_poll_eq(eq, LPFC_POLL_FASTPATH); 11312 + lpfc_sli4_poll_eq(eq); 11337 11313 } else { 11338 11314 /* For now, SLI2/3 will still use hbalock */ 11339 11315 spin_lock_irqsave(&phba->hbalock, iflags); ··· 15649 15625 { 15650 15626 struct lpfc_hba *phba = from_timer(phba, t, cpuhp_poll_timer); 15651 15627 struct lpfc_queue *eq; 15652 - int i = 0; 15653 15628 15654 15629 rcu_read_lock(); 15655 15630 15656 15631 list_for_each_entry_rcu(eq, &phba->poll_list, _poll_list) 15657 - i += lpfc_sli4_poll_eq(eq, LPFC_POLL_SLOWPATH); 15632 + lpfc_sli4_poll_eq(eq); 15658 15633 if (!list_empty(&phba->poll_list)) 15659 15634 mod_timer(&phba->cpuhp_poll_timer, 15660 15635 jiffies + msecs_to_jiffies(LPFC_POLL_HB)); 15661 15636 15662 15637 rcu_read_unlock(); 15663 - } 15664 - 15665 - inline int lpfc_sli4_poll_eq(struct lpfc_queue *eq, uint8_t path) 15666 - { 15667 - struct lpfc_hba *phba = eq->phba; 15668 - int i = 0; 15669 - 15670 - /* 15671 - * Unlocking an irq is one of the entry point to check 15672 - * for re-schedule, but we are good for io submission 15673 - * path as midlayer does a get_cpu to glue us in. Flush 15674 - * out the invalidate queue so we can see the updated 15675 - * value for flag. 15676 - */ 15677 - smp_rmb(); 15678 - 15679 - if (READ_ONCE(eq->mode) == LPFC_EQ_POLL) 15680 - /* We will not likely get the completion for the caller 15681 - * during this iteration but i guess that's fine. 15682 - * Future io's coming on this eq should be able to 15683 - * pick it up. As for the case of single io's, they 15684 - * will be handled through a sched from polling timer 15685 - * function which is currently triggered every 1msec. 15686 - */ 15687 - i = lpfc_sli4_process_eq(phba, eq, LPFC_QUEUE_NOARM); 15688 - 15689 - return i; 15690 15638 } 15691 15639 15692 15640 static inline void lpfc_sli4_add_to_poll_list(struct lpfc_queue *eq) ··· 20815 20819 struct lpfc_mbx_wr_object *wr_object; 20816 20820 LPFC_MBOXQ_t *mbox; 20817 20821 int rc = 0, i = 0; 20822 + int mbox_status = 0; 20818 20823 uint32_t shdr_status, shdr_add_status, shdr_add_status_2; 20819 20824 uint32_t shdr_change_status = 0, shdr_csf = 0; 20820 20825 uint32_t mbox_tmo; ··· 20861 20864 wr_object->u.request.bde_count = i; 20862 20865 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written); 20863 20866 if (!phba->sli4_hba.intr_enable) 20864 - rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL); 20867 + mbox_status = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL); 20865 20868 else { 20866 20869 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox); 20867 - rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo); 20870 + mbox_status = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo); 20868 20871 } 20872 + 20873 + /* The mbox status needs to be maintained to detect MBOX_TIMEOUT. */ 20874 + rc = mbox_status; 20875 + 20869 20876 /* The IOCTL status is embedded in the mailbox subheader. */ 20870 20877 shdr_status = bf_get(lpfc_mbox_hdr_status, 20871 20878 &wr_object->header.cfg_shdr.response); ··· 20884 20883 &wr_object->u.response); 20885 20884 } 20886 20885 20887 - if (!phba->sli4_hba.intr_enable) 20888 - mempool_free(mbox, phba->mbox_mem_pool); 20889 - else if (rc != MBX_TIMEOUT) 20890 - mempool_free(mbox, phba->mbox_mem_pool); 20891 20886 if (shdr_status || shdr_add_status || shdr_add_status_2 || rc) { 20892 20887 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 20893 20888 "3025 Write Object mailbox failed with " ··· 20901 20904 lpfc_log_fw_write_cmpl(phba, shdr_status, shdr_add_status, 20902 20905 shdr_add_status_2, shdr_change_status, 20903 20906 shdr_csf); 20907 + 20908 + if (!phba->sli4_hba.intr_enable) 20909 + mempool_free(mbox, phba->mbox_mem_pool); 20910 + else if (mbox_status != MBX_TIMEOUT) 20911 + mempool_free(mbox, phba->mbox_mem_pool); 20912 + 20904 20913 return rc; 20905 20914 } 20906 20915 ··· 21279 21276 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe); 21280 21277 spin_unlock_irqrestore(&pring->ring_lock, iflags); 21281 21278 21282 - lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH); 21279 + lpfc_sli4_poll_eq(qp->hba_eq); 21283 21280 return 0; 21284 21281 } 21285 21282 ··· 21301 21298 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe); 21302 21299 spin_unlock_irqrestore(&pring->ring_lock, iflags); 21303 21300 21304 - lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH); 21301 + lpfc_sli4_poll_eq(qp->hba_eq); 21305 21302 return 0; 21306 21303 } 21307 21304 ··· 21331 21328 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe); 21332 21329 spin_unlock_irqrestore(&pring->ring_lock, iflags); 21333 21330 21334 - lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH); 21331 + lpfc_sli4_poll_eq(qp->hba_eq); 21335 21332 return 0; 21336 21333 } 21337 21334 return WQE_ERROR;
+3 -2
drivers/scsi/lpfc/lpfc_sli4.h
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2009-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 291 291 uint8_t type; 292 292 uint8_t number; 293 293 uint8_t fault; 294 - uint32_t logical_speed; 294 + uint8_t link_status; 295 295 uint16_t topology; 296 + uint32_t logical_speed; 296 297 }; 297 298 298 299 struct lpfc_fcf_rec {
+3 -3
drivers/scsi/lpfc/lpfc_version.h
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 20 20 * included with this package. * 21 21 *******************************************************************/ 22 22 23 - #define LPFC_DRIVER_VERSION "14.2.0.9" 23 + #define LPFC_DRIVER_VERSION "14.2.0.10" 24 24 #define LPFC_DRIVER_NAME "lpfc" 25 25 26 26 /* Used for SLI 2/3 */ ··· 32 32 33 33 #define LPFC_MODULE_DESC "Emulex LightPulse Fibre Channel SCSI driver " \ 34 34 LPFC_DRIVER_VERSION 35 - #define LPFC_COPYRIGHT "Copyright (C) 2017-2022 Broadcom. All Rights " \ 35 + #define LPFC_COPYRIGHT "Copyright (C) 2017-2023 Broadcom. All Rights " \ 36 36 "Reserved. The term \"Broadcom\" refers to Broadcom Inc. " \ 37 37 "and/or its subsidiaries."
+40 -1
drivers/scsi/lpfc/lpfc_vmid.c
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 283 283 } 284 284 } 285 285 return rc; 286 + } 287 + 288 + /* 289 + * lpfc_reinit_vmid - reinitializes the vmid data structure 290 + * @vport: pointer to vport data structure 291 + * 292 + * This routine reinitializes the vmid post flogi completion 293 + * 294 + * Return codes 295 + * None 296 + */ 297 + void 298 + lpfc_reinit_vmid(struct lpfc_vport *vport) 299 + { 300 + u32 bucket, i, cpu; 301 + struct lpfc_vmid *cur; 302 + struct lpfc_vmid *vmp = NULL; 303 + struct hlist_node *tmp; 304 + 305 + write_lock(&vport->vmid_lock); 306 + vport->cur_vmid_cnt = 0; 307 + 308 + for (i = 0; i < vport->max_vmid; i++) { 309 + vmp = &vport->vmid[i]; 310 + vmp->flag = LPFC_VMID_SLOT_FREE; 311 + memset(vmp->host_vmid, 0, sizeof(vmp->host_vmid)); 312 + vmp->io_rd_cnt = 0; 313 + vmp->io_wr_cnt = 0; 314 + 315 + if (vmp->last_io_time) 316 + for_each_possible_cpu(cpu) 317 + *per_cpu_ptr(vmp->last_io_time, cpu) = 0; 318 + } 319 + 320 + /* for all elements in the hash table */ 321 + if (!hash_empty(vport->hash_table)) 322 + hash_for_each_safe(vport->hash_table, bucket, tmp, cur, hnode) 323 + hash_del(&cur->hnode); 324 + write_unlock(&vport->vmid_lock); 286 325 }
+3 -13
drivers/scsi/lpfc/lpfc_vport.c
··· 1 1 /******************************************************************* 2 2 * This file is part of the Emulex Linux Device Driver for * 3 3 * Fibre Channel Host Bus Adapters. * 4 - * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 4 + * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 7 * EMULEX and SLI are trademarks of Emulex. * ··· 534 534 { 535 535 struct lpfc_vport *vport = *(struct lpfc_vport **)fc_vport->dd_data; 536 536 struct lpfc_hba *phba = vport->phba; 537 - struct lpfc_nodelist *ndlp = NULL, *next_ndlp = NULL; 537 + struct lpfc_nodelist *ndlp = NULL; 538 538 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 539 539 540 540 /* Can't disable during an outstanding delete. */ ··· 546 546 (void)lpfc_send_npiv_logo(vport, ndlp); 547 547 548 548 lpfc_sli_host_down(vport); 549 - 550 - /* Mark all nodes for discovery so we can remove them by 551 - * calling lpfc_cleanup_rpis(vport, 1) 552 - */ 553 - list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { 554 - if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) 555 - continue; 556 - lpfc_disc_state_machine(vport, ndlp, NULL, 557 - NLP_EVT_DEVICE_RECOVERY); 558 - } 559 - lpfc_cleanup_rpis(vport, 1); 549 + lpfc_cleanup_rpis(vport, 0); 560 550 561 551 lpfc_stop_vport_timers(vport); 562 552 lpfc_unreg_all_rpis(vport);
+1 -1
drivers/scsi/megaraid/megaraid_sas_fusion.c
··· 3323 3323 /* copy the io request frame as well as 8 SGEs data for r1 command*/ 3324 3324 memcpy(r1_cmd->io_request, cmd->io_request, 3325 3325 (sizeof(struct MPI2_RAID_SCSI_IO_REQUEST))); 3326 - memcpy(&r1_cmd->io_request->SGL, &cmd->io_request->SGL, 3326 + memcpy(r1_cmd->io_request->SGLs, cmd->io_request->SGLs, 3327 3327 (fusion->max_sge_in_main_msg * sizeof(union MPI2_SGE_IO_UNION))); 3328 3328 /*sense buffer is different for r1 command*/ 3329 3329 r1_cmd->io_request->SenseBufferLowAddress =
+4 -1
drivers/scsi/megaraid/megaraid_sas_fusion.h
··· 526 526 __le32 Control; /* 0x3C */ 527 527 union MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */ 528 528 union RAID_CONTEXT_UNION RaidContext; /* 0x60 */ 529 - union MPI2_SGE_IO_UNION SGL; /* 0x80 */ 529 + union { 530 + union MPI2_SGE_IO_UNION SGL; /* 0x80 */ 531 + DECLARE_FLEX_ARRAY(union MPI2_SGE_IO_UNION, SGLs); 532 + }; 530 533 }; 531 534 532 535 /*
+3
drivers/scsi/mpt3sas/mpt3sas_base.c
··· 5849 5849 } 5850 5850 dma_pool_destroy(ioc->pcie_sgl_dma_pool); 5851 5851 } 5852 + kfree(ioc->pcie_sg_lookup); 5853 + ioc->pcie_sg_lookup = NULL; 5854 + 5852 5855 if (ioc->config_page) { 5853 5856 dexitprintk(ioc, 5854 5857 ioc_info(ioc, "config_page(0x%p): free\n",
+1 -1
drivers/scsi/mpt3sas/mpt3sas_ctl.c
··· 1884 1884 diag_register.requested_buffer_size>>10); 1885 1885 else if (ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] 1886 1886 & MPT3_DIAG_BUFFER_IS_REGISTERED) { 1887 - ioc_err(ioc, "Trace buffer memory %d KB allocated\n", 1887 + ioc_info(ioc, "Trace buffer memory %d KB allocated\n", 1888 1888 diag_register.requested_buffer_size>>10); 1889 1889 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) 1890 1890 ioc->diag_buffer_status[
+2 -2
drivers/scsi/mvumi.c
··· 1841 1841 cmd->frame->request_id = mhba->io_seq++; 1842 1842 cmd->request_id = cmd->frame->request_id; 1843 1843 mhba->tag_cmd[cmd->frame->tag] = cmd; 1844 - frame_len = sizeof(*ib_frame) - 4 + 1844 + frame_len = sizeof(*ib_frame) + 1845 1845 ib_frame->sg_counts * sizeof(struct mvumi_sgl); 1846 1846 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) { 1847 1847 struct mvumi_dyn_list_entry *dle; ··· 2387 2387 struct Scsi_Host *host = mhba->shost; 2388 2388 struct scsi_device *sdev = NULL; 2389 2389 int ret; 2390 - unsigned int max_sg = (mhba->ib_max_size + 4 - 2390 + unsigned int max_sg = (mhba->ib_max_size - 2391 2391 sizeof(struct mvumi_msg_frame)) / sizeof(struct mvumi_sgl); 2392 2392 2393 2393 host->irq = mhba->pdev->irq;
+3 -3
drivers/scsi/mvumi.h
··· 279 279 u16 request_id; 280 280 u16 reserved1; 281 281 u8 cdb[MAX_COMMAND_SIZE]; 282 - u32 payload[1]; 282 + u32 payload[]; 283 283 }; 284 284 285 285 /* ··· 294 294 u8 req_status; 295 295 u8 rsp_flag; /* Indicates the type of Data_Payload.*/ 296 296 u16 request_id; 297 - u32 payload[1]; 297 + u32 payload[]; 298 298 }; 299 299 300 300 struct mvumi_ob_data { ··· 380 380 u8 page_code; 381 381 u8 checksum; 382 382 u16 frame_length; 383 - u32 frame_content[1]; 383 + u32 frame_content[]; 384 384 }; 385 385 386 386 /*
+21 -25
drivers/scsi/pm8001/pm8001_ctl.c
··· 61 61 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 62 62 63 63 if (pm8001_ha->chip_id == chip_8001) { 64 - return snprintf(buf, PAGE_SIZE, "%d\n", 64 + return sysfs_emit(buf, "%d\n", 65 65 pm8001_ha->main_cfg_tbl.pm8001_tbl.interface_rev); 66 66 } else { 67 - return snprintf(buf, PAGE_SIZE, "%d\n", 67 + return sysfs_emit(buf, "%d\n", 68 68 pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev); 69 69 } 70 70 } ··· 86 86 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 87 87 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 88 88 89 - return snprintf(buf, PAGE_SIZE, "%d\n", 89 + return sysfs_emit(buf, "%d\n", 90 90 pm8001_ha->controller_fatal_error); 91 91 } 92 92 static DEVICE_ATTR_RO(controller_fatal_error); ··· 107 107 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 108 108 109 109 if (pm8001_ha->chip_id == chip_8001) { 110 - return snprintf(buf, PAGE_SIZE, "%02x.%02x.%02x.%02x\n", 110 + return sysfs_emit(buf, "%02x.%02x.%02x.%02x\n", 111 111 (u8)(pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev >> 24), 112 112 (u8)(pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev >> 16), 113 113 (u8)(pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev >> 8), 114 114 (u8)(pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev)); 115 115 } else { 116 - return snprintf(buf, PAGE_SIZE, "%02x.%02x.%02x.%02x\n", 116 + return sysfs_emit(buf, "%02x.%02x.%02x.%02x\n", 117 117 (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev >> 24), 118 118 (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev >> 16), 119 119 (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev >> 8), ··· 138 138 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 139 139 140 140 if (pm8001_ha->chip_id != chip_8001) { 141 - return snprintf(buf, PAGE_SIZE, "%02x.%02x.%02x.%02x\n", 141 + return sysfs_emit(buf, "%02x.%02x.%02x.%02x\n", 142 142 (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version >> 24), 143 143 (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version >> 16), 144 144 (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version >> 8), ··· 164 164 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 165 165 166 166 if (pm8001_ha->chip_id != chip_8001) { 167 - return snprintf(buf, PAGE_SIZE, "%02x.%02x.%02x.%02x\n", 167 + return sysfs_emit(buf, "%02x.%02x.%02x.%02x\n", 168 168 (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version >> 24), 169 169 (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version >> 16), 170 170 (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version >> 8), ··· 191 191 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 192 192 193 193 if (pm8001_ha->chip_id == chip_8001) { 194 - return snprintf(buf, PAGE_SIZE, "%d\n", 194 + return sysfs_emit(buf, "%d\n", 195 195 pm8001_ha->main_cfg_tbl.pm8001_tbl.max_out_io); 196 196 } else { 197 - return snprintf(buf, PAGE_SIZE, "%d\n", 197 + return sysfs_emit(buf, "%d\n", 198 198 pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io); 199 199 } 200 200 } ··· 215 215 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 216 216 217 217 if (pm8001_ha->chip_id == chip_8001) { 218 - return snprintf(buf, PAGE_SIZE, "%04d\n", 219 - (u16)(pm8001_ha->main_cfg_tbl.pm8001_tbl.max_sgl >> 16) 220 - ); 218 + return sysfs_emit(buf, "%04d\n", 219 + (u16)(pm8001_ha->main_cfg_tbl.pm8001_tbl.max_sgl >> 16)); 221 220 } else { 222 - return snprintf(buf, PAGE_SIZE, "%04d\n", 223 - (u16)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl >> 16) 224 - ); 221 + return sysfs_emit(buf, "%04d\n", 222 + (u16)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl >> 16)); 225 223 } 226 224 } 227 225 static DEVICE_ATTR(max_devices, S_IRUGO, pm8001_ctl_max_devices_show, NULL); ··· 240 242 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 241 243 242 244 if (pm8001_ha->chip_id == chip_8001) { 243 - return snprintf(buf, PAGE_SIZE, "%04d\n", 244 - pm8001_ha->main_cfg_tbl.pm8001_tbl.max_sgl & 0x0000FFFF 245 - ); 245 + return sysfs_emit(buf, "%04d\n", 246 + pm8001_ha->main_cfg_tbl.pm8001_tbl.max_sgl & 0x0000FFFF); 246 247 } else { 247 - return snprintf(buf, PAGE_SIZE, "%04d\n", 248 - pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl & 0x0000FFFF 249 - ); 248 + return sysfs_emit(buf, "%04d\n", 249 + pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl & 0x0000FFFF); 250 250 } 251 251 } 252 252 static DEVICE_ATTR(max_sg_list, S_IRUGO, pm8001_ctl_max_sg_list_show, NULL); ··· 311 315 struct Scsi_Host *shost = class_to_shost(cdev); 312 316 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 313 317 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 314 - return snprintf(buf, PAGE_SIZE, "0x%016llx\n", 318 + return sysfs_emit(buf, "0x%016llx\n", 315 319 be64_to_cpu(*(__be64 *)pm8001_ha->sas_addr)); 316 320 } 317 321 static DEVICE_ATTR(host_sas_address, S_IRUGO, ··· 332 336 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 333 337 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 334 338 335 - return snprintf(buf, PAGE_SIZE, "%08xh\n", pm8001_ha->logging_level); 339 + return sysfs_emit(buf, "%08xh\n", pm8001_ha->logging_level); 336 340 } 337 341 338 342 static ssize_t pm8001_ctl_logging_level_store(struct device *cdev, ··· 513 517 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 514 518 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 515 519 516 - return snprintf(buf, PAGE_SIZE, "%d\n", 520 + return sysfs_emit(buf, "%d\n", 517 521 pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size); 518 522 } 519 523 static DEVICE_ATTR_RO(event_log_size); ··· 600 604 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 601 605 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 602 606 603 - return snprintf(buf, PAGE_SIZE, "%08x", 607 + return sysfs_emit(buf, "%08x\n", 604 608 pm8001_ha->non_fatal_count); 605 609 } 606 610
+2 -3
drivers/scsi/qla2xxx/qla_attr.c
··· 2732 2732 spin_lock_irqsave(host->host_lock, flags); 2733 2733 /* Confirm port has not reappeared before clearing pointers. */ 2734 2734 if (rport->port_state != FC_PORTSTATE_ONLINE) { 2735 - fcport->rport = fcport->drport = NULL; 2735 + fcport->rport = NULL; 2736 2736 *((fc_port_t **)rport->dd_data) = NULL; 2737 2737 } 2738 2738 spin_unlock_irqrestore(host->host_lock, flags); ··· 3171 3171 3172 3172 set_bit(VPORT_DELETE, &vha->dpc_flags); 3173 3173 3174 - while (test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags) || 3175 - test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags)) 3174 + while (test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags)) 3176 3175 msleep(1000); 3177 3176 3178 3177
+5 -4
drivers/scsi/qla2xxx/qla_bsg.c
··· 278 278 const char *type; 279 279 int req_sg_cnt, rsp_sg_cnt; 280 280 int rval = (DID_ERROR << 16); 281 - uint16_t nextlid = 0; 282 281 uint32_t els_cmd = 0; 282 + int qla_port_allocated = 0; 283 283 284 284 if (bsg_request->msgcode == FC_BSG_RPT_ELS) { 285 285 rport = fc_bsg_to_rport(bsg_job); ··· 329 329 /* make sure the rport is logged in, 330 330 * if not perform fabric login 331 331 */ 332 - if (qla2x00_fabric_login(vha, fcport, &nextlid)) { 332 + if (atomic_read(&fcport->state) != FCS_ONLINE) { 333 333 ql_dbg(ql_dbg_user, vha, 0x7003, 334 - "Failed to login port %06X for ELS passthru.\n", 334 + "Port %06X is not online for ELS passthru.\n", 335 335 fcport->d_id.b24); 336 336 rval = -EIO; 337 337 goto done; ··· 348 348 goto done; 349 349 } 350 350 351 + qla_port_allocated = 1; 351 352 /* Initialize all required fields of fcport */ 352 353 fcport->vha = vha; 353 354 fcport->d_id.b.al_pa = ··· 433 432 goto done_free_fcport; 434 433 435 434 done_free_fcport: 436 - if (bsg_request->msgcode != FC_BSG_RPT_ELS) 435 + if (qla_port_allocated) 437 436 qla2x00_free_fcport(fcport); 438 437 done: 439 438 return rval;
+36 -15
drivers/scsi/qla2xxx/qla_def.h
··· 384 384 struct req_que; 385 385 struct qla_tgt_sess; 386 386 387 + struct qla_buf_dsc { 388 + u16 tag; 389 + #define TAG_FREED 0xffff 390 + void *buf; 391 + dma_addr_t buf_dma; 392 + }; 393 + 387 394 /* 388 395 * SCSI Request Block 389 396 */ ··· 399 392 uint32_t request_sense_length; 400 393 uint32_t fw_sense_length; 401 394 uint8_t *request_sense_ptr; 402 - struct ct6_dsd *ct6_ctx; 403 395 struct crc_context *crc_ctx; 396 + struct ct6_dsd ct6_ctx; 397 + struct qla_buf_dsc buf_dsc; 404 398 }; 405 399 406 400 /* 407 401 * SRB flag definitions 408 402 */ 409 403 #define SRB_DMA_VALID BIT_0 /* Command sent to ISP */ 404 + #define SRB_GOT_BUF BIT_1 410 405 #define SRB_FCP_CMND_DMA_VALID BIT_12 /* DIF: DSD List valid */ 411 406 #define SRB_CRC_CTX_DMA_VALID BIT_2 /* DIF: context DMA valid */ 412 407 #define SRB_CRC_PROT_DMA_VALID BIT_4 /* DIF: prot DMA valid */ ··· 669 660 670 661 struct iocb_resource { 671 662 u8 res_type; 672 - u8 pad; 663 + u8 exch_cnt; 673 664 u16 iocb_cnt; 674 665 }; 675 666 ··· 2494 2485 2495 2486 enum discovery_state { 2496 2487 DSC_DELETED, 2497 - DSC_GNN_ID, 2498 2488 DSC_GNL, 2499 2489 DSC_LOGIN_PEND, 2500 2490 DSC_LOGIN_FAILED, ··· 2604 2596 2605 2597 int login_retry; 2606 2598 2607 - struct fc_rport *rport, *drport; 2599 + struct fc_rport *rport; 2608 2600 u32 supported_classes; 2609 2601 2610 2602 uint8_t fc4_type; ··· 2707 2699 2708 2700 static const char *const port_dstate_str[] = { 2709 2701 [DSC_DELETED] = "DELETED", 2710 - [DSC_GNN_ID] = "GNN_ID", 2711 2702 [DSC_GNL] = "GNL", 2712 2703 [DSC_LOGIN_PEND] = "LOGIN_PEND", 2713 2704 [DSC_LOGIN_FAILED] = "LOGIN_FAILED", ··· 3469 3462 int have_irq; 3470 3463 int in_use; 3471 3464 uint32_t vector; 3465 + uint32_t vector_base0; 3472 3466 uint16_t entry; 3473 3467 char name[30]; 3474 3468 void *handle; ··· 3487 3479 QLA_EVT_ASYNC_ADISC, 3488 3480 QLA_EVT_UEVENT, 3489 3481 QLA_EVT_AENFX, 3490 - QLA_EVT_GPNID, 3491 3482 QLA_EVT_UNMAP, 3492 3483 QLA_EVT_NEW_SESS, 3493 3484 QLA_EVT_GPDB, ··· 3500 3493 QLA_EVT_GPNFT, 3501 3494 QLA_EVT_GPNFT_DONE, 3502 3495 QLA_EVT_GNNFT_DONE, 3503 - QLA_EVT_GNNID, 3504 3496 QLA_EVT_GFPNID, 3505 3497 QLA_EVT_SP_RETRY, 3506 3498 QLA_EVT_IIDMA, ··· 3542 3536 } iosb; 3543 3537 struct { 3544 3538 port_id_t id; 3545 - } gpnid; 3546 - struct { 3547 - port_id_t id; 3548 3539 u8 port_name[8]; 3549 3540 u8 node_name[8]; 3550 3541 void *pla; 3551 3542 u8 fc4_type; 3552 3543 } new_sess; 3553 - struct { /*Get PDB, Get Speed, update fcport, gnl, gidpn */ 3544 + struct { /*Get PDB, Get Speed, update fcport, gnl */ 3554 3545 fc_port_t *fcport; 3555 3546 u8 opt; 3556 3547 } fcport; ··· 3724 3721 u16 iocbs_limit; 3725 3722 u16 iocbs_qp_limit; 3726 3723 u16 iocbs_used; 3724 + u16 exch_total; 3725 + u16 exch_limit; 3726 + u16 exch_used; 3727 + u16 pad; 3727 3728 }; 3728 3729 3729 3730 #define QLA_IOCB_PCT_LIMIT 95 3731 + 3732 + struct qla_buf_pool { 3733 + u16 num_bufs; 3734 + u16 num_active; 3735 + u16 max_used; 3736 + u16 num_alloc; 3737 + u16 prev_max; 3738 + u16 pad; 3739 + uint32_t take_snapshot:1; 3740 + unsigned long *buf_map; 3741 + void **buf_array; 3742 + dma_addr_t *dma_array; 3743 + }; 3730 3744 3731 3745 /*Queue pair data structure */ 3732 3746 struct qla_qpair { ··· 3798 3778 struct qla_tgt_counters tgt_counters; 3799 3779 uint16_t cpuid; 3800 3780 struct qla_fw_resources fwres ____cacheline_aligned; 3781 + struct qla_buf_pool buf_pool; 3801 3782 u32 cmd_cnt; 3802 3783 u32 cmd_completion_cnt; 3803 3784 u32 prev_completion_cnt; ··· 3959 3938 __le32 __iomem *atio_q_out; 3960 3939 3961 3940 const struct qla_tgt_func_tmpl *tgt_ops; 3962 - struct qla_tgt_vp_map *tgt_vp_map; 3963 3941 3964 3942 int saved_set; 3965 3943 __le16 saved_exchange_count; ··· 4126 4106 struct req_que **req_q_map; 4127 4107 struct rsp_que **rsp_q_map; 4128 4108 struct qla_qpair **queue_pair_map; 4109 + struct qla_qpair **qp_cpu_map; 4129 4110 unsigned long req_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)]; 4130 4111 unsigned long rsp_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)]; 4131 4112 unsigned long qpair_qid_map[(QLA_MAX_QUEUES / 8) ··· 4783 4762 spinlock_t sadb_lock; /* protects list */ 4784 4763 struct els_reject elsrej; 4785 4764 u8 edif_post_stop_cnt_down; 4765 + struct qla_vp_map *vp_map; 4786 4766 }; 4787 4767 4788 4768 #define RX_ELS_SIZE (roundup(sizeof(struct enode) + ELS_MAX_PAYLOAD, SMP_CACHE_BYTES)) ··· 4879 4857 #define LOOP_READY 5 4880 4858 #define LOOP_DEAD 6 4881 4859 4860 + unsigned long buf_expired; 4882 4861 unsigned long relogin_jif; 4883 4862 unsigned long dpc_flags; 4884 4863 #define RESET_MARKER_NEEDED 0 /* Send marker to ISP. */ ··· 4895 4872 #define ISP_ABORT_RETRY 10 /* ISP aborted. */ 4896 4873 #define BEACON_BLINK_NEEDED 11 4897 4874 #define REGISTER_FDMI_NEEDED 12 4898 - #define FCPORT_UPDATE_NEEDED 13 4899 4875 #define VP_DPC_NEEDED 14 /* wake up for VP dpc handling */ 4900 4876 #define UNLOADING 15 4901 4877 #define NPIV_CONFIG_NEEDED 16 ··· 5044 5022 uint8_t n2n_port_name[WWN_SIZE]; 5045 5023 uint16_t n2n_id; 5046 5024 __le16 dport_data[4]; 5047 - struct list_head gpnid_list; 5048 5025 struct fab_scan scan; 5049 5026 uint8_t scm_fabric_connection_flags; 5050 5027 ··· 5085 5064 #define SET_AL_PA 2 5086 5065 #define RESET_VP_IDX 3 5087 5066 #define RESET_AL_PA 4 5088 - struct qla_tgt_vp_map { 5067 + struct qla_vp_map { 5089 5068 uint8_t idx; 5090 5069 scsi_qla_host_t *vha; 5091 5070 };
+8 -2
drivers/scsi/qla2xxx/qla_dfs.c
··· 235 235 uint16_t mb[MAX_IOCB_MB_REG]; 236 236 int rc; 237 237 struct qla_hw_data *ha = vha->hw; 238 - u16 iocbs_used, i; 238 + u16 iocbs_used, i, exch_used; 239 239 240 240 rc = qla24xx_res_count_wait(vha, mb, SIZEOF_IOCB_MB_REG); 241 241 if (rc != QLA_SUCCESS) { ··· 263 263 if (ql2xenforce_iocb_limit) { 264 264 /* lock is not require. It's an estimate. */ 265 265 iocbs_used = ha->base_qpair->fwres.iocbs_used; 266 + exch_used = ha->base_qpair->fwres.exch_used; 266 267 for (i = 0; i < ha->max_qpairs; i++) { 267 - if (ha->queue_pair_map[i]) 268 + if (ha->queue_pair_map[i]) { 268 269 iocbs_used += ha->queue_pair_map[i]->fwres.iocbs_used; 270 + exch_used += ha->queue_pair_map[i]->fwres.exch_used; 271 + } 269 272 } 270 273 271 274 seq_printf(s, "Driver: estimate iocb used [%d] high water limit [%d]\n", 272 275 iocbs_used, ha->base_qpair->fwres.iocbs_limit); 276 + 277 + seq_printf(s, "estimate exchange used[%d] high water limit [%d] n", 278 + exch_used, ha->base_qpair->fwres.exch_limit); 273 279 } 274 280 275 281 return 0;
+63 -33
drivers/scsi/qla2xxx/qla_edif.c
··· 480 480 } 481 481 482 482 /** 483 + * qla_delete_n2n_sess_and_wait: search for N2N session, tear it down and 484 + * wait for tear down to complete. In N2N topology, there is only one 485 + * session being active in tracking the remote device. 486 + * @vha: host adapter pointer 487 + * return code: 0 - found the session and completed the tear down. 488 + * 1 - timeout occurred. Caller to use link bounce to reset. 489 + */ 490 + static int qla_delete_n2n_sess_and_wait(scsi_qla_host_t *vha) 491 + { 492 + struct fc_port *fcport; 493 + int rc = -EIO; 494 + ulong expire = jiffies + 23 * HZ; 495 + 496 + if (!N2N_TOPO(vha->hw)) 497 + return 0; 498 + 499 + fcport = NULL; 500 + list_for_each_entry(fcport, &vha->vp_fcports, list) { 501 + if (!fcport->n2n_flag) 502 + continue; 503 + 504 + ql_dbg(ql_dbg_disc, fcport->vha, 0x2016, 505 + "%s reset sess at app start \n", __func__); 506 + 507 + qla_edif_sa_ctl_init(vha, fcport); 508 + qlt_schedule_sess_for_deletion(fcport); 509 + 510 + while (time_before_eq(jiffies, expire)) { 511 + if (fcport->disc_state != DSC_DELETE_PEND) { 512 + rc = 0; 513 + break; 514 + } 515 + msleep(1); 516 + } 517 + 518 + set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 519 + break; 520 + } 521 + 522 + return rc; 523 + } 524 + 525 + /** 483 526 * qla_edif_app_start: application has announce its present 484 527 * @vha: host adapter pointer 485 528 * @bsg_job: user request ··· 561 518 fcport->n2n_link_reset_cnt = 0; 562 519 563 520 if (vha->hw->flags.n2n_fw_acc_sec) { 564 - list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) 565 - qla_edif_sa_ctl_init(vha, fcport); 566 - 521 + bool link_bounce = false; 567 522 /* 568 523 * While authentication app was not running, remote device 569 524 * could still try to login with this local port. Let's 570 - * clear the state and try again. 525 + * reset the session, reconnect and re-authenticate. 571 526 */ 572 - qla2x00_wait_for_sess_deletion(vha); 527 + if (qla_delete_n2n_sess_and_wait(vha)) 528 + link_bounce = true; 573 529 574 - /* bounce the link to get the other guy to relogin */ 575 - if (!vha->hw->flags.n2n_bigger) { 530 + /* bounce the link to start login */ 531 + if (!vha->hw->flags.n2n_bigger || link_bounce) { 576 532 set_bit(N2N_LINK_RESET, &vha->dpc_flags); 577 533 qla2xxx_wake_dpc(vha); 578 534 } ··· 967 925 if (!(fcport->flags & FCF_FCSP_DEVICE)) 968 926 continue; 969 927 970 - tdid = app_req.remote_pid; 928 + tdid.b.domain = app_req.remote_pid.domain; 929 + tdid.b.area = app_req.remote_pid.area; 930 + tdid.b.al_pa = app_req.remote_pid.al_pa; 971 931 972 932 ql_dbg(ql_dbg_edif, vha, 0x2058, 973 933 "APP request entry - portid=%06x.\n", tdid.b24); ··· 3033 2989 tot_dsds = nseg; 3034 2990 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds); 3035 2991 3036 - sp->iores.res_type = RESOURCE_INI; 2992 + sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH; 2993 + sp->iores.exch_cnt = 1; 3037 2994 sp->iores.iocb_cnt = req_cnt; 3038 - if (qla_get_iocbs(sp->qpair, &sp->iores)) 2995 + if (qla_get_fw_resources(sp->qpair, &sp->iores)) 3039 2996 goto queuing_error; 3040 2997 3041 2998 if (req->cnt < (req_cnt + 2)) { ··· 3051 3006 goto queuing_error; 3052 3007 } 3053 3008 3054 - ctx = sp->u.scmd.ct6_ctx = 3055 - mempool_alloc(ha->ctx_mempool, GFP_ATOMIC); 3056 - if (!ctx) { 3057 - ql_log(ql_log_fatal, vha, 0x3010, 3058 - "Failed to allocate ctx for cmd=%p.\n", cmd); 3059 - goto queuing_error; 3060 - } 3061 - 3062 - memset(ctx, 0, sizeof(struct ct6_dsd)); 3063 - ctx->fcp_cmnd = dma_pool_zalloc(ha->fcp_cmnd_dma_pool, 3064 - GFP_ATOMIC, &ctx->fcp_cmnd_dma); 3065 - if (!ctx->fcp_cmnd) { 3009 + if (qla_get_buf(vha, sp->qpair, &sp->u.scmd.buf_dsc)) { 3066 3010 ql_log(ql_log_fatal, vha, 0x3011, 3067 - "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd); 3011 + "Failed to allocate buf for fcp_cmnd for cmd=%p.\n", cmd); 3068 3012 goto queuing_error; 3069 3013 } 3070 3014 3071 - /* Initialize the DSD list and dma handle */ 3072 - INIT_LIST_HEAD(&ctx->dsd_list); 3073 - ctx->dsd_use_cnt = 0; 3015 + sp->flags |= SRB_GOT_BUF; 3016 + ctx = &sp->u.scmd.ct6_ctx; 3017 + ctx->fcp_cmnd = sp->u.scmd.buf_dsc.buf; 3018 + ctx->fcp_cmnd_dma = sp->u.scmd.buf_dsc.buf_dma; 3074 3019 3075 3020 if (cmd->cmd_len > 16) { 3076 3021 additional_cdb_len = cmd->cmd_len - 16; ··· 3179 3144 cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len); 3180 3145 put_unaligned_le64(ctx->fcp_cmnd_dma, &cmd_pkt->fcp_cmnd_dseg_address); 3181 3146 3182 - sp->flags |= SRB_FCP_CMND_DMA_VALID; 3183 3147 cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd)); 3184 3148 /* Set total data segment count. */ 3185 3149 cmd_pkt->entry_count = (uint8_t)req_cnt; ··· 3210 3176 return QLA_SUCCESS; 3211 3177 3212 3178 queuing_error_fcp_cmnd: 3213 - dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma); 3214 3179 queuing_error: 3215 3180 if (tot_dsds) 3216 3181 scsi_dma_unmap(cmd); 3217 3182 3218 - if (sp->u.scmd.ct6_ctx) { 3219 - mempool_free(sp->u.scmd.ct6_ctx, ha->ctx_mempool); 3220 - sp->u.scmd.ct6_ctx = NULL; 3221 - } 3222 - qla_put_iocbs(sp->qpair, &sp->iores); 3183 + qla_put_buf(sp->qpair, &sp->u.scmd.buf_dsc); 3184 + qla_put_fw_resources(sp->qpair, &sp->iores); 3223 3185 spin_unlock_irqrestore(lock, flags); 3224 3186 3225 3187 return QLA_FUNCTION_FAILED;
+2
drivers/scsi/qla2xxx/qla_edif.h
··· 145 145 (qla_ini_mode_enabled(_s->vha) && (_s->disc_state == DSC_DELETE_PEND || \ 146 146 _s->disc_state == DSC_DELETED)) 147 147 148 + #define EDIF_CAP(_ha) (ql2xsecenable && IS_QLA28XX(_ha)) 149 + 148 150 #endif /* __QLA_EDIF_H */
+14 -1
drivers/scsi/qla2xxx/qla_edif_bsg.h
··· 89 89 struct app_pinfo_req { 90 90 struct app_id app_info; 91 91 uint8_t num_ports; 92 - port_id_t remote_pid; 92 + struct { 93 + #ifdef __BIG_ENDIAN 94 + uint8_t domain; 95 + uint8_t area; 96 + uint8_t al_pa; 97 + #elif defined(__LITTLE_ENDIAN) 98 + uint8_t al_pa; 99 + uint8_t area; 100 + uint8_t domain; 101 + #else 102 + #error "__BIG_ENDIAN or __LITTLE_ENDIAN must be defined!" 103 + #endif 104 + uint8_t rsvd_1; 105 + } remote_pid; 93 106 uint8_t version; 94 107 uint8_t pad[VND_CMD_PAD_SIZE]; 95 108 uint8_t reserved[VND_CMD_APP_RESERVED_SIZE];
+9 -9
drivers/scsi/qla2xxx/qla_gbl.h
··· 257 257 /* 258 258 * Global Functions in qla_mid.c source file. 259 259 */ 260 + extern void qla_update_vp_map(struct scsi_qla_host *, int); 260 261 extern struct scsi_host_template qla2xxx_driver_template; 261 262 extern struct scsi_transport_template *qla2xxx_transport_vport_template; 262 263 extern void qla2x00_timer(struct timer_list *); ··· 293 292 extern void qla2x00_async_event(scsi_qla_host_t *, struct rsp_que *, 294 293 uint16_t *); 295 294 extern int qla2x00_vp_abort_isp(scsi_qla_host_t *); 295 + void qla_adjust_buf(struct scsi_qla_host *); 296 296 297 297 /* 298 298 * Global Function Prototypes in qla_iocb.c source file. ··· 723 721 struct ct_sns_rsp *, const char *); 724 722 extern void qla2x00_async_iocb_timeout(void *data); 725 723 726 - extern int qla24xx_post_gpnid_work(struct scsi_qla_host *, port_id_t *); 727 - extern int qla24xx_async_gpnid(scsi_qla_host_t *, port_id_t *); 728 - void qla24xx_handle_gpnid_event(scsi_qla_host_t *, struct event_arg *); 729 - 730 724 int qla24xx_post_gpsc_work(struct scsi_qla_host *, fc_port_t *); 731 725 int qla24xx_async_gpsc(scsi_qla_host_t *, fc_port_t *); 732 726 void qla24xx_handle_gpsc_event(scsi_qla_host_t *, struct event_arg *); ··· 732 734 int qla24xx_async_gpnft(scsi_qla_host_t *, u8, srb_t *); 733 735 void qla24xx_async_gpnft_done(scsi_qla_host_t *, srb_t *); 734 736 void qla24xx_async_gnnft_done(scsi_qla_host_t *, srb_t *); 735 - int qla24xx_async_gnnid(scsi_qla_host_t *, fc_port_t *); 736 - void qla24xx_handle_gnnid_event(scsi_qla_host_t *, struct event_arg *); 737 - int qla24xx_post_gnnid_work(struct scsi_qla_host *, fc_port_t *); 738 737 int qla24xx_post_gfpnid_work(struct scsi_qla_host *, fc_port_t *); 739 738 int qla24xx_async_gfpnid(scsi_qla_host_t *, fc_port_t *); 740 739 void qla24xx_handle_gfpnid_event(scsi_qla_host_t *, struct event_arg *); ··· 957 962 uint64_t wwn, port_id_t port_id, uint16_t loop_id, struct fc_port **); 958 963 void qla24xx_delete_sess_fn(struct work_struct *); 959 964 void qlt_unknown_atio_work_fn(struct work_struct *); 960 - void qlt_update_host_map(struct scsi_qla_host *, port_id_t); 965 + void qla_update_host_map(struct scsi_qla_host *, port_id_t); 961 966 void qla_remove_hostmap(struct qla_hw_data *ha); 962 967 void qlt_clr_qp_table(struct scsi_qla_host *vha); 963 968 void qlt_set_mode(struct scsi_qla_host *); ··· 970 975 (struct abort_entry_24xx *abt, srb_t *sp); 971 976 extern void qla_nvme_abort_process_comp_status 972 977 (struct abort_entry_24xx *abt, srb_t *sp); 978 + struct scsi_qla_host *qla_find_host_by_vp_idx(struct scsi_qla_host *vha, 979 + uint16_t vp_idx); 973 980 974 981 /* nvme.c */ 975 982 void qla_nvme_unregister_remote_port(struct fc_port *fcport); ··· 1016 1019 1017 1020 uint64_t qla2x00_get_num_tgts(scsi_qla_host_t *vha); 1018 1021 uint64_t qla2x00_count_set_bits(u32 num); 1019 - 1022 + int qla_create_buf_pool(struct scsi_qla_host *, struct qla_qpair *); 1023 + void qla_free_buf_pool(struct qla_qpair *); 1024 + int qla_get_buf(struct scsi_qla_host *, struct qla_qpair *, struct qla_buf_dsc *); 1025 + void qla_put_buf(struct qla_qpair *, struct qla_buf_dsc *); 1020 1026 #endif /* _QLA_GBL_H */
-407
drivers/scsi/qla2xxx/qla_gs.c
··· 2949 2949 return rval; 2950 2950 } 2951 2951 2952 - int qla24xx_post_gpnid_work(struct scsi_qla_host *vha, port_id_t *id) 2953 - { 2954 - struct qla_work_evt *e; 2955 - 2956 - if (test_bit(UNLOADING, &vha->dpc_flags) || 2957 - (vha->vp_idx && test_bit(VPORT_DELETE, &vha->dpc_flags))) 2958 - return 0; 2959 - 2960 - e = qla2x00_alloc_work(vha, QLA_EVT_GPNID); 2961 - if (!e) 2962 - return QLA_FUNCTION_FAILED; 2963 - 2964 - e->u.gpnid.id = *id; 2965 - return qla2x00_post_work(vha, e); 2966 - } 2967 - 2968 2952 void qla24xx_sp_unmap(scsi_qla_host_t *vha, srb_t *sp) 2969 2953 { 2970 2954 struct srb_iocb *c = &sp->u.iocb_cmd; ··· 2980 2996 /* ref: INIT */ 2981 2997 kref_put(&sp->cmd_kref, qla2x00_sp_release); 2982 2998 } 2983 - 2984 - void qla24xx_handle_gpnid_event(scsi_qla_host_t *vha, struct event_arg *ea) 2985 - { 2986 - fc_port_t *fcport, *conflict, *t; 2987 - u16 data[2]; 2988 - 2989 - ql_dbg(ql_dbg_disc, vha, 0xffff, 2990 - "%s %d port_id: %06x\n", 2991 - __func__, __LINE__, ea->id.b24); 2992 - 2993 - if (ea->rc) { 2994 - /* cable is disconnected */ 2995 - list_for_each_entry_safe(fcport, t, &vha->vp_fcports, list) { 2996 - if (fcport->d_id.b24 == ea->id.b24) 2997 - fcport->scan_state = QLA_FCPORT_SCAN; 2998 - 2999 - qlt_schedule_sess_for_deletion(fcport); 3000 - } 3001 - } else { 3002 - /* cable is connected */ 3003 - fcport = qla2x00_find_fcport_by_wwpn(vha, ea->port_name, 1); 3004 - if (fcport) { 3005 - list_for_each_entry_safe(conflict, t, &vha->vp_fcports, 3006 - list) { 3007 - if ((conflict->d_id.b24 == ea->id.b24) && 3008 - (fcport != conflict)) 3009 - /* 3010 - * 2 fcports with conflict Nport ID or 3011 - * an existing fcport is having nport ID 3012 - * conflict with new fcport. 3013 - */ 3014 - 3015 - conflict->scan_state = QLA_FCPORT_SCAN; 3016 - 3017 - qlt_schedule_sess_for_deletion(conflict); 3018 - } 3019 - 3020 - fcport->scan_needed = 0; 3021 - fcport->rscn_gen++; 3022 - fcport->scan_state = QLA_FCPORT_FOUND; 3023 - fcport->flags |= FCF_FABRIC_DEVICE; 3024 - if (fcport->login_retry == 0) { 3025 - fcport->login_retry = 3026 - vha->hw->login_retry_count; 3027 - ql_dbg(ql_dbg_disc, vha, 0xffff, 3028 - "Port login retry %8phN, lid 0x%04x cnt=%d.\n", 3029 - fcport->port_name, fcport->loop_id, 3030 - fcport->login_retry); 3031 - } 3032 - switch (fcport->disc_state) { 3033 - case DSC_LOGIN_COMPLETE: 3034 - /* recheck session is still intact. */ 3035 - ql_dbg(ql_dbg_disc, vha, 0x210d, 3036 - "%s %d %8phC revalidate session with ADISC\n", 3037 - __func__, __LINE__, fcport->port_name); 3038 - data[0] = data[1] = 0; 3039 - qla2x00_post_async_adisc_work(vha, fcport, 3040 - data); 3041 - break; 3042 - case DSC_DELETED: 3043 - ql_dbg(ql_dbg_disc, vha, 0x210d, 3044 - "%s %d %8phC login\n", __func__, __LINE__, 3045 - fcport->port_name); 3046 - fcport->d_id = ea->id; 3047 - qla24xx_fcport_handle_login(vha, fcport); 3048 - break; 3049 - case DSC_DELETE_PEND: 3050 - fcport->d_id = ea->id; 3051 - break; 3052 - default: 3053 - fcport->d_id = ea->id; 3054 - break; 3055 - } 3056 - } else { 3057 - list_for_each_entry_safe(conflict, t, &vha->vp_fcports, 3058 - list) { 3059 - if (conflict->d_id.b24 == ea->id.b24) { 3060 - /* 2 fcports with conflict Nport ID or 3061 - * an existing fcport is having nport ID 3062 - * conflict with new fcport. 3063 - */ 3064 - ql_dbg(ql_dbg_disc, vha, 0xffff, 3065 - "%s %d %8phC DS %d\n", 3066 - __func__, __LINE__, 3067 - conflict->port_name, 3068 - conflict->disc_state); 3069 - 3070 - conflict->scan_state = QLA_FCPORT_SCAN; 3071 - qlt_schedule_sess_for_deletion(conflict); 3072 - } 3073 - } 3074 - 3075 - /* create new fcport */ 3076 - ql_dbg(ql_dbg_disc, vha, 0x2065, 3077 - "%s %d %8phC post new sess\n", 3078 - __func__, __LINE__, ea->port_name); 3079 - qla24xx_post_newsess_work(vha, &ea->id, 3080 - ea->port_name, NULL, NULL, 0); 3081 - } 3082 - } 3083 - } 3084 - 3085 - static void qla2x00_async_gpnid_sp_done(srb_t *sp, int res) 3086 - { 3087 - struct scsi_qla_host *vha = sp->vha; 3088 - struct ct_sns_req *ct_req = 3089 - (struct ct_sns_req *)sp->u.iocb_cmd.u.ctarg.req; 3090 - struct ct_sns_rsp *ct_rsp = 3091 - (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp; 3092 - struct event_arg ea; 3093 - struct qla_work_evt *e; 3094 - unsigned long flags; 3095 - 3096 - if (res) 3097 - ql_dbg(ql_dbg_disc, vha, 0x2066, 3098 - "Async done-%s fail res %x rscn gen %d ID %3phC. %8phC\n", 3099 - sp->name, res, sp->gen1, &ct_req->req.port_id.port_id, 3100 - ct_rsp->rsp.gpn_id.port_name); 3101 - else 3102 - ql_dbg(ql_dbg_disc, vha, 0x2066, 3103 - "Async done-%s good rscn gen %d ID %3phC. %8phC\n", 3104 - sp->name, sp->gen1, &ct_req->req.port_id.port_id, 3105 - ct_rsp->rsp.gpn_id.port_name); 3106 - 3107 - memset(&ea, 0, sizeof(ea)); 3108 - memcpy(ea.port_name, ct_rsp->rsp.gpn_id.port_name, WWN_SIZE); 3109 - ea.sp = sp; 3110 - ea.id = be_to_port_id(ct_req->req.port_id.port_id); 3111 - ea.rc = res; 3112 - 3113 - spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 3114 - list_del(&sp->elem); 3115 - spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 3116 - 3117 - if (res) { 3118 - if (res == QLA_FUNCTION_TIMEOUT) { 3119 - qla24xx_post_gpnid_work(sp->vha, &ea.id); 3120 - /* ref: INIT */ 3121 - kref_put(&sp->cmd_kref, qla2x00_sp_release); 3122 - return; 3123 - } 3124 - } else if (sp->gen1) { 3125 - /* There was another RSCN for this Nport ID */ 3126 - qla24xx_post_gpnid_work(sp->vha, &ea.id); 3127 - /* ref: INIT */ 3128 - kref_put(&sp->cmd_kref, qla2x00_sp_release); 3129 - return; 3130 - } 3131 - 3132 - qla24xx_handle_gpnid_event(vha, &ea); 3133 - 3134 - e = qla2x00_alloc_work(vha, QLA_EVT_UNMAP); 3135 - if (!e) { 3136 - /* please ignore kernel warning. otherwise, we have mem leak. */ 3137 - dma_free_coherent(&vha->hw->pdev->dev, 3138 - sp->u.iocb_cmd.u.ctarg.req_allocated_size, 3139 - sp->u.iocb_cmd.u.ctarg.req, 3140 - sp->u.iocb_cmd.u.ctarg.req_dma); 3141 - sp->u.iocb_cmd.u.ctarg.req = NULL; 3142 - 3143 - dma_free_coherent(&vha->hw->pdev->dev, 3144 - sp->u.iocb_cmd.u.ctarg.rsp_allocated_size, 3145 - sp->u.iocb_cmd.u.ctarg.rsp, 3146 - sp->u.iocb_cmd.u.ctarg.rsp_dma); 3147 - sp->u.iocb_cmd.u.ctarg.rsp = NULL; 3148 - 3149 - /* ref: INIT */ 3150 - kref_put(&sp->cmd_kref, qla2x00_sp_release); 3151 - return; 3152 - } 3153 - 3154 - e->u.iosb.sp = sp; 3155 - qla2x00_post_work(vha, e); 3156 - } 3157 - 3158 - /* Get WWPN with Nport ID. */ 3159 - int qla24xx_async_gpnid(scsi_qla_host_t *vha, port_id_t *id) 3160 - { 3161 - int rval = QLA_FUNCTION_FAILED; 3162 - struct ct_sns_req *ct_req; 3163 - srb_t *sp, *tsp; 3164 - struct ct_sns_pkt *ct_sns; 3165 - unsigned long flags; 3166 - 3167 - if (!vha->flags.online) 3168 - goto done; 3169 - 3170 - /* ref: INIT */ 3171 - sp = qla2x00_get_sp(vha, NULL, GFP_KERNEL); 3172 - if (!sp) 3173 - goto done; 3174 - 3175 - sp->type = SRB_CT_PTHRU_CMD; 3176 - sp->name = "gpnid"; 3177 - sp->u.iocb_cmd.u.ctarg.id = *id; 3178 - sp->gen1 = 0; 3179 - qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 3180 - qla2x00_async_gpnid_sp_done); 3181 - 3182 - spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 3183 - list_for_each_entry(tsp, &vha->gpnid_list, elem) { 3184 - if (tsp->u.iocb_cmd.u.ctarg.id.b24 == id->b24) { 3185 - tsp->gen1++; 3186 - spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 3187 - /* ref: INIT */ 3188 - kref_put(&sp->cmd_kref, qla2x00_sp_release); 3189 - goto done; 3190 - } 3191 - } 3192 - list_add_tail(&sp->elem, &vha->gpnid_list); 3193 - spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 3194 - 3195 - sp->u.iocb_cmd.u.ctarg.req = dma_alloc_coherent(&vha->hw->pdev->dev, 3196 - sizeof(struct ct_sns_pkt), &sp->u.iocb_cmd.u.ctarg.req_dma, 3197 - GFP_KERNEL); 3198 - sp->u.iocb_cmd.u.ctarg.req_allocated_size = sizeof(struct ct_sns_pkt); 3199 - if (!sp->u.iocb_cmd.u.ctarg.req) { 3200 - ql_log(ql_log_warn, vha, 0xd041, 3201 - "Failed to allocate ct_sns request.\n"); 3202 - goto done_free_sp; 3203 - } 3204 - 3205 - sp->u.iocb_cmd.u.ctarg.rsp = dma_alloc_coherent(&vha->hw->pdev->dev, 3206 - sizeof(struct ct_sns_pkt), &sp->u.iocb_cmd.u.ctarg.rsp_dma, 3207 - GFP_KERNEL); 3208 - sp->u.iocb_cmd.u.ctarg.rsp_allocated_size = sizeof(struct ct_sns_pkt); 3209 - if (!sp->u.iocb_cmd.u.ctarg.rsp) { 3210 - ql_log(ql_log_warn, vha, 0xd042, 3211 - "Failed to allocate ct_sns request.\n"); 3212 - goto done_free_sp; 3213 - } 3214 - 3215 - ct_sns = (struct ct_sns_pkt *)sp->u.iocb_cmd.u.ctarg.rsp; 3216 - memset(ct_sns, 0, sizeof(*ct_sns)); 3217 - 3218 - ct_sns = (struct ct_sns_pkt *)sp->u.iocb_cmd.u.ctarg.req; 3219 - /* CT_IU preamble */ 3220 - ct_req = qla2x00_prep_ct_req(ct_sns, GPN_ID_CMD, GPN_ID_RSP_SIZE); 3221 - 3222 - /* GPN_ID req */ 3223 - ct_req->req.port_id.port_id = port_id_to_be_id(*id); 3224 - 3225 - sp->u.iocb_cmd.u.ctarg.req_size = GPN_ID_REQ_SIZE; 3226 - sp->u.iocb_cmd.u.ctarg.rsp_size = GPN_ID_RSP_SIZE; 3227 - sp->u.iocb_cmd.u.ctarg.nport_handle = NPH_SNS; 3228 - 3229 - ql_dbg(ql_dbg_disc, vha, 0x2067, 3230 - "Async-%s hdl=%x ID %3phC.\n", sp->name, 3231 - sp->handle, &ct_req->req.port_id.port_id); 3232 - 3233 - rval = qla2x00_start_sp(sp); 3234 - if (rval != QLA_SUCCESS) 3235 - goto done_free_sp; 3236 - 3237 - return rval; 3238 - 3239 - done_free_sp: 3240 - spin_lock_irqsave(&vha->hw->vport_slock, flags); 3241 - list_del(&sp->elem); 3242 - spin_unlock_irqrestore(&vha->hw->vport_slock, flags); 3243 - 3244 - if (sp->u.iocb_cmd.u.ctarg.req) { 3245 - dma_free_coherent(&vha->hw->pdev->dev, 3246 - sizeof(struct ct_sns_pkt), 3247 - sp->u.iocb_cmd.u.ctarg.req, 3248 - sp->u.iocb_cmd.u.ctarg.req_dma); 3249 - sp->u.iocb_cmd.u.ctarg.req = NULL; 3250 - } 3251 - if (sp->u.iocb_cmd.u.ctarg.rsp) { 3252 - dma_free_coherent(&vha->hw->pdev->dev, 3253 - sizeof(struct ct_sns_pkt), 3254 - sp->u.iocb_cmd.u.ctarg.rsp, 3255 - sp->u.iocb_cmd.u.ctarg.rsp_dma); 3256 - sp->u.iocb_cmd.u.ctarg.rsp = NULL; 3257 - } 3258 - /* ref: INIT */ 3259 - kref_put(&sp->cmd_kref, qla2x00_sp_release); 3260 - done: 3261 - return rval; 3262 - } 3263 - 3264 2999 3265 3000 void qla24xx_async_gffid_sp_done(srb_t *sp, int res) 3266 3001 { ··· 3891 4188 spin_lock_irqsave(&vha->work_lock, flags); 3892 4189 vha->scan.scan_flags &= ~SF_QUEUED; 3893 4190 spin_unlock_irqrestore(&vha->work_lock, flags); 3894 - } 3895 - 3896 - /* GNN_ID */ 3897 - void qla24xx_handle_gnnid_event(scsi_qla_host_t *vha, struct event_arg *ea) 3898 - { 3899 - qla24xx_post_gnl_work(vha, ea->fcport); 3900 - } 3901 - 3902 - static void qla2x00_async_gnnid_sp_done(srb_t *sp, int res) 3903 - { 3904 - struct scsi_qla_host *vha = sp->vha; 3905 - fc_port_t *fcport = sp->fcport; 3906 - u8 *node_name = fcport->ct_desc.ct_sns->p.rsp.rsp.gnn_id.node_name; 3907 - struct event_arg ea; 3908 - u64 wwnn; 3909 - 3910 - fcport->flags &= ~FCF_ASYNC_SENT; 3911 - wwnn = wwn_to_u64(node_name); 3912 - if (wwnn) 3913 - memcpy(fcport->node_name, node_name, WWN_SIZE); 3914 - 3915 - memset(&ea, 0, sizeof(ea)); 3916 - ea.fcport = fcport; 3917 - ea.sp = sp; 3918 - ea.rc = res; 3919 - 3920 - ql_dbg(ql_dbg_disc, vha, 0x204f, 3921 - "Async done-%s res %x, WWPN %8phC %8phC\n", 3922 - sp->name, res, fcport->port_name, fcport->node_name); 3923 - 3924 - qla24xx_handle_gnnid_event(vha, &ea); 3925 - 3926 - /* ref: INIT */ 3927 - kref_put(&sp->cmd_kref, qla2x00_sp_release); 3928 - } 3929 - 3930 - int qla24xx_async_gnnid(scsi_qla_host_t *vha, fc_port_t *fcport) 3931 - { 3932 - int rval = QLA_FUNCTION_FAILED; 3933 - struct ct_sns_req *ct_req; 3934 - srb_t *sp; 3935 - 3936 - if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 3937 - return rval; 3938 - 3939 - qla2x00_set_fcport_disc_state(fcport, DSC_GNN_ID); 3940 - /* ref: INIT */ 3941 - sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC); 3942 - if (!sp) 3943 - goto done; 3944 - 3945 - fcport->flags |= FCF_ASYNC_SENT; 3946 - sp->type = SRB_CT_PTHRU_CMD; 3947 - sp->name = "gnnid"; 3948 - sp->gen1 = fcport->rscn_gen; 3949 - sp->gen2 = fcport->login_gen; 3950 - qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 3951 - qla2x00_async_gnnid_sp_done); 3952 - 3953 - /* CT_IU preamble */ 3954 - ct_req = qla2x00_prep_ct_req(fcport->ct_desc.ct_sns, GNN_ID_CMD, 3955 - GNN_ID_RSP_SIZE); 3956 - 3957 - /* GNN_ID req */ 3958 - ct_req->req.port_id.port_id = port_id_to_be_id(fcport->d_id); 3959 - 3960 - 3961 - /* req & rsp use the same buffer */ 3962 - sp->u.iocb_cmd.u.ctarg.req = fcport->ct_desc.ct_sns; 3963 - sp->u.iocb_cmd.u.ctarg.req_dma = fcport->ct_desc.ct_sns_dma; 3964 - sp->u.iocb_cmd.u.ctarg.rsp = fcport->ct_desc.ct_sns; 3965 - sp->u.iocb_cmd.u.ctarg.rsp_dma = fcport->ct_desc.ct_sns_dma; 3966 - sp->u.iocb_cmd.u.ctarg.req_size = GNN_ID_REQ_SIZE; 3967 - sp->u.iocb_cmd.u.ctarg.rsp_size = GNN_ID_RSP_SIZE; 3968 - sp->u.iocb_cmd.u.ctarg.nport_handle = NPH_SNS; 3969 - 3970 - ql_dbg(ql_dbg_disc, vha, 0xffff, 3971 - "Async-%s - %8phC hdl=%x loopid=%x portid %06x.\n", 3972 - sp->name, fcport->port_name, 3973 - sp->handle, fcport->loop_id, fcport->d_id.b24); 3974 - 3975 - rval = qla2x00_start_sp(sp); 3976 - if (rval != QLA_SUCCESS) 3977 - goto done_free_sp; 3978 - return rval; 3979 - 3980 - done_free_sp: 3981 - /* ref: INIT */ 3982 - kref_put(&sp->cmd_kref, qla2x00_sp_release); 3983 - fcport->flags &= ~FCF_ASYNC_SENT; 3984 - done: 3985 - return rval; 3986 - } 3987 - 3988 - int qla24xx_post_gnnid_work(struct scsi_qla_host *vha, fc_port_t *fcport) 3989 - { 3990 - struct qla_work_evt *e; 3991 - int ls; 3992 - 3993 - ls = atomic_read(&vha->loop_state); 3994 - if (((ls != LOOP_READY) && (ls != LOOP_UP)) || 3995 - test_bit(UNLOADING, &vha->dpc_flags)) 3996 - return 0; 3997 - 3998 - e = qla2x00_alloc_work(vha, QLA_EVT_GNNID); 3999 - if (!e) 4000 - return QLA_FUNCTION_FAILED; 4001 - 4002 - e->u.fcport.fcport = fcport; 4003 - return qla2x00_post_work(vha, e); 4004 4191 } 4005 4192 4006 4193 /* GPFN_ID */
+35 -62
drivers/scsi/qla2xxx/qla_init.c
··· 128 128 sp->cmd_sp)) { 129 129 qpair->req->outstanding_cmds[handle] = NULL; 130 130 cmdsp_found = 1; 131 + qla_put_fw_resources(qpair, &sp->cmd_sp->iores); 131 132 } 132 133 133 134 /* removing the abort */ 134 135 if (qpair->req->outstanding_cmds[handle] == sp) { 135 136 qpair->req->outstanding_cmds[handle] = NULL; 136 137 sp_found = 1; 138 + qla_put_fw_resources(qpair, &sp->iores); 137 139 break; 138 140 } 139 141 } ··· 390 388 fcport->flags &= ~FCF_ASYNC_SENT; 391 389 done: 392 390 fcport->flags &= ~FCF_ASYNC_ACTIVE; 391 + 392 + /* 393 + * async login failed. Could be due to iocb/exchange resource 394 + * being low. Set state DELETED for re-login process to start again. 395 + */ 396 + qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 393 397 return rval; 394 398 } 395 399 ··· 1654 1646 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1655 1647 { 1656 1648 u16 data[2]; 1657 - u64 wwn; 1658 1649 u16 sec; 1659 1650 1660 1651 ql_dbg(ql_dbg_disc, vha, 0x20d8, ··· 1693 1686 1694 1687 switch (fcport->disc_state) { 1695 1688 case DSC_DELETED: 1696 - wwn = wwn_to_u64(fcport->node_name); 1697 1689 switch (vha->hw->current_topology) { 1698 1690 case ISP_CFG_N: 1699 1691 if (fcport_is_smaller(fcport)) { ··· 1716 1710 } 1717 1711 break; 1718 1712 default: 1719 - if (wwn == 0) { 1720 - ql_dbg(ql_dbg_disc, vha, 0xffff, 1721 - "%s %d %8phC post GNNID\n", 1722 - __func__, __LINE__, fcport->port_name); 1723 - qla24xx_post_gnnid_work(vha, fcport); 1724 - } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1713 + if (fcport->loop_id == FC_NO_LOOP_ID) { 1725 1714 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1726 1715 "%s %d %8phC post gnl\n", 1727 1716 __func__, __LINE__, fcport->port_name); ··· 2001 2000 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 2002 2001 if (sp->qpair->req->outstanding_cmds[h] == sp) { 2003 2002 sp->qpair->req->outstanding_cmds[h] = NULL; 2003 + qla_put_fw_resources(sp->qpair, &sp->iores); 2004 2004 break; 2005 2005 } 2006 2006 } ··· 2075 2073 done_free_sp: 2076 2074 /* ref: INIT */ 2077 2075 kref_put(&sp->cmd_kref, qla2x00_sp_release); 2078 - fcport->flags &= ~FCF_ASYNC_SENT; 2079 2076 done: 2080 2077 return rval; 2081 2078 } ··· 2316 2315 ea->fcport->login_pause = 1; 2317 2316 2318 2317 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2319 - "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2318 + "%s %d %8phC NPortId %06x inuse with loopid 0x%x.\n", 2320 2319 __func__, __LINE__, ea->fcport->port_name, 2321 2320 ea->fcport->d_id.b24, lid); 2322 2321 } else { ··· 3944 3943 ha->base_qpair->fwres.iocbs_limit = limit; 3945 3944 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps; 3946 3945 ha->base_qpair->fwres.iocbs_used = 0; 3946 + 3947 + ha->base_qpair->fwres.exch_total = ha->orig_fw_xcb_count; 3948 + ha->base_qpair->fwres.exch_limit = (ha->orig_fw_xcb_count * 3949 + QLA_IOCB_PCT_LIMIT) / 100; 3950 + ha->base_qpair->fwres.exch_used = 0; 3951 + 3947 3952 for (i = 0; i < ha->max_qpairs; i++) { 3948 3953 if (ha->queue_pair_map[i]) { 3949 3954 ha->queue_pair_map[i]->fwres.iocbs_total = ··· 3958 3951 ha->queue_pair_map[i]->fwres.iocbs_qp_limit = 3959 3952 limit / num_qps; 3960 3953 ha->queue_pair_map[i]->fwres.iocbs_used = 0; 3954 + ha->queue_pair_map[i]->fwres.exch_total = ha->orig_fw_xcb_count; 3955 + ha->queue_pair_map[i]->fwres.exch_limit = 3956 + (ha->orig_fw_xcb_count * QLA_IOCB_PCT_LIMIT) / 100; 3957 + ha->queue_pair_map[i]->fwres.exch_used = 0; 3961 3958 } 3962 3959 } 3963 3960 } ··· 4820 4809 spin_lock_irqsave(&ha->hardware_lock, flags); 4821 4810 if (vha->hw->flags.edif_enabled) { 4822 4811 if (topo != 2) 4823 - qlt_update_host_map(vha, id); 4812 + qla_update_host_map(vha, id); 4824 4813 } else if (!(topo == 2 && ha->flags.n2n_bigger)) 4825 - qlt_update_host_map(vha, id); 4814 + qla_update_host_map(vha, id); 4826 4815 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4827 4816 4828 4817 if (!vha->flags.init_done) ··· 5215 5204 "NVRAM configuration failed.\n"); 5216 5205 } 5217 5206 return (rval); 5218 - } 5219 - 5220 - static void 5221 - qla2x00_rport_del(void *data) 5222 - { 5223 - fc_port_t *fcport = data; 5224 - struct fc_rport *rport; 5225 - unsigned long flags; 5226 - 5227 - spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5228 - rport = fcport->drport ? fcport->drport : fcport->rport; 5229 - fcport->drport = NULL; 5230 - spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5231 - if (rport) { 5232 - ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 5233 - "%s %8phN. rport %p roles %x\n", 5234 - __func__, fcport->port_name, rport, 5235 - rport->roles); 5236 - 5237 - fc_remote_port_delete(rport); 5238 - } 5239 5207 } 5240 5208 5241 5209 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) ··· 6731 6741 } 6732 6742 6733 6743 return rval; 6734 - } 6735 - 6736 - void 6737 - qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6738 - { 6739 - fc_port_t *fcport; 6740 - struct scsi_qla_host *vha, *tvp; 6741 - struct qla_hw_data *ha = base_vha->hw; 6742 - unsigned long flags; 6743 - 6744 - spin_lock_irqsave(&ha->vport_slock, flags); 6745 - /* Go with deferred removal of rport references. */ 6746 - list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) { 6747 - atomic_inc(&vha->vref_count); 6748 - list_for_each_entry(fcport, &vha->vp_fcports, list) { 6749 - if (fcport->drport && 6750 - atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6751 - spin_unlock_irqrestore(&ha->vport_slock, flags); 6752 - qla2x00_rport_del(fcport); 6753 - 6754 - spin_lock_irqsave(&ha->vport_slock, flags); 6755 - } 6756 - } 6757 - atomic_dec(&vha->vref_count); 6758 - wake_up(&vha->vref_waitq); 6759 - } 6760 - spin_unlock_irqrestore(&ha->vport_slock, flags); 6761 6744 } 6762 6745 6763 6746 /* Assumes idc_lock always held on entry */ ··· 9424 9461 qpair->req = ha->req_q_map[req_id]; 9425 9462 qpair->rsp->req = qpair->req; 9426 9463 qpair->rsp->qpair = qpair; 9427 - /* init qpair to this cpu. Will adjust at run time. */ 9428 - qla_cpu_update(qpair, raw_smp_processor_id()); 9429 9464 9430 9465 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 9431 9466 if (ha->fw_attributes & BIT_4) ··· 9436 9475 "Failed to create srb mempool for qpair %d\n", 9437 9476 qpair->id); 9438 9477 goto fail_mempool; 9478 + } 9479 + 9480 + if (qla_create_buf_pool(vha, qpair)) { 9481 + ql_log(ql_log_warn, vha, 0xd036, 9482 + "Failed to initialize buf pool for qpair %d\n", 9483 + qpair->id); 9484 + goto fail_bufpool; 9439 9485 } 9440 9486 9441 9487 /* Mark as online */ ··· 9460 9492 } 9461 9493 return qpair; 9462 9494 9495 + fail_bufpool: 9496 + mempool_destroy(qpair->srb_mempool); 9463 9497 fail_mempool: 9498 + qla25xx_delete_req_que(vha, qpair->req); 9464 9499 fail_req: 9465 9500 qla25xx_delete_rsp_que(vha, qpair->rsp); 9466 9501 fail_rsp: ··· 9488 9517 struct qla_hw_data *ha = qpair->hw; 9489 9518 9490 9519 qpair->delete_in_progress = 1; 9520 + 9521 + qla_free_buf_pool(qpair); 9491 9522 9492 9523 ret = qla25xx_delete_req_que(vha, qpair->req); 9493 9524 if (ret != QLA_SUCCESS)
+93 -17
drivers/scsi/qla2xxx/qla_inline.h
··· 380 380 381 381 enum { 382 382 RESOURCE_NONE, 383 - RESOURCE_INI, 383 + RESOURCE_IOCB = BIT_0, 384 + RESOURCE_EXCH = BIT_1, /* exchange */ 385 + RESOURCE_FORCE = BIT_2, 384 386 }; 385 387 386 388 static inline int 387 - qla_get_iocbs(struct qla_qpair *qp, struct iocb_resource *iores) 389 + qla_get_fw_resources(struct qla_qpair *qp, struct iocb_resource *iores) 388 390 { 389 391 u16 iocbs_used, i; 392 + u16 exch_used; 390 393 struct qla_hw_data *ha = qp->vha->hw; 391 394 392 395 if (!ql2xenforce_iocb_limit) { 393 396 iores->res_type = RESOURCE_NONE; 394 397 return 0; 395 398 } 399 + if (iores->res_type & RESOURCE_FORCE) 400 + goto force; 396 401 397 - if ((iores->iocb_cnt + qp->fwres.iocbs_used) < qp->fwres.iocbs_qp_limit) { 398 - qp->fwres.iocbs_used += iores->iocb_cnt; 399 - return 0; 400 - } else { 402 + if ((iores->iocb_cnt + qp->fwres.iocbs_used) >= qp->fwres.iocbs_qp_limit) { 401 403 /* no need to acquire qpair lock. It's just rough calculation */ 402 404 iocbs_used = ha->base_qpair->fwres.iocbs_used; 403 405 for (i = 0; i < ha->max_qpairs; i++) { ··· 407 405 iocbs_used += ha->queue_pair_map[i]->fwres.iocbs_used; 408 406 } 409 407 410 - if ((iores->iocb_cnt + iocbs_used) < qp->fwres.iocbs_limit) { 411 - qp->fwres.iocbs_used += iores->iocb_cnt; 412 - return 0; 413 - } else { 408 + if ((iores->iocb_cnt + iocbs_used) >= qp->fwres.iocbs_limit) { 414 409 iores->res_type = RESOURCE_NONE; 415 410 return -ENOSPC; 416 411 } 417 412 } 413 + 414 + if (iores->res_type & RESOURCE_EXCH) { 415 + exch_used = ha->base_qpair->fwres.exch_used; 416 + for (i = 0; i < ha->max_qpairs; i++) { 417 + if (ha->queue_pair_map[i]) 418 + exch_used += ha->queue_pair_map[i]->fwres.exch_used; 419 + } 420 + 421 + if ((exch_used + iores->exch_cnt) >= qp->fwres.exch_limit) { 422 + iores->res_type = RESOURCE_NONE; 423 + return -ENOSPC; 424 + } 425 + } 426 + force: 427 + qp->fwres.iocbs_used += iores->iocb_cnt; 428 + qp->fwres.exch_used += iores->exch_cnt; 429 + return 0; 418 430 } 419 431 420 432 static inline void 421 - qla_put_iocbs(struct qla_qpair *qp, struct iocb_resource *iores) 433 + qla_put_fw_resources(struct qla_qpair *qp, struct iocb_resource *iores) 422 434 { 423 - switch (iores->res_type) { 424 - case RESOURCE_NONE: 425 - break; 426 - default: 435 + if (iores->res_type & RESOURCE_IOCB) { 427 436 if (qp->fwres.iocbs_used >= iores->iocb_cnt) { 428 437 qp->fwres.iocbs_used -= iores->iocb_cnt; 429 438 } else { 430 - // should not happen 439 + /* should not happen */ 431 440 qp->fwres.iocbs_used = 0; 432 441 } 433 - break; 442 + } 443 + 444 + if (iores->res_type & RESOURCE_EXCH) { 445 + if (qp->fwres.exch_used >= iores->exch_cnt) { 446 + qp->fwres.exch_used -= iores->exch_cnt; 447 + } else { 448 + /* should not happen */ 449 + qp->fwres.exch_used = 0; 450 + } 434 451 } 435 452 iores->res_type = RESOURCE_NONE; 436 453 } ··· 514 493 fcport_is_bigger(fc_port_t *fcport) 515 494 { 516 495 return !fcport_is_smaller(fcport); 496 + } 497 + 498 + static inline struct qla_qpair * 499 + qla_mapq_nvme_select_qpair(struct qla_hw_data *ha, struct qla_qpair *qpair) 500 + { 501 + int cpuid = smp_processor_id(); 502 + 503 + if (qpair->cpuid != cpuid && 504 + ha->qp_cpu_map[cpuid]) { 505 + qpair = ha->qp_cpu_map[cpuid]; 506 + } 507 + return qpair; 508 + } 509 + 510 + static inline void 511 + qla_mapq_init_qp_cpu_map(struct qla_hw_data *ha, 512 + struct qla_msix_entry *msix, 513 + struct qla_qpair *qpair) 514 + { 515 + const struct cpumask *mask; 516 + unsigned int cpu; 517 + 518 + if (!ha->qp_cpu_map) 519 + return; 520 + mask = pci_irq_get_affinity(ha->pdev, msix->vector_base0); 521 + qpair->cpuid = cpumask_first(mask); 522 + for_each_cpu(cpu, mask) { 523 + ha->qp_cpu_map[cpu] = qpair; 524 + } 525 + msix->cpuid = qpair->cpuid; 526 + } 527 + 528 + static inline void 529 + qla_mapq_free_qp_cpu_map(struct qla_hw_data *ha) 530 + { 531 + if (ha->qp_cpu_map) { 532 + kfree(ha->qp_cpu_map); 533 + ha->qp_cpu_map = NULL; 534 + } 535 + } 536 + 537 + static inline int qla_mapq_alloc_qp_cpu_map(struct qla_hw_data *ha) 538 + { 539 + scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 540 + 541 + if (!ha->qp_cpu_map) { 542 + ha->qp_cpu_map = kcalloc(NR_CPUS, sizeof(struct qla_qpair *), 543 + GFP_KERNEL); 544 + if (!ha->qp_cpu_map) { 545 + ql_log(ql_log_fatal, vha, 0x0180, 546 + "Unable to allocate memory for qp_cpu_map ptrs.\n"); 547 + return -1; 548 + } 549 + } 550 + return 0; 517 551 }
+86 -21
drivers/scsi/qla2xxx/qla_iocb.c
··· 623 623 } 624 624 625 625 cur_seg = scsi_sglist(cmd); 626 - ctx = sp->u.scmd.ct6_ctx; 626 + ctx = &sp->u.scmd.ct6_ctx; 627 627 628 628 while (tot_dsds) { 629 629 avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ? ··· 1589 1589 tot_dsds = nseg; 1590 1590 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds); 1591 1591 1592 - sp->iores.res_type = RESOURCE_INI; 1592 + sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH; 1593 + sp->iores.exch_cnt = 1; 1593 1594 sp->iores.iocb_cnt = req_cnt; 1594 - if (qla_get_iocbs(sp->qpair, &sp->iores)) 1595 + if (qla_get_fw_resources(sp->qpair, &sp->iores)) 1595 1596 goto queuing_error; 1596 1597 1597 1598 if (req->cnt < (req_cnt + 2)) { ··· 1679 1678 if (tot_dsds) 1680 1679 scsi_dma_unmap(cmd); 1681 1680 1682 - qla_put_iocbs(sp->qpair, &sp->iores); 1681 + qla_put_fw_resources(sp->qpair, &sp->iores); 1683 1682 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1684 1683 1685 1684 return QLA_FUNCTION_FAILED; ··· 1794 1793 tot_prot_dsds = nseg; 1795 1794 tot_dsds += nseg; 1796 1795 1797 - sp->iores.res_type = RESOURCE_INI; 1796 + sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH; 1797 + sp->iores.exch_cnt = 1; 1798 1798 sp->iores.iocb_cnt = qla24xx_calc_iocbs(vha, tot_dsds); 1799 - if (qla_get_iocbs(sp->qpair, &sp->iores)) 1799 + if (qla_get_fw_resources(sp->qpair, &sp->iores)) 1800 1800 goto queuing_error; 1801 1801 1802 1802 if (req->cnt < (req_cnt + 2)) { ··· 1885 1883 } 1886 1884 /* Cleanup will be performed by the caller (queuecommand) */ 1887 1885 1888 - qla_put_iocbs(sp->qpair, &sp->iores); 1886 + qla_put_fw_resources(sp->qpair, &sp->iores); 1889 1887 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1890 1888 1891 1889 return QLA_FUNCTION_FAILED; ··· 1954 1952 tot_dsds = nseg; 1955 1953 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds); 1956 1954 1957 - sp->iores.res_type = RESOURCE_INI; 1955 + sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH; 1956 + sp->iores.exch_cnt = 1; 1958 1957 sp->iores.iocb_cnt = req_cnt; 1959 - if (qla_get_iocbs(sp->qpair, &sp->iores)) 1958 + if (qla_get_fw_resources(sp->qpair, &sp->iores)) 1960 1959 goto queuing_error; 1961 1960 1962 1961 if (req->cnt < (req_cnt + 2)) { ··· 2044 2041 if (tot_dsds) 2045 2042 scsi_dma_unmap(cmd); 2046 2043 2047 - qla_put_iocbs(sp->qpair, &sp->iores); 2044 + qla_put_fw_resources(sp->qpair, &sp->iores); 2048 2045 spin_unlock_irqrestore(&qpair->qp_lock, flags); 2049 2046 2050 2047 return QLA_FUNCTION_FAILED; ··· 2174 2171 tot_prot_dsds = nseg; 2175 2172 tot_dsds += nseg; 2176 2173 2177 - sp->iores.res_type = RESOURCE_INI; 2174 + sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH; 2175 + sp->iores.exch_cnt = 1; 2178 2176 sp->iores.iocb_cnt = qla24xx_calc_iocbs(vha, tot_dsds); 2179 - if (qla_get_iocbs(sp->qpair, &sp->iores)) 2177 + if (qla_get_fw_resources(sp->qpair, &sp->iores)) 2180 2178 goto queuing_error; 2181 2179 2182 2180 if (req->cnt < (req_cnt + 2)) { ··· 2264 2260 } 2265 2261 /* Cleanup will be performed by the caller (queuecommand) */ 2266 2262 2267 - qla_put_iocbs(sp->qpair, &sp->iores); 2263 + qla_put_fw_resources(sp->qpair, &sp->iores); 2268 2264 spin_unlock_irqrestore(&qpair->qp_lock, flags); 2269 2265 2270 2266 return QLA_FUNCTION_FAILED; ··· 2920 2916 conflict_fcport->conflict = fcport; 2921 2917 fcport->login_pause = 1; 2922 2918 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2923 - "%s %d %8phC pid %06x inuse with lid %#x post gidpn\n", 2919 + "%s %d %8phC pid %06x inuse with lid %#x.\n", 2924 2920 __func__, __LINE__, 2925 2921 fcport->port_name, 2926 2922 fcport->d_id.b24, lid); ··· 3459 3455 goto queuing_error; 3460 3456 } 3461 3457 3462 - ctx = sp->u.scmd.ct6_ctx = 3463 - mempool_alloc(ha->ctx_mempool, GFP_ATOMIC); 3464 - if (!ctx) { 3465 - ql_log(ql_log_fatal, vha, 0x3010, 3466 - "Failed to allocate ctx for cmd=%p.\n", cmd); 3467 - goto queuing_error; 3468 - } 3458 + ctx = &sp->u.scmd.ct6_ctx; 3469 3459 3470 3460 memset(ctx, 0, sizeof(struct ct6_dsd)); 3471 3461 ctx->fcp_cmnd = dma_pool_zalloc(ha->fcp_cmnd_dma_pool, ··· 3811 3813 logio->vp_index = sp->fcport->vha->vp_idx; 3812 3814 } 3813 3815 3816 + static int qla_get_iocbs_resource(struct srb *sp) 3817 + { 3818 + bool get_exch; 3819 + bool push_it_through = false; 3820 + 3821 + if (!ql2xenforce_iocb_limit) { 3822 + sp->iores.res_type = RESOURCE_NONE; 3823 + return 0; 3824 + } 3825 + sp->iores.res_type = RESOURCE_NONE; 3826 + 3827 + switch (sp->type) { 3828 + case SRB_TM_CMD: 3829 + case SRB_PRLI_CMD: 3830 + case SRB_ADISC_CMD: 3831 + push_it_through = true; 3832 + fallthrough; 3833 + case SRB_LOGIN_CMD: 3834 + case SRB_ELS_CMD_RPT: 3835 + case SRB_ELS_CMD_HST: 3836 + case SRB_ELS_CMD_HST_NOLOGIN: 3837 + case SRB_CT_CMD: 3838 + case SRB_NVME_LS: 3839 + case SRB_ELS_DCMD: 3840 + get_exch = true; 3841 + break; 3842 + 3843 + case SRB_FXIOCB_DCMD: 3844 + case SRB_FXIOCB_BCMD: 3845 + sp->iores.res_type = RESOURCE_NONE; 3846 + return 0; 3847 + 3848 + case SRB_SA_UPDATE: 3849 + case SRB_SA_REPLACE: 3850 + case SRB_MB_IOCB: 3851 + case SRB_ABT_CMD: 3852 + case SRB_NACK_PLOGI: 3853 + case SRB_NACK_PRLI: 3854 + case SRB_NACK_LOGO: 3855 + case SRB_LOGOUT_CMD: 3856 + case SRB_CTRL_VP: 3857 + push_it_through = true; 3858 + fallthrough; 3859 + default: 3860 + get_exch = false; 3861 + } 3862 + 3863 + sp->iores.res_type |= RESOURCE_IOCB; 3864 + sp->iores.iocb_cnt = 1; 3865 + if (get_exch) { 3866 + sp->iores.res_type |= RESOURCE_EXCH; 3867 + sp->iores.exch_cnt = 1; 3868 + } 3869 + if (push_it_through) 3870 + sp->iores.res_type |= RESOURCE_FORCE; 3871 + 3872 + return qla_get_fw_resources(sp->qpair, &sp->iores); 3873 + } 3874 + 3814 3875 int 3815 3876 qla2x00_start_sp(srb_t *sp) 3816 3877 { ··· 3884 3827 return -EIO; 3885 3828 3886 3829 spin_lock_irqsave(qp->qp_lock_ptr, flags); 3830 + rval = qla_get_iocbs_resource(sp); 3831 + if (rval) { 3832 + spin_unlock_irqrestore(qp->qp_lock_ptr, flags); 3833 + return -EAGAIN; 3834 + } 3835 + 3887 3836 pkt = __qla2x00_alloc_iocbs(sp->qpair, sp); 3888 3837 if (!pkt) { 3889 3838 rval = EAGAIN; ··· 3990 3927 wmb(); 3991 3928 qla2x00_start_iocbs(vha, qp->req); 3992 3929 done: 3930 + if (rval) 3931 + qla_put_fw_resources(sp->qpair, &sp->iores); 3993 3932 spin_unlock_irqrestore(qp->qp_lock_ptr, flags); 3994 3933 return rval; 3995 3934 }
+4 -5
drivers/scsi/qla2xxx/qla_isr.c
··· 3112 3112 } 3113 3113 bsg_reply->reply_payload_rcv_len = 0; 3114 3114 3115 + qla_put_fw_resources(sp->qpair, &sp->iores); 3115 3116 done: 3116 3117 /* Return the vendor specific reply to API */ 3117 3118 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval; ··· 3198 3197 } 3199 3198 return; 3200 3199 } 3201 - qla_put_iocbs(sp->qpair, &sp->iores); 3200 + qla_put_fw_resources(sp->qpair, &sp->iores); 3202 3201 3203 3202 if (sp->cmd_type != TYPE_SRB) { 3204 3203 req->outstanding_cmds[handle] = NULL; ··· 3362 3361 ql_log(ql_log_warn, fcport->vha, 0x301d, 3363 3362 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", 3364 3363 resid, scsi_bufflen(cp)); 3365 - 3366 - vha->interface_err_cnt++; 3367 3364 3368 3365 res = DID_ERROR << 16 | lscsi_status; 3369 3366 goto check_scsi_status; ··· 3617 3618 default: 3618 3619 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3619 3620 if (sp) { 3620 - qla_put_iocbs(sp->qpair, &sp->iores); 3621 3621 sp->done(sp, res); 3622 3622 return 0; 3623 3623 } ··· 3769 3771 3770 3772 if (rsp->qpair->cpuid != smp_processor_id() || !rsp->qpair->rcv_intr) { 3771 3773 rsp->qpair->rcv_intr = 1; 3772 - qla_cpu_update(rsp->qpair, smp_processor_id()); 3773 3774 } 3774 3775 3775 3776 #define __update_rsp_in(_is_shadow_hba, _rsp, _rsp_in) \ ··· 4376 4379 for (i = 0; i < ha->msix_count; i++) { 4377 4380 qentry = &ha->msix_entries[i]; 4378 4381 qentry->vector = pci_irq_vector(ha->pdev, i); 4382 + qentry->vector_base0 = i; 4379 4383 qentry->entry = i; 4380 4384 qentry->have_irq = 0; 4381 4385 qentry->in_use = 0; ··· 4604 4606 } 4605 4607 msix->have_irq = 1; 4606 4608 msix->handle = qpair; 4609 + qla_mapq_init_qp_cpu_map(ha, msix, qpair); 4607 4610 return ret; 4608 4611 }
+4 -4
drivers/scsi/qla2xxx/qla_mbx.c
··· 4010 4010 rptid_entry->port_id[2], rptid_entry->port_id[1], 4011 4011 rptid_entry->port_id[0]); 4012 4012 ha->current_topology = ISP_CFG_NL; 4013 - qlt_update_host_map(vha, id); 4013 + qla_update_host_map(vha, id); 4014 4014 4015 4015 } else if (rptid_entry->format == 1) { 4016 4016 /* fabric */ ··· 4126 4126 WWN_SIZE); 4127 4127 } 4128 4128 4129 - qlt_update_host_map(vha, id); 4129 + qla_update_host_map(vha, id); 4130 4130 } 4131 4131 4132 4132 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); ··· 4153 4153 if (!found) 4154 4154 return; 4155 4155 4156 - qlt_update_host_map(vp, id); 4156 + qla_update_host_map(vp, id); 4157 4157 4158 4158 /* 4159 4159 * Cannot configure here as we are still sitting on the ··· 4184 4184 4185 4185 ha->flags.n2n_ae = 1; 4186 4186 spin_lock_irqsave(&ha->vport_slock, flags); 4187 - qlt_update_vp_map(vha, SET_AL_PA); 4187 + qla_update_vp_map(vha, SET_AL_PA); 4188 4188 spin_unlock_irqrestore(&ha->vport_slock, flags); 4189 4189 4190 4190 list_for_each_entry(fcport, &vha->vp_fcports, list) {
+289 -13
drivers/scsi/qla2xxx/qla_mid.c
··· 52 52 spin_unlock_irqrestore(&ha->vport_slock, flags); 53 53 54 54 spin_lock_irqsave(&ha->hardware_lock, flags); 55 - qlt_update_vp_map(vha, SET_VP_IDX); 55 + qla_update_vp_map(vha, SET_VP_IDX); 56 56 spin_unlock_irqrestore(&ha->hardware_lock, flags); 57 57 58 58 mutex_unlock(&ha->vport_lock); ··· 80 80 spin_lock_irqsave(&ha->vport_slock, flags); 81 81 if (atomic_read(&vha->vref_count) == 0) { 82 82 list_del(&vha->list); 83 - qlt_update_vp_map(vha, RESET_VP_IDX); 83 + qla_update_vp_map(vha, RESET_VP_IDX); 84 84 bailout = 1; 85 85 } 86 86 spin_unlock_irqrestore(&ha->vport_slock, flags); ··· 95 95 "vha->vref_count=%u timeout\n", vha->vref_count.counter); 96 96 spin_lock_irqsave(&ha->vport_slock, flags); 97 97 list_del(&vha->list); 98 - qlt_update_vp_map(vha, RESET_VP_IDX); 98 + qla_update_vp_map(vha, RESET_VP_IDX); 99 99 spin_unlock_irqrestore(&ha->vport_slock, flags); 100 100 } 101 101 ··· 187 187 188 188 /* Remove port id from vp target map */ 189 189 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 190 - qlt_update_vp_map(vha, RESET_AL_PA); 190 + qla_update_vp_map(vha, RESET_AL_PA); 191 191 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 192 192 193 193 qla2x00_mark_vp_devices_dead(vha); ··· 382 382 qla24xx_process_purex_list(&vha->purex_list); 383 383 clear_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags); 384 384 } 385 - } 386 - 387 - if (test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags)) { 388 - ql_dbg(ql_dbg_dpc, vha, 0x4016, 389 - "FCPort update scheduled.\n"); 390 - qla2x00_update_fcports(vha); 391 - clear_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags); 392 - ql_dbg(ql_dbg_dpc, vha, 0x4017, 393 - "FCPort update end.\n"); 394 385 } 395 386 396 387 if (test_bit(RELOGIN_NEEDED, &vha->dpc_flags) && ··· 1004 1013 /* ref: INIT */ 1005 1014 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1006 1015 return rval; 1016 + } 1017 + 1018 + struct scsi_qla_host *qla_find_host_by_vp_idx(struct scsi_qla_host *vha, uint16_t vp_idx) 1019 + { 1020 + struct qla_hw_data *ha = vha->hw; 1021 + 1022 + if (vha->vp_idx == vp_idx) 1023 + return vha; 1024 + 1025 + BUG_ON(ha->vp_map == NULL); 1026 + if (likely(test_bit(vp_idx, ha->vp_idx_map))) 1027 + return ha->vp_map[vp_idx].vha; 1028 + 1029 + return NULL; 1030 + } 1031 + 1032 + /* vport_slock to be held by the caller */ 1033 + void 1034 + qla_update_vp_map(struct scsi_qla_host *vha, int cmd) 1035 + { 1036 + void *slot; 1037 + u32 key; 1038 + int rc; 1039 + 1040 + if (!vha->hw->vp_map) 1041 + return; 1042 + 1043 + key = vha->d_id.b24; 1044 + 1045 + switch (cmd) { 1046 + case SET_VP_IDX: 1047 + vha->hw->vp_map[vha->vp_idx].vha = vha; 1048 + break; 1049 + case SET_AL_PA: 1050 + slot = btree_lookup32(&vha->hw->host_map, key); 1051 + if (!slot) { 1052 + ql_dbg(ql_dbg_disc, vha, 0xf018, 1053 + "Save vha in host_map %p %06x\n", vha, key); 1054 + rc = btree_insert32(&vha->hw->host_map, 1055 + key, vha, GFP_ATOMIC); 1056 + if (rc) 1057 + ql_log(ql_log_info, vha, 0xd03e, 1058 + "Unable to insert s_id into host_map: %06x\n", 1059 + key); 1060 + return; 1061 + } 1062 + ql_dbg(ql_dbg_disc, vha, 0xf019, 1063 + "replace existing vha in host_map %p %06x\n", vha, key); 1064 + btree_update32(&vha->hw->host_map, key, vha); 1065 + break; 1066 + case RESET_VP_IDX: 1067 + vha->hw->vp_map[vha->vp_idx].vha = NULL; 1068 + break; 1069 + case RESET_AL_PA: 1070 + ql_dbg(ql_dbg_disc, vha, 0xf01a, 1071 + "clear vha in host_map %p %06x\n", vha, key); 1072 + slot = btree_lookup32(&vha->hw->host_map, key); 1073 + if (slot) 1074 + btree_remove32(&vha->hw->host_map, key); 1075 + vha->d_id.b24 = 0; 1076 + break; 1077 + } 1078 + } 1079 + 1080 + void qla_update_host_map(struct scsi_qla_host *vha, port_id_t id) 1081 + { 1082 + 1083 + if (!vha->d_id.b24) { 1084 + vha->d_id = id; 1085 + qla_update_vp_map(vha, SET_AL_PA); 1086 + } else if (vha->d_id.b24 != id.b24) { 1087 + qla_update_vp_map(vha, RESET_AL_PA); 1088 + vha->d_id = id; 1089 + qla_update_vp_map(vha, SET_AL_PA); 1090 + } 1091 + } 1092 + 1093 + int qla_create_buf_pool(struct scsi_qla_host *vha, struct qla_qpair *qp) 1094 + { 1095 + int sz; 1096 + 1097 + qp->buf_pool.num_bufs = qp->req->length; 1098 + 1099 + sz = BITS_TO_LONGS(qp->req->length); 1100 + qp->buf_pool.buf_map = kcalloc(sz, sizeof(long), GFP_KERNEL); 1101 + if (!qp->buf_pool.buf_map) { 1102 + ql_log(ql_log_warn, vha, 0x0186, 1103 + "Failed to allocate buf_map(%zd).\n", sz * sizeof(unsigned long)); 1104 + return -ENOMEM; 1105 + } 1106 + sz = qp->req->length * sizeof(void *); 1107 + qp->buf_pool.buf_array = kcalloc(qp->req->length, sizeof(void *), GFP_KERNEL); 1108 + if (!qp->buf_pool.buf_array) { 1109 + ql_log(ql_log_warn, vha, 0x0186, 1110 + "Failed to allocate buf_array(%d).\n", sz); 1111 + kfree(qp->buf_pool.buf_map); 1112 + return -ENOMEM; 1113 + } 1114 + sz = qp->req->length * sizeof(dma_addr_t); 1115 + qp->buf_pool.dma_array = kcalloc(qp->req->length, sizeof(dma_addr_t), GFP_KERNEL); 1116 + if (!qp->buf_pool.dma_array) { 1117 + ql_log(ql_log_warn, vha, 0x0186, 1118 + "Failed to allocate dma_array(%d).\n", sz); 1119 + kfree(qp->buf_pool.buf_map); 1120 + kfree(qp->buf_pool.buf_array); 1121 + return -ENOMEM; 1122 + } 1123 + set_bit(0, qp->buf_pool.buf_map); 1124 + return 0; 1125 + } 1126 + 1127 + void qla_free_buf_pool(struct qla_qpair *qp) 1128 + { 1129 + int i; 1130 + struct qla_hw_data *ha = qp->vha->hw; 1131 + 1132 + for (i = 0; i < qp->buf_pool.num_bufs; i++) { 1133 + if (qp->buf_pool.buf_array[i] && qp->buf_pool.dma_array[i]) 1134 + dma_pool_free(ha->fcp_cmnd_dma_pool, qp->buf_pool.buf_array[i], 1135 + qp->buf_pool.dma_array[i]); 1136 + qp->buf_pool.buf_array[i] = NULL; 1137 + qp->buf_pool.dma_array[i] = 0; 1138 + } 1139 + 1140 + kfree(qp->buf_pool.dma_array); 1141 + kfree(qp->buf_pool.buf_array); 1142 + kfree(qp->buf_pool.buf_map); 1143 + } 1144 + 1145 + /* it is assume qp->qp_lock is held at this point */ 1146 + int qla_get_buf(struct scsi_qla_host *vha, struct qla_qpair *qp, struct qla_buf_dsc *dsc) 1147 + { 1148 + u16 tag, i = 0; 1149 + void *buf; 1150 + dma_addr_t buf_dma; 1151 + struct qla_hw_data *ha = vha->hw; 1152 + 1153 + dsc->tag = TAG_FREED; 1154 + again: 1155 + tag = find_first_zero_bit(qp->buf_pool.buf_map, qp->buf_pool.num_bufs); 1156 + if (tag >= qp->buf_pool.num_bufs) { 1157 + ql_dbg(ql_dbg_io, vha, 0x00e2, 1158 + "qp(%d) ran out of buf resource.\n", qp->id); 1159 + return -EIO; 1160 + } 1161 + if (tag == 0) { 1162 + set_bit(0, qp->buf_pool.buf_map); 1163 + i++; 1164 + if (i == 5) { 1165 + ql_dbg(ql_dbg_io, vha, 0x00e3, 1166 + "qp(%d) unable to get tag.\n", qp->id); 1167 + return -EIO; 1168 + } 1169 + goto again; 1170 + } 1171 + 1172 + if (!qp->buf_pool.buf_array[tag]) { 1173 + buf = dma_pool_zalloc(ha->fcp_cmnd_dma_pool, GFP_ATOMIC, &buf_dma); 1174 + if (!buf) { 1175 + ql_log(ql_log_fatal, vha, 0x13b1, 1176 + "Failed to allocate buf.\n"); 1177 + return -ENOMEM; 1178 + } 1179 + 1180 + dsc->buf = qp->buf_pool.buf_array[tag] = buf; 1181 + dsc->buf_dma = qp->buf_pool.dma_array[tag] = buf_dma; 1182 + qp->buf_pool.num_alloc++; 1183 + } else { 1184 + dsc->buf = qp->buf_pool.buf_array[tag]; 1185 + dsc->buf_dma = qp->buf_pool.dma_array[tag]; 1186 + memset(dsc->buf, 0, FCP_CMND_DMA_POOL_SIZE); 1187 + } 1188 + 1189 + qp->buf_pool.num_active++; 1190 + if (qp->buf_pool.num_active > qp->buf_pool.max_used) 1191 + qp->buf_pool.max_used = qp->buf_pool.num_active; 1192 + 1193 + dsc->tag = tag; 1194 + set_bit(tag, qp->buf_pool.buf_map); 1195 + return 0; 1196 + } 1197 + 1198 + static void qla_trim_buf(struct qla_qpair *qp, u16 trim) 1199 + { 1200 + int i, j; 1201 + struct qla_hw_data *ha = qp->vha->hw; 1202 + 1203 + if (!trim) 1204 + return; 1205 + 1206 + for (i = 0; i < trim; i++) { 1207 + j = qp->buf_pool.num_alloc - 1; 1208 + if (test_bit(j, qp->buf_pool.buf_map)) { 1209 + ql_dbg(ql_dbg_io + ql_dbg_verbose, qp->vha, 0x300b, 1210 + "QP id(%d): trim active buf[%d]. Remain %d bufs\n", 1211 + qp->id, j, qp->buf_pool.num_alloc); 1212 + return; 1213 + } 1214 + 1215 + if (qp->buf_pool.buf_array[j]) { 1216 + dma_pool_free(ha->fcp_cmnd_dma_pool, qp->buf_pool.buf_array[j], 1217 + qp->buf_pool.dma_array[j]); 1218 + qp->buf_pool.buf_array[j] = NULL; 1219 + qp->buf_pool.dma_array[j] = 0; 1220 + } 1221 + qp->buf_pool.num_alloc--; 1222 + if (!qp->buf_pool.num_alloc) 1223 + break; 1224 + } 1225 + ql_dbg(ql_dbg_io + ql_dbg_verbose, qp->vha, 0x3010, 1226 + "QP id(%d): trimmed %d bufs. Remain %d bufs\n", 1227 + qp->id, trim, qp->buf_pool.num_alloc); 1228 + } 1229 + 1230 + static void __qla_adjust_buf(struct qla_qpair *qp) 1231 + { 1232 + u32 trim; 1233 + 1234 + qp->buf_pool.take_snapshot = 0; 1235 + qp->buf_pool.prev_max = qp->buf_pool.max_used; 1236 + qp->buf_pool.max_used = qp->buf_pool.num_active; 1237 + 1238 + if (qp->buf_pool.prev_max > qp->buf_pool.max_used && 1239 + qp->buf_pool.num_alloc > qp->buf_pool.max_used) { 1240 + /* down trend */ 1241 + trim = qp->buf_pool.num_alloc - qp->buf_pool.max_used; 1242 + trim = (trim * 10) / 100; 1243 + trim = trim ? trim : 1; 1244 + qla_trim_buf(qp, trim); 1245 + } else if (!qp->buf_pool.prev_max && !qp->buf_pool.max_used) { 1246 + /* 2 periods of no io */ 1247 + qla_trim_buf(qp, qp->buf_pool.num_alloc); 1248 + } 1249 + } 1250 + 1251 + /* it is assume qp->qp_lock is held at this point */ 1252 + void qla_put_buf(struct qla_qpair *qp, struct qla_buf_dsc *dsc) 1253 + { 1254 + if (dsc->tag == TAG_FREED) 1255 + return; 1256 + lockdep_assert_held(qp->qp_lock_ptr); 1257 + 1258 + clear_bit(dsc->tag, qp->buf_pool.buf_map); 1259 + qp->buf_pool.num_active--; 1260 + dsc->tag = TAG_FREED; 1261 + 1262 + if (qp->buf_pool.take_snapshot) 1263 + __qla_adjust_buf(qp); 1264 + } 1265 + 1266 + #define EXPIRE (60 * HZ) 1267 + void qla_adjust_buf(struct scsi_qla_host *vha) 1268 + { 1269 + unsigned long flags; 1270 + int i; 1271 + struct qla_qpair *qp; 1272 + 1273 + if (vha->vp_idx) 1274 + return; 1275 + 1276 + if (!vha->buf_expired) { 1277 + vha->buf_expired = jiffies + EXPIRE; 1278 + return; 1279 + } 1280 + if (time_before(jiffies, vha->buf_expired)) 1281 + return; 1282 + 1283 + vha->buf_expired = jiffies + EXPIRE; 1284 + 1285 + for (i = 0; i < vha->hw->num_qpairs; i++) { 1286 + qp = vha->hw->queue_pair_map[i]; 1287 + if (!qp) 1288 + continue; 1289 + if (!qp->buf_pool.num_alloc) 1290 + continue; 1291 + 1292 + if (qp->buf_pool.take_snapshot) { 1293 + /* no io has gone through in the last EXPIRE period */ 1294 + spin_lock_irqsave(qp->qp_lock_ptr, flags); 1295 + __qla_adjust_buf(qp); 1296 + spin_unlock_irqrestore(qp->qp_lock_ptr, flags); 1297 + } else { 1298 + qp->buf_pool.take_snapshot = 1; 1299 + } 1300 + } 1007 1301 }
+19 -19
drivers/scsi/qla2xxx/qla_nvme.c
··· 170 170 qla2xxx_rel_qpair_sp(sp->qpair, sp); 171 171 } 172 172 173 - static void qla_nvme_ls_unmap(struct srb *sp, struct nvmefc_ls_req *fd) 174 - { 175 - if (sp->flags & SRB_DMA_VALID) { 176 - struct srb_iocb *nvme = &sp->u.iocb_cmd; 177 - struct qla_hw_data *ha = sp->fcport->vha->hw; 178 - 179 - dma_unmap_single(&ha->pdev->dev, nvme->u.nvme.cmd_dma, 180 - fd->rqstlen, DMA_TO_DEVICE); 181 - sp->flags &= ~SRB_DMA_VALID; 182 - } 183 - } 184 - 185 173 static void qla_nvme_release_ls_cmd_kref(struct kref *kref) 186 174 { 187 175 struct srb *sp = container_of(kref, struct srb, cmd_kref); ··· 187 199 188 200 fd = priv->fd; 189 201 190 - qla_nvme_ls_unmap(sp, fd); 191 202 fd->done(fd, priv->comp_status); 192 203 out: 193 204 qla2x00_rel_sp(sp); ··· 352 365 nvme->u.nvme.rsp_len = fd->rsplen; 353 366 nvme->u.nvme.rsp_dma = fd->rspdma; 354 367 nvme->u.nvme.timeout_sec = fd->timeout; 355 - nvme->u.nvme.cmd_dma = dma_map_single(&ha->pdev->dev, fd->rqstaddr, 356 - fd->rqstlen, DMA_TO_DEVICE); 368 + nvme->u.nvme.cmd_dma = fd->rqstdma; 357 369 dma_sync_single_for_device(&ha->pdev->dev, nvme->u.nvme.cmd_dma, 358 370 fd->rqstlen, DMA_TO_DEVICE); 359 - 360 - sp->flags |= SRB_DMA_VALID; 361 371 362 372 rval = qla2x00_start_sp(sp); 363 373 if (rval != QLA_SUCCESS) { ··· 363 379 wake_up(&sp->nvme_ls_waitq); 364 380 sp->priv = NULL; 365 381 priv->sp = NULL; 366 - qla_nvme_ls_unmap(sp, fd); 367 382 qla2x00_rel_sp(sp); 368 383 return rval; 369 384 } ··· 428 445 goto queuing_error; 429 446 } 430 447 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds); 448 + 449 + sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH; 450 + sp->iores.exch_cnt = 1; 451 + sp->iores.iocb_cnt = req_cnt; 452 + if (qla_get_fw_resources(sp->qpair, &sp->iores)) { 453 + rval = -EBUSY; 454 + goto queuing_error; 455 + } 456 + 431 457 if (req->cnt < (req_cnt + 2)) { 432 458 if (IS_SHADOW_REG_CAPABLE(ha)) { 433 459 cnt = *req->out_ptr; 434 460 } else { 435 461 cnt = rd_reg_dword_relaxed(req->req_q_out); 436 - if (qla2x00_check_reg16_for_disconnect(vha, cnt)) 462 + if (qla2x00_check_reg16_for_disconnect(vha, cnt)) { 463 + rval = -EBUSY; 437 464 goto queuing_error; 465 + } 438 466 } 439 467 440 468 if (req->ring_index < cnt) ··· 594 600 qla24xx_process_response_queue(vha, rsp); 595 601 596 602 queuing_error: 603 + if (rval) 604 + qla_put_fw_resources(sp->qpair, &sp->iores); 597 605 spin_unlock_irqrestore(&qpair->qp_lock, flags); 598 606 599 607 return rval; ··· 609 613 fc_port_t *fcport; 610 614 struct srb_iocb *nvme; 611 615 struct scsi_qla_host *vha; 616 + struct qla_hw_data *ha; 612 617 int rval; 613 618 srb_t *sp; 614 619 struct qla_qpair *qpair = hw_queue_handle; ··· 630 633 return -ENODEV; 631 634 632 635 vha = fcport->vha; 636 + ha = vha->hw; 633 637 634 638 if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) 635 639 return -EBUSY; ··· 644 646 */ 645 647 if (fcport->nvme_flag & NVME_FLAG_RESETTING) 646 648 return -EBUSY; 649 + 650 + qpair = qla_mapq_nvme_select_qpair(ha, qpair); 647 651 648 652 /* Alloc SRB structure */ 649 653 sp = qla2xxx_get_qpair_sp(vha, qpair, fcport, GFP_ATOMIC);
+35 -26
drivers/scsi/qla2xxx/qla_os.c
··· 472 472 "Unable to allocate memory for queue pair ptrs.\n"); 473 473 goto fail_qpair_map; 474 474 } 475 + if (qla_mapq_alloc_qp_cpu_map(ha) != 0) { 476 + kfree(ha->queue_pair_map); 477 + ha->queue_pair_map = NULL; 478 + goto fail_qpair_map; 479 + } 475 480 } 476 481 477 482 /* ··· 551 546 ha->base_qpair = NULL; 552 547 } 553 548 549 + qla_mapq_free_qp_cpu_map(ha); 554 550 spin_lock_irqsave(&ha->hardware_lock, flags); 555 551 for (cnt = 0; cnt < ha->max_req_queues; cnt++) { 556 552 if (!test_bit(cnt, ha->req_qid_map)) ··· 739 733 } 740 734 741 735 if (sp->flags & SRB_FCP_CMND_DMA_VALID) { 742 - struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx; 736 + struct ct6_dsd *ctx1 = &sp->u.scmd.ct6_ctx; 743 737 744 738 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd, 745 739 ctx1->fcp_cmnd_dma); 746 740 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list); 747 741 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt; 748 742 ha->gbl_dsd_avail += ctx1->dsd_use_cnt; 749 - mempool_free(ctx1, ha->ctx_mempool); 750 743 } 744 + 745 + if (sp->flags & SRB_GOT_BUF) 746 + qla_put_buf(sp->qpair, &sp->u.scmd.buf_dsc); 751 747 } 752 748 753 749 void qla2x00_sp_compl(srb_t *sp, int res) ··· 825 817 } 826 818 827 819 if (sp->flags & SRB_FCP_CMND_DMA_VALID) { 828 - struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx; 820 + struct ct6_dsd *ctx1 = &sp->u.scmd.ct6_ctx; 829 821 830 822 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd, 831 823 ctx1->fcp_cmnd_dma); 832 824 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list); 833 825 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt; 834 826 ha->gbl_dsd_avail += ctx1->dsd_use_cnt; 835 - mempool_free(ctx1, ha->ctx_mempool); 836 827 sp->flags &= ~SRB_FCP_CMND_DMA_VALID; 837 828 } 838 829 ··· 841 834 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma); 842 835 sp->flags &= ~SRB_CRC_CTX_DMA_VALID; 843 836 } 837 + 838 + if (sp->flags & SRB_GOT_BUF) 839 + qla_put_buf(sp->qpair, &sp->u.scmd.buf_dsc); 844 840 } 845 841 846 842 void qla2xxx_qpair_sp_compl(srb_t *sp, int res) ··· 4128 4118 char name[16]; 4129 4119 int rc; 4130 4120 4121 + if (QLA_TGT_MODE_ENABLED() || EDIF_CAP(ha)) { 4122 + ha->vp_map = kcalloc(MAX_MULTI_ID_FABRIC, sizeof(struct qla_vp_map), GFP_KERNEL); 4123 + if (!ha->vp_map) 4124 + goto fail; 4125 + } 4126 + 4131 4127 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size, 4132 4128 &ha->init_cb_dma, GFP_KERNEL); 4133 4129 if (!ha->init_cb) 4134 - goto fail; 4130 + goto fail_free_vp_map; 4135 4131 4136 4132 rc = btree_init32(&ha->host_map); 4137 4133 if (rc) ··· 4556 4540 ha->init_cb_dma); 4557 4541 ha->init_cb = NULL; 4558 4542 ha->init_cb_dma = 0; 4543 + fail_free_vp_map: 4544 + kfree(ha->vp_map); 4559 4545 fail: 4560 4546 ql_log(ql_log_fatal, NULL, 0x0030, 4561 4547 "Memory allocation failure.\n"); ··· 4999 4981 ha->sf_init_cb = NULL; 5000 4982 ha->sf_init_cb_dma = 0; 5001 4983 ha->loop_id_map = NULL; 4984 + 4985 + kfree(ha->vp_map); 4986 + ha->vp_map = NULL; 5002 4987 } 5003 4988 5004 4989 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht, ··· 5037 5016 INIT_LIST_HEAD(&vha->plogi_ack_list); 5038 5017 INIT_LIST_HEAD(&vha->qp_list); 5039 5018 INIT_LIST_HEAD(&vha->gnl.fcports); 5040 - INIT_LIST_HEAD(&vha->gpnid_list); 5041 5019 INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn); 5042 5020 5043 5021 INIT_LIST_HEAD(&vha->purex_list.head); ··· 5481 5461 case QLA_EVT_AENFX: 5482 5462 qlafx00_process_aen(vha, e); 5483 5463 break; 5484 - case QLA_EVT_GPNID: 5485 - qla24xx_async_gpnid(vha, &e->u.gpnid.id); 5486 - break; 5487 5464 case QLA_EVT_UNMAP: 5488 5465 qla24xx_sp_unmap(vha, e->u.iosb.sp); 5489 5466 break; ··· 5522 5505 break; 5523 5506 case QLA_EVT_GNNFT_DONE: 5524 5507 qla24xx_async_gnnft_done(vha, e->u.iosb.sp); 5525 - break; 5526 - case QLA_EVT_GNNID: 5527 - qla24xx_async_gnnid(vha, e->u.fcport.fcport); 5528 5508 break; 5529 5509 case QLA_EVT_GFPNID: 5530 5510 qla24xx_async_gfpnid(vha, e->u.fcport.fcport); ··· 7039 7025 } 7040 7026 } 7041 7027 7042 - if (test_and_clear_bit(FCPORT_UPDATE_NEEDED, 7043 - &base_vha->dpc_flags)) { 7044 - qla2x00_update_fcports(base_vha); 7045 - } 7046 - 7047 7028 if (IS_QLAFX00(ha)) 7048 7029 goto loop_resync_check; 7049 7030 ··· 7103 7094 } 7104 7095 } 7105 7096 loop_resync_check: 7106 - if (test_and_clear_bit(LOOP_RESYNC_NEEDED, 7097 + if (!qla2x00_reset_active(base_vha) && 7098 + test_and_clear_bit(LOOP_RESYNC_NEEDED, 7107 7099 &base_vha->dpc_flags)) { 7108 - 7100 + /* 7101 + * Allow abort_isp to complete before moving on to scanning. 7102 + */ 7109 7103 ql_dbg(ql_dbg_dpc, base_vha, 0x400f, 7110 7104 "Loop resync scheduled.\n"); 7111 7105 ··· 7459 7447 7460 7448 /* if the loop has been down for 4 minutes, reinit adapter */ 7461 7449 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) { 7462 - if (!(vha->device_flags & DFLG_NO_CABLE)) { 7450 + if (!(vha->device_flags & DFLG_NO_CABLE) && !vha->vp_idx) { 7463 7451 ql_log(ql_log_warn, vha, 0x6009, 7464 7452 "Loop down - aborting ISP.\n"); 7465 7453 ··· 7528 7516 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags); 7529 7517 start_dpc++; 7530 7518 } 7519 + qla_adjust_buf(vha); 7531 7520 7532 7521 /* borrowing w to signify dpc will run */ 7533 7522 w = 0; 7534 7523 /* Schedule the DPC routine if needed */ 7535 7524 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) || 7536 7525 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) || 7537 - test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) || 7538 7526 start_dpc || 7539 7527 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) || 7540 7528 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) || ··· 7545 7533 test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags))) { 7546 7534 ql_dbg(ql_dbg_timer, vha, 0x600b, 7547 7535 "isp_abort_needed=%d loop_resync_needed=%d " 7548 - "fcport_update_needed=%d start_dpc=%d " 7549 - "reset_marker_needed=%d", 7536 + "start_dpc=%d reset_marker_needed=%d", 7550 7537 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags), 7551 7538 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags), 7552 - test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags), 7553 - start_dpc, 7554 - test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)); 7539 + start_dpc, test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)); 7555 7540 ql_dbg(ql_dbg_timer, vha, 0x600c, 7556 7541 "beacon_blink_needed=%d isp_unrecoverable=%d " 7557 7542 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
+9 -97
drivers/scsi/qla2xxx/qla_target.c
··· 198 198 return host; 199 199 } 200 200 201 - static inline 202 - struct scsi_qla_host *qlt_find_host_by_vp_idx(struct scsi_qla_host *vha, 203 - uint16_t vp_idx) 204 - { 205 - struct qla_hw_data *ha = vha->hw; 206 - 207 - if (vha->vp_idx == vp_idx) 208 - return vha; 209 - 210 - BUG_ON(ha->tgt.tgt_vp_map == NULL); 211 - if (likely(test_bit(vp_idx, ha->vp_idx_map))) 212 - return ha->tgt.tgt_vp_map[vp_idx].vha; 213 - 214 - return NULL; 215 - } 216 - 217 201 static inline void qlt_incr_num_pend_cmds(struct scsi_qla_host *vha) 218 202 { 219 203 unsigned long flags; ··· 355 371 356 372 if ((entry->u.isp24.vp_index != 0xFF) && 357 373 (entry->u.isp24.nport_handle != cpu_to_le16(0xFFFF))) { 358 - host = qlt_find_host_by_vp_idx(vha, 374 + host = qla_find_host_by_vp_idx(vha, 359 375 entry->u.isp24.vp_index); 360 376 if (unlikely(!host)) { 361 377 ql_dbg(ql_dbg_tgt, vha, 0xe03f, ··· 379 395 { 380 396 struct abts_recv_from_24xx *entry = 381 397 (struct abts_recv_from_24xx *)atio; 382 - struct scsi_qla_host *host = qlt_find_host_by_vp_idx(vha, 398 + struct scsi_qla_host *host = qla_find_host_by_vp_idx(vha, 383 399 entry->vp_index); 384 400 unsigned long flags; 385 401 ··· 422 438 case CTIO_TYPE7: 423 439 { 424 440 struct ctio7_from_24xx *entry = (struct ctio7_from_24xx *)pkt; 425 - struct scsi_qla_host *host = qlt_find_host_by_vp_idx(vha, 441 + struct scsi_qla_host *host = qla_find_host_by_vp_idx(vha, 426 442 entry->vp_index); 427 443 if (unlikely(!host)) { 428 444 ql_dbg(ql_dbg_tgt, vha, 0xe041, ··· 441 457 struct imm_ntfy_from_isp *entry = 442 458 (struct imm_ntfy_from_isp *)pkt; 443 459 444 - host = qlt_find_host_by_vp_idx(vha, entry->u.isp24.vp_index); 460 + host = qla_find_host_by_vp_idx(vha, entry->u.isp24.vp_index); 445 461 if (unlikely(!host)) { 446 462 ql_dbg(ql_dbg_tgt, vha, 0xe042, 447 463 "qla_target(%d): Response pkt (IMMED_NOTIFY_TYPE) " ··· 459 475 struct nack_to_isp *entry = (struct nack_to_isp *)pkt; 460 476 461 477 if (0xFF != entry->u.isp24.vp_index) { 462 - host = qlt_find_host_by_vp_idx(vha, 478 + host = qla_find_host_by_vp_idx(vha, 463 479 entry->u.isp24.vp_index); 464 480 if (unlikely(!host)) { 465 481 ql_dbg(ql_dbg_tgt, vha, 0xe043, ··· 479 495 { 480 496 struct abts_recv_from_24xx *entry = 481 497 (struct abts_recv_from_24xx *)pkt; 482 - struct scsi_qla_host *host = qlt_find_host_by_vp_idx(vha, 498 + struct scsi_qla_host *host = qla_find_host_by_vp_idx(vha, 483 499 entry->vp_index); 484 500 if (unlikely(!host)) { 485 501 ql_dbg(ql_dbg_tgt, vha, 0xe044, ··· 496 512 { 497 513 struct abts_resp_to_24xx *entry = 498 514 (struct abts_resp_to_24xx *)pkt; 499 - struct scsi_qla_host *host = qlt_find_host_by_vp_idx(vha, 515 + struct scsi_qla_host *host = qla_find_host_by_vp_idx(vha, 500 516 entry->vp_index); 501 517 if (unlikely(!host)) { 502 518 ql_dbg(ql_dbg_tgt, vha, 0xe045, ··· 1012 1028 } 1013 1029 1014 1030 if (ha->flags.edif_enabled && 1015 - (!own || (own && 1016 - own->iocb.u.isp24.status_subcode == ELS_PLOGI))) { 1031 + (!own || own->iocb.u.isp24.status_subcode == ELS_PLOGI)) { 1017 1032 sess->edif.authok = 0; 1018 1033 if (!ha->flags.host_shutting_down) { 1019 1034 ql_dbg(ql_dbg_edif, vha, 0x911e, ··· 7128 7145 7129 7146 qlt_clear_mode(base_vha); 7130 7147 7131 - qlt_update_vp_map(base_vha, SET_VP_IDX); 7148 + qla_update_vp_map(base_vha, SET_VP_IDX); 7132 7149 } 7133 7150 7134 7151 irqreturn_t ··· 7207 7224 if (!QLA_TGT_MODE_ENABLED()) 7208 7225 return 0; 7209 7226 7210 - ha->tgt.tgt_vp_map = kcalloc(MAX_MULTI_ID_FABRIC, 7211 - sizeof(struct qla_tgt_vp_map), 7212 - GFP_KERNEL); 7213 - if (!ha->tgt.tgt_vp_map) 7214 - return -ENOMEM; 7215 - 7216 7227 ha->tgt.atio_ring = dma_alloc_coherent(&ha->pdev->dev, 7217 7228 (ha->tgt.atio_q_length + 1) * sizeof(struct atio_from_isp), 7218 7229 &ha->tgt.atio_dma, GFP_KERNEL); 7219 7230 if (!ha->tgt.atio_ring) { 7220 - kfree(ha->tgt.tgt_vp_map); 7221 7231 return -ENOMEM; 7222 7232 } 7223 7233 return 0; ··· 7229 7253 } 7230 7254 ha->tgt.atio_ring = NULL; 7231 7255 ha->tgt.atio_dma = 0; 7232 - kfree(ha->tgt.tgt_vp_map); 7233 - ha->tgt.tgt_vp_map = NULL; 7234 - } 7235 - 7236 - /* vport_slock to be held by the caller */ 7237 - void 7238 - qlt_update_vp_map(struct scsi_qla_host *vha, int cmd) 7239 - { 7240 - void *slot; 7241 - u32 key; 7242 - int rc; 7243 - 7244 - key = vha->d_id.b24; 7245 - 7246 - switch (cmd) { 7247 - case SET_VP_IDX: 7248 - if (!QLA_TGT_MODE_ENABLED()) 7249 - return; 7250 - vha->hw->tgt.tgt_vp_map[vha->vp_idx].vha = vha; 7251 - break; 7252 - case SET_AL_PA: 7253 - slot = btree_lookup32(&vha->hw->host_map, key); 7254 - if (!slot) { 7255 - ql_dbg(ql_dbg_tgt_mgt, vha, 0xf018, 7256 - "Save vha in host_map %p %06x\n", vha, key); 7257 - rc = btree_insert32(&vha->hw->host_map, 7258 - key, vha, GFP_ATOMIC); 7259 - if (rc) 7260 - ql_log(ql_log_info, vha, 0xd03e, 7261 - "Unable to insert s_id into host_map: %06x\n", 7262 - key); 7263 - return; 7264 - } 7265 - ql_dbg(ql_dbg_tgt_mgt, vha, 0xf019, 7266 - "replace existing vha in host_map %p %06x\n", vha, key); 7267 - btree_update32(&vha->hw->host_map, key, vha); 7268 - break; 7269 - case RESET_VP_IDX: 7270 - if (!QLA_TGT_MODE_ENABLED()) 7271 - return; 7272 - vha->hw->tgt.tgt_vp_map[vha->vp_idx].vha = NULL; 7273 - break; 7274 - case RESET_AL_PA: 7275 - ql_dbg(ql_dbg_tgt_mgt, vha, 0xf01a, 7276 - "clear vha in host_map %p %06x\n", vha, key); 7277 - slot = btree_lookup32(&vha->hw->host_map, key); 7278 - if (slot) 7279 - btree_remove32(&vha->hw->host_map, key); 7280 - vha->d_id.b24 = 0; 7281 - break; 7282 - } 7283 - } 7284 - 7285 - void qlt_update_host_map(struct scsi_qla_host *vha, port_id_t id) 7286 - { 7287 - 7288 - if (!vha->d_id.b24) { 7289 - vha->d_id = id; 7290 - qlt_update_vp_map(vha, SET_AL_PA); 7291 - } else if (vha->d_id.b24 != id.b24) { 7292 - qlt_update_vp_map(vha, RESET_AL_PA); 7293 - vha->d_id = id; 7294 - qlt_update_vp_map(vha, SET_AL_PA); 7295 - } 7296 7256 } 7297 7257 7298 7258 static int __init qlt_parse_ini_mode(void)
-1
drivers/scsi/qla2xxx/qla_target.h
··· 1017 1017 extern void qlt_fc_port_deleted(struct scsi_qla_host *, fc_port_t *, int); 1018 1018 extern int __init qlt_init(void); 1019 1019 extern void qlt_exit(void); 1020 - extern void qlt_update_vp_map(struct scsi_qla_host *, int); 1021 1020 extern void qlt_free_session_done(struct work_struct *); 1022 1021 /* 1023 1022 * This macro is used during early initializations when host->active_mode
+3 -3
drivers/scsi/qla2xxx/qla_version.h
··· 6 6 /* 7 7 * Driver version 8 8 */ 9 - #define QLA2XXX_VERSION "10.02.07.900-k" 9 + #define QLA2XXX_VERSION "10.02.08.200-k" 10 10 11 11 #define QLA_DRIVER_MAJOR_VER 10 12 12 #define QLA_DRIVER_MINOR_VER 2 13 - #define QLA_DRIVER_PATCH_VER 7 14 - #define QLA_DRIVER_BETA_VER 900 13 + #define QLA_DRIVER_PATCH_VER 8 14 + #define QLA_DRIVER_BETA_VER 200
+6 -7
drivers/scsi/qla2xxx/tcm_qla2xxx.c
··· 1552 1552 static int tcm_qla2xxx_init_lport(struct tcm_qla2xxx_lport *lport) 1553 1553 { 1554 1554 int rc; 1555 + size_t map_sz; 1555 1556 1556 1557 rc = btree_init32(&lport->lport_fcport_map); 1557 1558 if (rc) { ··· 1560 1559 return rc; 1561 1560 } 1562 1561 1563 - lport->lport_loopid_map = 1564 - vzalloc(array_size(65536, 1565 - sizeof(struct tcm_qla2xxx_fc_loopid))); 1562 + map_sz = array_size(65536, sizeof(struct tcm_qla2xxx_fc_loopid)); 1563 + 1564 + lport->lport_loopid_map = vzalloc(map_sz); 1566 1565 if (!lport->lport_loopid_map) { 1567 - pr_err("Unable to allocate lport->lport_loopid_map of %zu bytes\n", 1568 - sizeof(struct tcm_qla2xxx_fc_loopid) * 65536); 1566 + pr_err("Unable to allocate lport->lport_loopid_map of %zu bytes\n", map_sz); 1569 1567 btree_destroy32(&lport->lport_fcport_map); 1570 1568 return -ENOMEM; 1571 1569 } 1572 - pr_debug("qla2xxx: Allocated lport_loopid_map of %zu bytes\n", 1573 - sizeof(struct tcm_qla2xxx_fc_loopid) * 65536); 1570 + pr_debug("qla2xxx: Allocated lport_loopid_map of %zu bytes\n", map_sz); 1574 1571 return 0; 1575 1572 } 1576 1573
+7 -5
drivers/scsi/scsi.c
··· 309 309 * I'm not convinced we need to try quite this hard to get VPD, but 310 310 * all the existing users tried this hard. 311 311 */ 312 - result = scsi_execute_req(sdev, cmd, DMA_FROM_DEVICE, buffer, 313 - len, NULL, 30 * HZ, 3, NULL); 312 + result = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_IN, buffer, len, 313 + 30 * HZ, 3, NULL); 314 314 if (result) 315 315 return -EIO; 316 316 ··· 510 510 unsigned char cmd[16]; 511 511 struct scsi_sense_hdr sshdr; 512 512 int result, request_len; 513 + const struct scsi_exec_args exec_args = { 514 + .sshdr = &sshdr, 515 + }; 513 516 514 517 if (sdev->no_report_opcodes || sdev->scsi_level < SCSI_SPC_3) 515 518 return -EINVAL; ··· 534 531 put_unaligned_be32(request_len, &cmd[6]); 535 532 memset(buffer, 0, len); 536 533 537 - result = scsi_execute_req(sdev, cmd, DMA_FROM_DEVICE, buffer, 538 - request_len, &sshdr, 30 * HZ, 3, NULL); 539 - 534 + result = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_IN, buffer, 535 + request_len, 30 * HZ, 3, &exec_args); 540 536 if (result < 0) 541 537 return result; 542 538 if (result && scsi_sense_valid(&sshdr) &&
+5 -2
drivers/scsi/scsi_ioctl.c
··· 69 69 { 70 70 int result; 71 71 struct scsi_sense_hdr sshdr; 72 + const struct scsi_exec_args exec_args = { 73 + .sshdr = &sshdr, 74 + }; 72 75 73 76 SCSI_LOG_IOCTL(1, sdev_printk(KERN_INFO, sdev, 74 77 "Trying ioctl with scsi command %d\n", *cmd)); 75 78 76 - result = scsi_execute_req(sdev, cmd, DMA_NONE, NULL, 0, 77 - &sshdr, timeout, retries, NULL); 79 + result = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_IN, NULL, 0, timeout, 80 + retries, &exec_args); 78 81 79 82 SCSI_LOG_IOCTL(2, sdev_printk(KERN_INFO, sdev, 80 83 "Ioctl returned 0x%x\n", result));
+42 -36
drivers/scsi/scsi_lib.c
··· 185 185 __scsi_queue_insert(cmd, reason, true); 186 186 } 187 187 188 - 189 188 /** 190 - * __scsi_execute - insert request and wait for the result 191 - * @sdev: scsi device 189 + * scsi_execute_cmd - insert request and wait for the result 190 + * @sdev: scsi_device 192 191 * @cmd: scsi command 193 - * @data_direction: data direction 192 + * @opf: block layer request cmd_flags 194 193 * @buffer: data buffer 195 194 * @bufflen: len of buffer 196 - * @sense: optional sense buffer 197 - * @sshdr: optional decoded sense header 198 195 * @timeout: request timeout in HZ 199 196 * @retries: number of times to retry request 200 - * @flags: flags for ->cmd_flags 201 - * @rq_flags: flags for ->rq_flags 202 - * @resid: optional residual length 197 + * @args: Optional args. See struct definition for field descriptions 203 198 * 204 199 * Returns the scsi_cmnd result field if a command was executed, or a negative 205 200 * Linux error code if we didn't get that far. 206 201 */ 207 - int __scsi_execute(struct scsi_device *sdev, const unsigned char *cmd, 208 - int data_direction, void *buffer, unsigned bufflen, 209 - unsigned char *sense, struct scsi_sense_hdr *sshdr, 210 - int timeout, int retries, blk_opf_t flags, 211 - req_flags_t rq_flags, int *resid) 202 + int scsi_execute_cmd(struct scsi_device *sdev, const unsigned char *cmd, 203 + blk_opf_t opf, void *buffer, unsigned int bufflen, 204 + int timeout, int retries, 205 + const struct scsi_exec_args *args) 212 206 { 207 + static const struct scsi_exec_args default_args; 213 208 struct request *req; 214 209 struct scsi_cmnd *scmd; 215 210 int ret; 216 211 217 - req = scsi_alloc_request(sdev->request_queue, 218 - data_direction == DMA_TO_DEVICE ? 219 - REQ_OP_DRV_OUT : REQ_OP_DRV_IN, 220 - rq_flags & RQF_PM ? BLK_MQ_REQ_PM : 0); 212 + if (!args) 213 + args = &default_args; 214 + else if (WARN_ON_ONCE(args->sense && 215 + args->sense_len != SCSI_SENSE_BUFFERSIZE)) 216 + return -EINVAL; 217 + 218 + req = scsi_alloc_request(sdev->request_queue, opf, args->req_flags); 221 219 if (IS_ERR(req)) 222 220 return PTR_ERR(req); 223 221 ··· 230 232 memcpy(scmd->cmnd, cmd, scmd->cmd_len); 231 233 scmd->allowed = retries; 232 234 req->timeout = timeout; 233 - req->cmd_flags |= flags; 234 - req->rq_flags |= rq_flags | RQF_QUIET; 235 + req->rq_flags |= RQF_QUIET; 235 236 236 237 /* 237 238 * head injection *required* here otherwise quiesce won't work ··· 246 249 if (unlikely(scmd->resid_len > 0 && scmd->resid_len <= bufflen)) 247 250 memset(buffer + bufflen - scmd->resid_len, 0, scmd->resid_len); 248 251 249 - if (resid) 250 - *resid = scmd->resid_len; 251 - if (sense && scmd->sense_len) 252 - memcpy(sense, scmd->sense_buffer, SCSI_SENSE_BUFFERSIZE); 253 - if (sshdr) 252 + if (args->resid) 253 + *args->resid = scmd->resid_len; 254 + if (args->sense) 255 + memcpy(args->sense, scmd->sense_buffer, SCSI_SENSE_BUFFERSIZE); 256 + if (args->sshdr) 254 257 scsi_normalize_sense(scmd->sense_buffer, scmd->sense_len, 255 - sshdr); 258 + args->sshdr); 259 + 256 260 ret = scmd->result; 257 261 out: 258 262 blk_mq_free_request(req); 259 263 260 264 return ret; 261 265 } 262 - EXPORT_SYMBOL(__scsi_execute); 266 + EXPORT_SYMBOL(scsi_execute_cmd); 263 267 264 268 /* 265 269 * Wake up the error handler if necessary. Avoid as follows that the error ··· 2084 2086 { 2085 2087 unsigned char cmd[10]; 2086 2088 unsigned char *real_buffer; 2089 + const struct scsi_exec_args exec_args = { 2090 + .sshdr = sshdr, 2091 + }; 2087 2092 int ret; 2088 2093 2089 2094 memset(cmd, 0, sizeof(cmd)); ··· 2136 2135 cmd[4] = len; 2137 2136 } 2138 2137 2139 - ret = scsi_execute_req(sdev, cmd, DMA_TO_DEVICE, real_buffer, len, 2140 - sshdr, timeout, retries, NULL); 2138 + ret = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_OUT, real_buffer, len, 2139 + timeout, retries, &exec_args); 2141 2140 kfree(real_buffer); 2142 2141 return ret; 2143 2142 } ··· 2168 2167 int header_length; 2169 2168 int result, retry_count = retries; 2170 2169 struct scsi_sense_hdr my_sshdr; 2170 + const struct scsi_exec_args exec_args = { 2171 + /* caller might not be interested in sense, but we need it */ 2172 + .sshdr = sshdr ? : &my_sshdr, 2173 + }; 2171 2174 2172 2175 memset(data, 0, sizeof(*data)); 2173 2176 memset(&cmd[0], 0, 12); ··· 2180 2175 cmd[1] = dbd & 0x18; /* allows DBD and LLBA bits */ 2181 2176 cmd[2] = modepage; 2182 2177 2183 - /* caller might not be interested in sense, but we need it */ 2184 - if (!sshdr) 2185 - sshdr = &my_sshdr; 2178 + sshdr = exec_args.sshdr; 2186 2179 2187 2180 retry: 2188 2181 use_10_for_ms = sdev->use_10_for_ms || len > 255; ··· 2203 2200 2204 2201 memset(buffer, 0, len); 2205 2202 2206 - result = scsi_execute_req(sdev, cmd, DMA_FROM_DEVICE, buffer, len, 2207 - sshdr, timeout, retries, NULL); 2203 + result = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_IN, buffer, len, 2204 + timeout, retries, &exec_args); 2208 2205 if (result < 0) 2209 2206 return result; 2210 2207 ··· 2284 2281 char cmd[] = { 2285 2282 TEST_UNIT_READY, 0, 0, 0, 0, 0, 2286 2283 }; 2284 + const struct scsi_exec_args exec_args = { 2285 + .sshdr = sshdr, 2286 + }; 2287 2287 int result; 2288 2288 2289 2289 /* try to eat the UNIT_ATTENTION if there are enough retries */ 2290 2290 do { 2291 - result = scsi_execute_req(sdev, cmd, DMA_NONE, NULL, 0, sshdr, 2292 - timeout, 1, NULL); 2291 + result = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_IN, NULL, 0, 2292 + timeout, 1, &exec_args); 2293 2293 if (sdev->removable && scsi_sense_valid(sshdr) && 2294 2294 sshdr->sense_key == UNIT_ATTENTION) 2295 2295 sdev->changed = 1;
+16 -10
drivers/scsi/scsi_scan.c
··· 210 210 scsi_cmd[3] = 0; 211 211 scsi_cmd[4] = 0x2a; /* size */ 212 212 scsi_cmd[5] = 0; 213 - scsi_execute_req(sdev, scsi_cmd, DMA_FROM_DEVICE, result, 0x2a, NULL, 213 + scsi_execute_cmd(sdev, scsi_cmd, REQ_OP_DRV_IN, result, 0x2a, 214 214 SCSI_TIMEOUT, 3, NULL); 215 215 } 216 216 ··· 646 646 unsigned char scsi_cmd[MAX_COMMAND_SIZE]; 647 647 int first_inquiry_len, try_inquiry_len, next_inquiry_len; 648 648 int response_len = 0; 649 - int pass, count, result; 649 + int pass, count, result, resid; 650 650 struct scsi_sense_hdr sshdr; 651 + const struct scsi_exec_args exec_args = { 652 + .sshdr = &sshdr, 653 + .resid = &resid, 654 + }; 651 655 652 656 *bflags = 0; 653 657 ··· 669 665 670 666 /* Each pass gets up to three chances to ignore Unit Attention */ 671 667 for (count = 0; count < 3; ++count) { 672 - int resid; 673 - 674 668 memset(scsi_cmd, 0, 6); 675 669 scsi_cmd[0] = INQUIRY; 676 670 scsi_cmd[4] = (unsigned char) try_inquiry_len; 677 671 678 672 memset(inq_result, 0, try_inquiry_len); 679 673 680 - result = scsi_execute_req(sdev, scsi_cmd, DMA_FROM_DEVICE, 681 - inq_result, try_inquiry_len, &sshdr, 674 + result = scsi_execute_cmd(sdev, scsi_cmd, REQ_OP_DRV_IN, 675 + inq_result, try_inquiry_len, 682 676 HZ / 2 + HZ * scsi_inq_timeout, 3, 683 - &resid); 677 + &exec_args); 684 678 685 679 SCSI_LOG_SCAN_BUS(3, sdev_printk(KERN_INFO, sdev, 686 680 "scsi scan: INQUIRY %s with code 0x%x\n", ··· 1403 1401 struct scsi_sense_hdr sshdr; 1404 1402 struct scsi_device *sdev; 1405 1403 struct Scsi_Host *shost = dev_to_shost(&starget->dev); 1404 + const struct scsi_exec_args exec_args = { 1405 + .sshdr = &sshdr, 1406 + }; 1406 1407 int ret = 0; 1407 1408 1408 1409 /* ··· 1480 1475 "scsi scan: Sending REPORT LUNS to (try %d)\n", 1481 1476 retries)); 1482 1477 1483 - result = scsi_execute_req(sdev, scsi_cmd, DMA_FROM_DEVICE, 1484 - lun_data, length, &sshdr, 1485 - SCSI_REPORT_LUNS_TIMEOUT, 3, NULL); 1478 + result = scsi_execute_cmd(sdev, scsi_cmd, REQ_OP_DRV_IN, 1479 + lun_data, length, 1480 + SCSI_REPORT_LUNS_TIMEOUT, 3, 1481 + &exec_args); 1486 1482 1487 1483 SCSI_LOG_SCAN_BUS(3, sdev_printk (KERN_INFO, sdev, 1488 1484 "scsi scan: REPORT LUNS"
+15 -16
drivers/scsi/scsi_transport_spi.c
··· 105 105 } 106 106 107 107 static int spi_execute(struct scsi_device *sdev, const void *cmd, 108 - enum dma_data_direction dir, 109 - void *buffer, unsigned bufflen, 108 + enum req_op op, void *buffer, unsigned int bufflen, 110 109 struct scsi_sense_hdr *sshdr) 111 110 { 112 111 int i, result; 113 - unsigned char sense[SCSI_SENSE_BUFFERSIZE]; 114 112 struct scsi_sense_hdr sshdr_tmp; 113 + blk_opf_t opf = op | REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT | 114 + REQ_FAILFAST_DRIVER; 115 + const struct scsi_exec_args exec_args = { 116 + .req_flags = BLK_MQ_REQ_PM, 117 + .sshdr = sshdr ? : &sshdr_tmp, 118 + }; 115 119 116 - if (!sshdr) 117 - sshdr = &sshdr_tmp; 120 + sshdr = exec_args.sshdr; 118 121 119 122 for(i = 0; i < DV_RETRIES; i++) { 120 123 /* 121 124 * The purpose of the RQF_PM flag below is to bypass the 122 125 * SDEV_QUIESCE state. 123 126 */ 124 - result = scsi_execute(sdev, cmd, dir, buffer, bufflen, sense, 125 - sshdr, DV_TIMEOUT, /* retries */ 1, 126 - REQ_FAILFAST_DEV | 127 - REQ_FAILFAST_TRANSPORT | 128 - REQ_FAILFAST_DRIVER, 129 - RQF_PM, NULL); 127 + result = scsi_execute_cmd(sdev, cmd, opf, buffer, bufflen, 128 + DV_TIMEOUT, 1, &exec_args); 130 129 if (result < 0 || !scsi_sense_valid(sshdr) || 131 130 sshdr->sense_key != UNIT_ATTENTION) 132 131 break; ··· 674 675 } 675 676 676 677 for (r = 0; r < retries; r++) { 677 - result = spi_execute(sdev, spi_write_buffer, DMA_TO_DEVICE, 678 + result = spi_execute(sdev, spi_write_buffer, REQ_OP_DRV_OUT, 678 679 buffer, len, &sshdr); 679 680 if(result || !scsi_device_online(sdev)) { 680 681 ··· 696 697 } 697 698 698 699 memset(ptr, 0, len); 699 - spi_execute(sdev, spi_read_buffer, DMA_FROM_DEVICE, 700 + spi_execute(sdev, spi_read_buffer, REQ_OP_DRV_IN, 700 701 ptr, len, NULL); 701 702 scsi_device_set_state(sdev, SDEV_QUIESCE); 702 703 ··· 721 722 for (r = 0; r < retries; r++) { 722 723 memset(ptr, 0, len); 723 724 724 - result = spi_execute(sdev, spi_inquiry, DMA_FROM_DEVICE, 725 + result = spi_execute(sdev, spi_inquiry, REQ_OP_DRV_IN, 725 726 ptr, len, NULL); 726 727 727 728 if(result || !scsi_device_online(sdev)) { ··· 827 828 * (reservation conflict, device not ready, etc) just 828 829 * skip the write tests */ 829 830 for (l = 0; ; l++) { 830 - result = spi_execute(sdev, spi_test_unit_ready, DMA_NONE, 831 + result = spi_execute(sdev, spi_test_unit_ready, REQ_OP_DRV_IN, 831 832 NULL, 0, NULL); 832 833 833 834 if(result) { ··· 840 841 } 841 842 842 843 result = spi_execute(sdev, spi_read_buffer_descriptor, 843 - DMA_FROM_DEVICE, buffer, 4, NULL); 844 + REQ_OP_DRV_IN, buffer, 4, NULL); 844 845 845 846 if (result) 846 847 /* Device has no echo buffer */
+55 -28
drivers/scsi/sd.c
··· 664 664 struct scsi_disk *sdkp = data; 665 665 struct scsi_device *sdev = sdkp->device; 666 666 u8 cdb[12] = { 0, }; 667 + const struct scsi_exec_args exec_args = { 668 + .req_flags = BLK_MQ_REQ_PM, 669 + }; 667 670 int ret; 668 671 669 672 cdb[0] = send ? SECURITY_PROTOCOL_OUT : SECURITY_PROTOCOL_IN; ··· 674 671 put_unaligned_be16(spsp, &cdb[2]); 675 672 put_unaligned_be32(len, &cdb[6]); 676 673 677 - ret = scsi_execute(sdev, cdb, send ? DMA_TO_DEVICE : DMA_FROM_DEVICE, 678 - buffer, len, NULL, NULL, SD_TIMEOUT, sdkp->max_retries, 0, 679 - RQF_PM, NULL); 674 + ret = scsi_execute_cmd(sdev, cdb, send ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN, 675 + buffer, len, SD_TIMEOUT, sdkp->max_retries, 676 + &exec_args); 680 677 return ret <= 0 ? ret : -EIO; 681 678 } 682 679 #endif /* CONFIG_BLK_SED_OPAL */ ··· 1584 1581 const int timeout = sdp->request_queue->rq_timeout 1585 1582 * SD_FLUSH_TIMEOUT_MULTIPLIER; 1586 1583 struct scsi_sense_hdr my_sshdr; 1584 + const struct scsi_exec_args exec_args = { 1585 + .req_flags = BLK_MQ_REQ_PM, 1586 + /* caller might not be interested in sense, but we need it */ 1587 + .sshdr = sshdr ? : &my_sshdr, 1588 + }; 1587 1589 1588 1590 if (!scsi_device_online(sdp)) 1589 1591 return -ENODEV; 1590 1592 1591 - /* caller might not be interested in sense, but we need it */ 1592 - if (!sshdr) 1593 - sshdr = &my_sshdr; 1593 + sshdr = exec_args.sshdr; 1594 1594 1595 1595 for (retries = 3; retries > 0; --retries) { 1596 1596 unsigned char cmd[16] = { 0 }; ··· 1606 1600 * Leave the rest of the command zero to indicate 1607 1601 * flush everything. 1608 1602 */ 1609 - res = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, sshdr, 1610 - timeout, sdkp->max_retries, 0, RQF_PM, NULL); 1603 + res = scsi_execute_cmd(sdp, cmd, REQ_OP_DRV_IN, NULL, 0, 1604 + timeout, sdkp->max_retries, &exec_args); 1611 1605 if (res == 0) 1612 1606 break; 1613 1607 } ··· 1749 1743 struct scsi_disk *sdkp = scsi_disk(bdev->bd_disk); 1750 1744 struct scsi_device *sdev = sdkp->device; 1751 1745 struct scsi_sense_hdr sshdr; 1746 + const struct scsi_exec_args exec_args = { 1747 + .sshdr = &sshdr, 1748 + }; 1752 1749 int result; 1753 1750 u8 cmd[16] = { 0, }; 1754 1751 u8 data[24] = { 0, }; ··· 1765 1756 put_unaligned_be64(sa_key, &data[8]); 1766 1757 data[20] = flags; 1767 1758 1768 - result = scsi_execute_req(sdev, cmd, DMA_TO_DEVICE, &data, sizeof(data), 1769 - &sshdr, SD_TIMEOUT, sdkp->max_retries, NULL); 1759 + result = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_OUT, &data, 1760 + sizeof(data), SD_TIMEOUT, sdkp->max_retries, 1761 + &exec_args); 1770 1762 1771 1763 if (scsi_status_is_check_condition(result) && 1772 1764 scsi_sense_valid(&sshdr)) { ··· 2096 2086 int retries, spintime; 2097 2087 unsigned int the_result; 2098 2088 struct scsi_sense_hdr sshdr; 2089 + const struct scsi_exec_args exec_args = { 2090 + .sshdr = &sshdr, 2091 + }; 2099 2092 int sense_valid = 0; 2100 2093 2101 2094 spintime = 0; ··· 2114 2101 cmd[0] = TEST_UNIT_READY; 2115 2102 memset((void *) &cmd[1], 0, 9); 2116 2103 2117 - the_result = scsi_execute_req(sdkp->device, cmd, 2118 - DMA_NONE, NULL, 0, 2119 - &sshdr, SD_TIMEOUT, 2120 - sdkp->max_retries, NULL); 2104 + the_result = scsi_execute_cmd(sdkp->device, cmd, 2105 + REQ_OP_DRV_IN, NULL, 0, 2106 + SD_TIMEOUT, 2107 + sdkp->max_retries, 2108 + &exec_args); 2121 2109 2122 2110 /* 2123 2111 * If the drive has indicated to us that it ··· 2175 2161 cmd[4] = 1; /* Start spin cycle */ 2176 2162 if (sdkp->device->start_stop_pwr_cond) 2177 2163 cmd[4] |= 1 << 4; 2178 - scsi_execute_req(sdkp->device, cmd, DMA_NONE, 2179 - NULL, 0, &sshdr, 2164 + scsi_execute_cmd(sdkp->device, cmd, 2165 + REQ_OP_DRV_IN, NULL, 0, 2180 2166 SD_TIMEOUT, sdkp->max_retries, 2181 - NULL); 2167 + &exec_args); 2182 2168 spintime_expire = jiffies + 100 * HZ; 2183 2169 spintime = 1; 2184 2170 } ··· 2308 2294 { 2309 2295 unsigned char cmd[16]; 2310 2296 struct scsi_sense_hdr sshdr; 2297 + const struct scsi_exec_args exec_args = { 2298 + .sshdr = &sshdr, 2299 + }; 2311 2300 int sense_valid = 0; 2312 2301 int the_result; 2313 2302 int retries = 3, reset_retries = READ_CAPACITY_RETRIES_ON_RESET; ··· 2328 2311 cmd[13] = RC16_LEN; 2329 2312 memset(buffer, 0, RC16_LEN); 2330 2313 2331 - the_result = scsi_execute_req(sdp, cmd, DMA_FROM_DEVICE, 2332 - buffer, RC16_LEN, &sshdr, 2333 - SD_TIMEOUT, sdkp->max_retries, NULL); 2314 + the_result = scsi_execute_cmd(sdp, cmd, REQ_OP_DRV_IN, 2315 + buffer, RC16_LEN, SD_TIMEOUT, 2316 + sdkp->max_retries, &exec_args); 2334 2317 2335 2318 if (media_not_present(sdkp, &sshdr)) 2336 2319 return -ENODEV; ··· 2402 2385 { 2403 2386 unsigned char cmd[16]; 2404 2387 struct scsi_sense_hdr sshdr; 2388 + const struct scsi_exec_args exec_args = { 2389 + .sshdr = &sshdr, 2390 + }; 2405 2391 int sense_valid = 0; 2406 2392 int the_result; 2407 2393 int retries = 3, reset_retries = READ_CAPACITY_RETRIES_ON_RESET; ··· 2416 2396 memset(&cmd[1], 0, 9); 2417 2397 memset(buffer, 0, 8); 2418 2398 2419 - the_result = scsi_execute_req(sdp, cmd, DMA_FROM_DEVICE, 2420 - buffer, 8, &sshdr, 2421 - SD_TIMEOUT, sdkp->max_retries, NULL); 2399 + the_result = scsi_execute_cmd(sdp, cmd, REQ_OP_DRV_IN, buffer, 2400 + 8, SD_TIMEOUT, sdkp->max_retries, 2401 + &exec_args); 2422 2402 2423 2403 if (media_not_present(sdkp, &sshdr)) 2424 2404 return -ENODEV; ··· 3655 3635 { 3656 3636 unsigned char cmd[6] = { START_STOP }; /* START_VALID */ 3657 3637 struct scsi_sense_hdr sshdr; 3638 + const struct scsi_exec_args exec_args = { 3639 + .sshdr = &sshdr, 3640 + .req_flags = BLK_MQ_REQ_PM, 3641 + }; 3658 3642 struct scsi_device *sdp = sdkp->device; 3659 3643 int res; 3660 3644 ··· 3671 3647 if (!scsi_device_online(sdp)) 3672 3648 return -ENODEV; 3673 3649 3674 - res = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr, 3675 - SD_TIMEOUT, sdkp->max_retries, 0, RQF_PM, NULL); 3650 + res = scsi_execute_cmd(sdp, cmd, REQ_OP_DRV_IN, NULL, 0, SD_TIMEOUT, 3651 + sdkp->max_retries, &exec_args); 3676 3652 if (res) { 3677 3653 sd_print_result(sdkp, "Start/Stop Unit failed", res); 3678 3654 if (res > 0 && scsi_sense_valid(&sshdr)) { ··· 3812 3788 if (sdp->ignore_media_change) { 3813 3789 /* clear the device's sense data */ 3814 3790 static const u8 cmd[10] = { REQUEST_SENSE }; 3791 + const struct scsi_exec_args exec_args = { 3792 + .req_flags = BLK_MQ_REQ_PM, 3793 + }; 3815 3794 3816 - if (scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, 3817 - NULL, sdp->request_queue->rq_timeout, 1, 0, 3818 - RQF_PM, NULL)) 3795 + if (scsi_execute_cmd(sdp, cmd, REQ_OP_DRV_IN, NULL, 0, 3796 + sdp->request_queue->rq_timeout, 1, 3797 + &exec_args)) 3819 3798 sd_printk(KERN_NOTICE, sdkp, 3820 3799 "Failed to clear sense data\n"); 3821 3800 }
+5 -3
drivers/scsi/sd_zbc.c
··· 148 148 struct scsi_device *sdp = sdkp->device; 149 149 const int timeout = sdp->request_queue->rq_timeout; 150 150 struct scsi_sense_hdr sshdr; 151 + const struct scsi_exec_args exec_args = { 152 + .sshdr = &sshdr, 153 + }; 151 154 unsigned char cmd[16]; 152 155 unsigned int rep_len; 153 156 int result; ··· 163 160 if (partial) 164 161 cmd[14] = ZBC_REPORT_ZONE_PARTIAL; 165 162 166 - result = scsi_execute_req(sdp, cmd, DMA_FROM_DEVICE, 167 - buf, buflen, &sshdr, 168 - timeout, SD_MAX_RETRIES, NULL); 163 + result = scsi_execute_cmd(sdp, cmd, REQ_OP_DRV_IN, buf, buflen, 164 + timeout, SD_MAX_RETRIES, &exec_args); 169 165 if (result) { 170 166 sd_printk(KERN_ERR, sdkp, 171 167 "REPORT ZONES start lba %llu failed\n", lba);
+10 -4
drivers/scsi/ses.c
··· 89 89 unsigned char recv_page_code; 90 90 unsigned int retries = SES_RETRIES; 91 91 struct scsi_sense_hdr sshdr; 92 + const struct scsi_exec_args exec_args = { 93 + .sshdr = &sshdr, 94 + }; 92 95 93 96 do { 94 - ret = scsi_execute_req(sdev, cmd, DMA_FROM_DEVICE, buf, bufflen, 95 - &sshdr, SES_TIMEOUT, 1, NULL); 97 + ret = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_IN, buf, bufflen, 98 + SES_TIMEOUT, 1, &exec_args); 96 99 } while (ret > 0 && --retries && scsi_sense_valid(&sshdr) && 97 100 (sshdr.sense_key == NOT_READY || 98 101 (sshdr.sense_key == UNIT_ATTENTION && sshdr.asc == 0x29))); ··· 133 130 }; 134 131 struct scsi_sense_hdr sshdr; 135 132 unsigned int retries = SES_RETRIES; 133 + const struct scsi_exec_args exec_args = { 134 + .sshdr = &sshdr, 135 + }; 136 136 137 137 do { 138 - result = scsi_execute_req(sdev, cmd, DMA_TO_DEVICE, buf, bufflen, 139 - &sshdr, SES_TIMEOUT, 1, NULL); 138 + result = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_OUT, buf, 139 + bufflen, SES_TIMEOUT, 1, &exec_args); 140 140 } while (result > 0 && --retries && scsi_sense_valid(&sshdr) && 141 141 (sshdr.sense_key == NOT_READY || 142 142 (sshdr.sense_key == UNIT_ATTENTION && sshdr.asc == 0x29)));
+1 -1
drivers/scsi/smartpqi/smartpqi.h
··· 954 954 955 955 struct report_log_lun_list { 956 956 struct report_lun_header header; 957 - struct report_log_lun lun_entries[1]; 957 + struct report_log_lun lun_entries[]; 958 958 }; 959 959 960 960 struct report_phys_lun_8byte_wwid {
+2 -1
drivers/scsi/smartpqi/smartpqi_init.c
··· 1259 1259 "report logical LUNs failed\n"); 1260 1260 1261 1261 /* 1262 - * Tack the controller itself onto the end of the logical device list. 1262 + * Tack the controller itself onto the end of the logical device list 1263 + * by adding a list entry that is all zeros. 1263 1264 */ 1264 1265 1265 1266 logdev_data = *logdev_list;
+2 -2
drivers/scsi/snic/snic_debugfs.c
··· 437 437 void 438 438 snic_trc_debugfs_term(void) 439 439 { 440 - debugfs_remove(debugfs_lookup(TRC_FILE, snic_glob->trc_root)); 441 - debugfs_remove(debugfs_lookup(TRC_ENABLE_FILE, snic_glob->trc_root)); 440 + debugfs_lookup_and_remove(TRC_FILE, snic_glob->trc_root); 441 + debugfs_lookup_and_remove(TRC_ENABLE_FILE, snic_glob->trc_root); 442 442 }
+7 -4
drivers/scsi/sr.c
··· 170 170 struct event_header *eh = (void *)buf; 171 171 struct media_event_desc *med = (void *)(buf + 4); 172 172 struct scsi_sense_hdr sshdr; 173 + const struct scsi_exec_args exec_args = { 174 + .sshdr = &sshdr, 175 + }; 173 176 int result; 174 177 175 - result = scsi_execute_req(sdev, cmd, DMA_FROM_DEVICE, buf, sizeof(buf), 176 - &sshdr, SR_TIMEOUT, MAX_RETRIES, NULL); 178 + result = scsi_execute_cmd(sdev, cmd, REQ_OP_DRV_IN, buf, sizeof(buf), 179 + SR_TIMEOUT, MAX_RETRIES, &exec_args); 177 180 if (scsi_sense_valid(&sshdr) && sshdr.sense_key == UNIT_ATTENTION) 178 181 return DISK_EVENT_MEDIA_CHANGE; 179 182 ··· 733 730 memset(buffer, 0, sizeof(buffer)); 734 731 735 732 /* Do the command and wait.. */ 736 - the_result = scsi_execute_req(cd->device, cmd, DMA_FROM_DEVICE, 737 - buffer, sizeof(buffer), NULL, 733 + the_result = scsi_execute_cmd(cd->device, cmd, REQ_OP_DRV_IN, 734 + buffer, sizeof(buffer), 738 735 SR_TIMEOUT, MAX_RETRIES, NULL); 739 736 740 737 retries--;
+10 -7
drivers/scsi/sr_ioctl.c
··· 188 188 int sr_do_ioctl(Scsi_CD *cd, struct packet_command *cgc) 189 189 { 190 190 struct scsi_device *SDev; 191 - struct scsi_sense_hdr local_sshdr, *sshdr = &local_sshdr; 191 + struct scsi_sense_hdr local_sshdr, *sshdr; 192 192 int result, err = 0, retries = 0; 193 + const struct scsi_exec_args exec_args = { 194 + .sshdr = cgc->sshdr ? : &local_sshdr, 195 + }; 193 196 194 197 SDev = cd->device; 195 198 196 - if (cgc->sshdr) 197 - sshdr = cgc->sshdr; 199 + sshdr = exec_args.sshdr; 198 200 199 201 retry: 200 202 if (!scsi_block_when_processing_errors(SDev)) { ··· 204 202 goto out; 205 203 } 206 204 207 - result = scsi_execute(SDev, cgc->cmd, cgc->data_direction, 208 - cgc->buffer, cgc->buflen, NULL, sshdr, 209 - cgc->timeout, IOCTL_RETRIES, 0, 0, NULL); 210 - 205 + result = scsi_execute_cmd(SDev, cgc->cmd, 206 + cgc->data_direction == DMA_TO_DEVICE ? 207 + REQ_OP_DRV_OUT : REQ_OP_DRV_IN, cgc->buffer, 208 + cgc->buflen, cgc->timeout, IOCTL_RETRIES, 209 + &exec_args); 211 210 /* Minimal error checking. Ignore cases we know about, and report the rest. */ 212 211 if (result < 0) { 213 212 err = result;
+2 -2
drivers/scsi/virtio_scsi.c
··· 347 347 348 348 memset(inq_result, 0, inq_result_len); 349 349 350 - result = scsi_execute_req(sdev, scsi_cmd, DMA_FROM_DEVICE, 351 - inq_result, inquiry_len, NULL, 350 + result = scsi_execute_cmd(sdev, scsi_cmd, REQ_OP_DRV_IN, 351 + inq_result, inquiry_len, 352 352 SD_TIMEOUT, SD_MAX_RETRIES, NULL); 353 353 354 354 if (result == 0 && inq_result[0] >> 5) {
+5 -7
drivers/target/target_core_pscsi.c
··· 144 144 cdb[0] = MODE_SENSE; 145 145 cdb[4] = 0x0c; /* 12 bytes */ 146 146 147 - ret = scsi_execute_req(sdev, cdb, DMA_FROM_DEVICE, buf, 12, NULL, 148 - HZ, 1, NULL); 147 + ret = scsi_execute_cmd(sdev, cdb, REQ_OP_DRV_IN, buf, 12, HZ, 1, NULL); 149 148 if (ret) 150 149 goto out_free; 151 150 ··· 194 195 cdb[2] = 0x80; /* Unit Serial Number */ 195 196 put_unaligned_be16(INQUIRY_VPD_SERIAL_LEN, &cdb[3]); 196 197 197 - ret = scsi_execute_req(sdev, cdb, DMA_FROM_DEVICE, buf, 198 - INQUIRY_VPD_SERIAL_LEN, NULL, HZ, 1, NULL); 198 + ret = scsi_execute_cmd(sdev, cdb, REQ_OP_DRV_IN, buf, 199 + INQUIRY_VPD_SERIAL_LEN, HZ, 1, NULL); 199 200 if (ret) 200 201 goto out_free; 201 202 ··· 229 230 cdb[2] = 0x83; /* Device Identifier */ 230 231 put_unaligned_be16(INQUIRY_VPD_DEVICE_IDENTIFIER_LEN, &cdb[3]); 231 232 232 - ret = scsi_execute_req(sdev, cdb, DMA_FROM_DEVICE, buf, 233 - INQUIRY_VPD_DEVICE_IDENTIFIER_LEN, 234 - NULL, HZ, 1, NULL); 233 + ret = scsi_execute_cmd(sdev, cdb, REQ_OP_DRV_IN, buf, 234 + INQUIRY_VPD_DEVICE_IDENTIFIER_LEN, HZ, 1, NULL); 235 235 if (ret) 236 236 goto out; 237 237
+1 -1
drivers/ufs/core/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 3 3 obj-$(CONFIG_SCSI_UFSHCD) += ufshcd-core.o 4 - ufshcd-core-y += ufshcd.o ufs-sysfs.o 4 + ufshcd-core-y += ufshcd.o ufs-sysfs.o ufs-mcq.o 5 5 ufshcd-core-$(CONFIG_DEBUG_FS) += ufs-debugfs.o 6 6 ufshcd-core-$(CONFIG_SCSI_UFS_BSG) += ufs_bsg.o 7 7 ufshcd-core-$(CONFIG_SCSI_UFS_CRYPTO) += ufshcd-crypto.o
+431
drivers/ufs/core/ufs-mcq.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * Copyright (c) 2022 Qualcomm Innovation Center. All rights reserved. 4 + * 5 + * Authors: 6 + * Asutosh Das <quic_asutoshd@quicinc.com> 7 + * Can Guo <quic_cang@quicinc.com> 8 + */ 9 + 10 + #include <asm/unaligned.h> 11 + #include <linux/dma-mapping.h> 12 + #include <linux/module.h> 13 + #include <linux/platform_device.h> 14 + #include "ufshcd-priv.h" 15 + 16 + #define MAX_QUEUE_SUP GENMASK(7, 0) 17 + #define UFS_MCQ_MIN_RW_QUEUES 2 18 + #define UFS_MCQ_MIN_READ_QUEUES 0 19 + #define UFS_MCQ_NUM_DEV_CMD_QUEUES 1 20 + #define UFS_MCQ_MIN_POLL_QUEUES 0 21 + #define QUEUE_EN_OFFSET 31 22 + #define QUEUE_ID_OFFSET 16 23 + 24 + #define MAX_DEV_CMD_ENTRIES 2 25 + #define MCQ_CFG_MAC_MASK GENMASK(16, 8) 26 + #define MCQ_QCFG_SIZE 0x40 27 + #define MCQ_ENTRY_SIZE_IN_DWORD 8 28 + #define CQE_UCD_BA GENMASK_ULL(63, 7) 29 + 30 + static int rw_queue_count_set(const char *val, const struct kernel_param *kp) 31 + { 32 + return param_set_uint_minmax(val, kp, UFS_MCQ_MIN_RW_QUEUES, 33 + num_possible_cpus()); 34 + } 35 + 36 + static const struct kernel_param_ops rw_queue_count_ops = { 37 + .set = rw_queue_count_set, 38 + .get = param_get_uint, 39 + }; 40 + 41 + static unsigned int rw_queues; 42 + module_param_cb(rw_queues, &rw_queue_count_ops, &rw_queues, 0644); 43 + MODULE_PARM_DESC(rw_queues, 44 + "Number of interrupt driven I/O queues used for rw. Default value is nr_cpus"); 45 + 46 + static int read_queue_count_set(const char *val, const struct kernel_param *kp) 47 + { 48 + return param_set_uint_minmax(val, kp, UFS_MCQ_MIN_READ_QUEUES, 49 + num_possible_cpus()); 50 + } 51 + 52 + static const struct kernel_param_ops read_queue_count_ops = { 53 + .set = read_queue_count_set, 54 + .get = param_get_uint, 55 + }; 56 + 57 + static unsigned int read_queues; 58 + module_param_cb(read_queues, &read_queue_count_ops, &read_queues, 0644); 59 + MODULE_PARM_DESC(read_queues, 60 + "Number of interrupt driven read queues used for read. Default value is 0"); 61 + 62 + static int poll_queue_count_set(const char *val, const struct kernel_param *kp) 63 + { 64 + return param_set_uint_minmax(val, kp, UFS_MCQ_MIN_POLL_QUEUES, 65 + num_possible_cpus()); 66 + } 67 + 68 + static const struct kernel_param_ops poll_queue_count_ops = { 69 + .set = poll_queue_count_set, 70 + .get = param_get_uint, 71 + }; 72 + 73 + static unsigned int poll_queues = 1; 74 + module_param_cb(poll_queues, &poll_queue_count_ops, &poll_queues, 0644); 75 + MODULE_PARM_DESC(poll_queues, 76 + "Number of poll queues used for r/w. Default value is 1"); 77 + 78 + /** 79 + * ufshcd_mcq_config_mac - Set the #Max Activ Cmds. 80 + * @hba: per adapter instance 81 + * @max_active_cmds: maximum # of active commands to the device at any time. 82 + * 83 + * The controller won't send more than the max_active_cmds to the device at 84 + * any time. 85 + */ 86 + void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds) 87 + { 88 + u32 val; 89 + 90 + val = ufshcd_readl(hba, REG_UFS_MCQ_CFG); 91 + val &= ~MCQ_CFG_MAC_MASK; 92 + val |= FIELD_PREP(MCQ_CFG_MAC_MASK, max_active_cmds); 93 + ufshcd_writel(hba, val, REG_UFS_MCQ_CFG); 94 + } 95 + 96 + /** 97 + * ufshcd_mcq_req_to_hwq - find the hardware queue on which the 98 + * request would be issued. 99 + * @hba: per adapter instance 100 + * @req: pointer to the request to be issued 101 + * 102 + * Returns the hardware queue instance on which the request would 103 + * be queued. 104 + */ 105 + struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba, 106 + struct request *req) 107 + { 108 + u32 utag = blk_mq_unique_tag(req); 109 + u32 hwq = blk_mq_unique_tag_to_hwq(utag); 110 + 111 + /* uhq[0] is used to serve device commands */ 112 + return &hba->uhq[hwq + UFSHCD_MCQ_IO_QUEUE_OFFSET]; 113 + } 114 + 115 + /** 116 + * ufshcd_mcq_decide_queue_depth - decide the queue depth 117 + * @hba: per adapter instance 118 + * 119 + * Returns queue-depth on success, non-zero on error 120 + * 121 + * MAC - Max. Active Command of the Host Controller (HC) 122 + * HC wouldn't send more than this commands to the device. 123 + * It is mandatory to implement get_hba_mac() to enable MCQ mode. 124 + * Calculates and adjusts the queue depth based on the depth 125 + * supported by the HC and ufs device. 126 + */ 127 + int ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba) 128 + { 129 + int mac; 130 + 131 + /* Mandatory to implement get_hba_mac() */ 132 + mac = ufshcd_mcq_vops_get_hba_mac(hba); 133 + if (mac < 0) { 134 + dev_err(hba->dev, "Failed to get mac, err=%d\n", mac); 135 + return mac; 136 + } 137 + 138 + WARN_ON_ONCE(!hba->dev_info.bqueuedepth); 139 + /* 140 + * max. value of bqueuedepth = 256, mac is host dependent. 141 + * It is mandatory for UFS device to define bQueueDepth if 142 + * shared queuing architecture is enabled. 143 + */ 144 + return min_t(int, mac, hba->dev_info.bqueuedepth); 145 + } 146 + 147 + static int ufshcd_mcq_config_nr_queues(struct ufs_hba *hba) 148 + { 149 + int i; 150 + u32 hba_maxq, rem, tot_queues; 151 + struct Scsi_Host *host = hba->host; 152 + 153 + hba_maxq = FIELD_GET(MAX_QUEUE_SUP, hba->mcq_capabilities); 154 + 155 + tot_queues = UFS_MCQ_NUM_DEV_CMD_QUEUES + read_queues + poll_queues + 156 + rw_queues; 157 + 158 + if (hba_maxq < tot_queues) { 159 + dev_err(hba->dev, "Total queues (%d) exceeds HC capacity (%d)\n", 160 + tot_queues, hba_maxq); 161 + return -EOPNOTSUPP; 162 + } 163 + 164 + rem = hba_maxq - UFS_MCQ_NUM_DEV_CMD_QUEUES; 165 + 166 + if (rw_queues) { 167 + hba->nr_queues[HCTX_TYPE_DEFAULT] = rw_queues; 168 + rem -= hba->nr_queues[HCTX_TYPE_DEFAULT]; 169 + } else { 170 + rw_queues = num_possible_cpus(); 171 + } 172 + 173 + if (poll_queues) { 174 + hba->nr_queues[HCTX_TYPE_POLL] = poll_queues; 175 + rem -= hba->nr_queues[HCTX_TYPE_POLL]; 176 + } 177 + 178 + if (read_queues) { 179 + hba->nr_queues[HCTX_TYPE_READ] = read_queues; 180 + rem -= hba->nr_queues[HCTX_TYPE_READ]; 181 + } 182 + 183 + if (!hba->nr_queues[HCTX_TYPE_DEFAULT]) 184 + hba->nr_queues[HCTX_TYPE_DEFAULT] = min3(rem, rw_queues, 185 + num_possible_cpus()); 186 + 187 + for (i = 0; i < HCTX_MAX_TYPES; i++) 188 + host->nr_hw_queues += hba->nr_queues[i]; 189 + 190 + hba->nr_hw_queues = host->nr_hw_queues + UFS_MCQ_NUM_DEV_CMD_QUEUES; 191 + return 0; 192 + } 193 + 194 + int ufshcd_mcq_memory_alloc(struct ufs_hba *hba) 195 + { 196 + struct ufs_hw_queue *hwq; 197 + size_t utrdl_size, cqe_size; 198 + int i; 199 + 200 + for (i = 0; i < hba->nr_hw_queues; i++) { 201 + hwq = &hba->uhq[i]; 202 + 203 + utrdl_size = sizeof(struct utp_transfer_req_desc) * 204 + hwq->max_entries; 205 + hwq->sqe_base_addr = dmam_alloc_coherent(hba->dev, utrdl_size, 206 + &hwq->sqe_dma_addr, 207 + GFP_KERNEL); 208 + if (!hwq->sqe_dma_addr) { 209 + dev_err(hba->dev, "SQE allocation failed\n"); 210 + return -ENOMEM; 211 + } 212 + 213 + cqe_size = sizeof(struct cq_entry) * hwq->max_entries; 214 + hwq->cqe_base_addr = dmam_alloc_coherent(hba->dev, cqe_size, 215 + &hwq->cqe_dma_addr, 216 + GFP_KERNEL); 217 + if (!hwq->cqe_dma_addr) { 218 + dev_err(hba->dev, "CQE allocation failed\n"); 219 + return -ENOMEM; 220 + } 221 + } 222 + 223 + return 0; 224 + } 225 + 226 + 227 + /* Operation and runtime registers configuration */ 228 + #define MCQ_CFG_n(r, i) ((r) + MCQ_QCFG_SIZE * (i)) 229 + #define MCQ_OPR_OFFSET_n(p, i) \ 230 + (hba->mcq_opr[(p)].offset + hba->mcq_opr[(p)].stride * (i)) 231 + 232 + static void __iomem *mcq_opr_base(struct ufs_hba *hba, 233 + enum ufshcd_mcq_opr n, int i) 234 + { 235 + struct ufshcd_mcq_opr_info_t *opr = &hba->mcq_opr[n]; 236 + 237 + return opr->base + opr->stride * i; 238 + } 239 + 240 + u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i) 241 + { 242 + return readl(mcq_opr_base(hba, OPR_CQIS, i) + REG_CQIS); 243 + } 244 + 245 + void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i) 246 + { 247 + writel(val, mcq_opr_base(hba, OPR_CQIS, i) + REG_CQIS); 248 + } 249 + EXPORT_SYMBOL_GPL(ufshcd_mcq_write_cqis); 250 + 251 + /* 252 + * Current MCQ specification doesn't provide a Task Tag or its equivalent in 253 + * the Completion Queue Entry. Find the Task Tag using an indirect method. 254 + */ 255 + static int ufshcd_mcq_get_tag(struct ufs_hba *hba, 256 + struct ufs_hw_queue *hwq, 257 + struct cq_entry *cqe) 258 + { 259 + u64 addr; 260 + 261 + /* sizeof(struct utp_transfer_cmd_desc) must be a multiple of 128 */ 262 + BUILD_BUG_ON(sizeof(struct utp_transfer_cmd_desc) & GENMASK(6, 0)); 263 + 264 + /* Bits 63:7 UCD base address, 6:5 are reserved, 4:0 is SQ ID */ 265 + addr = (le64_to_cpu(cqe->command_desc_base_addr) & CQE_UCD_BA) - 266 + hba->ucdl_dma_addr; 267 + 268 + return div_u64(addr, sizeof(struct utp_transfer_cmd_desc)); 269 + } 270 + 271 + static void ufshcd_mcq_process_cqe(struct ufs_hba *hba, 272 + struct ufs_hw_queue *hwq) 273 + { 274 + struct cq_entry *cqe = ufshcd_mcq_cur_cqe(hwq); 275 + int tag = ufshcd_mcq_get_tag(hba, hwq, cqe); 276 + 277 + ufshcd_compl_one_cqe(hba, tag, cqe); 278 + } 279 + 280 + unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba, 281 + struct ufs_hw_queue *hwq) 282 + { 283 + unsigned long completed_reqs = 0; 284 + 285 + ufshcd_mcq_update_cq_tail_slot(hwq); 286 + while (!ufshcd_mcq_is_cq_empty(hwq)) { 287 + ufshcd_mcq_process_cqe(hba, hwq); 288 + ufshcd_mcq_inc_cq_head_slot(hwq); 289 + completed_reqs++; 290 + } 291 + 292 + if (completed_reqs) 293 + ufshcd_mcq_update_cq_head(hwq); 294 + 295 + return completed_reqs; 296 + } 297 + EXPORT_SYMBOL_GPL(ufshcd_mcq_poll_cqe_nolock); 298 + 299 + unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba, 300 + struct ufs_hw_queue *hwq) 301 + { 302 + unsigned long completed_reqs; 303 + 304 + spin_lock(&hwq->cq_lock); 305 + completed_reqs = ufshcd_mcq_poll_cqe_nolock(hba, hwq); 306 + spin_unlock(&hwq->cq_lock); 307 + 308 + return completed_reqs; 309 + } 310 + 311 + void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba) 312 + { 313 + struct ufs_hw_queue *hwq; 314 + u16 qsize; 315 + int i; 316 + 317 + for (i = 0; i < hba->nr_hw_queues; i++) { 318 + hwq = &hba->uhq[i]; 319 + hwq->id = i; 320 + qsize = hwq->max_entries * MCQ_ENTRY_SIZE_IN_DWORD - 1; 321 + 322 + /* Submission Queue Lower Base Address */ 323 + ufsmcq_writelx(hba, lower_32_bits(hwq->sqe_dma_addr), 324 + MCQ_CFG_n(REG_SQLBA, i)); 325 + /* Submission Queue Upper Base Address */ 326 + ufsmcq_writelx(hba, upper_32_bits(hwq->sqe_dma_addr), 327 + MCQ_CFG_n(REG_SQUBA, i)); 328 + /* Submission Queue Doorbell Address Offset */ 329 + ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQD, i), 330 + MCQ_CFG_n(REG_SQDAO, i)); 331 + /* Submission Queue Interrupt Status Address Offset */ 332 + ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQIS, i), 333 + MCQ_CFG_n(REG_SQISAO, i)); 334 + 335 + /* Completion Queue Lower Base Address */ 336 + ufsmcq_writelx(hba, lower_32_bits(hwq->cqe_dma_addr), 337 + MCQ_CFG_n(REG_CQLBA, i)); 338 + /* Completion Queue Upper Base Address */ 339 + ufsmcq_writelx(hba, upper_32_bits(hwq->cqe_dma_addr), 340 + MCQ_CFG_n(REG_CQUBA, i)); 341 + /* Completion Queue Doorbell Address Offset */ 342 + ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQD, i), 343 + MCQ_CFG_n(REG_CQDAO, i)); 344 + /* Completion Queue Interrupt Status Address Offset */ 345 + ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQIS, i), 346 + MCQ_CFG_n(REG_CQISAO, i)); 347 + 348 + /* Save the base addresses for quicker access */ 349 + hwq->mcq_sq_head = mcq_opr_base(hba, OPR_SQD, i) + REG_SQHP; 350 + hwq->mcq_sq_tail = mcq_opr_base(hba, OPR_SQD, i) + REG_SQTP; 351 + hwq->mcq_cq_head = mcq_opr_base(hba, OPR_CQD, i) + REG_CQHP; 352 + hwq->mcq_cq_tail = mcq_opr_base(hba, OPR_CQD, i) + REG_CQTP; 353 + 354 + /* Reinitializing is needed upon HC reset */ 355 + hwq->sq_tail_slot = hwq->cq_tail_slot = hwq->cq_head_slot = 0; 356 + 357 + /* Enable Tail Entry Push Status interrupt only for non-poll queues */ 358 + if (i < hba->nr_hw_queues - hba->nr_queues[HCTX_TYPE_POLL]) 359 + writel(1, mcq_opr_base(hba, OPR_CQIS, i) + REG_CQIE); 360 + 361 + /* Completion Queue Enable|Size to Completion Queue Attribute */ 362 + ufsmcq_writel(hba, (1 << QUEUE_EN_OFFSET) | qsize, 363 + MCQ_CFG_n(REG_CQATTR, i)); 364 + 365 + /* 366 + * Submission Qeueue Enable|Size|Completion Queue ID to 367 + * Submission Queue Attribute 368 + */ 369 + ufsmcq_writel(hba, (1 << QUEUE_EN_OFFSET) | qsize | 370 + (i << QUEUE_ID_OFFSET), 371 + MCQ_CFG_n(REG_SQATTR, i)); 372 + } 373 + } 374 + 375 + void ufshcd_mcq_enable_esi(struct ufs_hba *hba) 376 + { 377 + ufshcd_writel(hba, ufshcd_readl(hba, REG_UFS_MEM_CFG) | 0x2, 378 + REG_UFS_MEM_CFG); 379 + } 380 + EXPORT_SYMBOL_GPL(ufshcd_mcq_enable_esi); 381 + 382 + void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg) 383 + { 384 + ufshcd_writel(hba, msg->address_lo, REG_UFS_ESILBA); 385 + ufshcd_writel(hba, msg->address_hi, REG_UFS_ESIUBA); 386 + } 387 + EXPORT_SYMBOL_GPL(ufshcd_mcq_config_esi); 388 + 389 + int ufshcd_mcq_init(struct ufs_hba *hba) 390 + { 391 + struct Scsi_Host *host = hba->host; 392 + struct ufs_hw_queue *hwq; 393 + int ret, i; 394 + 395 + ret = ufshcd_mcq_config_nr_queues(hba); 396 + if (ret) 397 + return ret; 398 + 399 + ret = ufshcd_vops_mcq_config_resource(hba); 400 + if (ret) 401 + return ret; 402 + 403 + ret = ufshcd_mcq_vops_op_runtime_config(hba); 404 + if (ret) { 405 + dev_err(hba->dev, "Operation runtime config failed, ret=%d\n", 406 + ret); 407 + return ret; 408 + } 409 + hba->uhq = devm_kzalloc(hba->dev, 410 + hba->nr_hw_queues * sizeof(struct ufs_hw_queue), 411 + GFP_KERNEL); 412 + if (!hba->uhq) { 413 + dev_err(hba->dev, "ufs hw queue memory allocation failed\n"); 414 + return -ENOMEM; 415 + } 416 + 417 + for (i = 0; i < hba->nr_hw_queues; i++) { 418 + hwq = &hba->uhq[i]; 419 + hwq->max_entries = hba->nutrs; 420 + spin_lock_init(&hwq->sq_lock); 421 + spin_lock_init(&hwq->cq_lock); 422 + } 423 + 424 + /* The very first HW queue serves device commands */ 425 + hba->dev_cmd_queue = &hba->uhq[0]; 426 + /* Give dev_cmd_queue the minimal number of entries */ 427 + hba->dev_cmd_queue->max_entries = MAX_DEV_CMD_ENTRIES; 428 + 429 + host->host_tagset = 1; 430 + return 0; 431 + }
+90 -54
drivers/ufs/core/ufs_bsg.c
··· 6 6 */ 7 7 8 8 #include <linux/bsg-lib.h> 9 + #include <linux/dma-mapping.h> 9 10 #include <scsi/scsi.h> 10 11 #include <scsi/scsi_host.h> 11 12 #include "ufs_bsg.h" ··· 17 16 struct utp_upiu_query *qr) 18 17 { 19 18 int desc_size = be16_to_cpu(qr->length); 20 - int desc_id = qr->idn; 21 19 22 20 if (desc_size <= 0) 23 21 return -EINVAL; 24 22 25 - ufshcd_map_desc_id_to_length(hba, desc_id, desc_len); 26 - if (!*desc_len) 27 - return -EINVAL; 28 - 29 - *desc_len = min_t(int, *desc_len, desc_size); 30 - 31 - return 0; 32 - } 33 - 34 - static int ufs_bsg_verify_query_size(struct ufs_hba *hba, 35 - unsigned int request_len, 36 - unsigned int reply_len) 37 - { 38 - int min_req_len = sizeof(struct ufs_bsg_request); 39 - int min_rsp_len = sizeof(struct ufs_bsg_reply); 40 - 41 - if (min_req_len > request_len || min_rsp_len > reply_len) { 42 - dev_err(hba->dev, "not enough space assigned\n"); 43 - return -EINVAL; 44 - } 23 + *desc_len = min_t(int, QUERY_DESC_MAX_SIZE, desc_size); 45 24 46 25 return 0; 47 26 } ··· 64 83 return 0; 65 84 } 66 85 86 + static int ufs_bsg_exec_advanced_rpmb_req(struct ufs_hba *hba, struct bsg_job *job) 87 + { 88 + struct ufs_rpmb_request *rpmb_request = job->request; 89 + struct ufs_rpmb_reply *rpmb_reply = job->reply; 90 + struct bsg_buffer *payload = NULL; 91 + enum dma_data_direction dir; 92 + struct scatterlist *sg_list = NULL; 93 + int rpmb_req_type; 94 + int sg_cnt = 0; 95 + int ret; 96 + int data_len; 97 + 98 + if (hba->ufs_version < ufshci_version(4, 0) || !hba->dev_info.b_advanced_rpmb_en || 99 + !(hba->capabilities & MASK_EHSLUTRD_SUPPORTED)) 100 + return -EINVAL; 101 + 102 + if (rpmb_request->ehs_req.length != 2 || rpmb_request->ehs_req.ehs_type != 1) 103 + return -EINVAL; 104 + 105 + rpmb_req_type = be16_to_cpu(rpmb_request->ehs_req.meta.req_resp_type); 106 + 107 + switch (rpmb_req_type) { 108 + case UFS_RPMB_WRITE_KEY: 109 + case UFS_RPMB_READ_CNT: 110 + case UFS_RPMB_PURGE_ENABLE: 111 + dir = DMA_NONE; 112 + break; 113 + case UFS_RPMB_WRITE: 114 + case UFS_RPMB_SEC_CONF_WRITE: 115 + dir = DMA_TO_DEVICE; 116 + break; 117 + case UFS_RPMB_READ: 118 + case UFS_RPMB_SEC_CONF_READ: 119 + case UFS_RPMB_PURGE_STATUS_READ: 120 + dir = DMA_FROM_DEVICE; 121 + break; 122 + default: 123 + return -EINVAL; 124 + } 125 + 126 + if (dir != DMA_NONE) { 127 + payload = &job->request_payload; 128 + if (!payload || !payload->payload_len || !payload->sg_cnt) 129 + return -EINVAL; 130 + 131 + sg_cnt = dma_map_sg(hba->host->dma_dev, payload->sg_list, payload->sg_cnt, dir); 132 + if (unlikely(!sg_cnt)) 133 + return -ENOMEM; 134 + sg_list = payload->sg_list; 135 + data_len = payload->payload_len; 136 + } 137 + 138 + ret = ufshcd_advanced_rpmb_req_handler(hba, &rpmb_request->bsg_request.upiu_req, 139 + &rpmb_reply->bsg_reply.upiu_rsp, &rpmb_request->ehs_req, 140 + &rpmb_reply->ehs_rsp, sg_cnt, sg_list, dir); 141 + 142 + if (dir != DMA_NONE) { 143 + dma_unmap_sg(hba->host->dma_dev, payload->sg_list, payload->sg_cnt, dir); 144 + 145 + if (!ret) 146 + rpmb_reply->bsg_reply.reply_payload_rcv_len = data_len; 147 + } 148 + 149 + return ret; 150 + } 151 + 67 152 static int ufs_bsg_request(struct bsg_job *job) 68 153 { 69 154 struct ufs_bsg_request *bsg_request = job->request; 70 155 struct ufs_bsg_reply *bsg_reply = job->reply; 71 156 struct ufs_hba *hba = shost_priv(dev_to_shost(job->dev->parent)); 72 - unsigned int req_len = job->request_len; 73 - unsigned int reply_len = job->reply_len; 74 157 struct uic_command uc = {}; 75 158 int msgcode; 76 - uint8_t *desc_buff = NULL; 159 + uint8_t *buff = NULL; 77 160 int desc_len = 0; 78 161 enum query_opcode desc_op = UPIU_QUERY_OPCODE_NOP; 79 162 int ret; 80 - 81 - ret = ufs_bsg_verify_query_size(hba, req_len, reply_len); 82 - if (ret) 83 - goto out; 163 + bool rpmb = false; 84 164 85 165 bsg_reply->reply_payload_rcv_len = 0; 86 166 ··· 151 109 switch (msgcode) { 152 110 case UPIU_TRANSACTION_QUERY_REQ: 153 111 desc_op = bsg_request->upiu_req.qr.opcode; 154 - ret = ufs_bsg_alloc_desc_buffer(hba, job, &desc_buff, 155 - &desc_len, desc_op); 156 - if (ret) { 157 - ufshcd_rpm_put_sync(hba); 112 + ret = ufs_bsg_alloc_desc_buffer(hba, job, &buff, &desc_len, desc_op); 113 + if (ret) 158 114 goto out; 159 - } 160 - 161 115 fallthrough; 162 116 case UPIU_TRANSACTION_NOP_OUT: 163 117 case UPIU_TRANSACTION_TASK_REQ: 164 118 ret = ufshcd_exec_raw_upiu_cmd(hba, &bsg_request->upiu_req, 165 119 &bsg_reply->upiu_rsp, msgcode, 166 - desc_buff, &desc_len, desc_op); 120 + buff, &desc_len, desc_op); 167 121 if (ret) 168 - dev_err(hba->dev, 169 - "exe raw upiu: error code %d\n", ret); 170 - 122 + dev_err(hba->dev, "exe raw upiu: error code %d\n", ret); 123 + else if (desc_op == UPIU_QUERY_OPCODE_READ_DESC && desc_len) { 124 + bsg_reply->reply_payload_rcv_len = 125 + sg_copy_from_buffer(job->request_payload.sg_list, 126 + job->request_payload.sg_cnt, 127 + buff, desc_len); 128 + } 171 129 break; 172 130 case UPIU_TRANSACTION_UIC_CMD: 173 131 memcpy(&uc, &bsg_request->upiu_req.uc, UIC_CMD_SIZE); 174 132 ret = ufshcd_send_uic_cmd(hba, &uc); 175 133 if (ret) 176 - dev_err(hba->dev, 177 - "send uic cmd: error code %d\n", ret); 134 + dev_err(hba->dev, "send uic cmd: error code %d\n", ret); 178 135 179 136 memcpy(&bsg_reply->upiu_rsp.uc, &uc, UIC_CMD_SIZE); 180 137 138 + break; 139 + case UPIU_TRANSACTION_ARPMB_CMD: 140 + rpmb = true; 141 + ret = ufs_bsg_exec_advanced_rpmb_req(hba, job); 142 + if (ret) 143 + dev_err(hba->dev, "ARPMB OP failed: error code %d\n", ret); 181 144 break; 182 145 default: 183 146 ret = -ENOTSUPP; ··· 191 144 break; 192 145 } 193 146 194 - ufshcd_rpm_put_sync(hba); 195 - 196 - if (!desc_buff) 197 - goto out; 198 - 199 - if (desc_op == UPIU_QUERY_OPCODE_READ_DESC && desc_len) 200 - bsg_reply->reply_payload_rcv_len = 201 - sg_copy_from_buffer(job->request_payload.sg_list, 202 - job->request_payload.sg_cnt, 203 - desc_buff, desc_len); 204 - 205 - kfree(desc_buff); 206 - 207 147 out: 148 + ufshcd_rpm_put_sync(hba); 149 + kfree(buff); 208 150 bsg_reply->result = ret; 209 - job->reply_len = sizeof(struct ufs_bsg_reply); 151 + job->reply_len = !rpmb ? sizeof(struct ufs_bsg_reply) : sizeof(struct ufs_rpmb_reply); 210 152 /* complete the job here only if no error */ 211 153 if (ret == 0) 212 154 bsg_job_done(job, ret, bsg_reply->reply_payload_rcv_len);
+104 -3
drivers/ufs/core/ufshcd-priv.h
··· 61 61 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode, 62 62 enum flag_idn idn, u8 index, bool *flag_res); 63 63 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit); 64 + void ufshcd_compl_one_cqe(struct ufs_hba *hba, int task_tag, 65 + struct cq_entry *cqe); 66 + int ufshcd_mcq_init(struct ufs_hba *hba); 67 + int ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba); 68 + int ufshcd_mcq_memory_alloc(struct ufs_hba *hba); 69 + void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba); 70 + void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds); 71 + void ufshcd_mcq_select_mcq_mode(struct ufs_hba *hba); 72 + u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i); 73 + void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i); 74 + unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba, 75 + struct ufs_hw_queue *hwq); 76 + struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba, 77 + struct request *req); 78 + unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba, 79 + struct ufs_hw_queue *hwq); 64 80 81 + #define UFSHCD_MCQ_IO_QUEUE_OFFSET 1 65 82 #define SD_ASCII_STD true 66 83 #define SD_RAW false 67 84 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index, ··· 86 69 87 70 int ufshcd_hold(struct ufs_hba *hba, bool async); 88 71 void ufshcd_release(struct ufs_hba *hba); 89 - 90 - void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id, 91 - int *desc_length); 92 72 93 73 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd); 94 74 ··· 240 226 hba->vops->config_scaling_param(hba, p, data); 241 227 } 242 228 229 + static inline void ufshcd_vops_reinit_notify(struct ufs_hba *hba) 230 + { 231 + if (hba->vops && hba->vops->reinit_notify) 232 + hba->vops->reinit_notify(hba); 233 + } 234 + 235 + static inline int ufshcd_vops_mcq_config_resource(struct ufs_hba *hba) 236 + { 237 + if (hba->vops && hba->vops->mcq_config_resource) 238 + return hba->vops->mcq_config_resource(hba); 239 + 240 + return -EOPNOTSUPP; 241 + } 242 + 243 + static inline int ufshcd_mcq_vops_get_hba_mac(struct ufs_hba *hba) 244 + { 245 + if (hba->vops && hba->vops->get_hba_mac) 246 + return hba->vops->get_hba_mac(hba); 247 + 248 + return -EOPNOTSUPP; 249 + } 250 + 251 + static inline int ufshcd_mcq_vops_op_runtime_config(struct ufs_hba *hba) 252 + { 253 + if (hba->vops && hba->vops->op_runtime_config) 254 + return hba->vops->op_runtime_config(hba); 255 + 256 + return -EOPNOTSUPP; 257 + } 258 + 259 + static inline int ufshcd_vops_get_outstanding_cqs(struct ufs_hba *hba, 260 + unsigned long *ocqs) 261 + { 262 + if (hba->vops && hba->vops->get_outstanding_cqs) 263 + return hba->vops->get_outstanding_cqs(hba, ocqs); 264 + 265 + return -EOPNOTSUPP; 266 + } 267 + 268 + static inline int ufshcd_mcq_vops_config_esi(struct ufs_hba *hba) 269 + { 270 + if (hba->vops && hba->vops->config_esi) 271 + return hba->vops->config_esi(hba); 272 + 273 + return -EOPNOTSUPP; 274 + } 275 + 243 276 extern const struct ufs_pm_lvl_states ufs_pm_lvl_states[]; 244 277 245 278 /** ··· 363 302 return lun == UFS_UPIU_RPMB_WLUN || (lun < dev_info->max_lu_supported); 364 303 } 365 304 305 + static inline void ufshcd_inc_sq_tail(struct ufs_hw_queue *q) 306 + { 307 + u32 mask = q->max_entries - 1; 308 + u32 val; 309 + 310 + q->sq_tail_slot = (q->sq_tail_slot + 1) & mask; 311 + val = q->sq_tail_slot * sizeof(struct utp_transfer_req_desc); 312 + writel(val, q->mcq_sq_tail); 313 + } 314 + 315 + static inline void ufshcd_mcq_update_cq_tail_slot(struct ufs_hw_queue *q) 316 + { 317 + u32 val = readl(q->mcq_cq_tail); 318 + 319 + q->cq_tail_slot = val / sizeof(struct cq_entry); 320 + } 321 + 322 + static inline bool ufshcd_mcq_is_cq_empty(struct ufs_hw_queue *q) 323 + { 324 + return q->cq_head_slot == q->cq_tail_slot; 325 + } 326 + 327 + static inline void ufshcd_mcq_inc_cq_head_slot(struct ufs_hw_queue *q) 328 + { 329 + q->cq_head_slot++; 330 + if (q->cq_head_slot == q->max_entries) 331 + q->cq_head_slot = 0; 332 + } 333 + 334 + static inline void ufshcd_mcq_update_cq_head(struct ufs_hw_queue *q) 335 + { 336 + writel(q->cq_head_slot * sizeof(struct cq_entry), q->mcq_cq_head); 337 + } 338 + 339 + static inline struct cq_entry *ufshcd_mcq_cur_cqe(struct ufs_hw_queue *q) 340 + { 341 + struct cq_entry *cqe = q->cqe_base_addr; 342 + 343 + return cqe + q->cq_head_slot; 344 + } 366 345 #endif /* _UFSHCD_PRIV_H_ */
+648 -213
drivers/ufs/core/ufshcd.c
··· 43 43 #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\ 44 44 UTP_TASK_REQ_COMPL |\ 45 45 UFSHCD_ERROR_MASK) 46 + 47 + #define UFSHCD_ENABLE_MCQ_INTRS (UTP_TASK_REQ_COMPL |\ 48 + UFSHCD_ERROR_MASK |\ 49 + MCQ_CQ_EVENT_STATUS) 50 + 51 + 46 52 /* UIC command timeout, unit: ms */ 47 53 #define UIC_CMD_TIMEOUT 500 48 54 ··· 61 55 #define QUERY_REQ_RETRIES 3 62 56 /* Query request timeout */ 63 57 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */ 58 + 59 + /* Advanced RPMB request timeout */ 60 + #define ADVANCED_RPMB_REQ_TIMEOUT 3000 /* 3 seconds */ 64 61 65 62 /* Task management command timeout */ 66 63 #define TM_CMD_TIMEOUT 100 /* msecs */ ··· 97 88 98 89 /* Polling time to wait for fDeviceInit */ 99 90 #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */ 91 + 92 + /* UFSHC 4.0 compliant HC support this mode, refer param_set_mcq_mode() */ 93 + static bool use_mcq_mode = true; 94 + 95 + static bool is_mcq_supported(struct ufs_hba *hba) 96 + { 97 + return hba->mcq_sup && use_mcq_mode; 98 + } 99 + 100 + static int param_set_mcq_mode(const char *val, const struct kernel_param *kp) 101 + { 102 + int ret; 103 + 104 + ret = param_set_bool(val, kp); 105 + if (ret) 106 + return ret; 107 + 108 + return 0; 109 + } 110 + 111 + static const struct kernel_param_ops mcq_mode_ops = { 112 + .set = param_set_mcq_mode, 113 + .get = param_get_bool, 114 + }; 115 + 116 + module_param_cb(use_mcq_mode, &mcq_mode_ops, &use_mcq_mode, 0644); 117 + MODULE_PARM_DESC(use_mcq_mode, "Control MCQ mode for controllers starting from UFSHCI 4.0. 1 - enable MCQ, 0 - disable MCQ. MCQ is enabled by default"); 100 118 101 119 #define ufshcd_toggle_vreg(_dev, _vreg, _on) \ 102 120 ({ \ ··· 564 528 prdt_length = le16_to_cpu( 565 529 lrbp->utr_descriptor_ptr->prd_table_length); 566 530 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) 567 - prdt_length /= sizeof(struct ufshcd_sg_entry); 531 + prdt_length /= ufshcd_sg_entry_size(hba); 568 532 569 533 dev_err(hba->dev, 570 534 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n", ··· 573 537 574 538 if (pr_prdt) 575 539 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr, 576 - sizeof(struct ufshcd_sg_entry) * prdt_length); 540 + ufshcd_sg_entry_size(hba) * prdt_length); 577 541 } 578 542 } 579 543 ··· 776 740 /** 777 741 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status 778 742 * @lrbp: pointer to local command reference block 743 + * @cqe: pointer to the completion queue entry 779 744 * 780 745 * This function is used to get the OCS field from UTRD 781 746 * Returns the OCS field in the UTRD 782 747 */ 783 - static enum utp_ocs ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp) 748 + static enum utp_ocs ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp, 749 + struct cq_entry *cqe) 784 750 { 751 + if (cqe) 752 + return le32_to_cpu(cqe->status) & MASK_OCS; 753 + 785 754 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS; 786 755 } 787 756 ··· 1162 1121 return pending; 1163 1122 } 1164 1123 1124 + /* 1125 + * Wait until all pending SCSI commands and TMFs have finished or the timeout 1126 + * has expired. 1127 + * 1128 + * Return: 0 upon success; -EBUSY upon timeout. 1129 + */ 1165 1130 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba, 1166 1131 u64 wait_timeout_us) 1167 1132 { ··· 1201 1154 } 1202 1155 1203 1156 spin_unlock_irqrestore(hba->host->host_lock, flags); 1204 - schedule(); 1157 + io_schedule_timeout(msecs_to_jiffies(20)); 1205 1158 if (ktime_to_us(ktime_sub(ktime_get(), start)) > 1206 1159 wait_timeout_us) { 1207 1160 timeout = true; ··· 1272 1225 return ret; 1273 1226 } 1274 1227 1275 - static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba) 1228 + /* 1229 + * Wait until all pending SCSI commands and TMFs have finished or the timeout 1230 + * has expired. 1231 + * 1232 + * Return: 0 upon success; -EBUSY upon timeout. 1233 + */ 1234 + static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba, u64 timeout_us) 1276 1235 { 1277 - #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */ 1278 1236 int ret = 0; 1279 1237 /* 1280 1238 * make sure that there are no outstanding requests when ··· 1290 1238 down_write(&hba->clk_scaling_lock); 1291 1239 1292 1240 if (!hba->clk_scaling.is_allowed || 1293 - ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) { 1241 + ufshcd_wait_for_doorbell_clr(hba, timeout_us)) { 1294 1242 ret = -EBUSY; 1295 1243 up_write(&hba->clk_scaling_lock); 1296 1244 mutex_unlock(&hba->wb_mutex); ··· 1332 1280 { 1333 1281 int ret = 0; 1334 1282 1335 - ret = ufshcd_clock_scaling_prepare(hba); 1283 + ret = ufshcd_clock_scaling_prepare(hba, 1 * USEC_PER_SEC); 1336 1284 if (ret) 1337 1285 return ret; 1338 1286 ··· 2188 2136 * ufshcd_send_command - Send SCSI or device management commands 2189 2137 * @hba: per adapter instance 2190 2138 * @task_tag: Task tag of the command 2139 + * @hwq: pointer to hardware queue instance 2191 2140 */ 2192 2141 static inline 2193 - void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag) 2142 + void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag, 2143 + struct ufs_hw_queue *hwq) 2194 2144 { 2195 2145 struct ufshcd_lrb *lrbp = &hba->lrb[task_tag]; 2196 2146 unsigned long flags; ··· 2206 2152 if (unlikely(ufshcd_should_inform_monitor(hba, lrbp))) 2207 2153 ufshcd_start_monitor(hba, lrbp); 2208 2154 2209 - spin_lock_irqsave(&hba->outstanding_lock, flags); 2210 - if (hba->vops && hba->vops->setup_xfer_req) 2211 - hba->vops->setup_xfer_req(hba, task_tag, !!lrbp->cmd); 2212 - __set_bit(task_tag, &hba->outstanding_reqs); 2213 - ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL); 2214 - spin_unlock_irqrestore(&hba->outstanding_lock, flags); 2155 + if (is_mcq_enabled(hba)) { 2156 + int utrd_size = sizeof(struct utp_transfer_req_desc); 2157 + 2158 + spin_lock(&hwq->sq_lock); 2159 + memcpy(hwq->sqe_base_addr + (hwq->sq_tail_slot * utrd_size), 2160 + lrbp->utr_descriptor_ptr, utrd_size); 2161 + ufshcd_inc_sq_tail(hwq); 2162 + spin_unlock(&hwq->sq_lock); 2163 + } else { 2164 + spin_lock_irqsave(&hba->outstanding_lock, flags); 2165 + if (hba->vops && hba->vops->setup_xfer_req) 2166 + hba->vops->setup_xfer_req(hba, lrbp->task_tag, 2167 + !!lrbp->cmd); 2168 + __set_bit(lrbp->task_tag, &hba->outstanding_reqs); 2169 + ufshcd_writel(hba, 1 << lrbp->task_tag, 2170 + REG_UTP_TRANSFER_REQ_DOOR_BELL); 2171 + spin_unlock_irqrestore(&hba->outstanding_lock, flags); 2172 + } 2215 2173 } 2216 2174 2217 2175 /** ··· 2310 2244 err = ufshcd_hba_init_crypto_capabilities(hba); 2311 2245 if (err) 2312 2246 dev_err(hba->dev, "crypto setup failed\n"); 2247 + 2248 + hba->mcq_sup = FIELD_GET(MASK_MCQ_SUPPORT, hba->capabilities); 2249 + if (!hba->mcq_sup) 2250 + return err; 2251 + 2252 + hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP); 2253 + hba->ext_iid_sup = FIELD_GET(MASK_EXT_IID_SUPPORT, 2254 + hba->mcq_capabilities); 2313 2255 2314 2256 return err; 2315 2257 } ··· 2471 2397 } 2472 2398 2473 2399 /** 2474 - * ufshcd_map_sg - Map scatter-gather list to prdt 2475 - * @hba: per adapter instance 2476 - * @lrbp: pointer to local reference block 2477 - * 2478 - * Returns 0 in case of success, non-zero value in case of failure 2400 + * ufshcd_sgl_to_prdt - SG list to PRTD (Physical Region Description Table, 4DW format) 2401 + * @hba: per-adapter instance 2402 + * @lrbp: pointer to local reference block 2403 + * @sg_entries: The number of sg lists actually used 2404 + * @sg_list: Pointer to SG list 2479 2405 */ 2480 - static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) 2406 + static void ufshcd_sgl_to_prdt(struct ufs_hba *hba, struct ufshcd_lrb *lrbp, int sg_entries, 2407 + struct scatterlist *sg_list) 2481 2408 { 2482 - struct ufshcd_sg_entry *prd_table; 2409 + struct ufshcd_sg_entry *prd; 2483 2410 struct scatterlist *sg; 2484 - struct scsi_cmnd *cmd; 2485 - int sg_segments; 2486 2411 int i; 2487 2412 2488 - cmd = lrbp->cmd; 2489 - sg_segments = scsi_dma_map(cmd); 2490 - if (sg_segments < 0) 2491 - return sg_segments; 2492 - 2493 - if (sg_segments) { 2413 + if (sg_entries) { 2494 2414 2495 2415 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) 2496 2416 lrbp->utr_descriptor_ptr->prd_table_length = 2497 - cpu_to_le16((sg_segments * 2498 - sizeof(struct ufshcd_sg_entry))); 2417 + cpu_to_le16(sg_entries * ufshcd_sg_entry_size(hba)); 2499 2418 else 2500 - lrbp->utr_descriptor_ptr->prd_table_length = 2501 - cpu_to_le16(sg_segments); 2419 + lrbp->utr_descriptor_ptr->prd_table_length = cpu_to_le16(sg_entries); 2502 2420 2503 - prd_table = lrbp->ucd_prdt_ptr; 2421 + prd = lrbp->ucd_prdt_ptr; 2504 2422 2505 - scsi_for_each_sg(cmd, sg, sg_segments, i) { 2423 + for_each_sg(sg_list, sg, sg_entries, i) { 2506 2424 const unsigned int len = sg_dma_len(sg); 2507 2425 2508 2426 /* ··· 2506 2440 * indicates 4 bytes, '7' indicates 8 bytes, etc." 2507 2441 */ 2508 2442 WARN_ONCE(len > 256 * 1024, "len = %#x\n", len); 2509 - prd_table[i].size = cpu_to_le32(len - 1); 2510 - prd_table[i].addr = cpu_to_le64(sg->dma_address); 2511 - prd_table[i].reserved = 0; 2443 + prd->size = cpu_to_le32(len - 1); 2444 + prd->addr = cpu_to_le64(sg->dma_address); 2445 + prd->reserved = 0; 2446 + prd = (void *)prd + ufshcd_sg_entry_size(hba); 2512 2447 } 2513 2448 } else { 2514 2449 lrbp->utr_descriptor_ptr->prd_table_length = 0; 2515 2450 } 2451 + } 2452 + 2453 + /** 2454 + * ufshcd_map_sg - Map scatter-gather list to prdt 2455 + * @hba: per adapter instance 2456 + * @lrbp: pointer to local reference block 2457 + * 2458 + * Returns 0 in case of success, non-zero value in case of failure 2459 + */ 2460 + static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) 2461 + { 2462 + struct scsi_cmnd *cmd = lrbp->cmd; 2463 + int sg_segments = scsi_dma_map(cmd); 2464 + 2465 + if (sg_segments < 0) 2466 + return sg_segments; 2467 + 2468 + ufshcd_sgl_to_prdt(hba, lrbp, sg_segments, scsi_sglist(cmd)); 2516 2469 2517 2470 return 0; 2518 2471 } ··· 2579 2494 } 2580 2495 2581 2496 /** 2582 - * ufshcd_prepare_req_desc_hdr() - Fills the requests header 2497 + * ufshcd_prepare_req_desc_hdr - Fill UTP Transfer request descriptor header according to request 2583 2498 * descriptor according to request 2584 2499 * @lrbp: pointer to local reference block 2585 2500 * @upiu_flags: flags required in the header 2586 2501 * @cmd_dir: requests data direction 2502 + * @ehs_length: Total EHS Length (in 32‐bytes units of all Extra Header Segments) 2587 2503 */ 2588 - static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp, 2589 - u8 *upiu_flags, enum dma_data_direction cmd_dir) 2504 + static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp, u8 *upiu_flags, 2505 + enum dma_data_direction cmd_dir, int ehs_length) 2590 2506 { 2591 2507 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr; 2592 2508 u32 data_direction; ··· 2606 2520 *upiu_flags = UPIU_CMD_FLAGS_NONE; 2607 2521 } 2608 2522 2609 - dword_0 = data_direction | (lrbp->command_type 2610 - << UPIU_COMMAND_TYPE_OFFSET); 2523 + dword_0 = data_direction | (lrbp->command_type << UPIU_COMMAND_TYPE_OFFSET) | 2524 + ehs_length << 8; 2611 2525 if (lrbp->intr_cmd) 2612 2526 dword_0 |= UTP_REQ_DESC_INT_CMD; 2613 2527 ··· 2662 2576 } 2663 2577 2664 2578 /** 2665 - * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc, 2666 - * for query requsts 2579 + * ufshcd_prepare_utp_query_req_upiu() - fill the utp_transfer_req_desc for query request 2667 2580 * @hba: UFS hba 2668 2581 * @lrbp: local reference block pointer 2669 2582 * @upiu_flags: flags ··· 2733 2648 else 2734 2649 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE; 2735 2650 2736 - ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE); 2651 + ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE, 0); 2737 2652 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY) 2738 2653 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags); 2739 2654 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP) ··· 2761 2676 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE; 2762 2677 2763 2678 if (likely(lrbp->cmd)) { 2764 - ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, 2765 - lrbp->cmd->sc_data_direction); 2679 + ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, lrbp->cmd->sc_data_direction, 0); 2766 2680 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags); 2767 2681 } else { 2768 2682 ret = -EINVAL; ··· 2793 2709 */ 2794 2710 static void ufshcd_map_queues(struct Scsi_Host *shost) 2795 2711 { 2796 - int i; 2712 + struct ufs_hba *hba = shost_priv(shost); 2713 + int i, queue_offset = 0; 2714 + 2715 + if (!is_mcq_supported(hba)) { 2716 + hba->nr_queues[HCTX_TYPE_DEFAULT] = 1; 2717 + hba->nr_queues[HCTX_TYPE_READ] = 0; 2718 + hba->nr_queues[HCTX_TYPE_POLL] = 1; 2719 + hba->nr_hw_queues = 1; 2720 + } 2797 2721 2798 2722 for (i = 0; i < shost->nr_maps; i++) { 2799 2723 struct blk_mq_queue_map *map = &shost->tag_set.map[i]; 2800 2724 2801 - switch (i) { 2802 - case HCTX_TYPE_DEFAULT: 2803 - case HCTX_TYPE_POLL: 2804 - map->nr_queues = 1; 2805 - break; 2806 - case HCTX_TYPE_READ: 2807 - map->nr_queues = 0; 2725 + map->nr_queues = hba->nr_queues[i]; 2726 + if (!map->nr_queues) 2808 2727 continue; 2809 - default: 2810 - WARN_ON_ONCE(true); 2811 - } 2812 - map->queue_offset = 0; 2728 + map->queue_offset = queue_offset; 2729 + if (i == HCTX_TYPE_POLL && !is_mcq_supported(hba)) 2730 + map->queue_offset = 0; 2731 + 2813 2732 blk_mq_map_queues(map); 2733 + queue_offset += map->nr_queues; 2814 2734 } 2815 2735 } 2816 2736 2817 2737 static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i) 2818 2738 { 2819 - struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr; 2739 + struct utp_transfer_cmd_desc *cmd_descp = (void *)hba->ucdl_base_addr + 2740 + i * sizeof_utp_transfer_cmd_desc(hba); 2820 2741 struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr; 2821 2742 dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr + 2822 - i * sizeof(struct utp_transfer_cmd_desc); 2743 + i * sizeof_utp_transfer_cmd_desc(hba); 2823 2744 u16 response_offset = offsetof(struct utp_transfer_cmd_desc, 2824 2745 response_upiu); 2825 2746 u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table); ··· 2832 2743 lrb->utr_descriptor_ptr = utrdlp + i; 2833 2744 lrb->utrd_dma_addr = hba->utrdl_dma_addr + 2834 2745 i * sizeof(struct utp_transfer_req_desc); 2835 - lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i); 2746 + lrb->ucd_req_ptr = (struct utp_upiu_req *)cmd_descp->command_upiu; 2836 2747 lrb->ucd_req_dma_addr = cmd_desc_element_addr; 2837 - lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu; 2748 + lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp->response_upiu; 2838 2749 lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset; 2839 - lrb->ucd_prdt_ptr = cmd_descp[i].prd_table; 2750 + lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp->prd_table; 2840 2751 lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset; 2841 2752 } 2842 2753 ··· 2853 2764 int tag = scsi_cmd_to_rq(cmd)->tag; 2854 2765 struct ufshcd_lrb *lrbp; 2855 2766 int err = 0; 2767 + struct ufs_hw_queue *hwq = NULL; 2856 2768 2857 2769 WARN_ONCE(tag < 0 || tag >= hba->nutrs, "Invalid tag %d\n", tag); 2858 2770 ··· 2938 2848 goto out; 2939 2849 } 2940 2850 2941 - ufshcd_send_command(hba, tag); 2851 + if (is_mcq_enabled(hba)) 2852 + hwq = ufshcd_mcq_req_to_hwq(hba, scsi_cmd_to_rq(cmd)); 2853 + 2854 + ufshcd_send_command(hba, tag, hwq); 2942 2855 2943 2856 out: 2944 2857 rcu_read_unlock(); ··· 3036 2943 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n", 3037 2944 __func__); 3038 2945 break; 2946 + case UPIU_TRANSACTION_RESPONSE: 2947 + if (hba->dev_cmd.type != DEV_CMD_TYPE_RPMB) { 2948 + err = -EINVAL; 2949 + dev_err(hba->dev, "%s: unexpected response %x\n", __func__, resp); 2950 + } 2951 + break; 3039 2952 default: 3040 2953 err = -EINVAL; 3041 2954 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n", ··· 3071 2972 * not trigger any race conditions. 3072 2973 */ 3073 2974 hba->dev_cmd.complete = NULL; 3074 - err = ufshcd_get_tr_ocs(lrbp); 2975 + err = ufshcd_get_tr_ocs(lrbp, hba->dev_cmd.cqe); 3075 2976 if (!err) 3076 2977 err = ufshcd_dev_cmd_completion(hba, lrbp); 3077 2978 } else { ··· 3107 3008 } else { 3108 3009 dev_err(hba->dev, "%s: failed to clear tag %d\n", 3109 3010 __func__, lrbp->task_tag); 3011 + 3012 + spin_lock_irqsave(&hba->outstanding_lock, flags); 3013 + pending = test_bit(lrbp->task_tag, 3014 + &hba->outstanding_reqs); 3015 + if (pending) 3016 + hba->dev_cmd.complete = NULL; 3017 + spin_unlock_irqrestore(&hba->outstanding_lock, flags); 3018 + 3019 + if (!pending) { 3020 + /* 3021 + * The completion handler ran while we tried to 3022 + * clear the command. 3023 + */ 3024 + time_left = 1; 3025 + goto retry; 3026 + } 3110 3027 } 3111 3028 } 3112 3029 ··· 3158 3043 goto out; 3159 3044 3160 3045 hba->dev_cmd.complete = &wait; 3046 + hba->dev_cmd.cqe = NULL; 3161 3047 3162 3048 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr); 3163 3049 3164 - ufshcd_send_command(hba, tag); 3050 + ufshcd_send_command(hba, tag, hba->dev_cmd_queue); 3165 3051 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout); 3166 3052 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP, 3167 3053 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr); ··· 3483 3367 } 3484 3368 3485 3369 /** 3486 - * ufshcd_map_desc_id_to_length - map descriptor IDN to its length 3487 - * @hba: Pointer to adapter instance 3488 - * @desc_id: descriptor idn value 3489 - * @desc_len: mapped desc length (out) 3490 - */ 3491 - void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id, 3492 - int *desc_len) 3493 - { 3494 - if (desc_id >= QUERY_DESC_IDN_MAX || desc_id == QUERY_DESC_IDN_RFU_0 || 3495 - desc_id == QUERY_DESC_IDN_RFU_1) 3496 - *desc_len = 0; 3497 - else 3498 - *desc_len = hba->desc_size[desc_id]; 3499 - } 3500 - EXPORT_SYMBOL(ufshcd_map_desc_id_to_length); 3501 - 3502 - static void ufshcd_update_desc_length(struct ufs_hba *hba, 3503 - enum desc_idn desc_id, int desc_index, 3504 - unsigned char desc_len) 3505 - { 3506 - if (hba->desc_size[desc_id] == QUERY_DESC_MAX_SIZE && 3507 - desc_id != QUERY_DESC_IDN_STRING && desc_index != UFS_RPMB_UNIT) 3508 - /* For UFS 3.1, the normal unit descriptor is 10 bytes larger 3509 - * than the RPMB unit, however, both descriptors share the same 3510 - * desc_idn, to cover both unit descriptors with one length, we 3511 - * choose the normal unit descriptor length by desc_index. 3512 - */ 3513 - hba->desc_size[desc_id] = desc_len; 3514 - } 3515 - 3516 - /** 3517 3370 * ufshcd_read_desc_param - read the specified descriptor parameter 3518 3371 * @hba: Pointer to adapter instance 3519 3372 * @desc_id: descriptor idn value ··· 3502 3417 { 3503 3418 int ret; 3504 3419 u8 *desc_buf; 3505 - int buff_len; 3420 + int buff_len = QUERY_DESC_MAX_SIZE; 3506 3421 bool is_kmalloc = true; 3507 3422 3508 3423 /* Safety check */ 3509 3424 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size) 3510 3425 return -EINVAL; 3511 - 3512 - /* Get the length of descriptor */ 3513 - ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len); 3514 - if (!buff_len) { 3515 - dev_err(hba->dev, "%s: Failed to get desc length\n", __func__); 3516 - return -EINVAL; 3517 - } 3518 - 3519 - if (param_offset >= buff_len) { 3520 - dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n", 3521 - __func__, param_offset, desc_id, buff_len); 3522 - return -EINVAL; 3523 - } 3524 3426 3525 3427 /* Check whether we need temp memory */ 3526 3428 if (param_offset != 0 || param_size < buff_len) { ··· 3521 3449 3522 3450 /* Request for full descriptor */ 3523 3451 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC, 3524 - desc_id, desc_index, 0, 3525 - desc_buf, &buff_len); 3526 - 3452 + desc_id, desc_index, 0, 3453 + desc_buf, &buff_len); 3527 3454 if (ret) { 3528 3455 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n", 3529 3456 __func__, desc_id, desc_index, param_offset, ret); 3457 + goto out; 3458 + } 3459 + 3460 + /* Update descriptor length */ 3461 + buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET]; 3462 + 3463 + if (param_offset >= buff_len) { 3464 + dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n", 3465 + __func__, param_offset, desc_id, buff_len); 3466 + ret = -EINVAL; 3530 3467 goto out; 3531 3468 } 3532 3469 ··· 3546 3465 ret = -EINVAL; 3547 3466 goto out; 3548 3467 } 3549 - 3550 - /* Update descriptor length */ 3551 - buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET]; 3552 - ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len); 3553 3468 3554 3469 if (is_kmalloc) { 3555 3470 /* Make sure we don't copy more data than available */ ··· 3733 3656 size_t utmrdl_size, utrdl_size, ucdl_size; 3734 3657 3735 3658 /* Allocate memory for UTP command descriptors */ 3736 - ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs); 3659 + ucdl_size = sizeof_utp_transfer_cmd_desc(hba) * hba->nutrs; 3737 3660 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev, 3738 3661 ucdl_size, 3739 3662 &hba->ucdl_dma_addr, ··· 3741 3664 3742 3665 /* 3743 3666 * UFSHCI requires UTP command descriptor to be 128 byte aligned. 3744 - * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE 3745 - * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will 3746 - * be aligned to 128 bytes as well 3747 3667 */ 3748 3668 if (!hba->ucdl_base_addr || 3749 - WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) { 3669 + WARN_ON(hba->ucdl_dma_addr & (128 - 1))) { 3750 3670 dev_err(hba->dev, 3751 3671 "Command Descriptor Memory allocation failed\n"); 3752 3672 goto out; ··· 3759 3685 &hba->utrdl_dma_addr, 3760 3686 GFP_KERNEL); 3761 3687 if (!hba->utrdl_base_addr || 3762 - WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) { 3688 + WARN_ON(hba->utrdl_dma_addr & (1024 - 1))) { 3763 3689 dev_err(hba->dev, 3764 3690 "Transfer Descriptor Memory allocation failed\n"); 3765 3691 goto out; 3766 3692 } 3767 3693 3694 + /* 3695 + * Skip utmrdl allocation; it may have been 3696 + * allocated during first pass and not released during 3697 + * MCQ memory allocation. 3698 + * See ufshcd_release_sdb_queue() and ufshcd_config_mcq() 3699 + */ 3700 + if (hba->utmrdl_base_addr) 3701 + goto skip_utmrdl; 3768 3702 /* 3769 3703 * Allocate memory for UTP Task Management descriptors 3770 3704 * UFSHCI requires 1024 byte alignment of UTMRD ··· 3783 3701 &hba->utmrdl_dma_addr, 3784 3702 GFP_KERNEL); 3785 3703 if (!hba->utmrdl_base_addr || 3786 - WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) { 3704 + WARN_ON(hba->utmrdl_dma_addr & (1024 - 1))) { 3787 3705 dev_err(hba->dev, 3788 3706 "Task Management Descriptor Memory allocation failed\n"); 3789 3707 goto out; 3790 3708 } 3791 3709 3710 + skip_utmrdl: 3792 3711 /* Allocate memory for local reference block */ 3793 3712 hba->lrb = devm_kcalloc(hba->dev, 3794 3713 hba->nutrs, sizeof(struct ufshcd_lrb), ··· 3833 3750 prdt_offset = 3834 3751 offsetof(struct utp_transfer_cmd_desc, prd_table); 3835 3752 3836 - cmd_desc_size = sizeof(struct utp_transfer_cmd_desc); 3753 + cmd_desc_size = sizeof_utp_transfer_cmd_desc(hba); 3837 3754 cmd_desc_dma_addr = hba->ucdl_dma_addr; 3838 3755 3839 3756 for (i = 0; i < hba->nutrs; i++) { ··· 4990 4907 */ 4991 4908 static void ufshcd_lu_init(struct ufs_hba *hba, struct scsi_device *sdev) 4992 4909 { 4993 - int len = hba->desc_size[QUERY_DESC_IDN_UNIT]; 4910 + int len = QUERY_DESC_MAX_SIZE; 4994 4911 u8 lun = ufshcd_scsi_to_upiu_lun(sdev->lun); 4995 4912 u8 lun_qdepth = hba->nutrs; 4996 4913 u8 *desc_buf; ··· 5024 4941 !hba->dev_info.is_lu_power_on_wp && 5025 4942 desc_buf[UNIT_DESC_PARAM_LU_WR_PROTECT] == UFS_LU_POWER_ON_WP) 5026 4943 hba->dev_info.is_lu_power_on_wp = true; 4944 + 4945 + /* In case of RPMB LU, check if advanced RPMB mode is enabled */ 4946 + if (desc_buf[UNIT_DESC_PARAM_UNIT_INDEX] == UFS_UPIU_RPMB_WLUN && 4947 + desc_buf[RPMB_UNIT_DESC_PARAM_REGION_EN] & BIT(4)) 4948 + hba->dev_info.b_advanced_rpmb_en = true; 4949 + 5027 4950 5028 4951 kfree(desc_buf); 5029 4952 set_qdepth: ··· 5119 5030 ufshcd_hpb_configure(hba, sdev); 5120 5031 5121 5032 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1); 5122 - if (hba->quirks & UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE) 5123 - blk_queue_update_dma_alignment(q, PAGE_SIZE - 1); 5033 + if (hba->quirks & UFSHCD_QUIRK_4KB_DMA_ALIGNMENT) 5034 + blk_queue_update_dma_alignment(q, 4096 - 1); 5124 5035 /* 5125 5036 * Block runtime-pm until all consumers are added. 5126 5037 * Refer ufshcd_setup_links(). ··· 5219 5130 * ufshcd_transfer_rsp_status - Get overall status of the response 5220 5131 * @hba: per adapter instance 5221 5132 * @lrbp: pointer to local reference block of completed command 5133 + * @cqe: pointer to the completion queue entry 5222 5134 * 5223 5135 * Returns result of the command to notify SCSI midlayer 5224 5136 */ 5225 5137 static inline int 5226 - ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) 5138 + ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp, 5139 + struct cq_entry *cqe) 5227 5140 { 5228 5141 int result = 0; 5229 5142 int scsi_status; 5230 5143 enum utp_ocs ocs; 5231 5144 5232 5145 /* overall command status of utrd */ 5233 - ocs = ufshcd_get_tr_ocs(lrbp); 5146 + ocs = ufshcd_get_tr_ocs(lrbp, cqe); 5234 5147 5235 5148 if (hba->quirks & UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR) { 5236 5149 if (be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_1) & ··· 5397 5306 } 5398 5307 5399 5308 /** 5309 + * ufshcd_compl_one_cqe - handle a completion queue entry 5310 + * @hba: per adapter instance 5311 + * @task_tag: the task tag of the request to be completed 5312 + * @cqe: pointer to the completion queue entry 5313 + */ 5314 + void ufshcd_compl_one_cqe(struct ufs_hba *hba, int task_tag, 5315 + struct cq_entry *cqe) 5316 + { 5317 + struct ufshcd_lrb *lrbp; 5318 + struct scsi_cmnd *cmd; 5319 + 5320 + lrbp = &hba->lrb[task_tag]; 5321 + lrbp->compl_time_stamp = ktime_get(); 5322 + cmd = lrbp->cmd; 5323 + if (cmd) { 5324 + if (unlikely(ufshcd_should_inform_monitor(hba, lrbp))) 5325 + ufshcd_update_monitor(hba, lrbp); 5326 + ufshcd_add_command_trace(hba, task_tag, UFS_CMD_COMP); 5327 + cmd->result = ufshcd_transfer_rsp_status(hba, lrbp, cqe); 5328 + ufshcd_release_scsi_cmd(hba, lrbp); 5329 + /* Do not touch lrbp after scsi done */ 5330 + scsi_done(cmd); 5331 + } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE || 5332 + lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) { 5333 + if (hba->dev_cmd.complete) { 5334 + hba->dev_cmd.cqe = cqe; 5335 + ufshcd_add_command_trace(hba, task_tag, UFS_DEV_COMP); 5336 + complete(hba->dev_cmd.complete); 5337 + ufshcd_clk_scaling_update_busy(hba); 5338 + } 5339 + } 5340 + } 5341 + 5342 + /** 5400 5343 * __ufshcd_transfer_req_compl - handle SCSI and query command completion 5401 5344 * @hba: per adapter instance 5402 5345 * @completed_reqs: bitmask that indicates which requests to complete ··· 5438 5313 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba, 5439 5314 unsigned long completed_reqs) 5440 5315 { 5441 - struct ufshcd_lrb *lrbp; 5442 - struct scsi_cmnd *cmd; 5443 - int index; 5316 + int tag; 5444 5317 5445 - for_each_set_bit(index, &completed_reqs, hba->nutrs) { 5446 - lrbp = &hba->lrb[index]; 5447 - lrbp->compl_time_stamp = ktime_get(); 5448 - lrbp->compl_time_stamp_local_clock = local_clock(); 5449 - cmd = lrbp->cmd; 5450 - if (cmd) { 5451 - if (unlikely(ufshcd_should_inform_monitor(hba, lrbp))) 5452 - ufshcd_update_monitor(hba, lrbp); 5453 - ufshcd_add_command_trace(hba, index, UFS_CMD_COMP); 5454 - cmd->result = ufshcd_transfer_rsp_status(hba, lrbp); 5455 - ufshcd_release_scsi_cmd(hba, lrbp); 5456 - /* Do not touch lrbp after scsi done */ 5457 - scsi_done(cmd); 5458 - } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE || 5459 - lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) { 5460 - if (hba->dev_cmd.complete) { 5461 - ufshcd_add_command_trace(hba, index, 5462 - UFS_DEV_COMP); 5463 - complete(hba->dev_cmd.complete); 5464 - ufshcd_clk_scaling_update_busy(hba); 5465 - } 5466 - } 5467 - } 5318 + for_each_set_bit(tag, &completed_reqs, hba->nutrs) 5319 + ufshcd_compl_one_cqe(hba, tag, NULL); 5468 5320 } 5469 5321 5470 5322 /* Any value that is not an existing queue number is fine for this constant. */ ··· 5473 5371 struct ufs_hba *hba = shost_priv(shost); 5474 5372 unsigned long completed_reqs, flags; 5475 5373 u32 tr_doorbell; 5374 + struct ufs_hw_queue *hwq; 5375 + 5376 + if (is_mcq_enabled(hba)) { 5377 + hwq = &hba->uhq[queue_num + UFSHCD_MCQ_IO_QUEUE_OFFSET]; 5378 + 5379 + return ufshcd_mcq_poll_cqe_lock(hba, hwq); 5380 + } 5476 5381 5477 5382 spin_lock_irqsave(&hba->outstanding_lock, flags); 5478 5383 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); ··· 6713 6604 } 6714 6605 6715 6606 /** 6607 + * ufshcd_handle_mcq_cq_events - handle MCQ completion queue events 6608 + * @hba: per adapter instance 6609 + * 6610 + * Returns IRQ_HANDLED if interrupt is handled 6611 + */ 6612 + static irqreturn_t ufshcd_handle_mcq_cq_events(struct ufs_hba *hba) 6613 + { 6614 + struct ufs_hw_queue *hwq; 6615 + unsigned long outstanding_cqs; 6616 + unsigned int nr_queues; 6617 + int i, ret; 6618 + u32 events; 6619 + 6620 + ret = ufshcd_vops_get_outstanding_cqs(hba, &outstanding_cqs); 6621 + if (ret) 6622 + outstanding_cqs = (1U << hba->nr_hw_queues) - 1; 6623 + 6624 + /* Exclude the poll queues */ 6625 + nr_queues = hba->nr_hw_queues - hba->nr_queues[HCTX_TYPE_POLL]; 6626 + for_each_set_bit(i, &outstanding_cqs, nr_queues) { 6627 + hwq = &hba->uhq[i]; 6628 + 6629 + events = ufshcd_mcq_read_cqis(hba, i); 6630 + if (events) 6631 + ufshcd_mcq_write_cqis(hba, events, i); 6632 + 6633 + if (events & UFSHCD_MCQ_CQIS_TAIL_ENT_PUSH_STS) 6634 + ufshcd_mcq_poll_cqe_nolock(hba, hwq); 6635 + } 6636 + 6637 + return IRQ_HANDLED; 6638 + } 6639 + 6640 + /** 6716 6641 * ufshcd_sl_intr - Interrupt service routine 6717 6642 * @hba: per adapter instance 6718 6643 * @intr_status: contains interrupts generated by the controller ··· 6770 6627 6771 6628 if (intr_status & UTP_TRANSFER_REQ_COMPL) 6772 6629 retval |= ufshcd_transfer_req_compl(hba); 6630 + 6631 + if (intr_status & MCQ_CQ_EVENT_STATUS) 6632 + retval |= ufshcd_handle_mcq_cq_events(hba); 6773 6633 6774 6634 return retval; 6775 6635 } ··· 7022 6876 /* update the task tag in the request upiu */ 7023 6877 req_upiu->header.dword_0 |= cpu_to_be32(tag); 7024 6878 7025 - ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE); 6879 + ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE, 0); 7026 6880 7027 6881 /* just copy the upiu request as it is */ 7028 6882 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr)); ··· 7041 6895 7042 6896 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr); 7043 6897 7044 - ufshcd_send_command(hba, tag); 6898 + ufshcd_send_command(hba, tag, hba->dev_cmd_queue); 7045 6899 /* 7046 6900 * ignore the returning value here - ufshcd_check_query_response is 7047 6901 * bound to fail since dev_cmd.query and dev_cmd.type were left empty. ··· 7143 6997 } 7144 6998 7145 6999 return err; 7000 + } 7001 + 7002 + /** 7003 + * ufshcd_advanced_rpmb_req_handler - handle advanced RPMB request 7004 + * @hba: per adapter instance 7005 + * @req_upiu: upiu request 7006 + * @rsp_upiu: upiu reply 7007 + * @req_ehs: EHS field which contains Advanced RPMB Request Message 7008 + * @rsp_ehs: EHS field which returns Advanced RPMB Response Message 7009 + * @sg_cnt: The number of sg lists actually used 7010 + * @sg_list: Pointer to SG list when DATA IN/OUT UPIU is required in ARPMB operation 7011 + * @dir: DMA direction 7012 + * 7013 + * Returns zero on success, non-zero on failure 7014 + */ 7015 + int ufshcd_advanced_rpmb_req_handler(struct ufs_hba *hba, struct utp_upiu_req *req_upiu, 7016 + struct utp_upiu_req *rsp_upiu, struct ufs_ehs *req_ehs, 7017 + struct ufs_ehs *rsp_ehs, int sg_cnt, struct scatterlist *sg_list, 7018 + enum dma_data_direction dir) 7019 + { 7020 + DECLARE_COMPLETION_ONSTACK(wait); 7021 + const u32 tag = hba->reserved_slot; 7022 + struct ufshcd_lrb *lrbp; 7023 + int err = 0; 7024 + int result; 7025 + u8 upiu_flags; 7026 + u8 *ehs_data; 7027 + u16 ehs_len; 7028 + 7029 + /* Protects use of hba->reserved_slot. */ 7030 + ufshcd_hold(hba, false); 7031 + mutex_lock(&hba->dev_cmd.lock); 7032 + down_read(&hba->clk_scaling_lock); 7033 + 7034 + lrbp = &hba->lrb[tag]; 7035 + WARN_ON(lrbp->cmd); 7036 + lrbp->cmd = NULL; 7037 + lrbp->task_tag = tag; 7038 + lrbp->lun = UFS_UPIU_RPMB_WLUN; 7039 + 7040 + lrbp->intr_cmd = true; 7041 + ufshcd_prepare_lrbp_crypto(NULL, lrbp); 7042 + hba->dev_cmd.type = DEV_CMD_TYPE_RPMB; 7043 + 7044 + /* Advanced RPMB starts from UFS 4.0, so its command type is UTP_CMD_TYPE_UFS_STORAGE */ 7045 + lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE; 7046 + 7047 + ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, dir, 2); 7048 + 7049 + /* update the task tag and LUN in the request upiu */ 7050 + req_upiu->header.dword_0 |= cpu_to_be32(upiu_flags << 16 | UFS_UPIU_RPMB_WLUN << 8 | tag); 7051 + 7052 + /* copy the UPIU(contains CDB) request as it is */ 7053 + memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr)); 7054 + /* Copy EHS, starting with byte32, immediately after the CDB package */ 7055 + memcpy(lrbp->ucd_req_ptr + 1, req_ehs, sizeof(*req_ehs)); 7056 + 7057 + if (dir != DMA_NONE && sg_list) 7058 + ufshcd_sgl_to_prdt(hba, lrbp, sg_cnt, sg_list); 7059 + 7060 + memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); 7061 + 7062 + hba->dev_cmd.complete = &wait; 7063 + 7064 + ufshcd_send_command(hba, tag, hba->dev_cmd_queue); 7065 + 7066 + err = ufshcd_wait_for_dev_cmd(hba, lrbp, ADVANCED_RPMB_REQ_TIMEOUT); 7067 + 7068 + if (!err) { 7069 + /* Just copy the upiu response as it is */ 7070 + memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu)); 7071 + /* Get the response UPIU result */ 7072 + result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr); 7073 + 7074 + ehs_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) >> 24; 7075 + /* 7076 + * Since the bLength in EHS indicates the total size of the EHS Header and EHS Data 7077 + * in 32 Byte units, the value of the bLength Request/Response for Advanced RPMB 7078 + * Message is 02h 7079 + */ 7080 + if (ehs_len == 2 && rsp_ehs) { 7081 + /* 7082 + * ucd_rsp_ptr points to a buffer with a length of 512 bytes 7083 + * (ALIGNED_UPIU_SIZE = 512), and the EHS data just starts from byte32 7084 + */ 7085 + ehs_data = (u8 *)lrbp->ucd_rsp_ptr + EHS_OFFSET_IN_RESPONSE; 7086 + memcpy(rsp_ehs, ehs_data, ehs_len * 32); 7087 + } 7088 + } 7089 + 7090 + up_read(&hba->clk_scaling_lock); 7091 + mutex_unlock(&hba->dev_cmd.lock); 7092 + ufshcd_release(hba); 7093 + return err ? : result; 7146 7094 } 7147 7095 7148 7096 /** ··· 7681 7441 * In case regulators are not initialized we'll return 0 7682 7442 * @hba: per-adapter instance 7683 7443 * @desc_buf: power descriptor buffer to extract ICC levels from. 7684 - * @len: length of desc_buff 7685 7444 * 7686 7445 * Returns calculated ICC level 7687 7446 */ 7688 7447 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba, 7689 - const u8 *desc_buf, int len) 7448 + const u8 *desc_buf) 7690 7449 { 7691 7450 u32 icc_level = 0; 7692 7451 ··· 7727 7488 static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba) 7728 7489 { 7729 7490 int ret; 7730 - int buff_len = hba->desc_size[QUERY_DESC_IDN_POWER]; 7731 7491 u8 *desc_buf; 7732 7492 u32 icc_level; 7733 7493 7734 - desc_buf = kmalloc(buff_len, GFP_KERNEL); 7494 + desc_buf = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL); 7735 7495 if (!desc_buf) 7736 7496 return; 7737 7497 7738 7498 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_POWER, 0, 0, 7739 - desc_buf, buff_len); 7499 + desc_buf, QUERY_DESC_MAX_SIZE); 7740 7500 if (ret) { 7741 7501 dev_err(hba->dev, 7742 - "%s: Failed reading power descriptor.len = %d ret = %d", 7743 - __func__, buff_len, ret); 7502 + "%s: Failed reading power descriptor ret = %d", 7503 + __func__, ret); 7744 7504 goto out; 7745 7505 } 7746 7506 7747 - icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf, 7748 - buff_len); 7507 + icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf); 7749 7508 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level); 7750 7509 7751 7510 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR, ··· 7853 7616 (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES))) 7854 7617 goto wb_disabled; 7855 7618 7856 - if (hba->desc_size[QUERY_DESC_IDN_DEVICE] < 7857 - DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4) 7858 - goto wb_disabled; 7859 - 7860 7619 ext_ufs_feature = get_unaligned_be32(desc_buf + 7861 7620 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP); 7862 7621 ··· 7923 7690 } 7924 7691 } 7925 7692 7693 + static void ufshcd_ext_iid_probe(struct ufs_hba *hba, u8 *desc_buf) 7694 + { 7695 + struct ufs_dev_info *dev_info = &hba->dev_info; 7696 + u32 ext_ufs_feature; 7697 + u32 ext_iid_en = 0; 7698 + int err; 7699 + 7700 + /* Only UFS-4.0 and above may support EXT_IID */ 7701 + if (dev_info->wspecversion < 0x400) 7702 + goto out; 7703 + 7704 + ext_ufs_feature = get_unaligned_be32(desc_buf + 7705 + DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP); 7706 + if (!(ext_ufs_feature & UFS_DEV_EXT_IID_SUP)) 7707 + goto out; 7708 + 7709 + err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR, 7710 + QUERY_ATTR_IDN_EXT_IID_EN, 0, 0, &ext_iid_en); 7711 + if (err) 7712 + dev_err(hba->dev, "failed reading bEXTIIDEn. err = %d\n", err); 7713 + 7714 + out: 7715 + dev_info->b_ext_iid_en = ext_iid_en; 7716 + } 7717 + 7926 7718 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, 7927 7719 const struct ufs_dev_quirk *fixups) 7928 7720 { ··· 7985 7727 u8 *desc_buf; 7986 7728 struct ufs_dev_info *dev_info = &hba->dev_info; 7987 7729 7988 - desc_buf = kmalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL); 7730 + desc_buf = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL); 7989 7731 if (!desc_buf) { 7990 7732 err = -ENOMEM; 7991 7733 goto out; 7992 7734 } 7993 7735 7994 7736 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_DEVICE, 0, 0, desc_buf, 7995 - hba->desc_size[QUERY_DESC_IDN_DEVICE]); 7737 + QUERY_DESC_MAX_SIZE); 7996 7738 if (err) { 7997 7739 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n", 7998 7740 __func__, err); ··· 8009 7751 /* getting Specification Version in big endian format */ 8010 7752 dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 | 8011 7753 desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1]; 7754 + dev_info->bqueuedepth = desc_buf[DEVICE_DESC_PARAM_Q_DPTH]; 8012 7755 b_ufs_feature_sup = desc_buf[DEVICE_DESC_PARAM_UFS_FEAT]; 8013 7756 8014 7757 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME]; ··· 8046 7787 ufshcd_wb_probe(hba, desc_buf); 8047 7788 8048 7789 ufshcd_temp_notif_probe(hba, desc_buf); 7790 + 7791 + if (hba->ext_iid_sup) 7792 + ufshcd_ext_iid_probe(hba, desc_buf); 8049 7793 8050 7794 /* 8051 7795 * ufshcd_read_string_desc returns size of the string ··· 8243 7981 static int ufshcd_device_geo_params_init(struct ufs_hba *hba) 8244 7982 { 8245 7983 int err; 8246 - size_t buff_len; 8247 7984 u8 *desc_buf; 8248 7985 8249 - buff_len = hba->desc_size[QUERY_DESC_IDN_GEOMETRY]; 8250 - desc_buf = kmalloc(buff_len, GFP_KERNEL); 7986 + desc_buf = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL); 8251 7987 if (!desc_buf) { 8252 7988 err = -ENOMEM; 8253 7989 goto out; 8254 7990 } 8255 7991 8256 7992 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_GEOMETRY, 0, 0, 8257 - desc_buf, buff_len); 7993 + desc_buf, QUERY_DESC_MAX_SIZE); 8258 7994 if (err) { 8259 7995 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n", 8260 7996 __func__, err); ··· 8264 8004 else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0) 8265 8005 hba->dev_info.max_lu_supported = 8; 8266 8006 8267 - if (hba->desc_size[QUERY_DESC_IDN_GEOMETRY] >= 8007 + if (desc_buf[QUERY_DESC_LENGTH_OFFSET] >= 8268 8008 GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS) 8269 8009 ufshpb_get_geo_info(hba, desc_buf); 8270 8010 ··· 8349 8089 static int ufshcd_device_params_init(struct ufs_hba *hba) 8350 8090 { 8351 8091 bool flag; 8352 - int ret, i; 8353 - 8354 - /* Init device descriptor sizes */ 8355 - for (i = 0; i < QUERY_DESC_IDN_MAX; i++) 8356 - hba->desc_size[i] = QUERY_DESC_MAX_SIZE; 8092 + int ret; 8357 8093 8358 8094 /* Init UFS geometry descriptor related parameters */ 8359 8095 ret = ufshcd_device_geo_params_init(hba); ··· 8417 8161 return ret; 8418 8162 } 8419 8163 8420 - /** 8421 - * ufshcd_probe_hba - probe hba to detect device and initialize it 8422 - * @hba: per-adapter instance 8423 - * @init_dev_params: whether or not to call ufshcd_device_params_init(). 8424 - * 8425 - * Execute link-startup and verify device initialization 8426 - */ 8427 - static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params) 8164 + /* SDB - Single Doorbell */ 8165 + static void ufshcd_release_sdb_queue(struct ufs_hba *hba, int nutrs) 8166 + { 8167 + size_t ucdl_size, utrdl_size; 8168 + 8169 + ucdl_size = sizeof(struct utp_transfer_cmd_desc) * nutrs; 8170 + dmam_free_coherent(hba->dev, ucdl_size, hba->ucdl_base_addr, 8171 + hba->ucdl_dma_addr); 8172 + 8173 + utrdl_size = sizeof(struct utp_transfer_req_desc) * nutrs; 8174 + dmam_free_coherent(hba->dev, utrdl_size, hba->utrdl_base_addr, 8175 + hba->utrdl_dma_addr); 8176 + 8177 + devm_kfree(hba->dev, hba->lrb); 8178 + } 8179 + 8180 + static int ufshcd_alloc_mcq(struct ufs_hba *hba) 8428 8181 { 8429 8182 int ret; 8430 - unsigned long flags; 8431 - ktime_t start = ktime_get(); 8183 + int old_nutrs = hba->nutrs; 8184 + 8185 + ret = ufshcd_mcq_decide_queue_depth(hba); 8186 + if (ret < 0) 8187 + return ret; 8188 + 8189 + hba->nutrs = ret; 8190 + ret = ufshcd_mcq_init(hba); 8191 + if (ret) 8192 + goto err; 8193 + 8194 + /* 8195 + * Previously allocated memory for nutrs may not be enough in MCQ mode. 8196 + * Number of supported tags in MCQ mode may be larger than SDB mode. 8197 + */ 8198 + if (hba->nutrs != old_nutrs) { 8199 + ufshcd_release_sdb_queue(hba, old_nutrs); 8200 + ret = ufshcd_memory_alloc(hba); 8201 + if (ret) 8202 + goto err; 8203 + ufshcd_host_memory_configure(hba); 8204 + } 8205 + 8206 + ret = ufshcd_mcq_memory_alloc(hba); 8207 + if (ret) 8208 + goto err; 8209 + 8210 + return 0; 8211 + err: 8212 + hba->nutrs = old_nutrs; 8213 + return ret; 8214 + } 8215 + 8216 + static void ufshcd_config_mcq(struct ufs_hba *hba) 8217 + { 8218 + int ret; 8219 + 8220 + ret = ufshcd_mcq_vops_config_esi(hba); 8221 + dev_info(hba->dev, "ESI %sconfigured\n", ret ? "is not " : ""); 8222 + 8223 + ufshcd_enable_intr(hba, UFSHCD_ENABLE_MCQ_INTRS); 8224 + ufshcd_mcq_make_queues_operational(hba); 8225 + ufshcd_mcq_config_mac(hba, hba->nutrs); 8226 + 8227 + hba->host->can_queue = hba->nutrs - UFSHCD_NUM_RESERVED; 8228 + hba->reserved_slot = hba->nutrs - UFSHCD_NUM_RESERVED; 8229 + 8230 + /* Select MCQ mode */ 8231 + ufshcd_writel(hba, ufshcd_readl(hba, REG_UFS_MEM_CFG) | 0x1, 8232 + REG_UFS_MEM_CFG); 8233 + hba->mcq_enabled = true; 8234 + 8235 + dev_info(hba->dev, "MCQ configured, nr_queues=%d, io_queues=%d, read_queue=%d, poll_queues=%d, queue_depth=%d\n", 8236 + hba->nr_hw_queues, hba->nr_queues[HCTX_TYPE_DEFAULT], 8237 + hba->nr_queues[HCTX_TYPE_READ], hba->nr_queues[HCTX_TYPE_POLL], 8238 + hba->nutrs); 8239 + } 8240 + 8241 + static int ufshcd_device_init(struct ufs_hba *hba, bool init_dev_params) 8242 + { 8243 + int ret; 8244 + struct Scsi_Host *host = hba->host; 8432 8245 8433 8246 hba->ufshcd_state = UFSHCD_STATE_RESET; 8434 8247 8435 8248 ret = ufshcd_link_startup(hba); 8436 8249 if (ret) 8437 - goto out; 8250 + return ret; 8438 8251 8439 8252 if (hba->quirks & UFSHCD_QUIRK_SKIP_PH_CONFIGURATION) 8440 - goto out; 8253 + return ret; 8441 8254 8442 8255 /* Debug counters initialization */ 8443 8256 ufshcd_clear_dbg_ufs_stats(hba); ··· 8514 8189 /* UniPro link is active now */ 8515 8190 ufshcd_set_link_active(hba); 8516 8191 8192 + /* Reconfigure MCQ upon reset */ 8193 + if (is_mcq_enabled(hba) && !init_dev_params) 8194 + ufshcd_config_mcq(hba); 8195 + 8517 8196 /* Verify device initialization by sending NOP OUT UPIU */ 8518 8197 ret = ufshcd_verify_dev_init(hba); 8519 8198 if (ret) 8520 - goto out; 8199 + return ret; 8521 8200 8522 8201 /* Initiate UFS initialization, and waiting until completion */ 8523 8202 ret = ufshcd_complete_dev_init(hba); 8524 8203 if (ret) 8525 - goto out; 8204 + return ret; 8526 8205 8527 8206 /* 8528 8207 * Initialize UFS device parameters used by driver, these ··· 8535 8206 if (init_dev_params) { 8536 8207 ret = ufshcd_device_params_init(hba); 8537 8208 if (ret) 8538 - goto out; 8209 + return ret; 8210 + if (is_mcq_supported(hba) && !hba->scsi_host_added) { 8211 + ret = ufshcd_alloc_mcq(hba); 8212 + if (ret) { 8213 + /* Continue with SDB mode */ 8214 + use_mcq_mode = false; 8215 + dev_err(hba->dev, "MCQ mode is disabled, err=%d\n", 8216 + ret); 8217 + } 8218 + ret = scsi_add_host(host, hba->dev); 8219 + if (ret) { 8220 + dev_err(hba->dev, "scsi_add_host failed\n"); 8221 + return ret; 8222 + } 8223 + hba->scsi_host_added = true; 8224 + } 8225 + /* MCQ may be disabled if ufshcd_alloc_mcq() fails */ 8226 + if (is_mcq_supported(hba) && use_mcq_mode) 8227 + ufshcd_config_mcq(hba); 8539 8228 } 8540 8229 8541 8230 ufshcd_tune_unipro_params(hba); ··· 8574 8227 if (ret) { 8575 8228 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n", 8576 8229 __func__, ret); 8230 + return ret; 8231 + } 8232 + } 8233 + 8234 + return 0; 8235 + } 8236 + 8237 + /** 8238 + * ufshcd_probe_hba - probe hba to detect device and initialize it 8239 + * @hba: per-adapter instance 8240 + * @init_dev_params: whether or not to call ufshcd_device_params_init(). 8241 + * 8242 + * Execute link-startup and verify device initialization 8243 + */ 8244 + static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params) 8245 + { 8246 + ktime_t start = ktime_get(); 8247 + unsigned long flags; 8248 + int ret; 8249 + 8250 + ret = ufshcd_device_init(hba, init_dev_params); 8251 + if (ret) 8252 + goto out; 8253 + 8254 + if (hba->quirks & UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH) { 8255 + /* Reset the device and controller before doing reinit */ 8256 + ufshcd_device_reset(hba); 8257 + ufshcd_hba_stop(hba); 8258 + ufshcd_vops_reinit_notify(hba); 8259 + ret = ufshcd_hba_enable(hba); 8260 + if (ret) { 8261 + dev_err(hba->dev, "Host controller enable failed\n"); 8262 + ufshcd_print_evt_hist(hba); 8263 + ufshcd_print_host_state(hba); 8577 8264 goto out; 8578 8265 } 8579 - ufshcd_print_pwr_info(hba); 8266 + 8267 + /* Reinit the device */ 8268 + ret = ufshcd_device_init(hba, init_dev_params); 8269 + if (ret) 8270 + goto out; 8580 8271 } 8272 + 8273 + ufshcd_print_pwr_info(hba); 8581 8274 8582 8275 /* 8583 8276 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec) ··· 8746 8359 .max_host_blocked = 1, 8747 8360 .track_queue_depth = 1, 8748 8361 .sdev_groups = ufshcd_driver_groups, 8749 - .dma_boundary = PAGE_SIZE - 1, 8750 8362 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS, 8751 8363 }; 8752 8364 ··· 9839 9453 9840 9454 /* enable the host irq as host controller would be active soon */ 9841 9455 ufshcd_enable_irq(hba); 9456 + 9842 9457 goto out; 9843 9458 9844 9459 disable_vreg: ··· 10003 9616 } 10004 9617 EXPORT_SYMBOL_GPL(ufshcd_remove); 10005 9618 9619 + #ifdef CONFIG_PM_SLEEP 9620 + int ufshcd_system_freeze(struct device *dev) 9621 + { 9622 + 9623 + return ufshcd_system_suspend(dev); 9624 + 9625 + } 9626 + EXPORT_SYMBOL_GPL(ufshcd_system_freeze); 9627 + 9628 + int ufshcd_system_restore(struct device *dev) 9629 + { 9630 + 9631 + struct ufs_hba *hba = dev_get_drvdata(dev); 9632 + int ret; 9633 + 9634 + ret = ufshcd_system_resume(dev); 9635 + if (ret) 9636 + return ret; 9637 + 9638 + /* Configure UTRL and UTMRL base address registers */ 9639 + ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr), 9640 + REG_UTP_TRANSFER_REQ_LIST_BASE_L); 9641 + ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr), 9642 + REG_UTP_TRANSFER_REQ_LIST_BASE_H); 9643 + ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr), 9644 + REG_UTP_TASK_REQ_LIST_BASE_L); 9645 + ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr), 9646 + REG_UTP_TASK_REQ_LIST_BASE_H); 9647 + /* 9648 + * Make sure that UTRL and UTMRL base address registers 9649 + * are updated with the latest queue addresses. Only after 9650 + * updating these addresses, we can queue the new commands. 9651 + */ 9652 + mb(); 9653 + 9654 + /* Resuming from hibernate, assume that link was OFF */ 9655 + ufshcd_set_link_off(hba); 9656 + 9657 + return 0; 9658 + 9659 + } 9660 + EXPORT_SYMBOL_GPL(ufshcd_system_restore); 9661 + 9662 + int ufshcd_system_thaw(struct device *dev) 9663 + { 9664 + return ufshcd_system_resume(dev); 9665 + } 9666 + EXPORT_SYMBOL_GPL(ufshcd_system_thaw); 9667 + #endif /* CONFIG_PM_SLEEP */ 9668 + 10006 9669 /** 10007 9670 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA) 10008 9671 * @hba: pointer to Host Bus Adapter (HBA) ··· 10111 9674 hba->dev = dev; 10112 9675 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL; 10113 9676 hba->nop_out_timeout = NOP_OUT_TIMEOUT; 9677 + ufshcd_set_sg_entry_size(hba, sizeof(struct ufshcd_sg_entry)); 10114 9678 INIT_LIST_HEAD(&hba->clk_list_head); 10115 9679 spin_lock_init(&hba->outstanding_lock); 10116 9680 ··· 10261 9823 hba->is_irq_enabled = true; 10262 9824 } 10263 9825 10264 - err = scsi_add_host(host, hba->dev); 10265 - if (err) { 10266 - dev_err(hba->dev, "scsi_add_host failed\n"); 10267 - goto out_disable; 9826 + if (!is_mcq_supported(hba)) { 9827 + err = scsi_add_host(host, hba->dev); 9828 + if (err) { 9829 + dev_err(hba->dev, "scsi_add_host failed\n"); 9830 + goto out_disable; 9831 + } 10268 9832 } 10269 9833 10270 9834 hba->tmf_tag_set = (struct blk_mq_tag_set) { ··· 10493 10053 static int __init ufshcd_core_init(void) 10494 10054 { 10495 10055 int ret; 10496 - 10497 - /* Verify that there are no gaps in struct utp_transfer_cmd_desc. */ 10498 - static_assert(sizeof(struct utp_transfer_cmd_desc) == 10499 - 2 * ALIGNED_UPIU_SIZE + 10500 - SG_ALL * sizeof(struct ufshcd_sg_entry)); 10501 10056 10502 10057 ufs_debugfs_init(); 10503 10058
+1 -3
drivers/ufs/core/ufshpb.c
··· 2382 2382 { 2383 2383 u16 max_active_rgns; 2384 2384 u8 lu_enable; 2385 - int size; 2385 + int size = QUERY_DESC_MAX_SIZE; 2386 2386 int ret; 2387 2387 char desc_buf[QUERY_DESC_MAX_SIZE]; 2388 - 2389 - ufshcd_map_desc_id_to_length(hba, QUERY_DESC_IDN_UNIT, &size); 2390 2388 2391 2389 ufshcd_rpm_get_sync(hba); 2392 2390 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
+18 -1
drivers/ufs/host/Kconfig
··· 57 57 config SCSI_UFS_QCOM 58 58 tristate "QCOM specific hooks to UFS controller platform driver" 59 59 depends on SCSI_UFSHCD_PLATFORM && ARCH_QCOM 60 + depends on GENERIC_MSI_IRQ 61 + depends on RESET_CONTROLLER 60 62 select QCOM_SCM if SCSI_UFS_CRYPTO 61 - select RESET_CONTROLLER 62 63 help 63 64 This selects the QCOM specific additions to UFSHCD platform driver. 64 65 UFS host on QCOM needs some vendor specific configuration before ··· 124 123 UNIPRO layer, and associates with UFS-PHY driver. 125 124 126 125 Select this if you have UFS host controller on Samsung Exynos SoC. 126 + If unsure, say N. 127 + 128 + config SCSI_UFS_VARIABLE_SG_ENTRY_SIZE 129 + bool 130 + default y if SCSI_UFS_EXYNOS && SCSI_UFS_CRYPTO 131 + 132 + config SCSI_UFS_SPRD 133 + tristate "Unisoc specific hooks to UFS controller platform driver" 134 + depends on SCSI_UFSHCD_PLATFORM && (ARCH_SPRD || COMPILE_TEST) 135 + help 136 + This selects the Unisoc specific additions to UFSHCD platform driver. 137 + UFS host on Unisoc needs some vendor specific configuration before 138 + accessing the hardware which includes PHY configuration and vendor 139 + specific registers. 140 + 141 + Select this if you have UFS controller on Unisoc chipset. 127 142 If unsure, say N.
+1
drivers/ufs/host/Makefile
··· 12 12 obj-$(CONFIG_SCSI_UFS_HISI) += ufs-hisi.o 13 13 obj-$(CONFIG_SCSI_UFS_MEDIATEK) += ufs-mediatek.o 14 14 obj-$(CONFIG_SCSI_UFS_RENESAS) += ufs-renesas.o 15 + obj-$(CONFIG_SCSI_UFS_SPRD) += ufs-sprd.o 15 16 obj-$(CONFIG_SCSI_UFS_TI_J721E) += ti-j721e-ufs.o
+9 -1
drivers/ufs/host/ufs-exynos.c
··· 1300 1300 1301 1301 switch (status) { 1302 1302 case PRE_CHANGE: 1303 + /* 1304 + * The maximum segment size must be set after scsi_host_alloc() 1305 + * has been called and before LUN scanning starts 1306 + * (ufshcd_async_scan()). Note: this callback may also be called 1307 + * from other functions than ufshcd_init(). 1308 + */ 1309 + hba->host->max_segment_size = 4096; 1310 + 1303 1311 if (ufs->drv_data->pre_hce_enable) { 1304 1312 ret = ufs->drv_data->pre_hce_enable(ufs); 1305 1313 if (ret) ··· 1681 1673 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR | 1682 1674 UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL | 1683 1675 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING | 1684 - UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE, 1676 + UFSHCD_QUIRK_4KB_DMA_ALIGNMENT, 1685 1677 .opts = EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL | 1686 1678 EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL | 1687 1679 EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX |
+383 -165
drivers/ufs/host/ufs-qcom.c
··· 22 22 #include <ufs/ufshci.h> 23 23 #include <ufs/ufs_quirks.h> 24 24 25 - #define UFS_QCOM_DEFAULT_DBG_PRINT_EN \ 26 - (UFS_QCOM_DBG_PRINT_REGS_EN | UFS_QCOM_DBG_PRINT_TEST_BUS_EN) 25 + #define MCQ_QCFGPTR_MASK GENMASK(7, 0) 26 + #define MCQ_QCFGPTR_UNIT 0x200 27 + #define MCQ_SQATTR_OFFSET(c) \ 28 + ((((c) >> 16) & MCQ_QCFGPTR_MASK) * MCQ_QCFGPTR_UNIT) 29 + #define MCQ_QCFG_SIZE 0x40 27 30 28 31 enum { 29 32 TSTBUS_UAWM, ··· 53 50 static struct ufs_qcom_host *rcdev_to_ufs_host(struct reset_controller_dev *rcd) 54 51 { 55 52 return container_of(rcd, struct ufs_qcom_host, rcdev); 56 - } 57 - 58 - static void ufs_qcom_dump_regs_wrapper(struct ufs_hba *hba, int offset, int len, 59 - const char *prefix, void *priv) 60 - { 61 - ufshcd_dump_regs(hba, offset, len * 4, prefix); 62 53 } 63 54 64 55 static int ufs_qcom_host_clk_get(struct device *dev, ··· 107 110 108 111 static int ufs_qcom_enable_lane_clks(struct ufs_qcom_host *host) 109 112 { 110 - int err = 0; 113 + int err; 111 114 struct device *dev = host->hba->dev; 112 115 113 116 if (host->is_lane_clks_enabled) ··· 116 119 err = ufs_qcom_host_clk_enable(dev, "rx_lane0_sync_clk", 117 120 host->rx_l0_sync_clk); 118 121 if (err) 119 - goto out; 122 + return err; 120 123 121 124 err = ufs_qcom_host_clk_enable(dev, "tx_lane0_sync_clk", 122 125 host->tx_l0_sync_clk); ··· 134 137 goto disable_rx_l1; 135 138 136 139 host->is_lane_clks_enabled = true; 137 - goto out; 140 + 141 + return 0; 138 142 139 143 disable_rx_l1: 140 144 clk_disable_unprepare(host->rx_l1_sync_clk); ··· 143 145 clk_disable_unprepare(host->tx_l0_sync_clk); 144 146 disable_rx_l0: 145 147 clk_disable_unprepare(host->rx_l0_sync_clk); 146 - out: 148 + 147 149 return err; 148 150 } 149 151 ··· 158 160 err = ufs_qcom_host_clk_get(dev, "rx_lane0_sync_clk", 159 161 &host->rx_l0_sync_clk, false); 160 162 if (err) 161 - goto out; 163 + return err; 162 164 163 165 err = ufs_qcom_host_clk_get(dev, "tx_lane0_sync_clk", 164 166 &host->tx_l0_sync_clk, false); 165 167 if (err) 166 - goto out; 168 + return err; 167 169 168 170 /* In case of single lane per direction, don't read lane1 clocks */ 169 171 if (host->hba->lanes_per_direction > 1) { 170 172 err = ufs_qcom_host_clk_get(dev, "rx_lane1_sync_clk", 171 173 &host->rx_l1_sync_clk, false); 172 174 if (err) 173 - goto out; 175 + return err; 174 176 175 177 err = ufs_qcom_host_clk_get(dev, "tx_lane1_sync_clk", 176 178 &host->tx_l1_sync_clk, true); 177 179 } 178 - out: 179 - return err; 180 + 181 + return 0; 180 182 } 181 183 182 184 static int ufs_qcom_check_hibern8(struct ufs_hba *hba) ··· 224 226 ufshcd_rmwl(host->hba, QUNIPRO_SEL, 225 227 ufs_qcom_cap_qunipro(host) ? QUNIPRO_SEL : 0, 226 228 REG_UFS_CFG1); 229 + 230 + if (host->hw_ver.major == 0x05) 231 + ufshcd_rmwl(host->hba, QUNIPRO_G4_SEL, 0, REG_UFS_CFG0); 232 + 227 233 /* make sure above configuration is applied before we return */ 228 234 mb(); 229 235 } ··· 243 241 244 242 if (!host->core_reset) { 245 243 dev_warn(hba->dev, "%s: reset control not set\n", __func__); 246 - goto out; 244 + return 0; 247 245 } 248 246 249 247 reenable_intr = hba->is_irq_enabled; ··· 254 252 if (ret) { 255 253 dev_err(hba->dev, "%s: core_reset assert failed, err = %d\n", 256 254 __func__, ret); 257 - goto out; 255 + return ret; 258 256 } 259 257 260 258 /* ··· 276 274 hba->is_irq_enabled = true; 277 275 } 278 276 279 - out: 280 - return ret; 277 + return 0; 278 + } 279 + 280 + static u32 ufs_qcom_get_hs_gear(struct ufs_hba *hba) 281 + { 282 + struct ufs_qcom_host *host = ufshcd_get_variant(hba); 283 + 284 + if (host->hw_ver.major == 0x1) { 285 + /* 286 + * HS-G3 operations may not reliably work on legacy QCOM 287 + * UFS host controller hardware even though capability 288 + * exchange during link startup phase may end up 289 + * negotiating maximum supported gear as G3. 290 + * Hence downgrade the maximum supported gear to HS-G2. 291 + */ 292 + return UFS_HS_G2; 293 + } else if (host->hw_ver.major >= 0x4) { 294 + return UFS_QCOM_MAX_GEAR(ufshcd_readl(hba, REG_UFS_PARAM0)); 295 + } 296 + 297 + /* Default is HS-G3 */ 298 + return UFS_HS_G3; 281 299 } 282 300 283 301 static int ufs_qcom_power_up_sequence(struct ufs_hba *hba) 284 302 { 285 303 struct ufs_qcom_host *host = ufshcd_get_variant(hba); 286 304 struct phy *phy = host->generic_phy; 287 - int ret = 0; 288 - bool is_rate_B = UFS_QCOM_LIMIT_HS_RATE == PA_HS_MODE_B; 305 + int ret; 289 306 290 307 /* Reset UFS Host Controller and PHY */ 291 308 ret = ufs_qcom_host_reset(hba); ··· 312 291 dev_warn(hba->dev, "%s: host reset returned %d\n", 313 292 __func__, ret); 314 293 315 - if (is_rate_B) 316 - phy_set_mode(phy, PHY_MODE_UFS_HS_B); 317 - 318 294 /* phy initialization - calibrate the phy */ 319 295 ret = phy_init(phy); 320 296 if (ret) { 321 297 dev_err(hba->dev, "%s: phy init failed, ret = %d\n", 322 298 __func__, ret); 323 - goto out; 299 + return ret; 324 300 } 301 + 302 + phy_set_mode_ext(phy, PHY_MODE_UFS_HS_B, host->hs_gear); 325 303 326 304 /* power on phy - start serdes and phy's power and clocks */ 327 305 ret = phy_power_on(phy); ··· 336 316 337 317 out_disable_phy: 338 318 phy_exit(phy); 339 - out: 319 + 340 320 return ret; 341 321 } 342 322 ··· 394 374 static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear, 395 375 u32 hs, u32 rate, bool update_link_startup_timer) 396 376 { 397 - int ret = 0; 398 377 struct ufs_qcom_host *host = ufshcd_get_variant(hba); 399 378 struct ufs_clk_info *clki; 400 379 u32 core_clk_period_in_ns; ··· 428 409 * Aggregation logic. 429 410 */ 430 411 if (ufs_qcom_cap_qunipro(host) && !ufshcd_is_intr_aggr_allowed(hba)) 431 - goto out; 412 + return 0; 432 413 433 414 if (gear == 0) { 434 415 dev_err(hba->dev, "%s: invalid gear = %d\n", __func__, gear); 435 - goto out_error; 416 + return -EINVAL; 436 417 } 437 418 438 419 list_for_each_entry(clki, &hba->clk_list_head, list) { ··· 455 436 } 456 437 457 438 if (ufs_qcom_cap_qunipro(host)) 458 - goto out; 439 + return 0; 459 440 460 441 core_clk_period_in_ns = NSEC_PER_SEC / core_clk_rate; 461 442 core_clk_period_in_ns <<= OFFSET_CLK_NS_REG; ··· 470 451 "%s: index %d exceeds table size %zu\n", 471 452 __func__, gear, 472 453 ARRAY_SIZE(hs_fr_table_rA)); 473 - goto out_error; 454 + return -EINVAL; 474 455 } 475 456 tx_clk_cycles_per_us = hs_fr_table_rA[gear-1][1]; 476 457 } else if (rate == PA_HS_MODE_B) { ··· 479 460 "%s: index %d exceeds table size %zu\n", 480 461 __func__, gear, 481 462 ARRAY_SIZE(hs_fr_table_rB)); 482 - goto out_error; 463 + return -EINVAL; 483 464 } 484 465 tx_clk_cycles_per_us = hs_fr_table_rB[gear-1][1]; 485 466 } else { 486 467 dev_err(hba->dev, "%s: invalid rate = %d\n", 487 468 __func__, rate); 488 - goto out_error; 469 + return -EINVAL; 489 470 } 490 471 break; 491 472 case SLOWAUTO_MODE: ··· 495 476 "%s: index %d exceeds table size %zu\n", 496 477 __func__, gear, 497 478 ARRAY_SIZE(pwm_fr_table)); 498 - goto out_error; 479 + return -EINVAL; 499 480 } 500 481 tx_clk_cycles_per_us = pwm_fr_table[gear-1][1]; 501 482 break; 502 483 case UNCHANGED: 503 484 default: 504 485 dev_err(hba->dev, "%s: invalid mode = %d\n", __func__, hs); 505 - goto out_error; 486 + return -EINVAL; 506 487 } 507 488 508 489 if (ufshcd_readl(hba, REG_UFS_TX_SYMBOL_CLK_NS_US) != ··· 517 498 mb(); 518 499 } 519 500 520 - if (update_link_startup_timer) { 501 + if (update_link_startup_timer && host->hw_ver.major != 0x5) { 521 502 ufshcd_writel(hba, ((core_clk_rate / MSEC_PER_SEC) * 100), 522 - REG_UFS_PA_LINK_STARTUP_TIMER); 503 + REG_UFS_CFG0); 523 504 /* 524 505 * make sure that this configuration is applied before 525 506 * we return 526 507 */ 527 508 mb(); 528 509 } 529 - goto out; 530 510 531 - out_error: 532 - ret = -EINVAL; 533 - out: 534 - return ret; 511 + return 0; 535 512 } 536 513 537 514 static int ufs_qcom_link_startup_notify(struct ufs_hba *hba, ··· 542 527 0, true)) { 543 528 dev_err(hba->dev, "%s: ufs_qcom_cfg_timers() failed\n", 544 529 __func__); 545 - err = -EINVAL; 546 - goto out; 530 + return -EINVAL; 547 531 } 548 532 549 533 if (ufs_qcom_cap_qunipro(host)) ··· 568 554 break; 569 555 } 570 556 571 - out: 572 557 return err; 573 558 } 574 559 ··· 704 691 705 692 if (!dev_req_params) { 706 693 pr_err("%s: incoming dev_req_params is NULL\n", __func__); 707 - ret = -EINVAL; 708 - goto out; 694 + return -EINVAL; 709 695 } 710 696 711 697 switch (status) { ··· 712 700 ufshcd_init_pwr_dev_param(&ufs_qcom_cap); 713 701 ufs_qcom_cap.hs_rate = UFS_QCOM_LIMIT_HS_RATE; 714 702 715 - if (host->hw_ver.major == 0x1) { 716 - /* 717 - * HS-G3 operations may not reliably work on legacy QCOM 718 - * UFS host controller hardware even though capability 719 - * exchange during link startup phase may end up 720 - * negotiating maximum supported gear as G3. 721 - * Hence downgrade the maximum supported gear to HS-G2. 722 - */ 723 - if (ufs_qcom_cap.hs_tx_gear > UFS_HS_G2) 724 - ufs_qcom_cap.hs_tx_gear = UFS_HS_G2; 725 - if (ufs_qcom_cap.hs_rx_gear > UFS_HS_G2) 726 - ufs_qcom_cap.hs_rx_gear = UFS_HS_G2; 727 - } 703 + /* This driver only supports symmetic gear setting i.e., hs_tx_gear == hs_rx_gear */ 704 + ufs_qcom_cap.hs_tx_gear = ufs_qcom_cap.hs_rx_gear = ufs_qcom_get_hs_gear(hba); 728 705 729 706 ret = ufshcd_get_pwr_dev_param(&ufs_qcom_cap, 730 707 dev_max_params, 731 708 dev_req_params); 732 709 if (ret) { 733 - pr_err("%s: failed to determine capabilities\n", 710 + dev_err(hba->dev, "%s: failed to determine capabilities\n", 734 711 __func__); 735 - goto out; 712 + return ret; 736 713 } 714 + 715 + /* Use the agreed gear */ 716 + host->hs_gear = dev_req_params->gear_tx; 737 717 738 718 /* enable the device ref clock before changing to HS mode */ 739 719 if (!ufshcd_is_hs_mode(&hba->pwr_info) && ··· 765 761 ret = -EINVAL; 766 762 break; 767 763 } 768 - out: 764 + 769 765 return ret; 770 766 } 771 767 ··· 777 773 err = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), 778 774 &pa_vs_config_reg1); 779 775 if (err) 780 - goto out; 776 + return err; 781 777 782 778 /* Allow extension of MSB bits of PA_SaveConfigTime attribute */ 783 - err = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), 779 + return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), 784 780 (pa_vs_config_reg1 | (1 << 12))); 785 - 786 - out: 787 - return err; 788 781 } 789 782 790 783 static int ufs_qcom_apply_dev_quirks(struct ufs_hba *hba) ··· 840 839 | UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE 841 840 | UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP); 842 841 } 842 + 843 + if (host->hw_ver.major > 0x3) 844 + hba->quirks |= UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH; 843 845 } 844 846 845 847 static void ufs_qcom_set_caps(struct ufs_hba *hba) ··· 910 906 { 911 907 struct ufs_qcom_host *host = rcdev_to_ufs_host(rcdev); 912 908 913 - /* Currently this code only knows about a single reset. */ 914 - WARN_ON(id); 915 909 ufs_qcom_assert_reset(host->hba); 916 910 /* provide 1ms delay to let the reset pulse propagate. */ 917 911 usleep_range(1000, 1100); ··· 921 919 { 922 920 struct ufs_qcom_host *host = rcdev_to_ufs_host(rcdev); 923 921 924 - /* Currently this code only knows about a single reset. */ 925 - WARN_ON(id); 926 922 ufs_qcom_deassert_reset(host->hba); 927 923 928 924 /* ··· 957 957 958 958 host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); 959 959 if (!host) { 960 - err = -ENOMEM; 961 960 dev_err(dev, "%s: no memory for qcom ufs host\n", __func__); 962 - goto out; 961 + return -ENOMEM; 963 962 } 964 963 965 964 /* Make a two way bind between the qcom host and the hba */ ··· 979 980 host->rcdev.owner = dev->driver->owner; 980 981 host->rcdev.nr_resets = 1; 981 982 err = devm_reset_controller_register(dev, &host->rcdev); 982 - if (err) { 983 + if (err) 983 984 dev_warn(dev, "Failed to register reset controller\n"); 984 - err = 0; 985 - } 986 985 987 986 if (!has_acpi_companion(dev)) { 988 987 host->generic_phy = devm_phy_get(dev, "ufsphy"); ··· 1043 1046 if (hba->dev->id < MAX_UFS_QCOM_HOSTS) 1044 1047 ufs_qcom_hosts[hba->dev->id] = host; 1045 1048 1046 - host->dbg_print_en |= UFS_QCOM_DEFAULT_DBG_PRINT_EN; 1047 1049 ufs_qcom_get_default_testbus_cfg(host); 1048 1050 err = ufs_qcom_testbus_config(host); 1049 - if (err) { 1051 + if (err) 1052 + /* Failure is non-fatal */ 1050 1053 dev_warn(dev, "%s: failed to configure the testbus %d\n", 1051 1054 __func__, err); 1052 - err = 0; 1053 - } 1054 1055 1055 - goto out; 1056 + /* 1057 + * Power up the PHY using the minimum supported gear (UFS_HS_G2). 1058 + * Switching to max gear will be performed during reinit if supported. 1059 + */ 1060 + host->hs_gear = UFS_HS_G2; 1061 + 1062 + return 0; 1056 1063 1057 1064 out_variant_clear: 1058 1065 ufshcd_set_variant(hba, NULL); 1059 - out: 1066 + 1060 1067 return err; 1061 1068 } 1062 1069 ··· 1086 1085 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), 1087 1086 &core_clk_ctrl_reg); 1088 1087 if (err) 1089 - goto out; 1088 + return err; 1090 1089 1091 1090 core_clk_ctrl_reg &= ~DME_VS_CORE_CLK_CTRL_MAX_CORE_CLK_1US_CYCLES_MASK; 1092 1091 core_clk_ctrl_reg |= clk_cycles; ··· 1094 1093 /* Clear CORE_CLK_DIV_EN */ 1095 1094 core_clk_ctrl_reg &= ~DME_VS_CORE_CLK_CTRL_CORE_CLK_DIV_EN_BIT; 1096 1095 1097 - err = ufshcd_dme_set(hba, 1096 + return ufshcd_dme_set(hba, 1098 1097 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), 1099 1098 core_clk_ctrl_reg); 1100 - out: 1101 - return err; 1102 1099 } 1103 1100 1104 1101 static int ufs_qcom_clk_scale_up_pre_change(struct ufs_hba *hba) ··· 1179 1180 1180 1181 if (err || !dev_req_params) { 1181 1182 ufshcd_uic_hibern8_exit(hba); 1182 - goto out; 1183 + return err; 1183 1184 } 1184 1185 1185 1186 ufs_qcom_cfg_timers(hba, ··· 1190 1191 ufshcd_uic_hibern8_exit(hba); 1191 1192 } 1192 1193 1193 - out: 1194 - return err; 1195 - } 1196 - 1197 - static void ufs_qcom_print_hw_debug_reg_all(struct ufs_hba *hba, 1198 - void *priv, void (*print_fn)(struct ufs_hba *hba, 1199 - int offset, int num_regs, const char *str, void *priv)) 1200 - { 1201 - u32 reg; 1202 - struct ufs_qcom_host *host; 1203 - 1204 - if (unlikely(!hba)) { 1205 - pr_err("%s: hba is NULL\n", __func__); 1206 - return; 1207 - } 1208 - if (unlikely(!print_fn)) { 1209 - dev_err(hba->dev, "%s: print_fn is NULL\n", __func__); 1210 - return; 1211 - } 1212 - 1213 - host = ufshcd_get_variant(hba); 1214 - if (!(host->dbg_print_en & UFS_QCOM_DBG_PRINT_REGS_EN)) 1215 - return; 1216 - 1217 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_REG_OCSC); 1218 - print_fn(hba, reg, 44, "UFS_UFS_DBG_RD_REG_OCSC ", priv); 1219 - 1220 - reg = ufshcd_readl(hba, REG_UFS_CFG1); 1221 - reg |= UTP_DBG_RAMS_EN; 1222 - ufshcd_writel(hba, reg, REG_UFS_CFG1); 1223 - 1224 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_EDTL_RAM); 1225 - print_fn(hba, reg, 32, "UFS_UFS_DBG_RD_EDTL_RAM ", priv); 1226 - 1227 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_DESC_RAM); 1228 - print_fn(hba, reg, 128, "UFS_UFS_DBG_RD_DESC_RAM ", priv); 1229 - 1230 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_PRDT_RAM); 1231 - print_fn(hba, reg, 64, "UFS_UFS_DBG_RD_PRDT_RAM ", priv); 1232 - 1233 - /* clear bit 17 - UTP_DBG_RAMS_EN */ 1234 - ufshcd_rmwl(hba, UTP_DBG_RAMS_EN, 0, REG_UFS_CFG1); 1235 - 1236 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_UAWM); 1237 - print_fn(hba, reg, 4, "UFS_DBG_RD_REG_UAWM ", priv); 1238 - 1239 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_UARM); 1240 - print_fn(hba, reg, 4, "UFS_DBG_RD_REG_UARM ", priv); 1241 - 1242 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TXUC); 1243 - print_fn(hba, reg, 48, "UFS_DBG_RD_REG_TXUC ", priv); 1244 - 1245 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_RXUC); 1246 - print_fn(hba, reg, 27, "UFS_DBG_RD_REG_RXUC ", priv); 1247 - 1248 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_DFC); 1249 - print_fn(hba, reg, 19, "UFS_DBG_RD_REG_DFC ", priv); 1250 - 1251 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TRLUT); 1252 - print_fn(hba, reg, 34, "UFS_DBG_RD_REG_TRLUT ", priv); 1253 - 1254 - reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TMRLUT); 1255 - print_fn(hba, reg, 9, "UFS_DBG_RD_REG_TMRLUT ", priv); 1194 + return 0; 1256 1195 } 1257 1196 1258 1197 static void ufs_qcom_enable_test_bus(struct ufs_qcom_host *host) 1259 1198 { 1260 - if (host->dbg_print_en & UFS_QCOM_DBG_PRINT_TEST_BUS_EN) { 1261 - ufshcd_rmwl(host->hba, UFS_REG_TEST_BUS_EN, 1262 - UFS_REG_TEST_BUS_EN, REG_UFS_CFG1); 1263 - ufshcd_rmwl(host->hba, TEST_BUS_EN, TEST_BUS_EN, REG_UFS_CFG1); 1264 - } else { 1265 - ufshcd_rmwl(host->hba, UFS_REG_TEST_BUS_EN, 0, REG_UFS_CFG1); 1266 - ufshcd_rmwl(host->hba, TEST_BUS_EN, 0, REG_UFS_CFG1); 1267 - } 1199 + ufshcd_rmwl(host->hba, UFS_REG_TEST_BUS_EN, 1200 + UFS_REG_TEST_BUS_EN, REG_UFS_CFG1); 1201 + ufshcd_rmwl(host->hba, TEST_BUS_EN, TEST_BUS_EN, REG_UFS_CFG1); 1268 1202 } 1269 1203 1270 1204 static void ufs_qcom_get_default_testbus_cfg(struct ufs_qcom_host *host) ··· 1306 1374 1307 1375 static void ufs_qcom_dump_dbg_regs(struct ufs_hba *hba) 1308 1376 { 1377 + u32 reg; 1378 + struct ufs_qcom_host *host; 1379 + 1380 + host = ufshcd_get_variant(hba); 1381 + 1309 1382 ufshcd_dump_regs(hba, REG_UFS_SYS1CLK_1US, 16 * 4, 1310 1383 "HCI Vendor Specific Registers "); 1311 1384 1312 - ufs_qcom_print_hw_debug_reg_all(hba, NULL, ufs_qcom_dump_regs_wrapper); 1385 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_REG_OCSC); 1386 + ufshcd_dump_regs(hba, reg, 44 * 4, "UFS_UFS_DBG_RD_REG_OCSC "); 1387 + 1388 + reg = ufshcd_readl(hba, REG_UFS_CFG1); 1389 + reg |= UTP_DBG_RAMS_EN; 1390 + ufshcd_writel(hba, reg, REG_UFS_CFG1); 1391 + 1392 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_EDTL_RAM); 1393 + ufshcd_dump_regs(hba, reg, 32 * 4, "UFS_UFS_DBG_RD_EDTL_RAM "); 1394 + 1395 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_DESC_RAM); 1396 + ufshcd_dump_regs(hba, reg, 128 * 4, "UFS_UFS_DBG_RD_DESC_RAM "); 1397 + 1398 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_PRDT_RAM); 1399 + ufshcd_dump_regs(hba, reg, 64 * 4, "UFS_UFS_DBG_RD_PRDT_RAM "); 1400 + 1401 + /* clear bit 17 - UTP_DBG_RAMS_EN */ 1402 + ufshcd_rmwl(hba, UTP_DBG_RAMS_EN, 0, REG_UFS_CFG1); 1403 + 1404 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_UAWM); 1405 + ufshcd_dump_regs(hba, reg, 4 * 4, "UFS_DBG_RD_REG_UAWM "); 1406 + 1407 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_UARM); 1408 + ufshcd_dump_regs(hba, reg, 4 * 4, "UFS_DBG_RD_REG_UARM "); 1409 + 1410 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TXUC); 1411 + ufshcd_dump_regs(hba, reg, 48 * 4, "UFS_DBG_RD_REG_TXUC "); 1412 + 1413 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_RXUC); 1414 + ufshcd_dump_regs(hba, reg, 27 * 4, "UFS_DBG_RD_REG_RXUC "); 1415 + 1416 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_DFC); 1417 + ufshcd_dump_regs(hba, reg, 19 * 4, "UFS_DBG_RD_REG_DFC "); 1418 + 1419 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TRLUT); 1420 + ufshcd_dump_regs(hba, reg, 34 * 4, "UFS_DBG_RD_REG_TRLUT "); 1421 + 1422 + reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TMRLUT); 1423 + ufshcd_dump_regs(hba, reg, 9 * 4, "UFS_DBG_RD_REG_TMRLUT "); 1313 1424 } 1314 1425 1315 1426 /** ··· 1399 1424 } 1400 1425 #endif 1401 1426 1427 + static void ufs_qcom_reinit_notify(struct ufs_hba *hba) 1428 + { 1429 + struct ufs_qcom_host *host = ufshcd_get_variant(hba); 1430 + 1431 + phy_power_off(host->generic_phy); 1432 + } 1433 + 1434 + /* Resources */ 1435 + static const struct ufshcd_res_info ufs_res_info[RES_MAX] = { 1436 + {.name = "ufs_mem",}, 1437 + {.name = "mcq",}, 1438 + /* Submission Queue DAO */ 1439 + {.name = "mcq_sqd",}, 1440 + /* Submission Queue Interrupt Status */ 1441 + {.name = "mcq_sqis",}, 1442 + /* Completion Queue DAO */ 1443 + {.name = "mcq_cqd",}, 1444 + /* Completion Queue Interrupt Status */ 1445 + {.name = "mcq_cqis",}, 1446 + /* MCQ vendor specific */ 1447 + {.name = "mcq_vs",}, 1448 + }; 1449 + 1450 + static int ufs_qcom_mcq_config_resource(struct ufs_hba *hba) 1451 + { 1452 + struct platform_device *pdev = to_platform_device(hba->dev); 1453 + struct ufshcd_res_info *res; 1454 + struct resource *res_mem, *res_mcq; 1455 + int i, ret = 0; 1456 + 1457 + memcpy(hba->res, ufs_res_info, sizeof(ufs_res_info)); 1458 + 1459 + for (i = 0; i < RES_MAX; i++) { 1460 + res = &hba->res[i]; 1461 + res->resource = platform_get_resource_byname(pdev, 1462 + IORESOURCE_MEM, 1463 + res->name); 1464 + if (!res->resource) { 1465 + dev_info(hba->dev, "Resource %s not provided\n", res->name); 1466 + if (i == RES_UFS) 1467 + return -ENOMEM; 1468 + continue; 1469 + } else if (i == RES_UFS) { 1470 + res_mem = res->resource; 1471 + res->base = hba->mmio_base; 1472 + continue; 1473 + } 1474 + 1475 + res->base = devm_ioremap_resource(hba->dev, res->resource); 1476 + if (IS_ERR(res->base)) { 1477 + dev_err(hba->dev, "Failed to map res %s, err=%d\n", 1478 + res->name, (int)PTR_ERR(res->base)); 1479 + res->base = NULL; 1480 + ret = PTR_ERR(res->base); 1481 + return ret; 1482 + } 1483 + } 1484 + 1485 + /* MCQ resource provided in DT */ 1486 + res = &hba->res[RES_MCQ]; 1487 + /* Bail if MCQ resource is provided */ 1488 + if (res->base) 1489 + goto out; 1490 + 1491 + /* Explicitly allocate MCQ resource from ufs_mem */ 1492 + res_mcq = devm_kzalloc(hba->dev, sizeof(*res_mcq), GFP_KERNEL); 1493 + if (!res_mcq) 1494 + return ret; 1495 + 1496 + res_mcq->start = res_mem->start + 1497 + MCQ_SQATTR_OFFSET(hba->mcq_capabilities); 1498 + res_mcq->end = res_mcq->start + hba->nr_hw_queues * MCQ_QCFG_SIZE - 1; 1499 + res_mcq->flags = res_mem->flags; 1500 + res_mcq->name = "mcq"; 1501 + 1502 + ret = insert_resource(&iomem_resource, res_mcq); 1503 + if (ret) { 1504 + dev_err(hba->dev, "Failed to insert MCQ resource, err=%d\n", 1505 + ret); 1506 + goto insert_res_err; 1507 + } 1508 + 1509 + res->base = devm_ioremap_resource(hba->dev, res_mcq); 1510 + if (IS_ERR(res->base)) { 1511 + dev_err(hba->dev, "MCQ registers mapping failed, err=%d\n", 1512 + (int)PTR_ERR(res->base)); 1513 + ret = PTR_ERR(res->base); 1514 + goto ioremap_err; 1515 + } 1516 + 1517 + out: 1518 + hba->mcq_base = res->base; 1519 + return 0; 1520 + ioremap_err: 1521 + res->base = NULL; 1522 + remove_resource(res_mcq); 1523 + insert_res_err: 1524 + devm_kfree(hba->dev, res_mcq); 1525 + return ret; 1526 + } 1527 + 1528 + static int ufs_qcom_op_runtime_config(struct ufs_hba *hba) 1529 + { 1530 + struct ufshcd_res_info *mem_res, *sqdao_res; 1531 + struct ufshcd_mcq_opr_info_t *opr; 1532 + int i; 1533 + 1534 + mem_res = &hba->res[RES_UFS]; 1535 + sqdao_res = &hba->res[RES_MCQ_SQD]; 1536 + 1537 + if (!mem_res->base || !sqdao_res->base) 1538 + return -EINVAL; 1539 + 1540 + for (i = 0; i < OPR_MAX; i++) { 1541 + opr = &hba->mcq_opr[i]; 1542 + opr->offset = sqdao_res->resource->start - 1543 + mem_res->resource->start + 0x40 * i; 1544 + opr->stride = 0x100; 1545 + opr->base = sqdao_res->base + 0x40 * i; 1546 + } 1547 + 1548 + return 0; 1549 + } 1550 + 1551 + static int ufs_qcom_get_hba_mac(struct ufs_hba *hba) 1552 + { 1553 + /* Qualcomm HC supports up to 64 */ 1554 + return MAX_SUPP_MAC; 1555 + } 1556 + 1557 + static int ufs_qcom_get_outstanding_cqs(struct ufs_hba *hba, 1558 + unsigned long *ocqs) 1559 + { 1560 + struct ufshcd_res_info *mcq_vs_res = &hba->res[RES_MCQ_VS]; 1561 + 1562 + if (!mcq_vs_res->base) 1563 + return -EINVAL; 1564 + 1565 + *ocqs = readl(mcq_vs_res->base + UFS_MEM_CQIS_VS); 1566 + 1567 + return 0; 1568 + } 1569 + 1570 + static void ufs_qcom_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg) 1571 + { 1572 + struct device *dev = msi_desc_to_dev(desc); 1573 + struct ufs_hba *hba = dev_get_drvdata(dev); 1574 + 1575 + ufshcd_mcq_config_esi(hba, msg); 1576 + } 1577 + 1578 + static irqreturn_t ufs_qcom_mcq_esi_handler(int irq, void *__hba) 1579 + { 1580 + struct ufs_hba *hba = __hba; 1581 + struct ufs_qcom_host *host = ufshcd_get_variant(hba); 1582 + u32 id = irq - host->esi_base; 1583 + struct ufs_hw_queue *hwq = &hba->uhq[id]; 1584 + 1585 + ufshcd_mcq_write_cqis(hba, 0x1, id); 1586 + ufshcd_mcq_poll_cqe_nolock(hba, hwq); 1587 + 1588 + return IRQ_HANDLED; 1589 + } 1590 + 1591 + static int ufs_qcom_config_esi(struct ufs_hba *hba) 1592 + { 1593 + struct ufs_qcom_host *host = ufshcd_get_variant(hba); 1594 + struct msi_desc *desc; 1595 + struct msi_desc *failed_desc = NULL; 1596 + int nr_irqs, ret; 1597 + 1598 + if (host->esi_enabled) 1599 + return 0; 1600 + else if (host->esi_base < 0) 1601 + return -EINVAL; 1602 + 1603 + /* 1604 + * 1. We only handle CQs as of now. 1605 + * 2. Poll queues do not need ESI. 1606 + */ 1607 + nr_irqs = hba->nr_hw_queues - hba->nr_queues[HCTX_TYPE_POLL]; 1608 + ret = platform_msi_domain_alloc_irqs(hba->dev, nr_irqs, 1609 + ufs_qcom_write_msi_msg); 1610 + if (ret) 1611 + goto out; 1612 + 1613 + msi_for_each_desc(desc, hba->dev, MSI_DESC_ALL) { 1614 + if (!desc->msi_index) 1615 + host->esi_base = desc->irq; 1616 + 1617 + ret = devm_request_irq(hba->dev, desc->irq, 1618 + ufs_qcom_mcq_esi_handler, 1619 + IRQF_SHARED, "qcom-mcq-esi", hba); 1620 + if (ret) { 1621 + dev_err(hba->dev, "%s: Fail to request IRQ for %d, err = %d\n", 1622 + __func__, desc->irq, ret); 1623 + failed_desc = desc; 1624 + break; 1625 + } 1626 + } 1627 + 1628 + if (ret) { 1629 + /* Rewind */ 1630 + msi_for_each_desc(desc, hba->dev, MSI_DESC_ALL) { 1631 + if (desc == failed_desc) 1632 + break; 1633 + devm_free_irq(hba->dev, desc->irq, hba); 1634 + } 1635 + platform_msi_domain_free_irqs(hba->dev); 1636 + } else { 1637 + if (host->hw_ver.major == 6 && host->hw_ver.minor == 0 && 1638 + host->hw_ver.step == 0) { 1639 + ufshcd_writel(hba, 1640 + ufshcd_readl(hba, REG_UFS_CFG3) | 0x1F000, 1641 + REG_UFS_CFG3); 1642 + } 1643 + ufshcd_mcq_enable_esi(hba); 1644 + } 1645 + 1646 + out: 1647 + if (ret) { 1648 + host->esi_base = -1; 1649 + dev_warn(hba->dev, "Failed to request Platform MSI %d\n", ret); 1650 + } else { 1651 + host->esi_enabled = true; 1652 + } 1653 + 1654 + return ret; 1655 + } 1656 + 1402 1657 /* 1403 1658 * struct ufs_hba_qcom_vops - UFS QCOM specific variant operations 1404 1659 * ··· 1652 1447 .device_reset = ufs_qcom_device_reset, 1653 1448 .config_scaling_param = ufs_qcom_config_scaling_param, 1654 1449 .program_key = ufs_qcom_ice_program_key, 1450 + .reinit_notify = ufs_qcom_reinit_notify, 1451 + .mcq_config_resource = ufs_qcom_mcq_config_resource, 1452 + .get_hba_mac = ufs_qcom_get_hba_mac, 1453 + .op_runtime_config = ufs_qcom_op_runtime_config, 1454 + .get_outstanding_cqs = ufs_qcom_get_outstanding_cqs, 1455 + .config_esi = ufs_qcom_config_esi, 1655 1456 }; 1656 1457 1657 1458 /** ··· 1674 1463 /* Perform generic probe */ 1675 1464 err = ufshcd_pltfrm_init(pdev, &ufs_hba_qcom_vops); 1676 1465 if (err) 1677 - dev_err(dev, "ufshcd_pltfrm_init() failed %d\n", err); 1466 + return dev_err_probe(dev, err, "ufshcd_pltfrm_init() failed\n"); 1678 1467 1679 - return err; 1468 + return 0; 1680 1469 } 1681 1470 1682 1471 /** ··· 1691 1480 1692 1481 pm_runtime_get_sync(&(pdev)->dev); 1693 1482 ufshcd_remove(hba); 1483 + platform_msi_domain_free_irqs(hba->dev); 1694 1484 return 0; 1695 1485 } 1696 1486 ··· 1710 1498 #endif 1711 1499 1712 1500 static const struct dev_pm_ops ufs_qcom_pm_ops = { 1713 - SET_SYSTEM_SLEEP_PM_OPS(ufshcd_system_suspend, ufshcd_system_resume) 1714 1501 SET_RUNTIME_PM_OPS(ufshcd_runtime_suspend, ufshcd_runtime_resume, NULL) 1715 1502 .prepare = ufshcd_suspend_prepare, 1716 1503 .complete = ufshcd_resume_complete, 1504 + #ifdef CONFIG_PM_SLEEP 1505 + .suspend = ufshcd_system_suspend, 1506 + .resume = ufshcd_system_resume, 1507 + .freeze = ufshcd_system_freeze, 1508 + .restore = ufshcd_system_restore, 1509 + .thaw = ufshcd_system_thaw, 1510 + #endif 1717 1511 }; 1718 1512 1719 1513 static struct platform_driver ufs_qcom_pltform = {
+51 -46
drivers/ufs/host/ufs-qcom.h
··· 16 16 #define HBRN8_POLL_TOUT_MS 100 17 17 #define DEFAULT_CLK_RATE_HZ 1000000 18 18 #define BUS_VECTOR_NAME_LEN 32 19 + #define MAX_SUPP_MAC 64 19 20 20 - #define UFS_HW_VER_MAJOR_SHFT (28) 21 - #define UFS_HW_VER_MAJOR_MASK (0x000F << UFS_HW_VER_MAJOR_SHFT) 22 - #define UFS_HW_VER_MINOR_SHFT (16) 23 - #define UFS_HW_VER_MINOR_MASK (0x0FFF << UFS_HW_VER_MINOR_SHFT) 24 - #define UFS_HW_VER_STEP_SHFT (0) 25 - #define UFS_HW_VER_STEP_MASK (0xFFFF << UFS_HW_VER_STEP_SHFT) 21 + #define UFS_HW_VER_MAJOR_MASK GENMASK(31, 28) 22 + #define UFS_HW_VER_MINOR_MASK GENMASK(27, 16) 23 + #define UFS_HW_VER_STEP_MASK GENMASK(15, 0) 26 24 27 25 /* vendor specific pre-defined parameters */ 28 26 #define SLOW 1 ··· 34 36 REG_UFS_TX_SYMBOL_CLK_NS_US = 0xC4, 35 37 REG_UFS_LOCAL_PORT_ID_REG = 0xC8, 36 38 REG_UFS_PA_ERR_CODE = 0xCC, 37 - REG_UFS_RETRY_TIMER_REG = 0xD0, 38 - REG_UFS_PA_LINK_STARTUP_TIMER = 0xD8, 39 + /* On older UFS revisions, this register is called "RETRY_TIMER_REG" */ 40 + REG_UFS_PARAM0 = 0xD0, 41 + /* On older UFS revisions, this register is called "REG_UFS_PA_LINK_STARTUP_TIMER" */ 42 + REG_UFS_CFG0 = 0xD8, 39 43 REG_UFS_CFG1 = 0xDC, 40 44 REG_UFS_CFG2 = 0xE0, 41 45 REG_UFS_HW_VERSION = 0xE4, ··· 53 53 * added in HW Version 3.0.0 54 54 */ 55 55 UFS_AH8_CFG = 0xFC, 56 + 57 + REG_UFS_CFG3 = 0x271C, 56 58 }; 57 59 58 60 /* QCOM UFS host controller vendor specific debug registers */ ··· 74 72 UFS_UFS_DBG_RD_EDTL_RAM = 0x1900, 75 73 }; 76 74 75 + enum { 76 + UFS_MEM_CQIS_VS = 0x8, 77 + }; 78 + 77 79 #define UFS_CNTLR_2_x_x_VEN_REGS_OFFSET(x) (0x000 + x) 78 80 #define UFS_CNTLR_3_x_x_VEN_REGS_OFFSET(x) (0x400 + x) 79 81 82 + /* bit definitions for REG_UFS_CFG0 register */ 83 + #define QUNIPRO_G4_SEL BIT(5) 84 + 80 85 /* bit definitions for REG_UFS_CFG1 register */ 81 - #define QUNIPRO_SEL 0x1 82 - #define UTP_DBG_RAMS_EN 0x20000 86 + #define QUNIPRO_SEL BIT(0) 87 + #define UFS_PHY_SOFT_RESET BIT(1) 88 + #define UTP_DBG_RAMS_EN BIT(17) 83 89 #define TEST_BUS_EN BIT(18) 84 90 #define TEST_BUS_SEL GENMASK(22, 19) 85 91 #define UFS_REG_TEST_BUS_EN BIT(30) 86 92 93 + #define UFS_PHY_RESET_ENABLE 1 94 + #define UFS_PHY_RESET_DISABLE 0 95 + 87 96 /* bit definitions for REG_UFS_CFG2 register */ 88 - #define UAWM_HW_CGC_EN (1 << 0) 89 - #define UARM_HW_CGC_EN (1 << 1) 90 - #define TXUC_HW_CGC_EN (1 << 2) 91 - #define RXUC_HW_CGC_EN (1 << 3) 92 - #define DFC_HW_CGC_EN (1 << 4) 93 - #define TRLUT_HW_CGC_EN (1 << 5) 94 - #define TMRLUT_HW_CGC_EN (1 << 6) 95 - #define OCSC_HW_CGC_EN (1 << 7) 97 + #define UAWM_HW_CGC_EN BIT(0) 98 + #define UARM_HW_CGC_EN BIT(1) 99 + #define TXUC_HW_CGC_EN BIT(2) 100 + #define RXUC_HW_CGC_EN BIT(3) 101 + #define DFC_HW_CGC_EN BIT(4) 102 + #define TRLUT_HW_CGC_EN BIT(5) 103 + #define TMRLUT_HW_CGC_EN BIT(6) 104 + #define OCSC_HW_CGC_EN BIT(7) 105 + 106 + /* bit definitions for REG_UFS_PARAM0 */ 107 + #define MAX_HS_GEAR_MASK GENMASK(6, 4) 108 + #define UFS_QCOM_MAX_GEAR(x) FIELD_GET(MAX_HS_GEAR_MASK, (x)) 96 109 97 110 /* bit definition for UFS_UFS_TEST_BUS_CTRL_n */ 98 - #define TEST_BUS_SUB_SEL_MASK 0x1F /* All XXX_SEL fields are 5 bits wide */ 111 + #define TEST_BUS_SUB_SEL_MASK GENMASK(4, 0) /* All XXX_SEL fields are 5 bits wide */ 99 112 100 113 #define REG_UFS_CFG2_CGC_EN_ALL (UAWM_HW_CGC_EN | UARM_HW_CGC_EN |\ 101 114 TXUC_HW_CGC_EN | RXUC_HW_CGC_EN |\ ··· 118 101 TMRLUT_HW_CGC_EN | OCSC_HW_CGC_EN) 119 102 120 103 /* bit offset */ 121 - enum { 122 - OFFSET_UFS_PHY_SOFT_RESET = 1, 123 - OFFSET_CLK_NS_REG = 10, 124 - }; 104 + #define OFFSET_CLK_NS_REG 0xa 125 105 126 106 /* bit masks */ 127 - enum { 128 - MASK_UFS_PHY_SOFT_RESET = 0x2, 129 - MASK_TX_SYMBOL_CLK_1US_REG = 0x3FF, 130 - MASK_CLK_NS_REG = 0xFFFC00, 131 - }; 132 - 133 - /* QCOM UFS debug print bit mask */ 134 - #define UFS_QCOM_DBG_PRINT_REGS_EN BIT(0) 135 - #define UFS_QCOM_DBG_PRINT_ICE_REGS_EN BIT(1) 136 - #define UFS_QCOM_DBG_PRINT_TEST_BUS_EN BIT(2) 137 - 138 - #define UFS_QCOM_DBG_PRINT_ALL \ 139 - (UFS_QCOM_DBG_PRINT_REGS_EN | UFS_QCOM_DBG_PRINT_ICE_REGS_EN | \ 140 - UFS_QCOM_DBG_PRINT_TEST_BUS_EN) 107 + #define MASK_TX_SYMBOL_CLK_1US_REG GENMASK(9, 0) 108 + #define MASK_CLK_NS_REG GENMASK(23, 10) 141 109 142 110 /* QUniPro Vendor specific attributes */ 143 111 #define PA_VS_CONFIG_REG1 0x9000 ··· 137 135 { 138 136 u32 ver = ufshcd_readl(hba, REG_UFS_HW_VERSION); 139 137 140 - *major = (ver & UFS_HW_VER_MAJOR_MASK) >> UFS_HW_VER_MAJOR_SHFT; 141 - *minor = (ver & UFS_HW_VER_MINOR_MASK) >> UFS_HW_VER_MINOR_SHFT; 142 - *step = (ver & UFS_HW_VER_STEP_MASK) >> UFS_HW_VER_STEP_SHFT; 138 + *major = FIELD_GET(UFS_HW_VER_MAJOR_MASK, ver); 139 + *minor = FIELD_GET(UFS_HW_VER_MINOR_MASK, ver); 140 + *step = FIELD_GET(UFS_HW_VER_STEP_MASK, ver); 143 141 }; 144 142 145 143 static inline void ufs_qcom_assert_reset(struct ufs_hba *hba) 146 144 { 147 - ufshcd_rmwl(hba, MASK_UFS_PHY_SOFT_RESET, 148 - 1 << OFFSET_UFS_PHY_SOFT_RESET, REG_UFS_CFG1); 145 + ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, FIELD_PREP(UFS_PHY_SOFT_RESET, UFS_PHY_RESET_ENABLE), 146 + REG_UFS_CFG1); 149 147 150 148 /* 151 149 * Make sure assertion of ufs phy reset is written to ··· 156 154 157 155 static inline void ufs_qcom_deassert_reset(struct ufs_hba *hba) 158 156 { 159 - ufshcd_rmwl(hba, MASK_UFS_PHY_SOFT_RESET, 160 - 0 << OFFSET_UFS_PHY_SOFT_RESET, REG_UFS_CFG1); 157 + ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, FIELD_PREP(UFS_PHY_SOFT_RESET, UFS_PHY_RESET_DISABLE), 158 + REG_UFS_CFG1); 161 159 162 160 /* 163 161 * Make sure de-assertion of ufs phy reset is written to ··· 214 212 215 213 u32 dev_ref_clk_en_mask; 216 214 217 - /* Bitmask for enabling debug prints */ 218 - u32 dbg_print_en; 219 215 struct ufs_qcom_testbus testbus; 220 216 221 217 /* Reset control of HCI */ ··· 221 221 struct reset_controller_dev rcdev; 222 222 223 223 struct gpio_desc *device_reset; 224 + 225 + u32 hs_gear; 226 + 227 + int esi_base; 228 + bool esi_enabled; 224 229 }; 225 230 226 231 static inline u32
+458
drivers/ufs/host/ufs-sprd.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * UNISOC UFS Host Controller driver 4 + * 5 + * Copyright (C) 2022 Unisoc, Inc. 6 + * Author: Zhe Wang <zhe.wang1@unisoc.com> 7 + */ 8 + 9 + #include <linux/arm-smccc.h> 10 + #include <linux/mfd/syscon.h> 11 + #include <linux/of.h> 12 + #include <linux/platform_device.h> 13 + #include <linux/regmap.h> 14 + #include <linux/reset.h> 15 + #include <linux/regulator/consumer.h> 16 + 17 + #include <ufs/ufshcd.h> 18 + #include "ufshcd-pltfrm.h" 19 + #include "ufs-sprd.h" 20 + 21 + static const struct of_device_id ufs_sprd_of_match[]; 22 + 23 + static struct ufs_sprd_priv *ufs_sprd_get_priv_data(struct ufs_hba *hba) 24 + { 25 + struct ufs_sprd_host *host = ufshcd_get_variant(hba); 26 + 27 + WARN_ON(!host->priv); 28 + return host->priv; 29 + } 30 + 31 + static void ufs_sprd_regmap_update(struct ufs_sprd_priv *priv, unsigned int index, 32 + unsigned int reg, unsigned int bits, unsigned int val) 33 + { 34 + regmap_update_bits(priv->sysci[index].regmap, reg, bits, val); 35 + } 36 + 37 + static void ufs_sprd_regmap_read(struct ufs_sprd_priv *priv, unsigned int index, 38 + unsigned int reg, unsigned int *val) 39 + { 40 + regmap_read(priv->sysci[index].regmap, reg, val); 41 + } 42 + 43 + static void ufs_sprd_get_unipro_ver(struct ufs_hba *hba) 44 + { 45 + struct ufs_sprd_host *host = ufshcd_get_variant(hba); 46 + 47 + if (ufshcd_dme_get(hba, UIC_ARG_MIB(PA_LOCALVERINFO), &host->unipro_ver)) 48 + host->unipro_ver = 0; 49 + } 50 + 51 + static void ufs_sprd_ctrl_uic_compl(struct ufs_hba *hba, bool enable) 52 + { 53 + u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE); 54 + 55 + if (enable == true) 56 + set |= UIC_COMMAND_COMPL; 57 + else 58 + set &= ~UIC_COMMAND_COMPL; 59 + ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE); 60 + } 61 + 62 + static int ufs_sprd_get_reset_ctrl(struct device *dev, struct ufs_sprd_rst *rci) 63 + { 64 + rci->rc = devm_reset_control_get(dev, rci->name); 65 + if (IS_ERR(rci->rc)) { 66 + dev_err(dev, "failed to get reset ctrl:%s\n", rci->name); 67 + return PTR_ERR(rci->rc); 68 + } 69 + 70 + return 0; 71 + } 72 + 73 + static int ufs_sprd_get_syscon_reg(struct device *dev, struct ufs_sprd_syscon *sysci) 74 + { 75 + sysci->regmap = syscon_regmap_lookup_by_phandle(dev->of_node, sysci->name); 76 + if (IS_ERR(sysci->regmap)) { 77 + dev_err(dev, "failed to get ufs syscon:%s\n", sysci->name); 78 + return PTR_ERR(sysci->regmap); 79 + } 80 + 81 + return 0; 82 + } 83 + 84 + static int ufs_sprd_get_vreg(struct device *dev, struct ufs_sprd_vreg *vregi) 85 + { 86 + vregi->vreg = devm_regulator_get(dev, vregi->name); 87 + if (IS_ERR(vregi->vreg)) { 88 + dev_err(dev, "failed to get vreg:%s\n", vregi->name); 89 + return PTR_ERR(vregi->vreg); 90 + } 91 + 92 + return 0; 93 + } 94 + 95 + static int ufs_sprd_parse_dt(struct device *dev, struct ufs_hba *hba, struct ufs_sprd_host *host) 96 + { 97 + u32 i; 98 + struct ufs_sprd_priv *priv = host->priv; 99 + int ret = 0; 100 + 101 + /* Parse UFS reset ctrl info */ 102 + for (i = 0; i < SPRD_UFS_RST_MAX; i++) { 103 + if (!priv->rci[i].name) 104 + continue; 105 + ret = ufs_sprd_get_reset_ctrl(dev, &priv->rci[i]); 106 + if (ret) 107 + goto out; 108 + } 109 + 110 + /* Parse UFS syscon reg info */ 111 + for (i = 0; i < SPRD_UFS_SYSCON_MAX; i++) { 112 + if (!priv->sysci[i].name) 113 + continue; 114 + ret = ufs_sprd_get_syscon_reg(dev, &priv->sysci[i]); 115 + if (ret) 116 + goto out; 117 + } 118 + 119 + /* Parse UFS vreg info */ 120 + for (i = 0; i < SPRD_UFS_VREG_MAX; i++) { 121 + if (!priv->vregi[i].name) 122 + continue; 123 + ret = ufs_sprd_get_vreg(dev, &priv->vregi[i]); 124 + if (ret) 125 + goto out; 126 + } 127 + 128 + out: 129 + return ret; 130 + } 131 + 132 + static int ufs_sprd_common_init(struct ufs_hba *hba) 133 + { 134 + struct device *dev = hba->dev; 135 + struct ufs_sprd_host *host; 136 + struct platform_device __maybe_unused *pdev = to_platform_device(dev); 137 + const struct of_device_id *of_id; 138 + int ret = 0; 139 + 140 + host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); 141 + if (!host) 142 + return -ENOMEM; 143 + 144 + of_id = of_match_node(ufs_sprd_of_match, pdev->dev.of_node); 145 + if (of_id->data != NULL) 146 + host->priv = container_of(of_id->data, struct ufs_sprd_priv, 147 + ufs_hba_sprd_vops); 148 + 149 + host->hba = hba; 150 + ufshcd_set_variant(hba, host); 151 + 152 + hba->caps |= UFSHCD_CAP_CLK_GATING | 153 + UFSHCD_CAP_CRYPTO | 154 + UFSHCD_CAP_WB_EN; 155 + hba->quirks |= UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS; 156 + 157 + ret = ufs_sprd_parse_dt(dev, hba, host); 158 + 159 + return ret; 160 + } 161 + 162 + static int sprd_ufs_pwr_change_notify(struct ufs_hba *hba, 163 + enum ufs_notify_change_status status, 164 + struct ufs_pa_layer_attr *dev_max_params, 165 + struct ufs_pa_layer_attr *dev_req_params) 166 + { 167 + struct ufs_sprd_host *host = ufshcd_get_variant(hba); 168 + 169 + if (status == PRE_CHANGE) { 170 + memcpy(dev_req_params, dev_max_params, 171 + sizeof(struct ufs_pa_layer_attr)); 172 + if (host->unipro_ver >= UFS_UNIPRO_VER_1_8) 173 + ufshcd_dme_configure_adapt(hba, dev_req_params->gear_tx, 174 + PA_INITIAL_ADAPT); 175 + } 176 + 177 + return 0; 178 + } 179 + 180 + static int ufs_sprd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op, 181 + enum ufs_notify_change_status status) 182 + { 183 + unsigned long flags; 184 + 185 + if (status == PRE_CHANGE) { 186 + if (ufshcd_is_auto_hibern8_supported(hba)) { 187 + spin_lock_irqsave(hba->host->host_lock, flags); 188 + ufshcd_writel(hba, 0, REG_AUTO_HIBERNATE_IDLE_TIMER); 189 + spin_unlock_irqrestore(hba->host->host_lock, flags); 190 + } 191 + } 192 + 193 + return 0; 194 + } 195 + 196 + static void ufs_sprd_n6_host_reset(struct ufs_hba *hba) 197 + { 198 + struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); 199 + 200 + dev_info(hba->dev, "ufs host reset!\n"); 201 + 202 + reset_control_assert(priv->rci[SPRD_UFSHCI_SOFT_RST].rc); 203 + usleep_range(1000, 1100); 204 + reset_control_deassert(priv->rci[SPRD_UFSHCI_SOFT_RST].rc); 205 + } 206 + 207 + static int ufs_sprd_n6_device_reset(struct ufs_hba *hba) 208 + { 209 + struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); 210 + 211 + dev_info(hba->dev, "ufs device reset!\n"); 212 + 213 + reset_control_assert(priv->rci[SPRD_UFS_DEV_RST].rc); 214 + usleep_range(1000, 1100); 215 + reset_control_deassert(priv->rci[SPRD_UFS_DEV_RST].rc); 216 + 217 + return 0; 218 + } 219 + 220 + static void ufs_sprd_n6_key_acc_enable(struct ufs_hba *hba) 221 + { 222 + u32 val; 223 + u32 retry = 10; 224 + struct arm_smccc_res res; 225 + 226 + check_hce: 227 + /* Key access only can be enabled under HCE enable */ 228 + val = ufshcd_readl(hba, REG_CONTROLLER_ENABLE); 229 + if (!(val & CONTROLLER_ENABLE)) { 230 + ufs_sprd_n6_host_reset(hba); 231 + val |= CONTROLLER_ENABLE; 232 + ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE); 233 + usleep_range(1000, 1100); 234 + if (retry) { 235 + retry--; 236 + goto check_hce; 237 + } 238 + goto disable_crypto; 239 + } 240 + 241 + arm_smccc_smc(SPRD_SIP_SVC_STORAGE_UFS_CRYPTO_ENABLE, 242 + 0, 0, 0, 0, 0, 0, 0, &res); 243 + if (!res.a0) 244 + return; 245 + 246 + disable_crypto: 247 + dev_err(hba->dev, "key reg access enable fail, disable crypto\n"); 248 + hba->caps &= ~UFSHCD_CAP_CRYPTO; 249 + } 250 + 251 + static int ufs_sprd_n6_init(struct ufs_hba *hba) 252 + { 253 + struct ufs_sprd_priv *priv; 254 + int ret = 0; 255 + 256 + ret = ufs_sprd_common_init(hba); 257 + if (ret != 0) 258 + return ret; 259 + 260 + priv = ufs_sprd_get_priv_data(hba); 261 + 262 + ret = regulator_enable(priv->vregi[SPRD_UFS_VDD_MPHY].vreg); 263 + if (ret) 264 + return -ENODEV; 265 + 266 + if (hba->caps & UFSHCD_CAP_CRYPTO) 267 + ufs_sprd_n6_key_acc_enable(hba); 268 + 269 + return 0; 270 + } 271 + 272 + static int ufs_sprd_n6_phy_init(struct ufs_hba *hba) 273 + { 274 + int ret = 0; 275 + uint32_t val = 0; 276 + uint32_t retry = 10; 277 + uint32_t offset; 278 + struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); 279 + 280 + ufshcd_dme_set(hba, UIC_ARG_MIB(CBREFCLKCTRL2), 0x90); 281 + ufshcd_dme_set(hba, UIC_ARG_MIB(CBCRCTRL), 0x01); 282 + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(RXSQCONTROL, 283 + UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)), 0x01); 284 + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(RXSQCONTROL, 285 + UIC_ARG_MPHY_RX_GEN_SEL_INDEX(1)), 0x01); 286 + ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); 287 + ufshcd_dme_set(hba, UIC_ARG_MIB(CBRATESEL), 0x01); 288 + 289 + do { 290 + /* phy_sram_init_done */ 291 + ufs_sprd_regmap_read(priv, SPRD_UFS_ANLG, 0xc, &val); 292 + if ((val & 0x1) == 0x1) { 293 + for (offset = 0x40; offset < 0x42; offset++) { 294 + /* Lane afe calibration */ 295 + ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGADDRLSB), 0x1c); 296 + ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGADDRMSB), offset); 297 + ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGWRLSB), 0x04); 298 + ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGWRMSB), 0x00); 299 + ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGRDWRSEL), 0x01); 300 + ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); 301 + } 302 + 303 + goto update_phy; 304 + } 305 + udelay(1000); 306 + retry--; 307 + } while (retry > 0); 308 + 309 + ret = -ETIMEDOUT; 310 + goto out; 311 + 312 + update_phy: 313 + /* phy_sram_ext_ld_done */ 314 + ufs_sprd_regmap_update(priv, SPRD_UFS_ANLG, 0xc, 0x2, 0); 315 + ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); 316 + ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYDISABLE), 0x0); 317 + out: 318 + return ret; 319 + } 320 + 321 + 322 + static int sprd_ufs_n6_hce_enable_notify(struct ufs_hba *hba, 323 + enum ufs_notify_change_status status) 324 + { 325 + int err = 0; 326 + struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); 327 + 328 + if (status == PRE_CHANGE) { 329 + /* phy_sram_ext_ld_done */ 330 + ufs_sprd_regmap_update(priv, SPRD_UFS_ANLG, 0xc, 0x2, 0x2); 331 + /* phy_sram_bypass */ 332 + ufs_sprd_regmap_update(priv, SPRD_UFS_ANLG, 0xc, 0x4, 0x4); 333 + 334 + ufs_sprd_n6_host_reset(hba); 335 + 336 + if (hba->caps & UFSHCD_CAP_CRYPTO) 337 + ufs_sprd_n6_key_acc_enable(hba); 338 + } 339 + 340 + if (status == POST_CHANGE) { 341 + err = ufs_sprd_n6_phy_init(hba); 342 + if (err) { 343 + dev_err(hba->dev, "Phy setup failed (%d)\n", err); 344 + goto out; 345 + } 346 + 347 + ufs_sprd_get_unipro_ver(hba); 348 + } 349 + out: 350 + return err; 351 + } 352 + 353 + static void sprd_ufs_n6_h8_notify(struct ufs_hba *hba, 354 + enum uic_cmd_dme cmd, 355 + enum ufs_notify_change_status status) 356 + { 357 + struct ufs_sprd_priv *priv = ufs_sprd_get_priv_data(hba); 358 + 359 + if (status == PRE_CHANGE) { 360 + if (cmd == UIC_CMD_DME_HIBER_ENTER) 361 + /* 362 + * Disable UIC COMPL INTR to prevent access to UFSHCI after 363 + * checking HCS.UPMCRS 364 + */ 365 + ufs_sprd_ctrl_uic_compl(hba, false); 366 + 367 + if (cmd == UIC_CMD_DME_HIBER_EXIT) { 368 + ufs_sprd_regmap_update(priv, SPRD_UFS_AON_APB, APB_UFSDEV_REG, 369 + APB_UFSDEV_REFCLK_EN, APB_UFSDEV_REFCLK_EN); 370 + ufs_sprd_regmap_update(priv, SPRD_UFS_AON_APB, APB_USB31PLL_CTRL, 371 + APB_USB31PLLV_REF2MPHY, APB_USB31PLLV_REF2MPHY); 372 + } 373 + } 374 + 375 + if (status == POST_CHANGE) { 376 + if (cmd == UIC_CMD_DME_HIBER_EXIT) 377 + ufs_sprd_ctrl_uic_compl(hba, true); 378 + 379 + if (cmd == UIC_CMD_DME_HIBER_ENTER) { 380 + ufs_sprd_regmap_update(priv, SPRD_UFS_AON_APB, APB_UFSDEV_REG, 381 + APB_UFSDEV_REFCLK_EN, 0); 382 + ufs_sprd_regmap_update(priv, SPRD_UFS_AON_APB, APB_USB31PLL_CTRL, 383 + APB_USB31PLLV_REF2MPHY, 0); 384 + } 385 + } 386 + } 387 + 388 + static struct ufs_sprd_priv n6_ufs = { 389 + .rci[SPRD_UFSHCI_SOFT_RST] = { .name = "controller", }, 390 + .rci[SPRD_UFS_DEV_RST] = { .name = "device", }, 391 + 392 + .sysci[SPRD_UFS_ANLG] = { .name = "sprd,ufs-anlg-syscon", }, 393 + .sysci[SPRD_UFS_AON_APB] = { .name = "sprd,aon-apb-syscon", }, 394 + 395 + .vregi[SPRD_UFS_VDD_MPHY] = { .name = "vdd-mphy", }, 396 + 397 + .ufs_hba_sprd_vops = { 398 + .name = "sprd,ums9620-ufs", 399 + .init = ufs_sprd_n6_init, 400 + .hce_enable_notify = sprd_ufs_n6_hce_enable_notify, 401 + .pwr_change_notify = sprd_ufs_pwr_change_notify, 402 + .hibern8_notify = sprd_ufs_n6_h8_notify, 403 + .device_reset = ufs_sprd_n6_device_reset, 404 + .suspend = ufs_sprd_suspend, 405 + }, 406 + }; 407 + 408 + static const struct of_device_id __maybe_unused ufs_sprd_of_match[] = { 409 + { .compatible = "sprd,ums9620-ufs", .data = &n6_ufs.ufs_hba_sprd_vops}, 410 + {}, 411 + }; 412 + MODULE_DEVICE_TABLE(of, ufs_sprd_of_match); 413 + 414 + static int ufs_sprd_probe(struct platform_device *pdev) 415 + { 416 + int err; 417 + struct device *dev = &pdev->dev; 418 + const struct of_device_id *of_id; 419 + 420 + of_id = of_match_node(ufs_sprd_of_match, dev->of_node); 421 + err = ufshcd_pltfrm_init(pdev, of_id->data); 422 + if (err) 423 + dev_err(dev, "ufshcd_pltfrm_init() failed %d\n", err); 424 + 425 + return err; 426 + } 427 + 428 + static int ufs_sprd_remove(struct platform_device *pdev) 429 + { 430 + struct ufs_hba *hba = platform_get_drvdata(pdev); 431 + 432 + pm_runtime_get_sync(&(pdev)->dev); 433 + ufshcd_remove(hba); 434 + return 0; 435 + } 436 + 437 + static const struct dev_pm_ops ufs_sprd_pm_ops = { 438 + SET_SYSTEM_SLEEP_PM_OPS(ufshcd_system_suspend, ufshcd_system_resume) 439 + SET_RUNTIME_PM_OPS(ufshcd_runtime_suspend, ufshcd_runtime_resume, NULL) 440 + .prepare = ufshcd_suspend_prepare, 441 + .complete = ufshcd_resume_complete, 442 + }; 443 + 444 + static struct platform_driver ufs_sprd_pltform = { 445 + .probe = ufs_sprd_probe, 446 + .remove = ufs_sprd_remove, 447 + .shutdown = ufshcd_pltfrm_shutdown, 448 + .driver = { 449 + .name = "ufshcd-sprd", 450 + .pm = &ufs_sprd_pm_ops, 451 + .of_match_table = of_match_ptr(ufs_sprd_of_match), 452 + }, 453 + }; 454 + module_platform_driver(ufs_sprd_pltform); 455 + 456 + MODULE_AUTHOR("Zhe Wang <zhe.wang1@unisoc.com>"); 457 + MODULE_DESCRIPTION("Unisoc UFS Host Driver"); 458 + MODULE_LICENSE("GPL v2");
+85
drivers/ufs/host/ufs-sprd.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * UNISOC UFS Host Controller driver 4 + * 5 + * Copyright (C) 2022 Unisoc, Inc. 6 + * Author: Zhe Wang <zhe.wang1@unisoc.com> 7 + */ 8 + 9 + #ifndef _UFS_SPRD_H_ 10 + #define _UFS_SPRD_H_ 11 + 12 + /* Vendor specific attributes */ 13 + #define RXSQCONTROL 0x8009 14 + #define CBRATESEL 0x8114 15 + #define CBCREGADDRLSB 0x8116 16 + #define CBCREGADDRMSB 0x8117 17 + #define CBCREGWRLSB 0x8118 18 + #define CBCREGWRMSB 0x8119 19 + #define CBCREGRDWRSEL 0x811C 20 + #define CBCRCTRL 0x811F 21 + #define CBREFCLKCTRL2 0x8132 22 + #define VS_MPHYDISABLE 0xD0C1 23 + 24 + #define APB_UFSDEV_REG 0xCE8 25 + #define APB_UFSDEV_REFCLK_EN 0x2 26 + #define APB_USB31PLL_CTRL 0xCFC 27 + #define APB_USB31PLLV_REF2MPHY 0x1 28 + 29 + #define SPRD_SIP_SVC_STORAGE_UFS_CRYPTO_ENABLE \ 30 + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 31 + ARM_SMCCC_SMC_32, \ 32 + ARM_SMCCC_OWNER_SIP, \ 33 + 0x0301) 34 + 35 + enum SPRD_UFS_RST_INDEX { 36 + SPRD_UFSHCI_SOFT_RST, 37 + SPRD_UFS_DEV_RST, 38 + 39 + SPRD_UFS_RST_MAX 40 + }; 41 + 42 + enum SPRD_UFS_SYSCON_INDEX { 43 + SPRD_UFS_ANLG, 44 + SPRD_UFS_AON_APB, 45 + 46 + SPRD_UFS_SYSCON_MAX 47 + }; 48 + 49 + enum SPRD_UFS_VREG_INDEX { 50 + SPRD_UFS_VDD_MPHY, 51 + 52 + SPRD_UFS_VREG_MAX 53 + }; 54 + 55 + struct ufs_sprd_rst { 56 + const char *name; 57 + struct reset_control *rc; 58 + }; 59 + 60 + struct ufs_sprd_syscon { 61 + const char *name; 62 + struct regmap *regmap; 63 + }; 64 + 65 + struct ufs_sprd_vreg { 66 + const char *name; 67 + struct regulator *vreg; 68 + }; 69 + 70 + struct ufs_sprd_priv { 71 + struct ufs_sprd_rst rci[SPRD_UFS_RST_MAX]; 72 + struct ufs_sprd_syscon sysci[SPRD_UFS_SYSCON_MAX]; 73 + struct ufs_sprd_vreg vregi[SPRD_UFS_VREG_MAX]; 74 + const struct ufs_hba_variant_ops ufs_hba_sprd_vops; 75 + }; 76 + 77 + struct ufs_sprd_host { 78 + struct ufs_hba *hba; 79 + struct ufs_sprd_priv *priv; 80 + void __iomem *ufs_dbg_mmio; 81 + 82 + enum ufs_unipro_ver unipro_ver; 83 + }; 84 + 85 + #endif /* _UFS_SPRD_H_ */
-1
include/scsi/libsas.h
··· 735 735 void sas_init_disc(struct sas_discovery *disc, struct asd_sas_port *); 736 736 void sas_discover_event(struct asd_sas_port *, enum discover_event ev); 737 737 738 - int sas_discover_sata(struct domain_device *); 739 738 int sas_discover_end_dev(struct domain_device *); 740 739 741 740 void sas_unregister_dev(struct asd_sas_port *port, struct domain_device *);
+20
include/scsi/sas_ata.h
··· 36 36 int sas_execute_ata_cmd(struct domain_device *device, u8 *fis, 37 37 int force_phy_id); 38 38 int smp_ata_check_ready_type(struct ata_link *link); 39 + int sas_discover_sata(struct domain_device *dev); 40 + int sas_ata_add_dev(struct domain_device *parent, struct ex_phy *phy, 41 + struct domain_device *child, int phy_id); 39 42 #else 40 43 44 + static inline void sas_ata_disabled_notice(void) 45 + { 46 + pr_notice_once("ATA device seen but CONFIG_SCSI_SAS_ATA=N\n"); 47 + } 41 48 42 49 static inline int dev_is_sata(struct domain_device *dev) 43 50 { ··· 109 102 static inline int smp_ata_check_ready_type(struct ata_link *link) 110 103 { 111 104 return 0; 105 + } 106 + 107 + static inline int sas_discover_sata(struct domain_device *dev) 108 + { 109 + sas_ata_disabled_notice(); 110 + return -ENXIO; 111 + } 112 + 113 + static inline int sas_ata_add_dev(struct domain_device *parent, struct ex_phy *phy, 114 + struct domain_device *child, int phy_id) 115 + { 116 + sas_ata_disabled_notice(); 117 + return -ENODEV; 112 118 } 113 119 #endif 114 120
+15 -23
include/scsi/scsi_device.h
··· 455 455 extern int scsi_is_sdev_device(const struct device *); 456 456 extern int scsi_is_target_device(const struct device *); 457 457 extern void scsi_sanitize_inquiry_string(unsigned char *s, int len); 458 - extern int __scsi_execute(struct scsi_device *sdev, const unsigned char *cmd, 459 - int data_direction, void *buffer, unsigned bufflen, 460 - unsigned char *sense, struct scsi_sense_hdr *sshdr, 461 - int timeout, int retries, blk_opf_t flags, 462 - req_flags_t rq_flags, int *resid); 463 - /* Make sure any sense buffer is the correct size. */ 464 - #define scsi_execute(sdev, cmd, data_direction, buffer, bufflen, sense, \ 465 - sshdr, timeout, retries, flags, rq_flags, resid) \ 466 - ({ \ 467 - BUILD_BUG_ON((sense) != NULL && \ 468 - sizeof(sense) != SCSI_SENSE_BUFFERSIZE); \ 469 - __scsi_execute(sdev, cmd, data_direction, buffer, bufflen, \ 470 - sense, sshdr, timeout, retries, flags, rq_flags, \ 471 - resid); \ 472 - }) 473 - static inline int scsi_execute_req(struct scsi_device *sdev, 474 - const unsigned char *cmd, int data_direction, void *buffer, 475 - unsigned bufflen, struct scsi_sense_hdr *sshdr, int timeout, 476 - int retries, int *resid) 477 - { 478 - return scsi_execute(sdev, cmd, data_direction, buffer, 479 - bufflen, NULL, sshdr, timeout, retries, 0, 0, resid); 480 - } 458 + 459 + /* Optional arguments to scsi_execute_cmd */ 460 + struct scsi_exec_args { 461 + unsigned char *sense; /* sense buffer */ 462 + unsigned int sense_len; /* sense buffer len */ 463 + struct scsi_sense_hdr *sshdr; /* decoded sense header */ 464 + blk_mq_req_flags_t req_flags; /* BLK_MQ_REQ flags */ 465 + int *resid; /* residual length */ 466 + }; 467 + 468 + int scsi_execute_cmd(struct scsi_device *sdev, const unsigned char *cmd, 469 + blk_opf_t opf, void *buffer, unsigned int bufflen, 470 + int timeout, int retries, 471 + const struct scsi_exec_args *args); 472 + 481 473 extern void sdev_disable_disk_events(struct scsi_device *sdev); 482 474 extern void sdev_enable_disk_events(struct scsi_device *sdev); 483 475 extern int scsi_vpd_lun_id(struct scsi_device *, char *, size_t);
+1 -1
include/uapi/scsi/scsi_bsg_fc.h
··· 216 216 */ 217 217 struct fc_bsg_host_vendor_reply { 218 218 /* start of vendor response area */ 219 - __u32 vendor_rsp[0]; 219 + __DECLARE_FLEX_ARRAY(__u32, vendor_rsp); 220 220 }; 221 221 222 222
+46 -2
include/uapi/scsi/scsi_bsg_ufs.h
··· 14 14 */ 15 15 16 16 #define UFS_CDB_SIZE 16 17 - #define UPIU_TRANSACTION_UIC_CMD 0x1F 18 17 /* uic commands are 4DW long, per UFSHCI V2.1 paragraph 5.6.1 */ 19 18 #define UIC_CMD_SIZE (sizeof(__u32) * 4) 19 + 20 + enum ufs_bsg_msg_code { 21 + UPIU_TRANSACTION_UIC_CMD = 0x1F, 22 + UPIU_TRANSACTION_ARPMB_CMD, 23 + }; 24 + 25 + /* UFS RPMB Request Message Types */ 26 + enum ufs_rpmb_op_type { 27 + UFS_RPMB_WRITE_KEY = 0x01, 28 + UFS_RPMB_READ_CNT = 0x02, 29 + UFS_RPMB_WRITE = 0x03, 30 + UFS_RPMB_READ = 0x04, 31 + UFS_RPMB_READ_RESP = 0x05, 32 + UFS_RPMB_SEC_CONF_WRITE = 0x06, 33 + UFS_RPMB_SEC_CONF_READ = 0x07, 34 + UFS_RPMB_PURGE_ENABLE = 0x08, 35 + UFS_RPMB_PURGE_STATUS_READ = 0x09, 36 + }; 20 37 21 38 /** 22 39 * struct utp_upiu_header - UPIU header structure ··· 96 79 }; 97 80 }; 98 81 82 + struct ufs_arpmb_meta { 83 + __be16 req_resp_type; 84 + __u8 nonce[16]; 85 + __be32 write_counter; 86 + __be16 addr_lun; 87 + __be16 block_count; 88 + __be16 result; 89 + } __attribute__((__packed__)); 90 + 91 + struct ufs_ehs { 92 + __u8 length; 93 + __u8 ehs_type; 94 + __be16 ehssub_type; 95 + struct ufs_arpmb_meta meta; 96 + __u8 mac_key[32]; 97 + } __attribute__((__packed__)); 98 + 99 99 /* request (CDB) structure of the sg_io_v4 */ 100 100 struct ufs_bsg_request { 101 101 __u32 msgcode; ··· 129 95 * msg and status fields. The per-msgcode reply structure 130 96 * will contain valid data. 131 97 */ 132 - __u32 result; 98 + int result; 133 99 134 100 /* If there was reply_payload, how much was received? */ 135 101 __u32 reply_payload_rcv_len; 136 102 137 103 struct utp_upiu_req upiu_rsp; 104 + }; 105 + 106 + struct ufs_rpmb_request { 107 + struct ufs_bsg_request bsg_request; 108 + struct ufs_ehs ehs_req; 109 + }; 110 + 111 + struct ufs_rpmb_reply { 112 + struct ufs_bsg_reply bsg_reply; 113 + struct ufs_ehs ehs_rsp; 138 114 }; 139 115 #endif /* UFS_BSG_H */
+36 -1
include/ufs/ufs.h
··· 38 38 #define UFS_UPIU_MAX_UNIT_NUM_ID 0x7F 39 39 #define UFS_MAX_LUNS (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID) 40 40 #define UFS_UPIU_WLUN_ID (1 << 7) 41 - #define UFS_RPMB_UNIT 0xC4 42 41 43 42 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */ 44 43 #define UFS_UPIU_MAX_WB_LUN_ID 8 ··· 47 48 * If it is over the limit, WriteBooster feature will be disabled. 48 49 */ 49 50 #define UFS_WB_EXCEED_LIFETIME 0x0B 51 + 52 + /* 53 + * In UFS Spec, the Extra Header Segment (EHS) starts from byte 32 in UPIU request/response packet 54 + */ 55 + #define EHS_OFFSET_IN_RESPONSE 32 50 56 51 57 /* Well known logical unit id in LUN field of UPIU */ 52 58 enum { ··· 169 165 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D, 170 166 QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E, 171 167 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F, 168 + QUERY_ATTR_IDN_EXT_IID_EN = 0x2A, 172 169 }; 173 170 174 171 /* Descriptor idn for Query requests */ ··· 215 210 UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF = 0x25, 216 211 UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS = 0x27, 217 212 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS = 0x29, 213 + }; 214 + 215 + /* RPMB Unit descriptor parameters offsets in bytes*/ 216 + enum rpmb_unit_desc_param { 217 + RPMB_UNIT_DESC_PARAM_LEN = 0x0, 218 + RPMB_UNIT_DESC_PARAM_TYPE = 0x1, 219 + RPMB_UNIT_DESC_PARAM_UNIT_INDEX = 0x2, 220 + RPMB_UNIT_DESC_PARAM_LU_ENABLE = 0x3, 221 + RPMB_UNIT_DESC_PARAM_BOOT_LUN_ID = 0x4, 222 + RPMB_UNIT_DESC_PARAM_LU_WR_PROTECT = 0x5, 223 + RPMB_UNIT_DESC_PARAM_LU_Q_DEPTH = 0x6, 224 + RPMB_UNIT_DESC_PARAM_PSA_SENSITIVE = 0x7, 225 + RPMB_UNIT_DESC_PARAM_MEM_TYPE = 0x8, 226 + RPMB_UNIT_DESC_PARAM_REGION_EN = 0x9, 227 + RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_SIZE = 0xA, 228 + RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_COUNT = 0xB, 229 + RPMB_UNIT_DESC_PARAM_REGION0_SIZE = 0x13, 230 + RPMB_UNIT_DESC_PARAM_REGION1_SIZE = 0x14, 231 + RPMB_UNIT_DESC_PARAM_REGION2_SIZE = 0x15, 232 + RPMB_UNIT_DESC_PARAM_REGION3_SIZE = 0x16, 233 + RPMB_UNIT_DESC_PARAM_PROVISIONING_TYPE = 0x17, 234 + RPMB_UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18, 218 235 }; 219 236 220 237 /* Device descriptor parameters offsets in bytes*/ ··· 379 352 UFS_DEV_EXT_TEMP_NOTIF = BIT(6), 380 353 UFS_DEV_HPB_SUPPORT = BIT(7), 381 354 UFS_DEV_WRITE_BOOSTER_SUP = BIT(8), 355 + UFS_DEV_EXT_IID_SUP = BIT(16), 382 356 }; 383 357 #define UFS_DEV_HPB_SUPPORT_VERSION 0x310 384 358 ··· 617 589 u8 *model; 618 590 u16 wspecversion; 619 591 u32 clk_gating_wait_us; 592 + /* Stores the depth of queue in UFS device */ 593 + u8 bqueuedepth; 620 594 621 595 /* UFS HPB related flag */ 622 596 bool hpb_enabled; ··· 631 601 632 602 bool b_rpm_dev_flush_capable; 633 603 u8 b_presrv_uspc_en; 604 + 605 + bool b_advanced_rpmb_en; 606 + 607 + /* UFS EXT_IID Enable */ 608 + bool b_ext_iid_en; 634 609 }; 635 610 636 611 /*
+187 -7
include/ufs/ufshcd.h
··· 16 16 #include <linux/blk-crypto-profile.h> 17 17 #include <linux/blk-mq.h> 18 18 #include <linux/devfreq.h> 19 + #include <linux/msi.h> 19 20 #include <linux/pm_runtime.h> 21 + #include <linux/dma-direction.h> 20 22 #include <scsi/scsi_device.h> 21 23 #include <ufs/unipro.h> 22 24 #include <ufs/ufs.h> ··· 32 30 enum dev_cmd_type { 33 31 DEV_CMD_TYPE_NOP = 0x0, 34 32 DEV_CMD_TYPE_QUERY = 0x1, 33 + DEV_CMD_TYPE_RPMB = 0x2, 35 34 }; 36 35 37 36 enum ufs_event_type { ··· 225 222 struct mutex lock; 226 223 struct completion *complete; 227 224 struct ufs_query query; 225 + struct cq_entry *cqe; 228 226 }; 229 227 230 228 /** ··· 301 297 * @config_scaling_param: called to configure clock scaling parameters 302 298 * @program_key: program or evict an inline encryption key 303 299 * @event_notify: called to notify important events 300 + * @reinit_notify: called to notify reinit of UFSHCD during max gear switch 301 + * @mcq_config_resource: called to configure MCQ platform resources 302 + * @get_hba_mac: called to get vendor specific mac value, mandatory for mcq mode 303 + * @op_runtime_config: called to config Operation and runtime regs Pointers 304 + * @get_outstanding_cqs: called to get outstanding completion queues 305 + * @config_esi: called to config Event Specific Interrupt 304 306 */ 305 307 struct ufs_hba_variant_ops { 306 308 const char *name; ··· 345 335 const union ufs_crypto_cfg_entry *cfg, int slot); 346 336 void (*event_notify)(struct ufs_hba *hba, 347 337 enum ufs_event_type evt, void *data); 338 + void (*reinit_notify)(struct ufs_hba *); 339 + int (*mcq_config_resource)(struct ufs_hba *hba); 340 + int (*get_hba_mac)(struct ufs_hba *hba); 341 + int (*op_runtime_config)(struct ufs_hba *hba); 342 + int (*get_outstanding_cqs)(struct ufs_hba *hba, 343 + unsigned long *ocqs); 344 + int (*config_esi)(struct ufs_hba *hba); 348 345 }; 349 346 350 347 /* clock gating state */ ··· 583 566 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13, 584 567 585 568 /* 586 - * This quirk allows only sg entries aligned with page size. 569 + * Align DMA SG entries on a 4 KiB boundary. 587 570 */ 588 - UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE = 1 << 14, 571 + UFSHCD_QUIRK_4KB_DMA_ALIGNMENT = 1 << 14, 589 572 590 573 /* 591 574 * This quirk needs to be enabled if the host controller does not ··· 610 593 * auto-hibernate capability but it's FASTAUTO only. 611 594 */ 612 595 UFSHCD_QUIRK_HIBERN_FASTAUTO = 1 << 18, 596 + 597 + /* 598 + * This quirk needs to be enabled if the host controller needs 599 + * to reinit the device after switching to maximum gear. 600 + */ 601 + UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH = 1 << 19, 613 602 }; 614 603 615 604 enum ufshcd_caps { ··· 747 724 }; 748 725 749 726 /** 727 + * struct ufshcd_res_info_t - MCQ related resource regions 728 + * 729 + * @name: resource name 730 + * @resource: pointer to resource region 731 + * @base: register base address 732 + */ 733 + struct ufshcd_res_info { 734 + const char *name; 735 + struct resource *resource; 736 + void __iomem *base; 737 + }; 738 + 739 + enum ufshcd_res { 740 + RES_UFS, 741 + RES_MCQ, 742 + RES_MCQ_SQD, 743 + RES_MCQ_SQIS, 744 + RES_MCQ_CQD, 745 + RES_MCQ_CQIS, 746 + RES_MCQ_VS, 747 + RES_MAX, 748 + }; 749 + 750 + /** 751 + * struct ufshcd_mcq_opr_info_t - Operation and Runtime registers 752 + * 753 + * @offset: Doorbell Address Offset 754 + * @stride: Steps proportional to queue [0...31] 755 + * @base: base address 756 + */ 757 + struct ufshcd_mcq_opr_info_t { 758 + unsigned long offset; 759 + unsigned long stride; 760 + void __iomem *base; 761 + }; 762 + 763 + enum ufshcd_mcq_opr { 764 + OPR_SQD, 765 + OPR_SQIS, 766 + OPR_CQD, 767 + OPR_CQIS, 768 + OPR_MAX, 769 + }; 770 + 771 + /** 750 772 * struct ufs_hba - per adapter private structure 751 773 * @mmio_base: UFSHCI base register address 752 774 * @ucdl_base_addr: UFS Command Descriptor base address ··· 815 747 * @outstanding_lock: Protects @outstanding_reqs. 816 748 * @outstanding_reqs: Bits representing outstanding transfer requests 817 749 * @capabilities: UFS Controller Capabilities 750 + * @mcq_capabilities: UFS Multi Circular Queue capabilities 818 751 * @nutrs: Transfer Request Queue depth supported by controller 819 752 * @nutmrs: Task Management Queue depth supported by controller 820 753 * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock. ··· 823 754 * @vops: pointer to variant specific operations 824 755 * @vps: pointer to variant specific parameters 825 756 * @priv: pointer to variant specific private data 757 + * @sg_entry_size: size of struct ufshcd_sg_entry (may include variant fields) 826 758 * @irq: Irq number of the controller 827 759 * @is_irq_enabled: whether or not the UFS controller interrupt is enabled. 828 760 * @dev_ref_clk_freq: reference clock frequency ··· 899 829 * ee_ctrl_mask 900 830 * @luns_avail: number of regular and well known LUNs supported by the UFS 901 831 * device 832 + * @nr_hw_queues: number of hardware queues configured 833 + * @nr_queues: number of Queues of different queue types 902 834 * @complete_put: whether or not to call ufshcd_rpm_put() from inside 903 835 * ufshcd_resume_complete() 836 + * @ext_iid_sup: is EXT_IID is supported by UFSHC 837 + * @mcq_sup: is mcq supported by UFSHC 838 + * @mcq_enabled: is mcq ready to accept requests 839 + * @res: array of resource info of MCQ registers 840 + * @mcq_base: Multi circular queue registers base address 841 + * @uhq: array of supported hardware queues 842 + * @dev_cmd_queue: Queue for issuing device management commands 904 843 */ 905 844 struct ufs_hba { 906 845 void __iomem *mmio_base; ··· 951 872 952 873 u32 capabilities; 953 874 int nutrs; 875 + u32 mcq_capabilities; 954 876 int nutmrs; 955 877 u32 reserved_slot; 956 878 u32 ufs_version; 957 879 const struct ufs_hba_variant_ops *vops; 958 880 struct ufs_hba_variant_params *vps; 959 881 void *priv; 882 + #ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE 883 + size_t sg_entry_size; 884 + #endif 960 885 unsigned int irq; 961 886 bool is_irq_enabled; 962 887 enum ufs_ref_clk_freq dev_ref_clk_freq; ··· 1037 954 1038 955 struct mutex wb_mutex; 1039 956 struct rw_semaphore clk_scaling_lock; 1040 - unsigned char desc_size[QUERY_DESC_IDN_MAX]; 1041 957 atomic_t scsi_block_reqs_cnt; 1042 958 1043 959 struct device bsg_dev; ··· 1061 979 u32 debugfs_ee_rate_limit_ms; 1062 980 #endif 1063 981 u32 luns_avail; 982 + unsigned int nr_hw_queues; 983 + unsigned int nr_queues[HCTX_MAX_TYPES]; 1064 984 bool complete_put; 985 + bool ext_iid_sup; 986 + bool scsi_host_added; 987 + bool mcq_sup; 988 + bool mcq_enabled; 989 + struct ufshcd_res_info res[RES_MAX]; 990 + void __iomem *mcq_base; 991 + struct ufs_hw_queue *uhq; 992 + struct ufs_hw_queue *dev_cmd_queue; 993 + struct ufshcd_mcq_opr_info_t mcq_opr[OPR_MAX]; 1065 994 }; 995 + 996 + /** 997 + * struct ufs_hw_queue - per hardware queue structure 998 + * @mcq_sq_head: base address of submission queue head pointer 999 + * @mcq_sq_tail: base address of submission queue tail pointer 1000 + * @mcq_cq_head: base address of completion queue head pointer 1001 + * @mcq_cq_tail: base address of completion queue tail pointer 1002 + * @sqe_base_addr: submission queue entry base address 1003 + * @sqe_dma_addr: submission queue dma address 1004 + * @cqe_base_addr: completion queue base address 1005 + * @cqe_dma_addr: completion queue dma address 1006 + * @max_entries: max number of slots in this hardware queue 1007 + * @id: hardware queue ID 1008 + * @sq_tp_slot: current slot to which SQ tail pointer is pointing 1009 + * @sq_lock: serialize submission queue access 1010 + * @cq_tail_slot: current slot to which CQ tail pointer is pointing 1011 + * @cq_head_slot: current slot to which CQ head pointer is pointing 1012 + * @cq_lock: Synchronize between multiple polling instances 1013 + */ 1014 + struct ufs_hw_queue { 1015 + void __iomem *mcq_sq_head; 1016 + void __iomem *mcq_sq_tail; 1017 + void __iomem *mcq_cq_head; 1018 + void __iomem *mcq_cq_tail; 1019 + 1020 + void *sqe_base_addr; 1021 + dma_addr_t sqe_dma_addr; 1022 + struct cq_entry *cqe_base_addr; 1023 + dma_addr_t cqe_dma_addr; 1024 + u32 max_entries; 1025 + u32 id; 1026 + u32 sq_tail_slot; 1027 + spinlock_t sq_lock; 1028 + u32 cq_tail_slot; 1029 + u32 cq_head_slot; 1030 + spinlock_t cq_lock; 1031 + }; 1032 + 1033 + static inline bool is_mcq_enabled(struct ufs_hba *hba) 1034 + { 1035 + return hba->mcq_enabled; 1036 + } 1037 + 1038 + #ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE 1039 + static inline size_t ufshcd_sg_entry_size(const struct ufs_hba *hba) 1040 + { 1041 + return hba->sg_entry_size; 1042 + } 1043 + 1044 + static inline void ufshcd_set_sg_entry_size(struct ufs_hba *hba, size_t sg_entry_size) 1045 + { 1046 + WARN_ON_ONCE(sg_entry_size < sizeof(struct ufshcd_sg_entry)); 1047 + hba->sg_entry_size = sg_entry_size; 1048 + } 1049 + #else 1050 + static inline size_t ufshcd_sg_entry_size(const struct ufs_hba *hba) 1051 + { 1052 + return sizeof(struct ufshcd_sg_entry); 1053 + } 1054 + 1055 + #define ufshcd_set_sg_entry_size(hba, sg_entry_size) \ 1056 + ({ (void)(hba); BUILD_BUG_ON(sg_entry_size != sizeof(struct ufshcd_sg_entry)); }) 1057 + #endif 1058 + 1059 + static inline size_t sizeof_utp_transfer_cmd_desc(const struct ufs_hba *hba) 1060 + { 1061 + return sizeof(struct utp_transfer_cmd_desc) + SG_ALL * ufshcd_sg_entry_size(hba); 1062 + } 1066 1063 1067 1064 /* Returns true if clocks can be gated. Otherwise false */ 1068 1065 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba) ··· 1198 1037 return hba->caps & UFSHCD_CAP_WB_WITH_CLK_SCALING; 1199 1038 } 1200 1039 1040 + #define ufsmcq_writel(hba, val, reg) \ 1041 + writel((val), (hba)->mcq_base + (reg)) 1042 + #define ufsmcq_readl(hba, reg) \ 1043 + readl((hba)->mcq_base + (reg)) 1044 + 1045 + #define ufsmcq_writelx(hba, val, reg) \ 1046 + writel_relaxed((val), (hba)->mcq_base + (reg)) 1047 + #define ufsmcq_readlx(hba, reg) \ 1048 + readl_relaxed((hba)->mcq_base + (reg)) 1049 + 1201 1050 #define ufshcd_writel(hba, val, reg) \ 1202 1051 writel((val), (hba)->mmio_base + (reg)) 1203 1052 #define ufshcd_readl(hba, reg) \ ··· 1244 1073 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val); 1245 1074 void ufshcd_hba_stop(struct ufs_hba *hba); 1246 1075 void ufshcd_schedule_eh_work(struct ufs_hba *hba); 1076 + void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i); 1077 + unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba, 1078 + struct ufs_hw_queue *hwq); 1079 + void ufshcd_mcq_enable_esi(struct ufs_hba *hba); 1080 + void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg); 1247 1081 1248 1082 /** 1249 1083 * ufshcd_set_variant - set variant specific data to the hba ··· 1278 1102 #ifdef CONFIG_PM_SLEEP 1279 1103 extern int ufshcd_system_suspend(struct device *dev); 1280 1104 extern int ufshcd_system_resume(struct device *dev); 1105 + extern int ufshcd_system_freeze(struct device *dev); 1106 + extern int ufshcd_system_thaw(struct device *dev); 1107 + extern int ufshcd_system_restore(struct device *dev); 1281 1108 #endif 1282 1109 extern int ufshcd_shutdown(struct ufs_hba *hba); 1110 + 1283 1111 extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba, 1284 1112 int agreed_gear, 1285 1113 int adapt_val); ··· 1368 1188 1369 1189 void ufshcd_clkgate_delay_set(struct device *dev, unsigned long value); 1370 1190 1371 - void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id, 1372 - int *desc_length); 1373 - 1374 1191 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba); 1375 1192 1376 1193 int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg); ··· 1380 1203 int msgcode, 1381 1204 u8 *desc_buff, int *buff_len, 1382 1205 enum query_opcode desc_op); 1383 - 1206 + int ufshcd_advanced_rpmb_req_handler(struct ufs_hba *hba, struct utp_upiu_req *req_upiu, 1207 + struct utp_upiu_req *rsp_upiu, struct ufs_ehs *ehs_req, 1208 + struct ufs_ehs *ehs_rsp, int sg_cnt, 1209 + struct scatterlist *sg_list, enum dma_data_direction dir); 1384 1210 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable); 1385 1211 int ufshcd_wb_toggle_buf_flush(struct ufs_hba *hba, bool enable); 1386 1212 int ufshcd_suspend_prepare(struct device *dev);
+74 -2
include/ufs/ufshci.h
··· 22 22 /* UFSHCI Registers */ 23 23 enum { 24 24 REG_CONTROLLER_CAPABILITIES = 0x00, 25 + REG_MCQCAP = 0x04, 25 26 REG_UFS_VERSION = 0x08, 26 27 REG_CONTROLLER_DEV_ID = 0x10, 27 28 REG_CONTROLLER_PROD_ID = 0x14, ··· 57 56 REG_UFS_CCAP = 0x100, 58 57 REG_UFS_CRYPTOCAP = 0x104, 59 58 59 + REG_UFS_MEM_CFG = 0x300, 60 + REG_UFS_MCQ_CFG = 0x380, 61 + REG_UFS_ESILBA = 0x384, 62 + REG_UFS_ESIUBA = 0x388, 60 63 UFSHCI_CRYPTO_REG_SPACE_SIZE = 0x400, 61 64 }; 62 65 ··· 68 63 enum { 69 64 MASK_TRANSFER_REQUESTS_SLOTS = 0x0000001F, 70 65 MASK_TASK_MANAGEMENT_REQUEST_SLOTS = 0x00070000, 66 + MASK_EHSLUTRD_SUPPORTED = 0x00400000, 71 67 MASK_AUTO_HIBERN8_SUPPORT = 0x00800000, 72 68 MASK_64_ADDRESSING_SUPPORT = 0x01000000, 73 69 MASK_OUT_OF_ORDER_DATA_DELIVERY_SUPPORT = 0x02000000, 74 70 MASK_UIC_DME_TEST_MODE_SUPPORT = 0x04000000, 75 71 MASK_CRYPTO_SUPPORT = 0x10000000, 72 + MASK_MCQ_SUPPORT = 0x40000000, 73 + }; 74 + 75 + /* MCQ capability mask */ 76 + enum { 77 + MASK_EXT_IID_SUPPORT = 0x00000400, 78 + }; 79 + 80 + enum { 81 + REG_SQATTR = 0x0, 82 + REG_SQLBA = 0x4, 83 + REG_SQUBA = 0x8, 84 + REG_SQDAO = 0xC, 85 + REG_SQISAO = 0x10, 86 + 87 + REG_CQATTR = 0x20, 88 + REG_CQLBA = 0x24, 89 + REG_CQUBA = 0x28, 90 + REG_CQDAO = 0x2C, 91 + REG_CQISAO = 0x30, 92 + }; 93 + 94 + enum { 95 + REG_SQHP = 0x0, 96 + REG_SQTP = 0x4, 97 + }; 98 + 99 + enum { 100 + REG_CQHP = 0x0, 101 + REG_CQTP = 0x4, 102 + }; 103 + 104 + enum { 105 + REG_CQIS = 0x0, 106 + REG_CQIE = 0x4, 76 107 }; 77 108 78 109 #define UFS_MASK(mask, offset) ((mask) << (offset)) ··· 167 126 #define CONTROLLER_FATAL_ERROR 0x10000 168 127 #define SYSTEM_BUS_FATAL_ERROR 0x20000 169 128 #define CRYPTO_ENGINE_FATAL_ERROR 0x40000 129 + #define MCQ_CQ_EVENT_STATUS 0x100000 170 130 171 131 #define UFSHCD_UIC_HIBERN8_MASK (UIC_HIBERNATE_ENTER |\ 172 132 UIC_HIBERNATE_EXIT) ··· 264 222 265 223 /* UTMRLRSR - UTP Task Management Request Run-Stop Register 80h */ 266 224 #define UTP_TASK_REQ_LIST_RUN_STOP_BIT 0x1 225 + 226 + /* CQISy - CQ y Interrupt Status Register */ 227 + #define UFSHCD_MCQ_CQIS_TAIL_ENT_PUSH_STS 0x1 267 228 268 229 /* UICCMD - UIC Command */ 269 230 #define COMMAND_OPCODE_MASK 0xFF ··· 467 422 __le64 addr; 468 423 __le32 reserved; 469 424 __le32 size; 425 + /* 426 + * followed by variant-specific fields if 427 + * CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE has been defined. 428 + */ 470 429 }; 471 430 472 431 /** 473 432 * struct utp_transfer_cmd_desc - UTP Command Descriptor (UCD) 474 433 * @command_upiu: Command UPIU Frame address 475 434 * @response_upiu: Response UPIU Frame address 476 - * @prd_table: Physical Region Descriptor 435 + * @prd_table: Physical Region Descriptor: an array of SG_ALL struct 436 + * ufshcd_sg_entry's. Variant-specific fields may be present after each. 477 437 */ 478 438 struct utp_transfer_cmd_desc { 479 439 u8 command_upiu[ALIGNED_UPIU_SIZE]; 480 440 u8 response_upiu[ALIGNED_UPIU_SIZE]; 481 - struct ufshcd_sg_entry prd_table[SG_ALL]; 441 + u8 prd_table[]; 482 442 }; 483 443 484 444 /** ··· 527 477 __le16 prd_table_length; 528 478 __le16 prd_table_offset; 529 479 }; 480 + 481 + /* MCQ Completion Queue Entry */ 482 + struct cq_entry { 483 + /* DW 0-1 */ 484 + __le64 command_desc_base_addr; 485 + 486 + /* DW 2 */ 487 + __le16 response_upiu_length; 488 + __le16 response_upiu_offset; 489 + 490 + /* DW 3 */ 491 + __le16 prd_table_length; 492 + __le16 prd_table_offset; 493 + 494 + /* DW 4 */ 495 + __le32 status; 496 + 497 + /* DW 5-7 */ 498 + __le32 reserved[3]; 499 + }; 500 + 501 + static_assert(sizeof(struct cq_entry) == 32); 530 502 531 503 /* 532 504 * UTMRD structure.
-1
include/ufs/unipro.h
··· 141 141 #define PA_SAVECONFIGTIME 0x15A4 142 142 #define PA_RXHSUNTERMCAP 0x15A5 143 143 #define PA_RXLSTERMCAP 0x15A6 144 - #define PA_GRANULARITY 0x15AA 145 144 #define PA_HIBERN8TIME 0x15A7 146 145 #define PA_LOCALVERINFO 0x15A9 147 146 #define PA_GRANULARITY 0x15AA