Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc-merge

+3461 -946
+2 -5
arch/powerpc/Makefile
··· 139 139 140 140 drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/ 141 141 142 - defaultimage-$(CONFIG_PPC32) := zImage 142 + # Default to zImage, override when needed 143 + defaultimage-y := zImage 143 144 defaultimage-$(CONFIG_PPC_ISERIES) := vmlinux 144 - defaultimage-$(CONFIG_PPC_PSERIES) := zImage 145 145 KBUILD_IMAGE := $(defaultimage-y) 146 146 all: $(KBUILD_IMAGE) 147 147 148 148 CPPFLAGS_vmlinux.lds := -Upowerpc 149 - 150 - # All the instructions talk about "make bzImage". 151 - bzImage: zImage 152 149 153 150 BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm uImage 154 151
+34 -15
arch/powerpc/boot/Makefile
··· 25 25 BOOTCFLAGS := $(HOSTCFLAGS) -fno-builtin -nostdinc -isystem \ 26 26 $(shell $(CROSS32CC) -print-file-name=include) -fPIC 27 27 BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc 28 - BOOTLFLAGS := -T $(srctree)/$(src)/zImage.lds 29 28 OBJCOPYFLAGS := contents,alloc,load,readonly,data 29 + OBJCOPY_COFF_ARGS := -O aixcoff-rs6000 --set-start 0x500000 30 30 31 31 zlib := infblock.c infcodes.c inffast.c inflate.c inftrees.c infutil.c 32 32 zlibheader := infblock.h infcodes.h inffast.h inftrees.h infutil.h ··· 35 35 $(addprefix $(obj)/,$(zlib) main.o): $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader)) 36 36 #$(addprefix $(obj)/,main.o): $(addprefix $(obj)/,zlib.h) 37 37 38 - src-boot := string.S prom.c main.c div64.S crt0.S 38 + src-boot := crt0.S string.S prom.c stdio.c main.c div64.S 39 39 src-boot += $(zlib) 40 40 src-boot := $(addprefix $(obj)/, $(src-boot)) 41 41 obj-boot := $(addsuffix .o, $(basename $(src-boot))) ··· 70 70 cmd_bootas = $(CROSS32CC) -Wp,-MD,$(depfile) $(BOOTAFLAGS) -c -o $@ $< 71 71 72 72 quiet_cmd_bootld = BOOTLD $@ 73 - cmd_bootld = $(CROSS32LD) $(BOOTLFLAGS) -o $@ $(2) 73 + cmd_bootld = $(CROSS32LD) -T $(srctree)/$(src)/$(3) -o $@ $(2) 74 74 75 75 $(patsubst %.c,%.o, $(filter %.c, $(src-boot))): %.o: %.c 76 76 $(call if_changed_dep,bootcc) ··· 87 87 src-sec = $(foreach section, $(1), $(patsubst %,$(obj)/kernel-%.c, $(section))) 88 88 gz-sec = $(foreach section, $(1), $(patsubst %,$(obj)/kernel-%.gz, $(section))) 89 89 90 - hostprogs-y := addnote addRamDisk 91 - targets += zImage.vmode zImage.initrd.vmode zImage zImage.initrd \ 92 - $(patsubst $(obj)/%,%, $(call obj-sec, $(required) $(initrd))) \ 93 - $(patsubst $(obj)/%,%, $(call src-sec, $(required) $(initrd))) \ 94 - $(patsubst $(obj)/%,%, $(call gz-sec, $(required) $(initrd))) \ 95 - vmlinux.initrd 90 + hostprogs-y := addnote addRamDisk hack-coff 91 + 92 + targets += zImage.vmode zImage.initrd.vmode zImage zImage.initrd \ 93 + zImage.coff zImage.initrd.coff \ 94 + $(patsubst $(obj)/%,%, $(call obj-sec, $(required) $(initrd))) \ 95 + $(patsubst $(obj)/%,%, $(call src-sec, $(required) $(initrd))) \ 96 + $(patsubst $(obj)/%,%, $(call gz-sec, $(required) $(initrd))) \ 97 + vmlinux.initrd 96 98 extra-y := initrd.o 97 99 98 100 quiet_cmd_ramdisk = RAMDISK $@ ··· 116 114 quiet_cmd_addnote = ADDNOTE $@ 117 115 cmd_addnote = $(obj)/addnote $@ 118 116 117 + quiet_cmd_gencoff = COFF $@ 118 + cmd_gencoff = $(OBJCOPY) $(OBJCOPY_COFF_ARGS) $@ && \ 119 + $(obj)/hack-coff $@ 120 + 119 121 $(call gz-sec, $(required)): $(obj)/kernel-%.gz: % 120 122 $(call if_changed,gzip) 121 123 ··· 133 127 $(call if_changed_dep,bootcc) 134 128 $(call cmd,addsection) 135 129 136 - $(obj)/zImage.vmode: obj-boot += $(call obj-sec, $(required)) 130 + $(obj)/zImage.vmode $(obj)/zImage.coff: obj-boot += $(call obj-sec, $(required)) 137 131 $(obj)/zImage.vmode: $(call obj-sec, $(required)) $(obj-boot) $(srctree)/$(src)/zImage.lds 138 - $(call cmd,bootld,$(obj-boot)) 132 + $(call cmd,bootld,$(obj-boot),zImage.lds) 139 133 140 - $(obj)/zImage.initrd.vmode: obj-boot += $(call obj-sec, $(required) $(initrd)) 134 + $(obj)/zImage.initrd.vmode $(obj)/zImage.initrd.coff: obj-boot += $(call obj-sec, $(required) $(initrd)) 141 135 $(obj)/zImage.initrd.vmode: $(call obj-sec, $(required) $(initrd)) $(obj-boot) $(srctree)/$(src)/zImage.lds 142 - $(call cmd,bootld,$(obj-boot)) 136 + $(call cmd,bootld,$(obj-boot),zImage.lds) 143 137 144 - $(obj)/zImage: $(obj)/zImage.vmode $(obj)/addnote 138 + # For 32-bit powermacs, build the COFF images as well as the ELF images. 139 + coffimage-$(CONFIG_PPC_PMAC)-$(CONFIG_PPC32) := $(obj)/zImage.coff 140 + coffrdimg-$(CONFIG_PPC_PMAC)-$(CONFIG_PPC32) := $(obj)/zImage.initrd.coff 141 + 142 + $(obj)/zImage: $(obj)/zImage.vmode $(obj)/addnote $(coffimage-y-y) 145 143 @cp -f $< $@ 146 144 $(call if_changed,addnote) 147 145 148 - $(obj)/zImage.initrd: $(obj)/zImage.initrd.vmode $(obj)/addnote 146 + $(obj)/zImage.initrd: $(obj)/zImage.initrd.vmode $(obj)/addnote $(coffrdimg-y-y) 149 147 @cp -f $< $@ 150 148 $(call if_changed,addnote) 149 + 150 + $(obj)/zImage.coff: $(call obj-sec, $(required)) $(obj-boot) $(srctree)/$(src)/zImage.coff.lds $(obj)/hack-coff 151 + $(call cmd,bootld,$(obj-boot),zImage.coff.lds) 152 + $(call cmd,gencoff) 153 + 154 + $(obj)/zImage.initrd.coff: $(call obj-sec, $(required) $(initrd)) $(obj-boot) \ 155 + $(srctree)/$(src)/zImage.coff.lds $(obj)/hack-coff 156 + $(call cmd,bootld,$(obj-boot),zImage.coff.lds) 157 + $(call cmd,gencoff) 151 158 152 159 #----------------------------------------------------------- 153 160 # build u-boot images
+13 -8
arch/powerpc/boot/crt0.S
··· 12 12 #include "ppc_asm.h" 13 13 14 14 .text 15 + /* a procedure descriptor used when booting this as a COFF file */ 16 + _zimage_start_opd: 17 + .long _zimage_start, 0, 0, 0 18 + 15 19 .globl _zimage_start 16 20 _zimage_start: 21 + /* Work out the offset between the address we were linked at 22 + and the address where we're running. */ 17 23 bl 1f 18 - 19 - 1: 20 - mflr r0 24 + 1: mflr r0 21 25 lis r9,1b@ha 22 26 addi r9,r9,1b@l 23 27 subf. r0,r9,r0 24 - beq 3f 28 + beq 3f /* if running at same address as linked */ 25 29 30 + /* The .got2 section contains a list of addresses, so add 31 + the address offset onto each entry. */ 26 32 lis r9,__got2_start@ha 27 33 addi r9,r9,__got2_start@l 28 34 lis r8,__got2_end@ha ··· 38 32 srwi. r8,r8,2 39 33 mtctr r8 40 34 add r9,r0,r9 41 - 2: 42 - lwz r8,0(r9) 35 + 2: lwz r8,0(r9) 43 36 add r8,r8,r0 44 37 stw r8,0(r9) 45 38 addi r9,r9,4 46 39 bdnz 2b 47 40 48 - 3: 49 - lis r9,_start@h 41 + /* Do a cache flush for our text, in case OF didn't */ 42 + 3: lis r9,_start@h 50 43 add r9,r0,r9 51 44 lis r8,_etext@ha 52 45 addi r8,r8,_etext@l
+84
arch/powerpc/boot/hack-coff.c
··· 1 + /* 2 + * hack-coff.c - hack the header of an xcoff file to fill in 3 + * a few fields needed by the Open Firmware xcoff loader on 4 + * Power Macs but not initialized by objcopy. 5 + * 6 + * Copyright (C) Paul Mackerras 1997. 7 + * 8 + * This program is free software; you can redistribute it and/or 9 + * modify it under the terms of the GNU General Public License 10 + * as published by the Free Software Foundation; either version 11 + * 2 of the License, or (at your option) any later version. 12 + */ 13 + #include <stdio.h> 14 + #include <stdlib.h> 15 + #include <unistd.h> 16 + #include <fcntl.h> 17 + #include <string.h> 18 + #include "rs6000.h" 19 + 20 + #define AOUT_MAGIC 0x010b 21 + 22 + #define get_16be(x) ((((unsigned char *)(x))[0] << 8) \ 23 + + ((unsigned char *)(x))[1]) 24 + #define put_16be(x, v) (((unsigned char *)(x))[0] = (v) >> 8, \ 25 + ((unsigned char *)(x))[1] = (v) & 0xff) 26 + #define get_32be(x) ((((unsigned char *)(x))[0] << 24) \ 27 + + (((unsigned char *)(x))[1] << 16) \ 28 + + (((unsigned char *)(x))[2] << 8) \ 29 + + ((unsigned char *)(x))[3]) 30 + 31 + int 32 + main(int ac, char **av) 33 + { 34 + int fd; 35 + int i, nsect; 36 + int aoutsz; 37 + struct external_filehdr fhdr; 38 + AOUTHDR aout; 39 + struct external_scnhdr shdr; 40 + 41 + if (ac != 2) { 42 + fprintf(stderr, "Usage: hack-coff coff-file\n"); 43 + exit(1); 44 + } 45 + if ((fd = open(av[1], 2)) == -1) { 46 + perror(av[2]); 47 + exit(1); 48 + } 49 + if (read(fd, &fhdr, sizeof(fhdr)) != sizeof(fhdr)) 50 + goto readerr; 51 + i = get_16be(fhdr.f_magic); 52 + if (i != U802TOCMAGIC && i != U802WRMAGIC && i != U802ROMAGIC) { 53 + fprintf(stderr, "%s: not an xcoff file\n", av[1]); 54 + exit(1); 55 + } 56 + aoutsz = get_16be(fhdr.f_opthdr); 57 + if (read(fd, &aout, aoutsz) != aoutsz) 58 + goto readerr; 59 + nsect = get_16be(fhdr.f_nscns); 60 + for (i = 0; i < nsect; ++i) { 61 + if (read(fd, &shdr, sizeof(shdr)) != sizeof(shdr)) 62 + goto readerr; 63 + if (strcmp(shdr.s_name, ".text") == 0) { 64 + put_16be(aout.o_snentry, i+1); 65 + put_16be(aout.o_sntext, i+1); 66 + } else if (strcmp(shdr.s_name, ".data") == 0) { 67 + put_16be(aout.o_sndata, i+1); 68 + } else if (strcmp(shdr.s_name, ".bss") == 0) { 69 + put_16be(aout.o_snbss, i+1); 70 + } 71 + } 72 + put_16be(aout.magic, AOUT_MAGIC); 73 + if (lseek(fd, (long) sizeof(struct external_filehdr), 0) == -1 74 + || write(fd, &aout, aoutsz) != aoutsz) { 75 + fprintf(stderr, "%s: write error\n", av[1]); 76 + exit(1); 77 + } 78 + close(fd); 79 + exit(0); 80 + 81 + readerr: 82 + fprintf(stderr, "%s: read error or file too short\n", av[1]); 83 + exit(1); 84 + }
+22 -24
arch/powerpc/boot/main.c
··· 21 21 22 22 23 23 /* Value picked to match that used by yaboot */ 24 - #define PROG_START 0x01400000 25 - #define RAM_END (512<<20) // Fixme: use OF */ 24 + #define PROG_START 0x01400000 /* only used on 64-bit systems */ 25 + #define RAM_END (512<<20) /* Fixme: use OF */ 26 26 #define ONE_MB 0x100000 27 27 28 28 extern char _start[]; ··· 160 160 elfoffset = (unsigned long)elf64ph->p_offset; 161 161 vmlinux.size = (unsigned long)elf64ph->p_filesz + elfoffset; 162 162 vmlinux.memsize = (unsigned long)elf64ph->p_memsz + elfoffset; 163 + 164 + #if defined(PROG_START) 165 + /* 166 + * Maintain a "magic" minimum address. This keeps some older 167 + * firmware platforms running. 168 + */ 169 + 170 + if (claim_base < PROG_START) 171 + claim_base = PROG_START; 172 + #endif 173 + 163 174 return 1; 164 175 } 165 176 ··· 217 206 exit(); 218 207 if (getprop(chosen_handle, "stdout", &stdout, sizeof(stdout)) != 4) 219 208 exit(); 220 - stderr = stdout; 221 - if (getprop(chosen_handle, "stdin", &stdin, sizeof(stdin)) != 4) 222 - exit(); 223 209 224 210 printf("\n\rzImage starting: loaded at 0x%p (sp: 0x%p)\n\r", _start, sp); 211 + 212 + /* 213 + * The first available claim_base must be above the end of the 214 + * the loaded kernel wrapper file (_start to _end includes the 215 + * initrd image if it is present) and rounded up to a nice 216 + * 1 MB boundary for good measure. 217 + */ 218 + 219 + claim_base = _ALIGN_UP((unsigned long)_end, ONE_MB); 225 220 226 221 vmlinuz.addr = (unsigned long)_vmlinux_start; 227 222 vmlinuz.size = (unsigned long)(_vmlinux_end - _vmlinux_start); ··· 244 227 printf("Error: not a valid PPC32 or PPC64 ELF file!\n\r"); 245 228 exit(); 246 229 } 247 - 248 - /* 249 - * The first available claim_base must be above the end of the 250 - * the loaded kernel wrapper file (_start to _end includes the 251 - * initrd image if it is present) and rounded up to a nice 252 - * 1 MB boundary for good measure. 253 - */ 254 - 255 - claim_base = _ALIGN_UP((unsigned long)_end, ONE_MB); 256 - 257 - #if defined(PROG_START) 258 - /* 259 - * Maintain a "magic" minimum address. This keeps some older 260 - * firmware platforms running. 261 - */ 262 - 263 - if (claim_base < PROG_START) 264 - claim_base = PROG_START; 265 - #endif 266 230 267 231 /* We need to claim the memsize plus the file offset since gzip 268 232 * will expand the header (file offset), then the kernel, then
+111 -445
arch/powerpc/boot/prom.c
··· 13 13 #include "prom.h" 14 14 15 15 int (*prom)(void *); 16 + phandle chosen_handle; 17 + ihandle stdout; 16 18 17 - void *chosen_handle; 18 - 19 - void *stdin; 20 - void *stdout; 21 - void *stderr; 22 - 23 - 24 - int 25 - write(void *handle, void *ptr, int nb) 19 + int call_prom(const char *service, int nargs, int nret, ...) 26 20 { 21 + int i; 27 22 struct prom_args { 28 - char *service; 23 + const char *service; 29 24 int nargs; 30 25 int nret; 31 - void *ihandle; 32 - void *addr; 33 - int len; 34 - int actual; 26 + unsigned int args[12]; 35 27 } args; 28 + va_list list; 36 29 37 - args.service = "write"; 38 - args.nargs = 3; 39 - args.nret = 1; 40 - args.ihandle = handle; 41 - args.addr = ptr; 42 - args.len = nb; 43 - args.actual = -1; 44 - (*prom)(&args); 45 - return args.actual; 30 + args.service = service; 31 + args.nargs = nargs; 32 + args.nret = nret; 33 + 34 + va_start(list, nret); 35 + for (i = 0; i < nargs; i++) 36 + args.args[i] = va_arg(list, unsigned int); 37 + va_end(list); 38 + 39 + for (i = 0; i < nret; i++) 40 + args.args[nargs+i] = 0; 41 + 42 + if (prom(&args) < 0) 43 + return -1; 44 + 45 + return (nret > 0)? args.args[nargs]: 0; 46 46 } 47 47 48 - int 49 - read(void *handle, void *ptr, int nb) 48 + int call_prom_ret(const char *service, int nargs, int nret, 49 + unsigned int *rets, ...) 50 50 { 51 + int i; 51 52 struct prom_args { 52 - char *service; 53 + const char *service; 53 54 int nargs; 54 55 int nret; 55 - void *ihandle; 56 - void *addr; 57 - int len; 58 - int actual; 56 + unsigned int args[12]; 59 57 } args; 58 + va_list list; 60 59 61 - args.service = "read"; 62 - args.nargs = 3; 63 - args.nret = 1; 64 - args.ihandle = handle; 65 - args.addr = ptr; 66 - args.len = nb; 67 - args.actual = -1; 68 - (*prom)(&args); 69 - return args.actual; 60 + args.service = service; 61 + args.nargs = nargs; 62 + args.nret = nret; 63 + 64 + va_start(list, rets); 65 + for (i = 0; i < nargs; i++) 66 + args.args[i] = va_arg(list, unsigned int); 67 + va_end(list); 68 + 69 + for (i = 0; i < nret; i++) 70 + args.args[nargs+i] = 0; 71 + 72 + if (prom(&args) < 0) 73 + return -1; 74 + 75 + if (rets != (void *) 0) 76 + for (i = 1; i < nret; ++i) 77 + rets[i-1] = args.args[nargs+i]; 78 + 79 + return (nret > 0)? args.args[nargs]: 0; 70 80 } 71 81 72 - void 73 - exit() 82 + int write(void *handle, void *ptr, int nb) 74 83 { 75 - struct prom_args { 76 - char *service; 77 - } args; 78 - 79 - for (;;) { 80 - args.service = "exit"; 81 - (*prom)(&args); 82 - } 84 + return call_prom("write", 3, 1, handle, ptr, nb); 83 85 } 84 86 85 - void 86 - pause(void) 87 - { 88 - struct prom_args { 89 - char *service; 90 - } args; 91 - 92 - args.service = "enter"; 93 - (*prom)(&args); 94 - } 95 - 96 - void * 97 - finddevice(const char *name) 98 - { 99 - struct prom_args { 100 - char *service; 101 - int nargs; 102 - int nret; 103 - const char *devspec; 104 - void *phandle; 105 - } args; 106 - 107 - args.service = "finddevice"; 108 - args.nargs = 1; 109 - args.nret = 1; 110 - args.devspec = name; 111 - args.phandle = (void *) -1; 112 - (*prom)(&args); 113 - return args.phandle; 114 - } 115 - 116 - void * 117 - claim(unsigned long virt, unsigned long size, unsigned long align) 118 - { 119 - struct prom_args { 120 - char *service; 121 - int nargs; 122 - int nret; 123 - unsigned int virt; 124 - unsigned int size; 125 - unsigned int align; 126 - void *ret; 127 - } args; 128 - 129 - args.service = "claim"; 130 - args.nargs = 3; 131 - args.nret = 1; 132 - args.virt = virt; 133 - args.size = size; 134 - args.align = align; 135 - (*prom)(&args); 136 - return args.ret; 137 - } 138 - 139 - int 140 - getprop(void *phandle, const char *name, void *buf, int buflen) 141 - { 142 - struct prom_args { 143 - char *service; 144 - int nargs; 145 - int nret; 146 - void *phandle; 147 - const char *name; 148 - void *buf; 149 - int buflen; 150 - int size; 151 - } args; 152 - 153 - args.service = "getprop"; 154 - args.nargs = 4; 155 - args.nret = 1; 156 - args.phandle = phandle; 157 - args.name = name; 158 - args.buf = buf; 159 - args.buflen = buflen; 160 - args.size = -1; 161 - (*prom)(&args); 162 - return args.size; 163 - } 164 - 165 - int 166 - putc(int c, void *f) 167 - { 168 - char ch = c; 169 - 170 - if (c == '\n') 171 - putc('\r', f); 172 - return write(f, &ch, 1) == 1? c: -1; 173 - } 174 - 175 - int 176 - putchar(int c) 177 - { 178 - return putc(c, stdout); 179 - } 180 - 181 - int 182 - fputs(char *str, void *f) 183 - { 184 - int n = strlen(str); 185 - 186 - return write(f, str, n) == n? 0: -1; 187 - } 188 - 189 - size_t strnlen(const char * s, size_t count) 190 - { 191 - const char *sc; 192 - 193 - for (sc = s; count-- && *sc != '\0'; ++sc) 194 - /* nothing */; 195 - return sc - s; 196 - } 197 - 198 - extern unsigned int __div64_32(unsigned long long *dividend, 199 - unsigned int divisor); 200 - 201 - /* The unnecessary pointer compare is there 202 - * to check for type safety (n must be 64bit) 87 + /* 88 + * Older OF's require that when claiming a specific range of addresses, 89 + * we claim the physical space in the /memory node and the virtual 90 + * space in the chosen mmu node, and then do a map operation to 91 + * map virtual to physical. 203 92 */ 204 - # define do_div(n,base) ({ \ 205 - unsigned int __base = (base); \ 206 - unsigned int __rem; \ 207 - (void)(((typeof((n)) *)0) == ((unsigned long long *)0)); \ 208 - if (((n) >> 32) == 0) { \ 209 - __rem = (unsigned int)(n) % __base; \ 210 - (n) = (unsigned int)(n) / __base; \ 211 - } else \ 212 - __rem = __div64_32(&(n), __base); \ 213 - __rem; \ 214 - }) 93 + static int need_map = -1; 94 + static ihandle chosen_mmu; 95 + static phandle memory; 215 96 216 - static int skip_atoi(const char **s) 97 + /* returns true if s2 is a prefix of s1 */ 98 + static int string_match(const char *s1, const char *s2) 217 99 { 218 - int i, c; 219 - 220 - for (i = 0; '0' <= (c = **s) && c <= '9'; ++*s) 221 - i = i*10 + c - '0'; 222 - return i; 100 + for (; *s2; ++s2) 101 + if (*s1++ != *s2) 102 + return 0; 103 + return 1; 223 104 } 224 105 225 - #define ZEROPAD 1 /* pad with zero */ 226 - #define SIGN 2 /* unsigned/signed long */ 227 - #define PLUS 4 /* show plus */ 228 - #define SPACE 8 /* space if plus */ 229 - #define LEFT 16 /* left justified */ 230 - #define SPECIAL 32 /* 0x */ 231 - #define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */ 232 - 233 - static char * number(char * str, unsigned long long num, int base, int size, int precision, int type) 106 + static int check_of_version(void) 234 107 { 235 - char c,sign,tmp[66]; 236 - const char *digits="0123456789abcdefghijklmnopqrstuvwxyz"; 237 - int i; 108 + phandle oprom, chosen; 109 + char version[64]; 238 110 239 - if (type & LARGE) 240 - digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; 241 - if (type & LEFT) 242 - type &= ~ZEROPAD; 243 - if (base < 2 || base > 36) 111 + oprom = finddevice("/openprom"); 112 + if (oprom == (phandle) -1) 244 113 return 0; 245 - c = (type & ZEROPAD) ? '0' : ' '; 246 - sign = 0; 247 - if (type & SIGN) { 248 - if ((signed long long)num < 0) { 249 - sign = '-'; 250 - num = - (signed long long)num; 251 - size--; 252 - } else if (type & PLUS) { 253 - sign = '+'; 254 - size--; 255 - } else if (type & SPACE) { 256 - sign = ' '; 257 - size--; 114 + if (getprop(oprom, "model", version, sizeof(version)) <= 0) 115 + return 0; 116 + version[sizeof(version)-1] = 0; 117 + printf("OF version = '%s'\r\n", version); 118 + if (!string_match(version, "Open Firmware, 1.") 119 + && !string_match(version, "FirmWorks,3.")) 120 + return 0; 121 + chosen = finddevice("/chosen"); 122 + if (chosen == (phandle) -1) { 123 + chosen = finddevice("/chosen@0"); 124 + if (chosen == (phandle) -1) { 125 + printf("no chosen\n"); 126 + return 0; 258 127 } 259 128 } 260 - if (type & SPECIAL) { 261 - if (base == 16) 262 - size -= 2; 263 - else if (base == 8) 264 - size--; 129 + if (getprop(chosen, "mmu", &chosen_mmu, sizeof(chosen_mmu)) <= 0) { 130 + printf("no mmu\n"); 131 + return 0; 265 132 } 266 - i = 0; 267 - if (num == 0) 268 - tmp[i++]='0'; 269 - else while (num != 0) { 270 - tmp[i++] = digits[do_div(num, base)]; 271 - } 272 - if (i > precision) 273 - precision = i; 274 - size -= precision; 275 - if (!(type&(ZEROPAD+LEFT))) 276 - while(size-->0) 277 - *str++ = ' '; 278 - if (sign) 279 - *str++ = sign; 280 - if (type & SPECIAL) { 281 - if (base==8) 282 - *str++ = '0'; 283 - else if (base==16) { 284 - *str++ = '0'; 285 - *str++ = digits[33]; 133 + memory = (ihandle) call_prom("open", 1, 1, "/memory"); 134 + if (memory == (ihandle) -1) { 135 + memory = (ihandle) call_prom("open", 1, 1, "/memory@0"); 136 + if (memory == (ihandle) -1) { 137 + printf("no memory node\n"); 138 + return 0; 286 139 } 287 140 } 288 - if (!(type & LEFT)) 289 - while (size-- > 0) 290 - *str++ = c; 291 - while (i < precision--) 292 - *str++ = '0'; 293 - while (i-- > 0) 294 - *str++ = tmp[i]; 295 - while (size-- > 0) 296 - *str++ = ' '; 297 - return str; 141 + printf("old OF detected\r\n"); 142 + return 1; 298 143 } 299 144 300 - int vsprintf(char *buf, const char *fmt, va_list args) 145 + void *claim(unsigned long virt, unsigned long size, unsigned long align) 301 146 { 302 - int len; 303 - unsigned long long num; 304 - int i, base; 305 - char * str; 306 - const char *s; 147 + int ret; 148 + unsigned int result; 307 149 308 - int flags; /* flags to number() */ 309 - 310 - int field_width; /* width of output field */ 311 - int precision; /* min. # of digits for integers; max 312 - number of chars for from string */ 313 - int qualifier; /* 'h', 'l', or 'L' for integer fields */ 314 - /* 'z' support added 23/7/1999 S.H. */ 315 - /* 'z' changed to 'Z' --davidm 1/25/99 */ 316 - 150 + if (need_map < 0) 151 + need_map = check_of_version(); 152 + if (align || !need_map) 153 + return (void *) call_prom("claim", 3, 1, virt, size, align); 317 154 318 - for (str=buf ; *fmt ; ++fmt) { 319 - if (*fmt != '%') { 320 - *str++ = *fmt; 321 - continue; 322 - } 323 - 324 - /* process flags */ 325 - flags = 0; 326 - repeat: 327 - ++fmt; /* this also skips first '%' */ 328 - switch (*fmt) { 329 - case '-': flags |= LEFT; goto repeat; 330 - case '+': flags |= PLUS; goto repeat; 331 - case ' ': flags |= SPACE; goto repeat; 332 - case '#': flags |= SPECIAL; goto repeat; 333 - case '0': flags |= ZEROPAD; goto repeat; 334 - } 335 - 336 - /* get field width */ 337 - field_width = -1; 338 - if ('0' <= *fmt && *fmt <= '9') 339 - field_width = skip_atoi(&fmt); 340 - else if (*fmt == '*') { 341 - ++fmt; 342 - /* it's the next argument */ 343 - field_width = va_arg(args, int); 344 - if (field_width < 0) { 345 - field_width = -field_width; 346 - flags |= LEFT; 347 - } 348 - } 349 - 350 - /* get the precision */ 351 - precision = -1; 352 - if (*fmt == '.') { 353 - ++fmt; 354 - if ('0' <= *fmt && *fmt <= '9') 355 - precision = skip_atoi(&fmt); 356 - else if (*fmt == '*') { 357 - ++fmt; 358 - /* it's the next argument */ 359 - precision = va_arg(args, int); 360 - } 361 - if (precision < 0) 362 - precision = 0; 363 - } 364 - 365 - /* get the conversion qualifier */ 366 - qualifier = -1; 367 - if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' || *fmt =='Z') { 368 - qualifier = *fmt; 369 - ++fmt; 370 - } 371 - 372 - /* default base */ 373 - base = 10; 374 - 375 - switch (*fmt) { 376 - case 'c': 377 - if (!(flags & LEFT)) 378 - while (--field_width > 0) 379 - *str++ = ' '; 380 - *str++ = (unsigned char) va_arg(args, int); 381 - while (--field_width > 0) 382 - *str++ = ' '; 383 - continue; 384 - 385 - case 's': 386 - s = va_arg(args, char *); 387 - if (!s) 388 - s = "<NULL>"; 389 - 390 - len = strnlen(s, precision); 391 - 392 - if (!(flags & LEFT)) 393 - while (len < field_width--) 394 - *str++ = ' '; 395 - for (i = 0; i < len; ++i) 396 - *str++ = *s++; 397 - while (len < field_width--) 398 - *str++ = ' '; 399 - continue; 400 - 401 - case 'p': 402 - if (field_width == -1) { 403 - field_width = 2*sizeof(void *); 404 - flags |= ZEROPAD; 405 - } 406 - str = number(str, 407 - (unsigned long) va_arg(args, void *), 16, 408 - field_width, precision, flags); 409 - continue; 410 - 411 - 412 - case 'n': 413 - if (qualifier == 'l') { 414 - long * ip = va_arg(args, long *); 415 - *ip = (str - buf); 416 - } else if (qualifier == 'Z') { 417 - size_t * ip = va_arg(args, size_t *); 418 - *ip = (str - buf); 419 - } else { 420 - int * ip = va_arg(args, int *); 421 - *ip = (str - buf); 422 - } 423 - continue; 424 - 425 - case '%': 426 - *str++ = '%'; 427 - continue; 428 - 429 - /* integer number formats - set up the flags and "break" */ 430 - case 'o': 431 - base = 8; 432 - break; 433 - 434 - case 'X': 435 - flags |= LARGE; 436 - case 'x': 437 - base = 16; 438 - break; 439 - 440 - case 'd': 441 - case 'i': 442 - flags |= SIGN; 443 - case 'u': 444 - break; 445 - 446 - default: 447 - *str++ = '%'; 448 - if (*fmt) 449 - *str++ = *fmt; 450 - else 451 - --fmt; 452 - continue; 453 - } 454 - if (qualifier == 'l') { 455 - num = va_arg(args, unsigned long); 456 - if (flags & SIGN) 457 - num = (signed long) num; 458 - } else if (qualifier == 'Z') { 459 - num = va_arg(args, size_t); 460 - } else if (qualifier == 'h') { 461 - num = (unsigned short) va_arg(args, int); 462 - if (flags & SIGN) 463 - num = (signed short) num; 464 - } else { 465 - num = va_arg(args, unsigned int); 466 - if (flags & SIGN) 467 - num = (signed int) num; 468 - } 469 - str = number(str, num, base, field_width, precision, flags); 470 - } 471 - *str = '\0'; 472 - return str-buf; 473 - } 474 - 475 - int sprintf(char * buf, const char *fmt, ...) 476 - { 477 - va_list args; 478 - int i; 479 - 480 - va_start(args, fmt); 481 - i=vsprintf(buf,fmt,args); 482 - va_end(args); 483 - return i; 484 - } 485 - 486 - static char sprint_buf[1024]; 487 - 488 - int 489 - printf(const char *fmt, ...) 490 - { 491 - va_list args; 492 - int n; 493 - 494 - va_start(args, fmt); 495 - n = vsprintf(sprint_buf, fmt, args); 496 - va_end(args); 497 - write(stdout, sprint_buf, n); 498 - return n; 155 + ret = call_prom_ret("call-method", 5, 2, &result, "claim", memory, 156 + align, size, virt); 157 + if (ret != 0 || result == -1) 158 + return (void *) -1; 159 + ret = call_prom_ret("call-method", 5, 2, &result, "claim", chosen_mmu, 160 + align, size, virt); 161 + /* 0x12 == coherent + read/write */ 162 + ret = call_prom("call-method", 6, 1, "map", chosen_mmu, 163 + 0x12, size, virt, virt); 164 + return (void *) virt; 499 165 }
+27 -11
arch/powerpc/boot/prom.h
··· 1 1 #ifndef _PPC_BOOT_PROM_H_ 2 2 #define _PPC_BOOT_PROM_H_ 3 3 4 - extern int (*prom) (void *); 5 - extern void *chosen_handle; 4 + typedef void *phandle; 5 + typedef void *ihandle; 6 6 7 - extern void *stdin; 8 - extern void *stdout; 9 - extern void *stderr; 7 + extern int (*prom) (void *); 8 + extern phandle chosen_handle; 9 + extern ihandle stdout; 10 + 11 + int call_prom(const char *service, int nargs, int nret, ...); 12 + int call_prom_ret(const char *service, int nargs, int nret, 13 + unsigned int *rets, ...); 10 14 11 15 extern int write(void *handle, void *ptr, int nb); 12 - extern int read(void *handle, void *ptr, int nb); 13 - extern void exit(void); 14 - extern void pause(void); 15 - extern void *finddevice(const char *); 16 - extern void *claim(unsigned long virt, unsigned long size, unsigned long align); 17 - extern int getprop(void *phandle, const char *name, void *buf, int buflen); 16 + extern void *claim(unsigned long virt, unsigned long size, unsigned long aln); 17 + 18 + static inline void exit(void) 19 + { 20 + call_prom("exit", 0, 0); 21 + } 22 + 23 + static inline phandle finddevice(const char *name) 24 + { 25 + return (phandle) call_prom("finddevice", 1, 1, name); 26 + } 27 + 28 + static inline int getprop(void *phandle, const char *name, 29 + void *buf, int buflen) 30 + { 31 + return call_prom("getprop", 4, 1, phandle, name, buf, buflen); 32 + } 33 + 18 34 #endif /* _PPC_BOOT_PROM_H_ */
+243
arch/powerpc/boot/rs6000.h
··· 1 + /* IBM RS/6000 "XCOFF" file definitions for BFD. 2 + Copyright (C) 1990, 1991 Free Software Foundation, Inc. 3 + FIXME: Can someone provide a transliteration of this name into ASCII? 4 + Using the following chars caused a compiler warning on HIUX (so I replaced 5 + them with octal escapes), and isn't useful without an understanding of what 6 + character set it is. 7 + Written by Mimi Ph\373\364ng-Th\345o V\365 of IBM 8 + and John Gilmore of Cygnus Support. */ 9 + 10 + /********************** FILE HEADER **********************/ 11 + 12 + struct external_filehdr { 13 + char f_magic[2]; /* magic number */ 14 + char f_nscns[2]; /* number of sections */ 15 + char f_timdat[4]; /* time & date stamp */ 16 + char f_symptr[4]; /* file pointer to symtab */ 17 + char f_nsyms[4]; /* number of symtab entries */ 18 + char f_opthdr[2]; /* sizeof(optional hdr) */ 19 + char f_flags[2]; /* flags */ 20 + }; 21 + 22 + /* IBM RS/6000 */ 23 + #define U802WRMAGIC 0730 /* writeable text segments **chh** */ 24 + #define U802ROMAGIC 0735 /* readonly sharable text segments */ 25 + #define U802TOCMAGIC 0737 /* readonly text segments and TOC */ 26 + 27 + #define BADMAG(x) \ 28 + ((x).f_magic != U802ROMAGIC && (x).f_magic != U802WRMAGIC && \ 29 + (x).f_magic != U802TOCMAGIC) 30 + 31 + #define FILHDR struct external_filehdr 32 + #define FILHSZ 20 33 + 34 + 35 + /********************** AOUT "OPTIONAL HEADER" **********************/ 36 + 37 + 38 + typedef struct 39 + { 40 + unsigned char magic[2]; /* type of file */ 41 + unsigned char vstamp[2]; /* version stamp */ 42 + unsigned char tsize[4]; /* text size in bytes, padded to FW bdry */ 43 + unsigned char dsize[4]; /* initialized data " " */ 44 + unsigned char bsize[4]; /* uninitialized data " " */ 45 + unsigned char entry[4]; /* entry pt. */ 46 + unsigned char text_start[4]; /* base of text used for this file */ 47 + unsigned char data_start[4]; /* base of data used for this file */ 48 + unsigned char o_toc[4]; /* address of TOC */ 49 + unsigned char o_snentry[2]; /* section number of entry point */ 50 + unsigned char o_sntext[2]; /* section number of .text section */ 51 + unsigned char o_sndata[2]; /* section number of .data section */ 52 + unsigned char o_sntoc[2]; /* section number of TOC */ 53 + unsigned char o_snloader[2]; /* section number of .loader section */ 54 + unsigned char o_snbss[2]; /* section number of .bss section */ 55 + unsigned char o_algntext[2]; /* .text alignment */ 56 + unsigned char o_algndata[2]; /* .data alignment */ 57 + unsigned char o_modtype[2]; /* module type (??) */ 58 + unsigned char o_cputype[2]; /* cpu type */ 59 + unsigned char o_maxstack[4]; /* max stack size (??) */ 60 + unsigned char o_maxdata[4]; /* max data size (??) */ 61 + unsigned char o_resv2[12]; /* reserved */ 62 + } 63 + AOUTHDR; 64 + 65 + #define AOUTSZ 72 66 + #define SMALL_AOUTSZ (28) 67 + #define AOUTHDRSZ 72 68 + 69 + #define RS6K_AOUTHDR_OMAGIC 0x0107 /* old: text & data writeable */ 70 + #define RS6K_AOUTHDR_NMAGIC 0x0108 /* new: text r/o, data r/w */ 71 + #define RS6K_AOUTHDR_ZMAGIC 0x010B /* paged: text r/o, both page-aligned */ 72 + 73 + 74 + /********************** SECTION HEADER **********************/ 75 + 76 + 77 + struct external_scnhdr { 78 + char s_name[8]; /* section name */ 79 + char s_paddr[4]; /* physical address, aliased s_nlib */ 80 + char s_vaddr[4]; /* virtual address */ 81 + char s_size[4]; /* section size */ 82 + char s_scnptr[4]; /* file ptr to raw data for section */ 83 + char s_relptr[4]; /* file ptr to relocation */ 84 + char s_lnnoptr[4]; /* file ptr to line numbers */ 85 + char s_nreloc[2]; /* number of relocation entries */ 86 + char s_nlnno[2]; /* number of line number entries*/ 87 + char s_flags[4]; /* flags */ 88 + }; 89 + 90 + /* 91 + * names of "special" sections 92 + */ 93 + #define _TEXT ".text" 94 + #define _DATA ".data" 95 + #define _BSS ".bss" 96 + #define _PAD ".pad" 97 + #define _LOADER ".loader" 98 + 99 + #define SCNHDR struct external_scnhdr 100 + #define SCNHSZ 40 101 + 102 + /* XCOFF uses a special .loader section with type STYP_LOADER. */ 103 + #define STYP_LOADER 0x1000 104 + 105 + /* XCOFF uses a special .debug section with type STYP_DEBUG. */ 106 + #define STYP_DEBUG 0x2000 107 + 108 + /* XCOFF handles line number or relocation overflow by creating 109 + another section header with STYP_OVRFLO set. */ 110 + #define STYP_OVRFLO 0x8000 111 + 112 + /********************** LINE NUMBERS **********************/ 113 + 114 + /* 1 line number entry for every "breakpointable" source line in a section. 115 + * Line numbers are grouped on a per function basis; first entry in a function 116 + * grouping will have l_lnno = 0 and in place of physical address will be the 117 + * symbol table index of the function name. 118 + */ 119 + struct external_lineno { 120 + union { 121 + char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/ 122 + char l_paddr[4]; /* (physical) address of line number */ 123 + } l_addr; 124 + char l_lnno[2]; /* line number */ 125 + }; 126 + 127 + 128 + #define LINENO struct external_lineno 129 + #define LINESZ 6 130 + 131 + 132 + /********************** SYMBOLS **********************/ 133 + 134 + #define E_SYMNMLEN 8 /* # characters in a symbol name */ 135 + #define E_FILNMLEN 14 /* # characters in a file name */ 136 + #define E_DIMNUM 4 /* # array dimensions in auxiliary entry */ 137 + 138 + struct external_syment 139 + { 140 + union { 141 + char e_name[E_SYMNMLEN]; 142 + struct { 143 + char e_zeroes[4]; 144 + char e_offset[4]; 145 + } e; 146 + } e; 147 + char e_value[4]; 148 + char e_scnum[2]; 149 + char e_type[2]; 150 + char e_sclass[1]; 151 + char e_numaux[1]; 152 + }; 153 + 154 + 155 + 156 + #define N_BTMASK (017) 157 + #define N_TMASK (060) 158 + #define N_BTSHFT (4) 159 + #define N_TSHIFT (2) 160 + 161 + 162 + union external_auxent { 163 + struct { 164 + char x_tagndx[4]; /* str, un, or enum tag indx */ 165 + union { 166 + struct { 167 + char x_lnno[2]; /* declaration line number */ 168 + char x_size[2]; /* str/union/array size */ 169 + } x_lnsz; 170 + char x_fsize[4]; /* size of function */ 171 + } x_misc; 172 + union { 173 + struct { /* if ISFCN, tag, or .bb */ 174 + char x_lnnoptr[4]; /* ptr to fcn line # */ 175 + char x_endndx[4]; /* entry ndx past block end */ 176 + } x_fcn; 177 + struct { /* if ISARY, up to 4 dimen. */ 178 + char x_dimen[E_DIMNUM][2]; 179 + } x_ary; 180 + } x_fcnary; 181 + char x_tvndx[2]; /* tv index */ 182 + } x_sym; 183 + 184 + union { 185 + char x_fname[E_FILNMLEN]; 186 + struct { 187 + char x_zeroes[4]; 188 + char x_offset[4]; 189 + } x_n; 190 + } x_file; 191 + 192 + struct { 193 + char x_scnlen[4]; /* section length */ 194 + char x_nreloc[2]; /* # relocation entries */ 195 + char x_nlinno[2]; /* # line numbers */ 196 + } x_scn; 197 + 198 + struct { 199 + char x_tvfill[4]; /* tv fill value */ 200 + char x_tvlen[2]; /* length of .tv */ 201 + char x_tvran[2][2]; /* tv range */ 202 + } x_tv; /* info about .tv section (in auxent of symbol .tv)) */ 203 + 204 + struct { 205 + unsigned char x_scnlen[4]; 206 + unsigned char x_parmhash[4]; 207 + unsigned char x_snhash[2]; 208 + unsigned char x_smtyp[1]; 209 + unsigned char x_smclas[1]; 210 + unsigned char x_stab[4]; 211 + unsigned char x_snstab[2]; 212 + } x_csect; 213 + 214 + }; 215 + 216 + #define SYMENT struct external_syment 217 + #define SYMESZ 18 218 + #define AUXENT union external_auxent 219 + #define AUXESZ 18 220 + #define DBXMASK 0x80 /* for dbx storage mask */ 221 + #define SYMNAME_IN_DEBUG(symptr) ((symptr)->n_sclass & DBXMASK) 222 + 223 + 224 + 225 + /********************** RELOCATION DIRECTIVES **********************/ 226 + 227 + 228 + struct external_reloc { 229 + char r_vaddr[4]; 230 + char r_symndx[4]; 231 + char r_size[1]; 232 + char r_type[1]; 233 + }; 234 + 235 + 236 + #define RELOC struct external_reloc 237 + #define RELSZ 10 238 + 239 + #define DEFAULT_DATA_SECTION_ALIGNMENT 4 240 + #define DEFAULT_BSS_SECTION_ALIGNMENT 4 241 + #define DEFAULT_TEXT_SECTION_ALIGNMENT 4 242 + /* For new sections we havn't heard of before */ 243 + #define DEFAULT_SECTION_ALIGNMENT 4
+325
arch/powerpc/boot/stdio.c
··· 1 + /* 2 + * Copyright (C) Paul Mackerras 1997. 3 + * 4 + * This program is free software; you can redistribute it and/or 5 + * modify it under the terms of the GNU General Public License 6 + * as published by the Free Software Foundation; either version 7 + * 2 of the License, or (at your option) any later version. 8 + */ 9 + #include <stdarg.h> 10 + #include <stddef.h> 11 + #include "string.h" 12 + #include "stdio.h" 13 + #include "prom.h" 14 + 15 + size_t strnlen(const char * s, size_t count) 16 + { 17 + const char *sc; 18 + 19 + for (sc = s; count-- && *sc != '\0'; ++sc) 20 + /* nothing */; 21 + return sc - s; 22 + } 23 + 24 + extern unsigned int __div64_32(unsigned long long *dividend, 25 + unsigned int divisor); 26 + 27 + /* The unnecessary pointer compare is there 28 + * to check for type safety (n must be 64bit) 29 + */ 30 + # define do_div(n,base) ({ \ 31 + unsigned int __base = (base); \ 32 + unsigned int __rem; \ 33 + (void)(((typeof((n)) *)0) == ((unsigned long long *)0)); \ 34 + if (((n) >> 32) == 0) { \ 35 + __rem = (unsigned int)(n) % __base; \ 36 + (n) = (unsigned int)(n) / __base; \ 37 + } else \ 38 + __rem = __div64_32(&(n), __base); \ 39 + __rem; \ 40 + }) 41 + 42 + static int skip_atoi(const char **s) 43 + { 44 + int i, c; 45 + 46 + for (i = 0; '0' <= (c = **s) && c <= '9'; ++*s) 47 + i = i*10 + c - '0'; 48 + return i; 49 + } 50 + 51 + #define ZEROPAD 1 /* pad with zero */ 52 + #define SIGN 2 /* unsigned/signed long */ 53 + #define PLUS 4 /* show plus */ 54 + #define SPACE 8 /* space if plus */ 55 + #define LEFT 16 /* left justified */ 56 + #define SPECIAL 32 /* 0x */ 57 + #define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */ 58 + 59 + static char * number(char * str, unsigned long long num, int base, int size, int precision, int type) 60 + { 61 + char c,sign,tmp[66]; 62 + const char *digits="0123456789abcdefghijklmnopqrstuvwxyz"; 63 + int i; 64 + 65 + if (type & LARGE) 66 + digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; 67 + if (type & LEFT) 68 + type &= ~ZEROPAD; 69 + if (base < 2 || base > 36) 70 + return 0; 71 + c = (type & ZEROPAD) ? '0' : ' '; 72 + sign = 0; 73 + if (type & SIGN) { 74 + if ((signed long long)num < 0) { 75 + sign = '-'; 76 + num = - (signed long long)num; 77 + size--; 78 + } else if (type & PLUS) { 79 + sign = '+'; 80 + size--; 81 + } else if (type & SPACE) { 82 + sign = ' '; 83 + size--; 84 + } 85 + } 86 + if (type & SPECIAL) { 87 + if (base == 16) 88 + size -= 2; 89 + else if (base == 8) 90 + size--; 91 + } 92 + i = 0; 93 + if (num == 0) 94 + tmp[i++]='0'; 95 + else while (num != 0) { 96 + tmp[i++] = digits[do_div(num, base)]; 97 + } 98 + if (i > precision) 99 + precision = i; 100 + size -= precision; 101 + if (!(type&(ZEROPAD+LEFT))) 102 + while(size-->0) 103 + *str++ = ' '; 104 + if (sign) 105 + *str++ = sign; 106 + if (type & SPECIAL) { 107 + if (base==8) 108 + *str++ = '0'; 109 + else if (base==16) { 110 + *str++ = '0'; 111 + *str++ = digits[33]; 112 + } 113 + } 114 + if (!(type & LEFT)) 115 + while (size-- > 0) 116 + *str++ = c; 117 + while (i < precision--) 118 + *str++ = '0'; 119 + while (i-- > 0) 120 + *str++ = tmp[i]; 121 + while (size-- > 0) 122 + *str++ = ' '; 123 + return str; 124 + } 125 + 126 + int vsprintf(char *buf, const char *fmt, va_list args) 127 + { 128 + int len; 129 + unsigned long long num; 130 + int i, base; 131 + char * str; 132 + const char *s; 133 + 134 + int flags; /* flags to number() */ 135 + 136 + int field_width; /* width of output field */ 137 + int precision; /* min. # of digits for integers; max 138 + number of chars for from string */ 139 + int qualifier; /* 'h', 'l', or 'L' for integer fields */ 140 + /* 'z' support added 23/7/1999 S.H. */ 141 + /* 'z' changed to 'Z' --davidm 1/25/99 */ 142 + 143 + 144 + for (str=buf ; *fmt ; ++fmt) { 145 + if (*fmt != '%') { 146 + *str++ = *fmt; 147 + continue; 148 + } 149 + 150 + /* process flags */ 151 + flags = 0; 152 + repeat: 153 + ++fmt; /* this also skips first '%' */ 154 + switch (*fmt) { 155 + case '-': flags |= LEFT; goto repeat; 156 + case '+': flags |= PLUS; goto repeat; 157 + case ' ': flags |= SPACE; goto repeat; 158 + case '#': flags |= SPECIAL; goto repeat; 159 + case '0': flags |= ZEROPAD; goto repeat; 160 + } 161 + 162 + /* get field width */ 163 + field_width = -1; 164 + if ('0' <= *fmt && *fmt <= '9') 165 + field_width = skip_atoi(&fmt); 166 + else if (*fmt == '*') { 167 + ++fmt; 168 + /* it's the next argument */ 169 + field_width = va_arg(args, int); 170 + if (field_width < 0) { 171 + field_width = -field_width; 172 + flags |= LEFT; 173 + } 174 + } 175 + 176 + /* get the precision */ 177 + precision = -1; 178 + if (*fmt == '.') { 179 + ++fmt; 180 + if ('0' <= *fmt && *fmt <= '9') 181 + precision = skip_atoi(&fmt); 182 + else if (*fmt == '*') { 183 + ++fmt; 184 + /* it's the next argument */ 185 + precision = va_arg(args, int); 186 + } 187 + if (precision < 0) 188 + precision = 0; 189 + } 190 + 191 + /* get the conversion qualifier */ 192 + qualifier = -1; 193 + if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' || *fmt =='Z') { 194 + qualifier = *fmt; 195 + ++fmt; 196 + } 197 + 198 + /* default base */ 199 + base = 10; 200 + 201 + switch (*fmt) { 202 + case 'c': 203 + if (!(flags & LEFT)) 204 + while (--field_width > 0) 205 + *str++ = ' '; 206 + *str++ = (unsigned char) va_arg(args, int); 207 + while (--field_width > 0) 208 + *str++ = ' '; 209 + continue; 210 + 211 + case 's': 212 + s = va_arg(args, char *); 213 + if (!s) 214 + s = "<NULL>"; 215 + 216 + len = strnlen(s, precision); 217 + 218 + if (!(flags & LEFT)) 219 + while (len < field_width--) 220 + *str++ = ' '; 221 + for (i = 0; i < len; ++i) 222 + *str++ = *s++; 223 + while (len < field_width--) 224 + *str++ = ' '; 225 + continue; 226 + 227 + case 'p': 228 + if (field_width == -1) { 229 + field_width = 2*sizeof(void *); 230 + flags |= ZEROPAD; 231 + } 232 + str = number(str, 233 + (unsigned long) va_arg(args, void *), 16, 234 + field_width, precision, flags); 235 + continue; 236 + 237 + 238 + case 'n': 239 + if (qualifier == 'l') { 240 + long * ip = va_arg(args, long *); 241 + *ip = (str - buf); 242 + } else if (qualifier == 'Z') { 243 + size_t * ip = va_arg(args, size_t *); 244 + *ip = (str - buf); 245 + } else { 246 + int * ip = va_arg(args, int *); 247 + *ip = (str - buf); 248 + } 249 + continue; 250 + 251 + case '%': 252 + *str++ = '%'; 253 + continue; 254 + 255 + /* integer number formats - set up the flags and "break" */ 256 + case 'o': 257 + base = 8; 258 + break; 259 + 260 + case 'X': 261 + flags |= LARGE; 262 + case 'x': 263 + base = 16; 264 + break; 265 + 266 + case 'd': 267 + case 'i': 268 + flags |= SIGN; 269 + case 'u': 270 + break; 271 + 272 + default: 273 + *str++ = '%'; 274 + if (*fmt) 275 + *str++ = *fmt; 276 + else 277 + --fmt; 278 + continue; 279 + } 280 + if (qualifier == 'l') { 281 + num = va_arg(args, unsigned long); 282 + if (flags & SIGN) 283 + num = (signed long) num; 284 + } else if (qualifier == 'Z') { 285 + num = va_arg(args, size_t); 286 + } else if (qualifier == 'h') { 287 + num = (unsigned short) va_arg(args, int); 288 + if (flags & SIGN) 289 + num = (signed short) num; 290 + } else { 291 + num = va_arg(args, unsigned int); 292 + if (flags & SIGN) 293 + num = (signed int) num; 294 + } 295 + str = number(str, num, base, field_width, precision, flags); 296 + } 297 + *str = '\0'; 298 + return str-buf; 299 + } 300 + 301 + int sprintf(char * buf, const char *fmt, ...) 302 + { 303 + va_list args; 304 + int i; 305 + 306 + va_start(args, fmt); 307 + i=vsprintf(buf,fmt,args); 308 + va_end(args); 309 + return i; 310 + } 311 + 312 + static char sprint_buf[1024]; 313 + 314 + int 315 + printf(const char *fmt, ...) 316 + { 317 + va_list args; 318 + int n; 319 + 320 + va_start(args, fmt); 321 + n = vsprintf(sprint_buf, fmt, args); 322 + va_end(args); 323 + write(stdout, sprint_buf, n); 324 + return n; 325 + }
-6
arch/powerpc/boot/stdio.h
··· 7 7 8 8 extern int vsprintf(char *buf, const char *fmt, va_list args); 9 9 10 - extern int putc(int c, void *f); 11 - extern int putchar(int c); 12 - extern int getchar(void); 13 - 14 - extern int fputs(char *str, void *f); 15 - 16 10 #endif /* _PPC_BOOT_STDIO_H_ */
+17 -3
arch/powerpc/boot/string.S
··· 107 107 rlwinm. r7,r5,32-3,3,31 /* r7 = r5 >> 3 */ 108 108 addi r6,r3,-4 109 109 addi r4,r4,-4 110 - beq 2f /* if less than 8 bytes to do */ 110 + beq 3f /* if less than 8 bytes to do */ 111 111 andi. r0,r6,3 /* get dest word aligned */ 112 112 mtctr r7 113 113 bne 5f 114 + andi. r0,r4,3 /* check src word aligned too */ 115 + bne 3f 114 116 1: lwz r7,4(r4) 115 117 lwzu r8,8(r4) 116 118 stw r7,4(r6) ··· 134 132 bdnz 4b 135 133 blr 136 134 5: subfic r0,r0,4 135 + cmpw cr1,r0,r5 136 + add r7,r0,r4 137 + andi. r7,r7,3 /* will source be word-aligned too? */ 138 + ble cr1,3b 139 + bne 3b /* do byte-by-byte if not */ 137 140 mtctr r0 138 141 6: lbz r7,4(r4) 139 142 addi r4,r4,1 ··· 156 149 rlwinm. r7,r5,32-3,3,31 /* r7 = r5 >> 3 */ 157 150 add r6,r3,r5 158 151 add r4,r4,r5 159 - beq 2f 152 + beq 3f 160 153 andi. r0,r6,3 161 154 mtctr r7 162 155 bne 5f 156 + andi. r0,r4,3 157 + bne 3f 163 158 1: lwz r7,-4(r4) 164 159 lwzu r8,-8(r4) 165 160 stw r7,-4(r6) ··· 180 171 stbu r0,-1(r6) 181 172 bdnz 4b 182 173 blr 183 - 5: mtctr r0 174 + 5: cmpw cr1,r0,r5 175 + subf r7,r0,r4 176 + andi. r7,r7,3 177 + ble cr1,3b 178 + bne 3b 179 + mtctr r0 184 180 6: lbzu r7,-1(r4) 185 181 stbu r7,-1(r6) 186 182 bdnz 6b
+46
arch/powerpc/boot/zImage.coff.lds
··· 1 + OUTPUT_ARCH(powerpc:common) 2 + ENTRY(_start) 3 + SECTIONS 4 + { 5 + . = (5*1024*1024); 6 + _start = .; 7 + .text : 8 + { 9 + *(.text) 10 + *(.fixup) 11 + } 12 + _etext = .; 13 + . = ALIGN(4096); 14 + .data : 15 + { 16 + *(.rodata*) 17 + *(.data*) 18 + *(.sdata*) 19 + __got2_start = .; 20 + *(.got2) 21 + __got2_end = .; 22 + 23 + _vmlinux_start = .; 24 + *(.kernel:vmlinux.strip) 25 + _vmlinux_end = .; 26 + 27 + _initrd_start = .; 28 + *(.kernel:initrd) 29 + _initrd_end = .; 30 + } 31 + 32 + . = ALIGN(4096); 33 + _edata = .; 34 + __bss_start = .; 35 + .bss : 36 + { 37 + *(.sbss) 38 + *(.bss) 39 + } 40 + _end = . ; 41 + 42 + /DISCARD/ : 43 + { 44 + *(.comment) 45 + } 46 + }
+911
arch/powerpc/configs/mpc834x_sys_defconfig
··· 1 + # 2 + # Automatically generated make config: don't edit 3 + # Linux kernel version: 2.6.15-g461d4edf-dirty 4 + # Fri Jan 13 11:01:47 2006 5 + # 6 + # CONFIG_PPC64 is not set 7 + CONFIG_PPC32=y 8 + CONFIG_PPC_MERGE=y 9 + CONFIG_MMU=y 10 + CONFIG_GENERIC_HARDIRQS=y 11 + CONFIG_RWSEM_XCHGADD_ALGORITHM=y 12 + CONFIG_GENERIC_CALIBRATE_DELAY=y 13 + CONFIG_PPC=y 14 + CONFIG_EARLY_PRINTK=y 15 + CONFIG_GENERIC_NVRAM=y 16 + CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 17 + CONFIG_ARCH_MAY_HAVE_PC_FDC=y 18 + CONFIG_PPC_OF=y 19 + CONFIG_PPC_UDBG_16550=y 20 + # CONFIG_GENERIC_TBSYNC is not set 21 + CONFIG_DEFAULT_UIMAGE=y 22 + 23 + # 24 + # Processor support 25 + # 26 + # CONFIG_CLASSIC32 is not set 27 + # CONFIG_PPC_52xx is not set 28 + # CONFIG_PPC_82xx is not set 29 + CONFIG_PPC_83xx=y 30 + # CONFIG_40x is not set 31 + # CONFIG_44x is not set 32 + # CONFIG_8xx is not set 33 + # CONFIG_E200 is not set 34 + # CONFIG_E500 is not set 35 + CONFIG_6xx=y 36 + CONFIG_83xx=y 37 + CONFIG_PPC_FPU=y 38 + CONFIG_PPC_STD_MMU=y 39 + CONFIG_PPC_STD_MMU_32=y 40 + # CONFIG_SMP is not set 41 + 42 + # 43 + # Code maturity level options 44 + # 45 + CONFIG_EXPERIMENTAL=y 46 + CONFIG_CLEAN_COMPILE=y 47 + CONFIG_BROKEN_ON_SMP=y 48 + CONFIG_INIT_ENV_ARG_LIMIT=32 49 + 50 + # 51 + # General setup 52 + # 53 + CONFIG_LOCALVERSION="" 54 + CONFIG_LOCALVERSION_AUTO=y 55 + CONFIG_SWAP=y 56 + CONFIG_SYSVIPC=y 57 + # CONFIG_POSIX_MQUEUE is not set 58 + # CONFIG_BSD_PROCESS_ACCT is not set 59 + CONFIG_SYSCTL=y 60 + # CONFIG_AUDIT is not set 61 + # CONFIG_IKCONFIG is not set 62 + CONFIG_INITRAMFS_SOURCE="" 63 + # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 64 + CONFIG_EMBEDDED=y 65 + # CONFIG_KALLSYMS is not set 66 + CONFIG_HOTPLUG=y 67 + CONFIG_PRINTK=y 68 + CONFIG_BUG=y 69 + CONFIG_ELF_CORE=y 70 + CONFIG_BASE_FULL=y 71 + CONFIG_FUTEX=y 72 + # CONFIG_EPOLL is not set 73 + CONFIG_SHMEM=y 74 + CONFIG_CC_ALIGN_FUNCTIONS=0 75 + CONFIG_CC_ALIGN_LABELS=0 76 + CONFIG_CC_ALIGN_LOOPS=0 77 + CONFIG_CC_ALIGN_JUMPS=0 78 + CONFIG_SLAB=y 79 + # CONFIG_TINY_SHMEM is not set 80 + CONFIG_BASE_SMALL=0 81 + # CONFIG_SLOB is not set 82 + 83 + # 84 + # Loadable module support 85 + # 86 + CONFIG_MODULES=y 87 + CONFIG_MODULE_UNLOAD=y 88 + # CONFIG_MODULE_FORCE_UNLOAD is not set 89 + CONFIG_OBSOLETE_MODPARM=y 90 + # CONFIG_MODVERSIONS is not set 91 + # CONFIG_MODULE_SRCVERSION_ALL is not set 92 + # CONFIG_KMOD is not set 93 + 94 + # 95 + # Block layer 96 + # 97 + # CONFIG_LBD is not set 98 + 99 + # 100 + # IO Schedulers 101 + # 102 + CONFIG_IOSCHED_NOOP=y 103 + CONFIG_IOSCHED_AS=y 104 + CONFIG_IOSCHED_DEADLINE=y 105 + CONFIG_IOSCHED_CFQ=y 106 + CONFIG_DEFAULT_AS=y 107 + # CONFIG_DEFAULT_DEADLINE is not set 108 + # CONFIG_DEFAULT_CFQ is not set 109 + # CONFIG_DEFAULT_NOOP is not set 110 + CONFIG_DEFAULT_IOSCHED="anticipatory" 111 + CONFIG_PPC_GEN550=y 112 + # CONFIG_WANT_EARLY_SERIAL is not set 113 + 114 + # 115 + # Platform support 116 + # 117 + CONFIG_MPC834x_SYS=y 118 + CONFIG_MPC834x=y 119 + 120 + # 121 + # Kernel options 122 + # 123 + # CONFIG_HIGHMEM is not set 124 + # CONFIG_HZ_100 is not set 125 + CONFIG_HZ_250=y 126 + # CONFIG_HZ_1000 is not set 127 + CONFIG_HZ=250 128 + CONFIG_PREEMPT_NONE=y 129 + # CONFIG_PREEMPT_VOLUNTARY is not set 130 + # CONFIG_PREEMPT is not set 131 + CONFIG_BINFMT_ELF=y 132 + # CONFIG_BINFMT_MISC is not set 133 + CONFIG_ARCH_FLATMEM_ENABLE=y 134 + CONFIG_SELECT_MEMORY_MODEL=y 135 + CONFIG_FLATMEM_MANUAL=y 136 + # CONFIG_DISCONTIGMEM_MANUAL is not set 137 + # CONFIG_SPARSEMEM_MANUAL is not set 138 + CONFIG_FLATMEM=y 139 + CONFIG_FLAT_NODE_MEM_MAP=y 140 + # CONFIG_SPARSEMEM_STATIC is not set 141 + CONFIG_SPLIT_PTLOCK_CPUS=4 142 + CONFIG_PROC_DEVICETREE=y 143 + # CONFIG_CMDLINE_BOOL is not set 144 + # CONFIG_PM is not set 145 + # CONFIG_SOFTWARE_SUSPEND is not set 146 + CONFIG_SECCOMP=y 147 + CONFIG_ISA_DMA_API=y 148 + 149 + # 150 + # Bus options 151 + # 152 + CONFIG_GENERIC_ISA_DMA=y 153 + # CONFIG_PPC_I8259 is not set 154 + CONFIG_PPC_INDIRECT_PCI=y 155 + CONFIG_FSL_SOC=y 156 + CONFIG_PCI=y 157 + CONFIG_PCI_DOMAINS=y 158 + # CONFIG_PCI_LEGACY_PROC is not set 159 + 160 + # 161 + # PCCARD (PCMCIA/CardBus) support 162 + # 163 + # CONFIG_PCCARD is not set 164 + 165 + # 166 + # PCI Hotplug Support 167 + # 168 + # CONFIG_HOTPLUG_PCI is not set 169 + 170 + # 171 + # Advanced setup 172 + # 173 + # CONFIG_ADVANCED_OPTIONS is not set 174 + 175 + # 176 + # Default settings for advanced configuration options are used 177 + # 178 + CONFIG_HIGHMEM_START=0xfe000000 179 + CONFIG_LOWMEM_SIZE=0x30000000 180 + CONFIG_KERNEL_START=0xc0000000 181 + CONFIG_TASK_SIZE=0x80000000 182 + CONFIG_BOOT_LOAD=0x00800000 183 + 184 + # 185 + # Networking 186 + # 187 + CONFIG_NET=y 188 + 189 + # 190 + # Networking options 191 + # 192 + CONFIG_PACKET=y 193 + # CONFIG_PACKET_MMAP is not set 194 + CONFIG_UNIX=y 195 + # CONFIG_NET_KEY is not set 196 + CONFIG_INET=y 197 + CONFIG_IP_MULTICAST=y 198 + # CONFIG_IP_ADVANCED_ROUTER is not set 199 + CONFIG_IP_FIB_HASH=y 200 + CONFIG_IP_PNP=y 201 + CONFIG_IP_PNP_DHCP=y 202 + CONFIG_IP_PNP_BOOTP=y 203 + # CONFIG_IP_PNP_RARP is not set 204 + # CONFIG_NET_IPIP is not set 205 + # CONFIG_NET_IPGRE is not set 206 + # CONFIG_IP_MROUTE is not set 207 + # CONFIG_ARPD is not set 208 + CONFIG_SYN_COOKIES=y 209 + # CONFIG_INET_AH is not set 210 + # CONFIG_INET_ESP is not set 211 + # CONFIG_INET_IPCOMP is not set 212 + # CONFIG_INET_TUNNEL is not set 213 + CONFIG_INET_DIAG=y 214 + CONFIG_INET_TCP_DIAG=y 215 + # CONFIG_TCP_CONG_ADVANCED is not set 216 + CONFIG_TCP_CONG_BIC=y 217 + # CONFIG_IPV6 is not set 218 + # CONFIG_NETFILTER is not set 219 + 220 + # 221 + # DCCP Configuration (EXPERIMENTAL) 222 + # 223 + # CONFIG_IP_DCCP is not set 224 + 225 + # 226 + # SCTP Configuration (EXPERIMENTAL) 227 + # 228 + # CONFIG_IP_SCTP is not set 229 + # CONFIG_ATM is not set 230 + # CONFIG_BRIDGE is not set 231 + # CONFIG_VLAN_8021Q is not set 232 + # CONFIG_DECNET is not set 233 + # CONFIG_LLC2 is not set 234 + # CONFIG_IPX is not set 235 + # CONFIG_ATALK is not set 236 + # CONFIG_X25 is not set 237 + # CONFIG_LAPB is not set 238 + # CONFIG_NET_DIVERT is not set 239 + # CONFIG_ECONET is not set 240 + # CONFIG_WAN_ROUTER is not set 241 + 242 + # 243 + # QoS and/or fair queueing 244 + # 245 + # CONFIG_NET_SCHED is not set 246 + 247 + # 248 + # Network testing 249 + # 250 + # CONFIG_NET_PKTGEN is not set 251 + # CONFIG_HAMRADIO is not set 252 + # CONFIG_IRDA is not set 253 + # CONFIG_BT is not set 254 + # CONFIG_IEEE80211 is not set 255 + 256 + # 257 + # Device Drivers 258 + # 259 + 260 + # 261 + # Generic Driver Options 262 + # 263 + CONFIG_STANDALONE=y 264 + CONFIG_PREVENT_FIRMWARE_BUILD=y 265 + # CONFIG_FW_LOADER is not set 266 + 267 + # 268 + # Connector - unified userspace <-> kernelspace linker 269 + # 270 + # CONFIG_CONNECTOR is not set 271 + 272 + # 273 + # Memory Technology Devices (MTD) 274 + # 275 + # CONFIG_MTD is not set 276 + 277 + # 278 + # Parallel port support 279 + # 280 + # CONFIG_PARPORT is not set 281 + 282 + # 283 + # Plug and Play support 284 + # 285 + 286 + # 287 + # Block devices 288 + # 289 + # CONFIG_BLK_DEV_FD is not set 290 + # CONFIG_BLK_CPQ_DA is not set 291 + # CONFIG_BLK_CPQ_CISS_DA is not set 292 + # CONFIG_BLK_DEV_DAC960 is not set 293 + # CONFIG_BLK_DEV_UMEM is not set 294 + # CONFIG_BLK_DEV_COW_COMMON is not set 295 + CONFIG_BLK_DEV_LOOP=y 296 + # CONFIG_BLK_DEV_CRYPTOLOOP is not set 297 + # CONFIG_BLK_DEV_NBD is not set 298 + # CONFIG_BLK_DEV_SX8 is not set 299 + CONFIG_BLK_DEV_RAM=y 300 + CONFIG_BLK_DEV_RAM_COUNT=16 301 + CONFIG_BLK_DEV_RAM_SIZE=32768 302 + CONFIG_BLK_DEV_INITRD=y 303 + # CONFIG_CDROM_PKTCDVD is not set 304 + # CONFIG_ATA_OVER_ETH is not set 305 + 306 + # 307 + # ATA/ATAPI/MFM/RLL support 308 + # 309 + # CONFIG_IDE is not set 310 + 311 + # 312 + # SCSI device support 313 + # 314 + # CONFIG_RAID_ATTRS is not set 315 + # CONFIG_SCSI is not set 316 + 317 + # 318 + # Multi-device support (RAID and LVM) 319 + # 320 + # CONFIG_MD is not set 321 + 322 + # 323 + # Fusion MPT device support 324 + # 325 + # CONFIG_FUSION is not set 326 + 327 + # 328 + # IEEE 1394 (FireWire) support 329 + # 330 + # CONFIG_IEEE1394 is not set 331 + 332 + # 333 + # I2O device support 334 + # 335 + # CONFIG_I2O is not set 336 + 337 + # 338 + # Macintosh device drivers 339 + # 340 + # CONFIG_WINDFARM is not set 341 + 342 + # 343 + # Network device support 344 + # 345 + CONFIG_NETDEVICES=y 346 + # CONFIG_DUMMY is not set 347 + # CONFIG_BONDING is not set 348 + # CONFIG_EQUALIZER is not set 349 + # CONFIG_TUN is not set 350 + 351 + # 352 + # ARCnet devices 353 + # 354 + # CONFIG_ARCNET is not set 355 + 356 + # 357 + # PHY device support 358 + # 359 + CONFIG_PHYLIB=y 360 + 361 + # 362 + # MII PHY device drivers 363 + # 364 + CONFIG_MARVELL_PHY=y 365 + # CONFIG_DAVICOM_PHY is not set 366 + # CONFIG_QSEMI_PHY is not set 367 + # CONFIG_LXT_PHY is not set 368 + # CONFIG_CICADA_PHY is not set 369 + 370 + # 371 + # Ethernet (10 or 100Mbit) 372 + # 373 + CONFIG_NET_ETHERNET=y 374 + CONFIG_MII=y 375 + # CONFIG_HAPPYMEAL is not set 376 + # CONFIG_SUNGEM is not set 377 + # CONFIG_CASSINI is not set 378 + # CONFIG_NET_VENDOR_3COM is not set 379 + 380 + # 381 + # Tulip family network device support 382 + # 383 + # CONFIG_NET_TULIP is not set 384 + # CONFIG_HP100 is not set 385 + CONFIG_NET_PCI=y 386 + # CONFIG_PCNET32 is not set 387 + # CONFIG_AMD8111_ETH is not set 388 + # CONFIG_ADAPTEC_STARFIRE is not set 389 + # CONFIG_B44 is not set 390 + # CONFIG_FORCEDETH is not set 391 + # CONFIG_DGRS is not set 392 + # CONFIG_EEPRO100 is not set 393 + CONFIG_E100=y 394 + # CONFIG_FEALNX is not set 395 + # CONFIG_NATSEMI is not set 396 + # CONFIG_NE2K_PCI is not set 397 + # CONFIG_8139CP is not set 398 + # CONFIG_8139TOO is not set 399 + # CONFIG_SIS900 is not set 400 + # CONFIG_EPIC100 is not set 401 + # CONFIG_SUNDANCE is not set 402 + # CONFIG_TLAN is not set 403 + # CONFIG_VIA_RHINE is not set 404 + 405 + # 406 + # Ethernet (1000 Mbit) 407 + # 408 + # CONFIG_ACENIC is not set 409 + # CONFIG_DL2K is not set 410 + # CONFIG_E1000 is not set 411 + # CONFIG_NS83820 is not set 412 + # CONFIG_HAMACHI is not set 413 + # CONFIG_YELLOWFIN is not set 414 + # CONFIG_R8169 is not set 415 + # CONFIG_SIS190 is not set 416 + # CONFIG_SKGE is not set 417 + # CONFIG_SKY2 is not set 418 + # CONFIG_SK98LIN is not set 419 + # CONFIG_VIA_VELOCITY is not set 420 + # CONFIG_TIGON3 is not set 421 + # CONFIG_BNX2 is not set 422 + CONFIG_GIANFAR=y 423 + # CONFIG_GFAR_NAPI is not set 424 + 425 + # 426 + # Ethernet (10000 Mbit) 427 + # 428 + # CONFIG_CHELSIO_T1 is not set 429 + # CONFIG_IXGB is not set 430 + # CONFIG_S2IO is not set 431 + 432 + # 433 + # Token Ring devices 434 + # 435 + # CONFIG_TR is not set 436 + 437 + # 438 + # Wireless LAN (non-hamradio) 439 + # 440 + # CONFIG_NET_RADIO is not set 441 + 442 + # 443 + # Wan interfaces 444 + # 445 + # CONFIG_WAN is not set 446 + # CONFIG_FDDI is not set 447 + # CONFIG_HIPPI is not set 448 + # CONFIG_PPP is not set 449 + # CONFIG_SLIP is not set 450 + # CONFIG_SHAPER is not set 451 + # CONFIG_NETCONSOLE is not set 452 + # CONFIG_NETPOLL is not set 453 + # CONFIG_NET_POLL_CONTROLLER is not set 454 + 455 + # 456 + # ISDN subsystem 457 + # 458 + # CONFIG_ISDN is not set 459 + 460 + # 461 + # Telephony Support 462 + # 463 + # CONFIG_PHONE is not set 464 + 465 + # 466 + # Input device support 467 + # 468 + CONFIG_INPUT=y 469 + 470 + # 471 + # Userland interfaces 472 + # 473 + # CONFIG_INPUT_MOUSEDEV is not set 474 + # CONFIG_INPUT_JOYDEV is not set 475 + # CONFIG_INPUT_TSDEV is not set 476 + # CONFIG_INPUT_EVDEV is not set 477 + # CONFIG_INPUT_EVBUG is not set 478 + 479 + # 480 + # Input Device Drivers 481 + # 482 + # CONFIG_INPUT_KEYBOARD is not set 483 + # CONFIG_INPUT_MOUSE is not set 484 + # CONFIG_INPUT_JOYSTICK is not set 485 + # CONFIG_INPUT_TOUCHSCREEN is not set 486 + # CONFIG_INPUT_MISC is not set 487 + 488 + # 489 + # Hardware I/O ports 490 + # 491 + # CONFIG_SERIO is not set 492 + # CONFIG_GAMEPORT is not set 493 + 494 + # 495 + # Character devices 496 + # 497 + # CONFIG_VT is not set 498 + # CONFIG_SERIAL_NONSTANDARD is not set 499 + 500 + # 501 + # Serial drivers 502 + # 503 + CONFIG_SERIAL_8250=y 504 + CONFIG_SERIAL_8250_CONSOLE=y 505 + CONFIG_SERIAL_8250_NR_UARTS=4 506 + CONFIG_SERIAL_8250_RUNTIME_UARTS=4 507 + # CONFIG_SERIAL_8250_EXTENDED is not set 508 + 509 + # 510 + # Non-8250 serial port support 511 + # 512 + CONFIG_SERIAL_CORE=y 513 + CONFIG_SERIAL_CORE_CONSOLE=y 514 + CONFIG_UNIX98_PTYS=y 515 + CONFIG_LEGACY_PTYS=y 516 + CONFIG_LEGACY_PTY_COUNT=256 517 + 518 + # 519 + # IPMI 520 + # 521 + # CONFIG_IPMI_HANDLER is not set 522 + 523 + # 524 + # Watchdog Cards 525 + # 526 + CONFIG_WATCHDOG=y 527 + # CONFIG_WATCHDOG_NOWAYOUT is not set 528 + 529 + # 530 + # Watchdog Device Drivers 531 + # 532 + # CONFIG_SOFT_WATCHDOG is not set 533 + CONFIG_83xx_WDT=y 534 + 535 + # 536 + # PCI-based Watchdog Cards 537 + # 538 + # CONFIG_PCIPCWATCHDOG is not set 539 + # CONFIG_WDTPCI is not set 540 + # CONFIG_NVRAM is not set 541 + CONFIG_GEN_RTC=y 542 + # CONFIG_GEN_RTC_X is not set 543 + # CONFIG_DTLK is not set 544 + # CONFIG_R3964 is not set 545 + # CONFIG_APPLICOM is not set 546 + 547 + # 548 + # Ftape, the floppy tape device driver 549 + # 550 + # CONFIG_AGP is not set 551 + # CONFIG_DRM is not set 552 + # CONFIG_RAW_DRIVER is not set 553 + 554 + # 555 + # TPM devices 556 + # 557 + # CONFIG_TCG_TPM is not set 558 + # CONFIG_TELCLOCK is not set 559 + 560 + # 561 + # I2C support 562 + # 563 + CONFIG_I2C=y 564 + CONFIG_I2C_CHARDEV=y 565 + 566 + # 567 + # I2C Algorithms 568 + # 569 + # CONFIG_I2C_ALGOBIT is not set 570 + # CONFIG_I2C_ALGOPCF is not set 571 + # CONFIG_I2C_ALGOPCA is not set 572 + 573 + # 574 + # I2C Hardware Bus support 575 + # 576 + # CONFIG_I2C_ALI1535 is not set 577 + # CONFIG_I2C_ALI1563 is not set 578 + # CONFIG_I2C_ALI15X3 is not set 579 + # CONFIG_I2C_AMD756 is not set 580 + # CONFIG_I2C_AMD8111 is not set 581 + # CONFIG_I2C_I801 is not set 582 + # CONFIG_I2C_I810 is not set 583 + # CONFIG_I2C_PIIX4 is not set 584 + CONFIG_I2C_MPC=y 585 + # CONFIG_I2C_NFORCE2 is not set 586 + # CONFIG_I2C_PARPORT_LIGHT is not set 587 + # CONFIG_I2C_PROSAVAGE is not set 588 + # CONFIG_I2C_SAVAGE4 is not set 589 + # CONFIG_SCx200_ACB is not set 590 + # CONFIG_I2C_SIS5595 is not set 591 + # CONFIG_I2C_SIS630 is not set 592 + # CONFIG_I2C_SIS96X is not set 593 + # CONFIG_I2C_STUB is not set 594 + # CONFIG_I2C_VIA is not set 595 + # CONFIG_I2C_VIAPRO is not set 596 + # CONFIG_I2C_VOODOO3 is not set 597 + # CONFIG_I2C_PCA_ISA is not set 598 + 599 + # 600 + # Miscellaneous I2C Chip support 601 + # 602 + # CONFIG_SENSORS_DS1337 is not set 603 + # CONFIG_SENSORS_DS1374 is not set 604 + # CONFIG_SENSORS_EEPROM is not set 605 + # CONFIG_SENSORS_PCF8574 is not set 606 + # CONFIG_SENSORS_PCA9539 is not set 607 + # CONFIG_SENSORS_PCF8591 is not set 608 + # CONFIG_SENSORS_RTC8564 is not set 609 + # CONFIG_SENSORS_M41T00 is not set 610 + # CONFIG_SENSORS_MAX6875 is not set 611 + # CONFIG_RTC_X1205_I2C is not set 612 + # CONFIG_I2C_DEBUG_CORE is not set 613 + # CONFIG_I2C_DEBUG_ALGO is not set 614 + # CONFIG_I2C_DEBUG_BUS is not set 615 + # CONFIG_I2C_DEBUG_CHIP is not set 616 + 617 + # 618 + # Dallas's 1-wire bus 619 + # 620 + # CONFIG_W1 is not set 621 + 622 + # 623 + # Hardware Monitoring support 624 + # 625 + CONFIG_HWMON=y 626 + # CONFIG_HWMON_VID is not set 627 + # CONFIG_SENSORS_ADM1021 is not set 628 + # CONFIG_SENSORS_ADM1025 is not set 629 + # CONFIG_SENSORS_ADM1026 is not set 630 + # CONFIG_SENSORS_ADM1031 is not set 631 + # CONFIG_SENSORS_ADM9240 is not set 632 + # CONFIG_SENSORS_ASB100 is not set 633 + # CONFIG_SENSORS_ATXP1 is not set 634 + # CONFIG_SENSORS_DS1621 is not set 635 + # CONFIG_SENSORS_FSCHER is not set 636 + # CONFIG_SENSORS_FSCPOS is not set 637 + # CONFIG_SENSORS_GL518SM is not set 638 + # CONFIG_SENSORS_GL520SM is not set 639 + # CONFIG_SENSORS_IT87 is not set 640 + # CONFIG_SENSORS_LM63 is not set 641 + # CONFIG_SENSORS_LM75 is not set 642 + # CONFIG_SENSORS_LM77 is not set 643 + # CONFIG_SENSORS_LM78 is not set 644 + # CONFIG_SENSORS_LM80 is not set 645 + # CONFIG_SENSORS_LM83 is not set 646 + # CONFIG_SENSORS_LM85 is not set 647 + # CONFIG_SENSORS_LM87 is not set 648 + # CONFIG_SENSORS_LM90 is not set 649 + # CONFIG_SENSORS_LM92 is not set 650 + # CONFIG_SENSORS_MAX1619 is not set 651 + # CONFIG_SENSORS_PC87360 is not set 652 + # CONFIG_SENSORS_SIS5595 is not set 653 + # CONFIG_SENSORS_SMSC47M1 is not set 654 + # CONFIG_SENSORS_SMSC47B397 is not set 655 + # CONFIG_SENSORS_VIA686A is not set 656 + # CONFIG_SENSORS_VT8231 is not set 657 + # CONFIG_SENSORS_W83781D is not set 658 + # CONFIG_SENSORS_W83792D is not set 659 + # CONFIG_SENSORS_W83L785TS is not set 660 + # CONFIG_SENSORS_W83627HF is not set 661 + # CONFIG_SENSORS_W83627EHF is not set 662 + # CONFIG_HWMON_DEBUG_CHIP is not set 663 + 664 + # 665 + # Misc devices 666 + # 667 + 668 + # 669 + # Multimedia Capabilities Port drivers 670 + # 671 + 672 + # 673 + # Multimedia devices 674 + # 675 + # CONFIG_VIDEO_DEV is not set 676 + 677 + # 678 + # Digital Video Broadcasting Devices 679 + # 680 + # CONFIG_DVB is not set 681 + 682 + # 683 + # Graphics support 684 + # 685 + # CONFIG_FB is not set 686 + 687 + # 688 + # Sound 689 + # 690 + # CONFIG_SOUND is not set 691 + 692 + # 693 + # USB support 694 + # 695 + CONFIG_USB_ARCH_HAS_HCD=y 696 + CONFIG_USB_ARCH_HAS_OHCI=y 697 + # CONFIG_USB is not set 698 + 699 + # 700 + # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 701 + # 702 + 703 + # 704 + # USB Gadget Support 705 + # 706 + # CONFIG_USB_GADGET is not set 707 + 708 + # 709 + # MMC/SD Card support 710 + # 711 + # CONFIG_MMC is not set 712 + 713 + # 714 + # InfiniBand support 715 + # 716 + # CONFIG_INFINIBAND is not set 717 + 718 + # 719 + # SN Devices 720 + # 721 + 722 + # 723 + # File systems 724 + # 725 + CONFIG_EXT2_FS=y 726 + # CONFIG_EXT2_FS_XATTR is not set 727 + # CONFIG_EXT2_FS_XIP is not set 728 + CONFIG_EXT3_FS=y 729 + CONFIG_EXT3_FS_XATTR=y 730 + # CONFIG_EXT3_FS_POSIX_ACL is not set 731 + # CONFIG_EXT3_FS_SECURITY is not set 732 + CONFIG_JBD=y 733 + # CONFIG_JBD_DEBUG is not set 734 + CONFIG_FS_MBCACHE=y 735 + # CONFIG_REISERFS_FS is not set 736 + # CONFIG_JFS_FS is not set 737 + # CONFIG_FS_POSIX_ACL is not set 738 + # CONFIG_XFS_FS is not set 739 + # CONFIG_OCFS2_FS is not set 740 + # CONFIG_MINIX_FS is not set 741 + # CONFIG_ROMFS_FS is not set 742 + CONFIG_INOTIFY=y 743 + # CONFIG_QUOTA is not set 744 + CONFIG_DNOTIFY=y 745 + # CONFIG_AUTOFS_FS is not set 746 + # CONFIG_AUTOFS4_FS is not set 747 + # CONFIG_FUSE_FS is not set 748 + 749 + # 750 + # CD-ROM/DVD Filesystems 751 + # 752 + # CONFIG_ISO9660_FS is not set 753 + # CONFIG_UDF_FS is not set 754 + 755 + # 756 + # DOS/FAT/NT Filesystems 757 + # 758 + # CONFIG_MSDOS_FS is not set 759 + # CONFIG_VFAT_FS is not set 760 + # CONFIG_NTFS_FS is not set 761 + 762 + # 763 + # Pseudo filesystems 764 + # 765 + CONFIG_PROC_FS=y 766 + CONFIG_PROC_KCORE=y 767 + CONFIG_SYSFS=y 768 + CONFIG_TMPFS=y 769 + # CONFIG_HUGETLB_PAGE is not set 770 + CONFIG_RAMFS=y 771 + # CONFIG_RELAYFS_FS is not set 772 + # CONFIG_CONFIGFS_FS is not set 773 + 774 + # 775 + # Miscellaneous filesystems 776 + # 777 + # CONFIG_ADFS_FS is not set 778 + # CONFIG_AFFS_FS is not set 779 + # CONFIG_HFS_FS is not set 780 + # CONFIG_HFSPLUS_FS is not set 781 + # CONFIG_BEFS_FS is not set 782 + # CONFIG_BFS_FS is not set 783 + # CONFIG_EFS_FS is not set 784 + # CONFIG_CRAMFS is not set 785 + # CONFIG_VXFS_FS is not set 786 + # CONFIG_HPFS_FS is not set 787 + # CONFIG_QNX4FS_FS is not set 788 + # CONFIG_SYSV_FS is not set 789 + # CONFIG_UFS_FS is not set 790 + 791 + # 792 + # Network File Systems 793 + # 794 + CONFIG_NFS_FS=y 795 + CONFIG_NFS_V3=y 796 + # CONFIG_NFS_V3_ACL is not set 797 + CONFIG_NFS_V4=y 798 + # CONFIG_NFS_DIRECTIO is not set 799 + # CONFIG_NFSD is not set 800 + CONFIG_ROOT_NFS=y 801 + CONFIG_LOCKD=y 802 + CONFIG_LOCKD_V4=y 803 + CONFIG_NFS_COMMON=y 804 + CONFIG_SUNRPC=y 805 + CONFIG_SUNRPC_GSS=y 806 + CONFIG_RPCSEC_GSS_KRB5=y 807 + # CONFIG_RPCSEC_GSS_SPKM3 is not set 808 + # CONFIG_SMB_FS is not set 809 + # CONFIG_CIFS is not set 810 + # CONFIG_NCP_FS is not set 811 + # CONFIG_CODA_FS is not set 812 + # CONFIG_AFS_FS is not set 813 + # CONFIG_9P_FS is not set 814 + 815 + # 816 + # Partition Types 817 + # 818 + CONFIG_PARTITION_ADVANCED=y 819 + # CONFIG_ACORN_PARTITION is not set 820 + # CONFIG_OSF_PARTITION is not set 821 + # CONFIG_AMIGA_PARTITION is not set 822 + # CONFIG_ATARI_PARTITION is not set 823 + # CONFIG_MAC_PARTITION is not set 824 + # CONFIG_MSDOS_PARTITION is not set 825 + # CONFIG_LDM_PARTITION is not set 826 + # CONFIG_SGI_PARTITION is not set 827 + # CONFIG_ULTRIX_PARTITION is not set 828 + # CONFIG_SUN_PARTITION is not set 829 + # CONFIG_EFI_PARTITION is not set 830 + 831 + # 832 + # Native Language Support 833 + # 834 + # CONFIG_NLS is not set 835 + 836 + # 837 + # Library routines 838 + # 839 + # CONFIG_CRC_CCITT is not set 840 + # CONFIG_CRC16 is not set 841 + CONFIG_CRC32=y 842 + # CONFIG_LIBCRC32C is not set 843 + 844 + # 845 + # Instrumentation Support 846 + # 847 + # CONFIG_PROFILING is not set 848 + 849 + # 850 + # Kernel hacking 851 + # 852 + # CONFIG_PRINTK_TIME is not set 853 + # CONFIG_MAGIC_SYSRQ is not set 854 + # CONFIG_DEBUG_KERNEL is not set 855 + CONFIG_LOG_BUF_SHIFT=14 856 + # CONFIG_BOOTX_TEXT is not set 857 + # CONFIG_SERIAL_TEXT_DEBUG is not set 858 + # CONFIG_PPC_EARLY_DEBUG_LPAR is not set 859 + # CONFIG_PPC_EARLY_DEBUG_G5 is not set 860 + # CONFIG_PPC_EARLY_DEBUG_RTAS is not set 861 + # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set 862 + # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set 863 + 864 + # 865 + # Security options 866 + # 867 + # CONFIG_KEYS is not set 868 + # CONFIG_SECURITY is not set 869 + 870 + # 871 + # Cryptographic options 872 + # 873 + CONFIG_CRYPTO=y 874 + # CONFIG_CRYPTO_HMAC is not set 875 + # CONFIG_CRYPTO_NULL is not set 876 + # CONFIG_CRYPTO_MD4 is not set 877 + CONFIG_CRYPTO_MD5=y 878 + # CONFIG_CRYPTO_SHA1 is not set 879 + # CONFIG_CRYPTO_SHA256 is not set 880 + # CONFIG_CRYPTO_SHA512 is not set 881 + # CONFIG_CRYPTO_WP512 is not set 882 + # CONFIG_CRYPTO_TGR192 is not set 883 + CONFIG_CRYPTO_DES=y 884 + # CONFIG_CRYPTO_BLOWFISH is not set 885 + # CONFIG_CRYPTO_TWOFISH is not set 886 + # CONFIG_CRYPTO_SERPENT is not set 887 + # CONFIG_CRYPTO_AES is not set 888 + # CONFIG_CRYPTO_CAST5 is not set 889 + # CONFIG_CRYPTO_CAST6 is not set 890 + # CONFIG_CRYPTO_TEA is not set 891 + # CONFIG_CRYPTO_ARC4 is not set 892 + # CONFIG_CRYPTO_KHAZAD is not set 893 + # CONFIG_CRYPTO_ANUBIS is not set 894 + # CONFIG_CRYPTO_DEFLATE is not set 895 + # CONFIG_CRYPTO_MICHAEL_MIC is not set 896 + # CONFIG_CRYPTO_CRC32C is not set 897 + # CONFIG_CRYPTO_TEST is not set 898 + 899 + # 900 + # Hardware crypto devices 901 + # 902 + 903 + # 904 + # SEC2.x Options 905 + # 906 + CONFIG_MPC8349E_SEC2x=y 907 + 908 + # 909 + # SEC2.x Test Options 910 + # 911 + CONFIG_MPC8349E_SEC2xTEST=y
+1 -1
arch/powerpc/kernel/asm-offsets.c
··· 135 135 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc)); 136 136 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb)); 137 137 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp)); 138 - DEFINE(PACALPPACA, offsetof(struct paca_struct, lppaca)); 138 + DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr)); 139 139 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id)); 140 140 141 141 DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
+2 -2
arch/powerpc/kernel/cpu_setup_power4.S
··· 130 130 mfcr r7 131 131 132 132 /* Get storage ptr */ 133 - LOADADDR(r5,cpu_state_storage) 133 + LOAD_REG_IMMEDIATE(r5,cpu_state_storage) 134 134 135 135 /* We only deal with 970 for now */ 136 136 mfspr r0,SPRN_PVR ··· 164 164 /* Get storage ptr (FIXME when using anton reloc as we 165 165 * are running with translation disabled here 166 166 */ 167 - LOADADDR(r5,cpu_state_storage) 167 + LOAD_REG_IMMEDIATE(r5,cpu_state_storage) 168 168 169 169 /* We only deal with 970 for now */ 170 170 mfspr r0,SPRN_PVR
+154 -70
arch/powerpc/kernel/cputable.c
··· 55 55 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 56 56 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5) 57 57 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS) 58 - 58 + #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 59 + PPC_FEATURE_BOOKE) 59 60 60 61 /* We only set the spe features if the kernel was compiled with 61 62 * spe support ··· 80 79 .num_pmcs = 8, 81 80 .cpu_setup = __setup_cpu_power3, 82 81 .oprofile_cpu_type = "ppc64/power3", 83 - .oprofile_type = RS64, 82 + .oprofile_type = PPC_OPROFILE_RS64, 83 + .platform = "power3", 84 84 }, 85 85 { /* Power3+ */ 86 86 .pvr_mask = 0xffff0000, ··· 94 92 .num_pmcs = 8, 95 93 .cpu_setup = __setup_cpu_power3, 96 94 .oprofile_cpu_type = "ppc64/power3", 97 - .oprofile_type = RS64, 95 + .oprofile_type = PPC_OPROFILE_RS64, 96 + .platform = "power3", 98 97 }, 99 98 { /* Northstar */ 100 99 .pvr_mask = 0xffff0000, ··· 108 105 .num_pmcs = 8, 109 106 .cpu_setup = __setup_cpu_power3, 110 107 .oprofile_cpu_type = "ppc64/rs64", 111 - .oprofile_type = RS64, 108 + .oprofile_type = PPC_OPROFILE_RS64, 109 + .platform = "rs64", 112 110 }, 113 111 { /* Pulsar */ 114 112 .pvr_mask = 0xffff0000, ··· 122 118 .num_pmcs = 8, 123 119 .cpu_setup = __setup_cpu_power3, 124 120 .oprofile_cpu_type = "ppc64/rs64", 125 - .oprofile_type = RS64, 121 + .oprofile_type = PPC_OPROFILE_RS64, 122 + .platform = "rs64", 126 123 }, 127 124 { /* I-star */ 128 125 .pvr_mask = 0xffff0000, ··· 136 131 .num_pmcs = 8, 137 132 .cpu_setup = __setup_cpu_power3, 138 133 .oprofile_cpu_type = "ppc64/rs64", 139 - .oprofile_type = RS64, 134 + .oprofile_type = PPC_OPROFILE_RS64, 135 + .platform = "rs64", 140 136 }, 141 137 { /* S-star */ 142 138 .pvr_mask = 0xffff0000, ··· 150 144 .num_pmcs = 8, 151 145 .cpu_setup = __setup_cpu_power3, 152 146 .oprofile_cpu_type = "ppc64/rs64", 153 - .oprofile_type = RS64, 147 + .oprofile_type = PPC_OPROFILE_RS64, 148 + .platform = "rs64", 154 149 }, 155 150 { /* Power4 */ 156 151 .pvr_mask = 0xffff0000, ··· 164 157 .num_pmcs = 8, 165 158 .cpu_setup = __setup_cpu_power4, 166 159 .oprofile_cpu_type = "ppc64/power4", 167 - .oprofile_type = POWER4, 160 + .oprofile_type = PPC_OPROFILE_POWER4, 161 + .platform = "power4", 168 162 }, 169 163 { /* Power4+ */ 170 164 .pvr_mask = 0xffff0000, ··· 178 170 .num_pmcs = 8, 179 171 .cpu_setup = __setup_cpu_power4, 180 172 .oprofile_cpu_type = "ppc64/power4", 181 - .oprofile_type = POWER4, 173 + .oprofile_type = PPC_OPROFILE_POWER4, 174 + .platform = "power4", 182 175 }, 183 176 { /* PPC970 */ 184 177 .pvr_mask = 0xffff0000, ··· 193 184 .num_pmcs = 8, 194 185 .cpu_setup = __setup_cpu_ppc970, 195 186 .oprofile_cpu_type = "ppc64/970", 196 - .oprofile_type = POWER4, 187 + .oprofile_type = PPC_OPROFILE_POWER4, 188 + .platform = "ppc970", 197 189 }, 198 190 #endif /* CONFIG_PPC64 */ 199 191 #if defined(CONFIG_PPC64) || defined(CONFIG_POWER4) ··· 214 204 .num_pmcs = 8, 215 205 .cpu_setup = __setup_cpu_ppc970, 216 206 .oprofile_cpu_type = "ppc64/970", 217 - .oprofile_type = POWER4, 207 + .oprofile_type = PPC_OPROFILE_POWER4, 208 + .platform = "ppc970", 218 209 }, 219 210 #endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */ 220 211 #ifdef CONFIG_PPC64 ··· 230 219 .dcache_bsize = 128, 231 220 .cpu_setup = __setup_cpu_ppc970, 232 221 .oprofile_cpu_type = "ppc64/970", 233 - .oprofile_type = POWER4, 222 + .oprofile_type = PPC_OPROFILE_POWER4, 223 + .platform = "ppc970", 234 224 }, 235 225 { /* Power5 GR */ 236 226 .pvr_mask = 0xffff0000, ··· 244 232 .num_pmcs = 6, 245 233 .cpu_setup = __setup_cpu_power4, 246 234 .oprofile_cpu_type = "ppc64/power5", 247 - .oprofile_type = POWER4, 235 + .oprofile_type = PPC_OPROFILE_POWER4, 236 + .platform = "power5", 248 237 }, 249 238 { /* Power5 GS */ 250 239 .pvr_mask = 0xffff0000, ··· 258 245 .num_pmcs = 6, 259 246 .cpu_setup = __setup_cpu_power4, 260 247 .oprofile_cpu_type = "ppc64/power5+", 261 - .oprofile_type = POWER4, 248 + .oprofile_type = PPC_OPROFILE_POWER4, 249 + .platform = "power5+", 262 250 }, 263 251 { /* Cell Broadband Engine */ 264 252 .pvr_mask = 0xffff0000, ··· 271 257 .icache_bsize = 128, 272 258 .dcache_bsize = 128, 273 259 .cpu_setup = __setup_cpu_be, 260 + .platform = "ppc-cell-be", 274 261 }, 275 262 { /* default match */ 276 263 .pvr_mask = 0x00000000, ··· 283 268 .dcache_bsize = 128, 284 269 .num_pmcs = 6, 285 270 .cpu_setup = __setup_cpu_power4, 271 + .platform = "power4", 286 272 } 287 273 #endif /* CONFIG_PPC64 */ 288 274 #ifdef CONFIG_PPC32 ··· 297 281 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 298 282 .icache_bsize = 32, 299 283 .dcache_bsize = 32, 284 + .platform = "ppc601", 300 285 }, 301 286 { /* 603 */ 302 287 .pvr_mask = 0xffff0000, ··· 307 290 .cpu_user_features = COMMON_USER, 308 291 .icache_bsize = 32, 309 292 .dcache_bsize = 32, 310 - .cpu_setup = __setup_cpu_603 293 + .cpu_setup = __setup_cpu_603, 294 + .platform = "ppc603", 311 295 }, 312 296 { /* 603e */ 313 297 .pvr_mask = 0xffff0000, ··· 318 300 .cpu_user_features = COMMON_USER, 319 301 .icache_bsize = 32, 320 302 .dcache_bsize = 32, 321 - .cpu_setup = __setup_cpu_603 303 + .cpu_setup = __setup_cpu_603, 304 + .platform = "ppc603", 322 305 }, 323 306 { /* 603ev */ 324 307 .pvr_mask = 0xffff0000, ··· 329 310 .cpu_user_features = COMMON_USER, 330 311 .icache_bsize = 32, 331 312 .dcache_bsize = 32, 332 - .cpu_setup = __setup_cpu_603 313 + .cpu_setup = __setup_cpu_603, 314 + .platform = "ppc603", 333 315 }, 334 316 { /* 604 */ 335 317 .pvr_mask = 0xffff0000, ··· 341 321 .icache_bsize = 32, 342 322 .dcache_bsize = 32, 343 323 .num_pmcs = 2, 344 - .cpu_setup = __setup_cpu_604 324 + .cpu_setup = __setup_cpu_604, 325 + .platform = "ppc604", 345 326 }, 346 327 { /* 604e */ 347 328 .pvr_mask = 0xfffff000, ··· 353 332 .icache_bsize = 32, 354 333 .dcache_bsize = 32, 355 334 .num_pmcs = 4, 356 - .cpu_setup = __setup_cpu_604 335 + .cpu_setup = __setup_cpu_604, 336 + .platform = "ppc604", 357 337 }, 358 338 { /* 604r */ 359 339 .pvr_mask = 0xffff0000, ··· 365 343 .icache_bsize = 32, 366 344 .dcache_bsize = 32, 367 345 .num_pmcs = 4, 368 - .cpu_setup = __setup_cpu_604 346 + .cpu_setup = __setup_cpu_604, 347 + .platform = "ppc604", 369 348 }, 370 349 { /* 604ev */ 371 350 .pvr_mask = 0xffff0000, ··· 377 354 .icache_bsize = 32, 378 355 .dcache_bsize = 32, 379 356 .num_pmcs = 4, 380 - .cpu_setup = __setup_cpu_604 357 + .cpu_setup = __setup_cpu_604, 358 + .platform = "ppc604", 381 359 }, 382 360 { /* 740/750 (0x4202, don't support TAU ?) */ 383 361 .pvr_mask = 0xffffffff, ··· 389 365 .icache_bsize = 32, 390 366 .dcache_bsize = 32, 391 367 .num_pmcs = 4, 392 - .cpu_setup = __setup_cpu_750 368 + .cpu_setup = __setup_cpu_750, 369 + .platform = "ppc750", 393 370 }, 394 371 { /* 750CX (80100 and 8010x?) */ 395 372 .pvr_mask = 0xfffffff0, ··· 401 376 .icache_bsize = 32, 402 377 .dcache_bsize = 32, 403 378 .num_pmcs = 4, 404 - .cpu_setup = __setup_cpu_750cx 379 + .cpu_setup = __setup_cpu_750cx, 380 + .platform = "ppc750", 405 381 }, 406 382 { /* 750CX (82201 and 82202) */ 407 383 .pvr_mask = 0xfffffff0, ··· 413 387 .icache_bsize = 32, 414 388 .dcache_bsize = 32, 415 389 .num_pmcs = 4, 416 - .cpu_setup = __setup_cpu_750cx 390 + .cpu_setup = __setup_cpu_750cx, 391 + .platform = "ppc750", 417 392 }, 418 393 { /* 750CXe (82214) */ 419 394 .pvr_mask = 0xfffffff0, ··· 425 398 .icache_bsize = 32, 426 399 .dcache_bsize = 32, 427 400 .num_pmcs = 4, 428 - .cpu_setup = __setup_cpu_750cx 401 + .cpu_setup = __setup_cpu_750cx, 402 + .platform = "ppc750", 429 403 }, 430 404 { /* 750CXe "Gekko" (83214) */ 431 405 .pvr_mask = 0xffffffff, ··· 437 409 .icache_bsize = 32, 438 410 .dcache_bsize = 32, 439 411 .num_pmcs = 4, 440 - .cpu_setup = __setup_cpu_750cx 412 + .cpu_setup = __setup_cpu_750cx, 413 + .platform = "ppc750", 441 414 }, 442 415 { /* 745/755 */ 443 416 .pvr_mask = 0xfffff000, ··· 449 420 .icache_bsize = 32, 450 421 .dcache_bsize = 32, 451 422 .num_pmcs = 4, 452 - .cpu_setup = __setup_cpu_750 423 + .cpu_setup = __setup_cpu_750, 424 + .platform = "ppc750", 453 425 }, 454 426 { /* 750FX rev 1.x */ 455 427 .pvr_mask = 0xffffff00, ··· 461 431 .icache_bsize = 32, 462 432 .dcache_bsize = 32, 463 433 .num_pmcs = 4, 464 - .cpu_setup = __setup_cpu_750 434 + .cpu_setup = __setup_cpu_750, 435 + .platform = "ppc750", 465 436 }, 466 437 { /* 750FX rev 2.0 must disable HID0[DPM] */ 467 438 .pvr_mask = 0xffffffff, ··· 473 442 .icache_bsize = 32, 474 443 .dcache_bsize = 32, 475 444 .num_pmcs = 4, 476 - .cpu_setup = __setup_cpu_750 445 + .cpu_setup = __setup_cpu_750, 446 + .platform = "ppc750", 477 447 }, 478 448 { /* 750FX (All revs except 2.0) */ 479 449 .pvr_mask = 0xffff0000, ··· 485 453 .icache_bsize = 32, 486 454 .dcache_bsize = 32, 487 455 .num_pmcs = 4, 488 - .cpu_setup = __setup_cpu_750fx 456 + .cpu_setup = __setup_cpu_750fx, 457 + .platform = "ppc750", 489 458 }, 490 459 { /* 750GX */ 491 460 .pvr_mask = 0xffff0000, ··· 497 464 .icache_bsize = 32, 498 465 .dcache_bsize = 32, 499 466 .num_pmcs = 4, 500 - .cpu_setup = __setup_cpu_750fx 467 + .cpu_setup = __setup_cpu_750fx, 468 + .platform = "ppc750", 501 469 }, 502 470 { /* 740/750 (L2CR bit need fixup for 740) */ 503 471 .pvr_mask = 0xffff0000, ··· 509 475 .icache_bsize = 32, 510 476 .dcache_bsize = 32, 511 477 .num_pmcs = 4, 512 - .cpu_setup = __setup_cpu_750 478 + .cpu_setup = __setup_cpu_750, 479 + .platform = "ppc750", 513 480 }, 514 481 { /* 7400 rev 1.1 ? (no TAU) */ 515 482 .pvr_mask = 0xffffffff, ··· 521 486 .icache_bsize = 32, 522 487 .dcache_bsize = 32, 523 488 .num_pmcs = 4, 524 - .cpu_setup = __setup_cpu_7400 489 + .cpu_setup = __setup_cpu_7400, 490 + .platform = "ppc7400", 525 491 }, 526 492 { /* 7400 */ 527 493 .pvr_mask = 0xffff0000, ··· 533 497 .icache_bsize = 32, 534 498 .dcache_bsize = 32, 535 499 .num_pmcs = 4, 536 - .cpu_setup = __setup_cpu_7400 500 + .cpu_setup = __setup_cpu_7400, 501 + .platform = "ppc7400", 537 502 }, 538 503 { /* 7410 */ 539 504 .pvr_mask = 0xffff0000, ··· 545 508 .icache_bsize = 32, 546 509 .dcache_bsize = 32, 547 510 .num_pmcs = 4, 548 - .cpu_setup = __setup_cpu_7410 511 + .cpu_setup = __setup_cpu_7410, 512 + .platform = "ppc7400", 549 513 }, 550 514 { /* 7450 2.0 - no doze/nap */ 551 515 .pvr_mask = 0xffffffff, ··· 559 521 .num_pmcs = 6, 560 522 .cpu_setup = __setup_cpu_745x, 561 523 .oprofile_cpu_type = "ppc/7450", 562 - .oprofile_type = G4, 524 + .oprofile_type = PPC_OPROFILE_G4, 525 + .platform = "ppc7450", 563 526 }, 564 527 { /* 7450 2.1 */ 565 528 .pvr_mask = 0xffffffff, ··· 573 534 .num_pmcs = 6, 574 535 .cpu_setup = __setup_cpu_745x, 575 536 .oprofile_cpu_type = "ppc/7450", 576 - .oprofile_type = G4, 537 + .oprofile_type = PPC_OPROFILE_G4, 538 + .platform = "ppc7450", 577 539 }, 578 540 { /* 7450 2.3 and newer */ 579 541 .pvr_mask = 0xffff0000, ··· 587 547 .num_pmcs = 6, 588 548 .cpu_setup = __setup_cpu_745x, 589 549 .oprofile_cpu_type = "ppc/7450", 590 - .oprofile_type = G4, 550 + .oprofile_type = PPC_OPROFILE_G4, 551 + .platform = "ppc7450", 591 552 }, 592 553 { /* 7455 rev 1.x */ 593 554 .pvr_mask = 0xffffff00, ··· 601 560 .num_pmcs = 6, 602 561 .cpu_setup = __setup_cpu_745x, 603 562 .oprofile_cpu_type = "ppc/7450", 604 - .oprofile_type = G4, 563 + .oprofile_type = PPC_OPROFILE_G4, 564 + .platform = "ppc7450", 605 565 }, 606 566 { /* 7455 rev 2.0 */ 607 567 .pvr_mask = 0xffffffff, ··· 615 573 .num_pmcs = 6, 616 574 .cpu_setup = __setup_cpu_745x, 617 575 .oprofile_cpu_type = "ppc/7450", 618 - .oprofile_type = G4, 576 + .oprofile_type = PPC_OPROFILE_G4, 577 + .platform = "ppc7450", 619 578 }, 620 579 { /* 7455 others */ 621 580 .pvr_mask = 0xffff0000, ··· 629 586 .num_pmcs = 6, 630 587 .cpu_setup = __setup_cpu_745x, 631 588 .oprofile_cpu_type = "ppc/7450", 632 - .oprofile_type = G4, 589 + .oprofile_type = PPC_OPROFILE_G4, 590 + .platform = "ppc7450", 633 591 }, 634 592 { /* 7447/7457 Rev 1.0 */ 635 593 .pvr_mask = 0xffffffff, ··· 643 599 .num_pmcs = 6, 644 600 .cpu_setup = __setup_cpu_745x, 645 601 .oprofile_cpu_type = "ppc/7450", 646 - .oprofile_type = G4, 602 + .oprofile_type = PPC_OPROFILE_G4, 603 + .platform = "ppc7450", 647 604 }, 648 605 { /* 7447/7457 Rev 1.1 */ 649 606 .pvr_mask = 0xffffffff, ··· 657 612 .num_pmcs = 6, 658 613 .cpu_setup = __setup_cpu_745x, 659 614 .oprofile_cpu_type = "ppc/7450", 660 - .oprofile_type = G4, 615 + .oprofile_type = PPC_OPROFILE_G4, 616 + .platform = "ppc7450", 661 617 }, 662 618 { /* 7447/7457 Rev 1.2 and later */ 663 619 .pvr_mask = 0xffff0000, ··· 671 625 .num_pmcs = 6, 672 626 .cpu_setup = __setup_cpu_745x, 673 627 .oprofile_cpu_type = "ppc/7450", 674 - .oprofile_type = G4, 628 + .oprofile_type = PPC_OPROFILE_G4, 629 + .platform = "ppc7450", 675 630 }, 676 631 { /* 7447A */ 677 632 .pvr_mask = 0xffff0000, ··· 685 638 .num_pmcs = 6, 686 639 .cpu_setup = __setup_cpu_745x, 687 640 .oprofile_cpu_type = "ppc/7450", 688 - .oprofile_type = G4, 641 + .oprofile_type = PPC_OPROFILE_G4, 642 + .platform = "ppc7450", 689 643 }, 690 644 { /* 7448 */ 691 645 .pvr_mask = 0xffff0000, ··· 699 651 .num_pmcs = 6, 700 652 .cpu_setup = __setup_cpu_745x, 701 653 .oprofile_cpu_type = "ppc/7450", 702 - .oprofile_type = G4, 654 + .oprofile_type = PPC_OPROFILE_G4, 655 + .platform = "ppc7450", 703 656 }, 704 657 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 705 658 .pvr_mask = 0x7fff0000, ··· 710 661 .cpu_user_features = COMMON_USER, 711 662 .icache_bsize = 32, 712 663 .dcache_bsize = 32, 713 - .cpu_setup = __setup_cpu_603 664 + .cpu_setup = __setup_cpu_603, 665 + .platform = "ppc603", 714 666 }, 715 667 { /* All G2_LE (603e core, plus some) have the same pvr */ 716 668 .pvr_mask = 0x7fff0000, ··· 721 671 .cpu_user_features = COMMON_USER, 722 672 .icache_bsize = 32, 723 673 .dcache_bsize = 32, 724 - .cpu_setup = __setup_cpu_603 674 + .cpu_setup = __setup_cpu_603, 675 + .platform = "ppc603", 725 676 }, 726 677 { /* e300 (a 603e core, plus some) on 83xx */ 727 678 .pvr_mask = 0x7fff0000, ··· 732 681 .cpu_user_features = COMMON_USER, 733 682 .icache_bsize = 32, 734 683 .dcache_bsize = 32, 735 - .cpu_setup = __setup_cpu_603 684 + .cpu_setup = __setup_cpu_603, 685 + .platform = "ppc603", 736 686 }, 737 687 { /* default match, we assume split I/D cache & TB (non-601)... */ 738 688 .pvr_mask = 0x00000000, ··· 743 691 .cpu_user_features = COMMON_USER, 744 692 .icache_bsize = 32, 745 693 .dcache_bsize = 32, 694 + .platform = "ppc603", 746 695 }, 747 696 #endif /* CLASSIC_PPC */ 748 697 #ifdef CONFIG_8xx ··· 757 704 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 758 705 .icache_bsize = 16, 759 706 .dcache_bsize = 16, 707 + .platform = "ppc823", 760 708 }, 761 709 #endif /* CONFIG_8xx */ 762 710 #ifdef CONFIG_40x ··· 769 715 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 770 716 .icache_bsize = 16, 771 717 .dcache_bsize = 16, 718 + .platform = "ppc403", 772 719 }, 773 720 { /* 403GCX */ 774 721 .pvr_mask = 0xffffff00, ··· 780 725 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 781 726 .icache_bsize = 16, 782 727 .dcache_bsize = 16, 728 + .platform = "ppc403", 783 729 }, 784 730 { /* 403G ?? */ 785 731 .pvr_mask = 0xffff0000, ··· 790 734 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 791 735 .icache_bsize = 16, 792 736 .dcache_bsize = 16, 737 + .platform = "ppc403", 793 738 }, 794 739 { /* 405GP */ 795 740 .pvr_mask = 0xffff0000, ··· 801 744 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 802 745 .icache_bsize = 32, 803 746 .dcache_bsize = 32, 747 + .platform = "ppc405", 804 748 }, 805 749 { /* STB 03xxx */ 806 750 .pvr_mask = 0xffff0000, ··· 812 754 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 813 755 .icache_bsize = 32, 814 756 .dcache_bsize = 32, 757 + .platform = "ppc405", 815 758 }, 816 759 { /* STB 04xxx */ 817 760 .pvr_mask = 0xffff0000, ··· 823 764 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 824 765 .icache_bsize = 32, 825 766 .dcache_bsize = 32, 767 + .platform = "ppc405", 826 768 }, 827 769 { /* NP405L */ 828 770 .pvr_mask = 0xffff0000, ··· 834 774 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 835 775 .icache_bsize = 32, 836 776 .dcache_bsize = 32, 777 + .platform = "ppc405", 837 778 }, 838 779 { /* NP4GS3 */ 839 780 .pvr_mask = 0xffff0000, ··· 845 784 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 846 785 .icache_bsize = 32, 847 786 .dcache_bsize = 32, 787 + .platform = "ppc405", 848 788 }, 849 789 { /* NP405H */ 850 790 .pvr_mask = 0xffff0000, ··· 856 794 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 857 795 .icache_bsize = 32, 858 796 .dcache_bsize = 32, 797 + .platform = "ppc405", 859 798 }, 860 799 { /* 405GPr */ 861 800 .pvr_mask = 0xffff0000, ··· 867 804 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 868 805 .icache_bsize = 32, 869 806 .dcache_bsize = 32, 807 + .platform = "ppc405", 870 808 }, 871 809 { /* STBx25xx */ 872 810 .pvr_mask = 0xffff0000, ··· 878 814 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 879 815 .icache_bsize = 32, 880 816 .dcache_bsize = 32, 817 + .platform = "ppc405", 881 818 }, 882 819 { /* 405LP */ 883 820 .pvr_mask = 0xffff0000, ··· 888 823 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 889 824 .icache_bsize = 32, 890 825 .dcache_bsize = 32, 826 + .platform = "ppc405", 891 827 }, 892 828 { /* Xilinx Virtex-II Pro */ 893 829 .pvr_mask = 0xffff0000, ··· 899 833 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 900 834 .icache_bsize = 32, 901 835 .dcache_bsize = 32, 836 + .platform = "ppc405", 902 837 }, 903 838 { /* 405EP */ 904 839 .pvr_mask = 0xffff0000, ··· 910 843 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 911 844 .icache_bsize = 32, 912 845 .dcache_bsize = 32, 846 + .platform = "ppc405", 913 847 }, 914 848 915 849 #endif /* CONFIG_40x */ ··· 920 852 .pvr_value = 0x40000850, 921 853 .cpu_name = "440EP Rev. A", 922 854 .cpu_features = CPU_FTRS_44X, 923 - .cpu_user_features = COMMON_USER, /* 440EP has an FPU */ 855 + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 924 856 .icache_bsize = 32, 925 857 .dcache_bsize = 32, 858 + .platform = "ppc440", 926 859 }, 927 860 { 928 861 .pvr_mask = 0xf0000fff, 929 862 .pvr_value = 0x400008d3, 930 863 .cpu_name = "440EP Rev. B", 931 864 .cpu_features = CPU_FTRS_44X, 932 - .cpu_user_features = COMMON_USER, /* 440EP has an FPU */ 865 + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 933 866 .icache_bsize = 32, 934 867 .dcache_bsize = 32, 868 + .platform = "ppc440", 935 869 }, 936 870 { /* 440GP Rev. B */ 937 871 .pvr_mask = 0xf0000fff, 938 872 .pvr_value = 0x40000440, 939 873 .cpu_name = "440GP Rev. B", 940 874 .cpu_features = CPU_FTRS_44X, 941 - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 875 + .cpu_user_features = COMMON_USER_BOOKE, 942 876 .icache_bsize = 32, 943 877 .dcache_bsize = 32, 878 + .platform = "ppc440gp", 944 879 }, 945 880 { /* 440GP Rev. C */ 946 881 .pvr_mask = 0xf0000fff, 947 882 .pvr_value = 0x40000481, 948 883 .cpu_name = "440GP Rev. C", 949 884 .cpu_features = CPU_FTRS_44X, 950 - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 885 + .cpu_user_features = COMMON_USER_BOOKE, 951 886 .icache_bsize = 32, 952 887 .dcache_bsize = 32, 888 + .platform = "ppc440gp", 953 889 }, 954 890 { /* 440GX Rev. A */ 955 891 .pvr_mask = 0xf0000fff, 956 892 .pvr_value = 0x50000850, 957 893 .cpu_name = "440GX Rev. A", 958 894 .cpu_features = CPU_FTRS_44X, 959 - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 895 + .cpu_user_features = COMMON_USER_BOOKE, 960 896 .icache_bsize = 32, 961 897 .dcache_bsize = 32, 898 + .platform = "ppc440", 962 899 }, 963 900 { /* 440GX Rev. B */ 964 901 .pvr_mask = 0xf0000fff, 965 902 .pvr_value = 0x50000851, 966 903 .cpu_name = "440GX Rev. B", 967 904 .cpu_features = CPU_FTRS_44X, 968 - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 905 + .cpu_user_features = COMMON_USER_BOOKE, 969 906 .icache_bsize = 32, 970 907 .dcache_bsize = 32, 908 + .platform = "ppc440", 971 909 }, 972 910 { /* 440GX Rev. C */ 973 911 .pvr_mask = 0xf0000fff, 974 912 .pvr_value = 0x50000892, 975 913 .cpu_name = "440GX Rev. C", 976 914 .cpu_features = CPU_FTRS_44X, 977 - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 915 + .cpu_user_features = COMMON_USER_BOOKE, 978 916 .icache_bsize = 32, 979 917 .dcache_bsize = 32, 918 + .platform = "ppc440", 980 919 }, 981 920 { /* 440GX Rev. F */ 982 921 .pvr_mask = 0xf0000fff, 983 922 .pvr_value = 0x50000894, 984 923 .cpu_name = "440GX Rev. F", 985 924 .cpu_features = CPU_FTRS_44X, 986 - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 925 + .cpu_user_features = COMMON_USER_BOOKE, 987 926 .icache_bsize = 32, 988 927 .dcache_bsize = 32, 928 + .platform = "ppc440", 989 929 }, 990 930 { /* 440SP Rev. A */ 991 931 .pvr_mask = 0xff000fff, 992 932 .pvr_value = 0x53000891, 993 933 .cpu_name = "440SP Rev. A", 994 934 .cpu_features = CPU_FTRS_44X, 995 - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 935 + .cpu_user_features = COMMON_USER_BOOKE, 996 936 .icache_bsize = 32, 997 937 .dcache_bsize = 32, 938 + .platform = "ppc440", 998 939 }, 999 940 { /* 440SPe Rev. A */ 1000 941 .pvr_mask = 0xff000fff, ··· 1011 934 .cpu_name = "440SPe Rev. A", 1012 935 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 1013 936 CPU_FTR_USE_TB, 1014 - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 937 + .cpu_user_features = COMMON_USER_BOOKE, 1015 938 .icache_bsize = 32, 1016 939 .dcache_bsize = 32, 940 + .platform = "ppc440", 1017 941 }, 1018 942 #endif /* CONFIG_44x */ 1019 943 #ifdef CONFIG_FSL_BOOKE ··· 1024 946 .cpu_name = "e200z5", 1025 947 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1026 948 .cpu_features = CPU_FTRS_E200, 1027 - .cpu_user_features = PPC_FEATURE_32 | 1028 - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE | 949 + .cpu_user_features = COMMON_USER_BOOKE | 950 + PPC_FEATURE_HAS_EFP_SINGLE | 1029 951 PPC_FEATURE_UNIFIED_CACHE, 1030 952 .dcache_bsize = 32, 953 + .platform = "ppc5554", 1031 954 }, 1032 955 { /* e200z6 */ 1033 956 .pvr_mask = 0xfff00000, ··· 1036 957 .cpu_name = "e200z6", 1037 958 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1038 959 .cpu_features = CPU_FTRS_E200, 1039 - .cpu_user_features = PPC_FEATURE_32 | 1040 - PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | 960 + .cpu_user_features = COMMON_USER_BOOKE | 961 + PPC_FEATURE_SPE_COMP | 1041 962 PPC_FEATURE_HAS_EFP_SINGLE | 1042 963 PPC_FEATURE_UNIFIED_CACHE, 1043 964 .dcache_bsize = 32, 965 + .platform = "ppc5554", 1044 966 }, 1045 967 { /* e500 */ 1046 968 .pvr_mask = 0xffff0000, ··· 1049 969 .cpu_name = "e500", 1050 970 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1051 971 .cpu_features = CPU_FTRS_E500, 1052 - .cpu_user_features = PPC_FEATURE_32 | 1053 - PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | 972 + .cpu_user_features = COMMON_USER_BOOKE | 973 + PPC_FEATURE_SPE_COMP | 1054 974 PPC_FEATURE_HAS_EFP_SINGLE, 1055 975 .icache_bsize = 32, 1056 976 .dcache_bsize = 32, 1057 977 .num_pmcs = 4, 1058 978 .oprofile_cpu_type = "ppc/e500", 1059 - .oprofile_type = BOOKE, 979 + .oprofile_type = PPC_OPROFILE_BOOKE, 980 + .platform = "ppc8540", 1060 981 }, 1061 982 { /* e500v2 */ 1062 983 .pvr_mask = 0xffff0000, ··· 1065 984 .cpu_name = "e500v2", 1066 985 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1067 986 .cpu_features = CPU_FTRS_E500_2, 1068 - .cpu_user_features = PPC_FEATURE_32 | 1069 - PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | 1070 - PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE, 987 + .cpu_user_features = COMMON_USER_BOOKE | 988 + PPC_FEATURE_SPE_COMP | 989 + PPC_FEATURE_HAS_EFP_SINGLE | 990 + PPC_FEATURE_HAS_EFP_DOUBLE, 1071 991 .icache_bsize = 32, 1072 992 .dcache_bsize = 32, 1073 993 .num_pmcs = 4, 1074 994 .oprofile_cpu_type = "ppc/e500", 1075 - .oprofile_type = BOOKE, 995 + .oprofile_type = PPC_OPROFILE_BOOKE, 996 + .platform = "ppc8548", 1076 997 }, 1077 998 #endif 1078 999 #if !CLASSIC_PPC ··· 1086 1003 .cpu_user_features = PPC_FEATURE_32, 1087 1004 .icache_bsize = 32, 1088 1005 .dcache_bsize = 32, 1006 + .platform = "powerpc", 1089 1007 } 1090 1008 #endif /* !CLASSIC_PPC */ 1091 1009 #endif /* CONFIG_PPC32 */
+1 -1
arch/powerpc/kernel/entry_32.S
··· 988 988 stwu r1,-INT_FRAME_SIZE(r1) 989 989 mflr r0 990 990 stw r0,INT_FRAME_SIZE+4(r1) 991 - LOADADDR(r4, rtas) 991 + LOAD_REG_ADDR(r4, rtas) 992 992 lis r6,1f@ha /* physical return address for rtas */ 993 993 addi r6,r6,1f@l 994 994 tophys(r6,r6)
+7 -8
arch/powerpc/kernel/entry_64.S
··· 511 511 cmpdi 0,r5,0 512 512 beq 4f 513 513 /* Check for pending interrupts (iSeries) */ 514 - ld r3,PACALPPACA+LPPACAANYINT(r13) 514 + ld r3,PACALPPACAPTR(r13) 515 + ld r3,LPPACAANYINT(r3) 515 516 cmpdi r3,0 516 517 beq+ 4f /* skip do_IRQ if no interrupts */ 517 518 ··· 690 689 std r6,PACASAVEDMSR(r13) 691 690 692 691 /* Setup our real return addr */ 693 - SET_REG_TO_LABEL(r4,.rtas_return_loc) 694 - SET_REG_TO_CONST(r9,PAGE_OFFSET) 695 - sub r4,r4,r9 692 + LOAD_REG_ADDR(r4,.rtas_return_loc) 693 + clrldi r4,r4,2 /* convert to realmode address */ 696 694 mtlr r4 697 695 698 696 li r0,0 ··· 706 706 sync /* disable interrupts so SRR0/1 */ 707 707 mtmsrd r0 /* don't get trashed */ 708 708 709 - SET_REG_TO_LABEL(r4,rtas) 709 + LOAD_REG_ADDR(r4, rtas) 710 710 ld r5,RTASENTRY(r4) /* get the rtas->entry value */ 711 711 ld r4,RTASBASE(r4) /* get the rtas->base value */ 712 712 ··· 718 718 _STATIC(rtas_return_loc) 719 719 /* relocation is off at this point */ 720 720 mfspr r4,SPRN_SPRG3 /* Get PACA */ 721 - SET_REG_TO_CONST(r5, PAGE_OFFSET) 722 - sub r4,r4,r5 /* RELOC the PACA base pointer */ 721 + clrldi r4,r4,2 /* convert to realmode address */ 723 722 724 723 mfmsr r6 725 724 li r0,MSR_RI ··· 727 728 mtmsrd r6 728 729 729 730 ld r1,PACAR1(r4) /* Restore our SP */ 730 - LOADADDR(r3,.rtas_restore_regs) 731 + LOAD_REG_IMMEDIATE(r3,.rtas_restore_regs) 731 732 ld r4,PACASAVEDMSR(r4) /* Restore our MSR */ 732 733 733 734 mtspr SPRN_SRR0,r3
+5 -5
arch/powerpc/kernel/fpu.S
··· 39 39 * to another. Instead we call giveup_fpu in switch_to. 40 40 */ 41 41 #ifndef CONFIG_SMP 42 - LOADBASE(r3, last_task_used_math) 42 + LOAD_REG_ADDRBASE(r3, last_task_used_math) 43 43 toreal(r3) 44 - PPC_LL r4,OFF(last_task_used_math)(r3) 44 + PPC_LL r4,ADDROFF(last_task_used_math)(r3) 45 45 PPC_LCMPI 0,r4,0 46 46 beq 1f 47 47 toreal(r4) ··· 77 77 #ifndef CONFIG_SMP 78 78 subi r4,r5,THREAD 79 79 fromreal(r4) 80 - PPC_STL r4,OFF(last_task_used_math)(r3) 80 + PPC_STL r4,ADDROFF(last_task_used_math)(r3) 81 81 #endif /* CONFIG_SMP */ 82 82 /* restore registers and return */ 83 83 /* we haven't used ctr or xer or lr */ ··· 113 113 1: 114 114 #ifndef CONFIG_SMP 115 115 li r5,0 116 - LOADBASE(r4,last_task_used_math) 117 - PPC_STL r5,OFF(last_task_used_math)(r4) 116 + LOAD_REG_ADDRBASE(r4,last_task_used_math) 117 + PPC_STL r5,ADDROFF(last_task_used_math)(r4) 118 118 #endif /* CONFIG_SMP */ 119 119 blr 120 120
+60 -52
arch/powerpc/kernel/head_64.S
··· 154 154 bne 100b 155 155 156 156 #ifdef CONFIG_HMT 157 - LOADADDR(r4, .hmt_init) 157 + SET_REG_IMMEDIATE(r4, .hmt_init) 158 158 mtctr r4 159 159 bctr 160 160 #else 161 161 #ifdef CONFIG_SMP 162 - LOADADDR(r4, .pSeries_secondary_smp_init) 162 + LOAD_REG_IMMEDIATE(r4, .pSeries_secondary_smp_init) 163 163 mtctr r4 164 164 mr r3,r24 165 165 bctr ··· 205 205 #define EX_LR 72 206 206 207 207 /* 208 - * We're short on space and time in the exception prolog, so we can't use 209 - * the normal LOADADDR macro. Normally we just need the low halfword of the 210 - * address, but for Kdump we need the whole low word. 208 + * We're short on space and time in the exception prolog, so we can't 209 + * use the normal SET_REG_IMMEDIATE macro. Normally we just need the 210 + * low halfword of the address, but for Kdump we need the whole low 211 + * word. 211 212 */ 212 213 #ifdef CONFIG_CRASH_DUMP 213 214 #define LOAD_HANDLER(reg, label) \ ··· 255 254 256 255 #define EXCEPTION_PROLOG_ISERIES_2 \ 257 256 mfmsr r10; \ 258 - ld r11,PACALPPACA+LPPACASRR0(r13); \ 259 - ld r12,PACALPPACA+LPPACASRR1(r13); \ 257 + ld r12,PACALPPACAPTR(r13); \ 258 + ld r11,LPPACASRR0(r12); \ 259 + ld r12,LPPACASRR1(r12); \ 260 260 ori r10,r10,MSR_RI; \ 261 261 mtmsrd r10,1 262 262 ··· 636 634 std r12,PACA_EXSLB+EX_R12(r13) 637 635 mfspr r10,SPRN_SPRG1 638 636 std r10,PACA_EXSLB+EX_R13(r13) 639 - ld r12,PACALPPACA+LPPACASRR1(r13); 637 + ld r12,PACALPPACAPTR(r13) 638 + ld r12,LPPACASRR1(r12) 640 639 b .slb_miss_realmode 641 640 642 641 STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN) ··· 647 644 mtspr SPRN_SPRG1,r13 /* save r13 */ 648 645 mfspr r13,SPRN_SPRG3 /* get paca address into r13 */ 649 646 std r3,PACA_EXSLB+EX_R3(r13) 650 - ld r3,PACALPPACA+LPPACASRR0(r13) /* get SRR0 value */ 647 + ld r3,PACALPPACAPTR(r13) 648 + ld r3,LPPACASRR0(r3) /* get SRR0 value */ 651 649 std r9,PACA_EXSLB+EX_R9(r13) 652 650 mfcr r9 653 651 #ifdef __DISABLED__ ··· 660 656 std r12,PACA_EXSLB+EX_R12(r13) 661 657 mfspr r10,SPRN_SPRG1 662 658 std r10,PACA_EXSLB+EX_R13(r13) 663 - ld r12,PACALPPACA+LPPACASRR1(r13); 659 + ld r12,PACALPPACAPTR(r13) 660 + ld r12,LPPACASRR1(r12) 664 661 b .slb_miss_realmode 665 662 666 663 #ifdef __DISABLED__ ··· 718 713 lbz r23,PACAPROCSTART(r13) /* Test if this processor 719 714 * should start */ 720 715 sync 721 - LOADADDR(r3,current_set) 716 + LOAD_REG_IMMEDIATE(r3,current_set) 722 717 sldi r28,r24,3 /* get current_set[cpu#] */ 723 718 ldx r3,r3,r28 724 719 addi r1,r3,THREAD_SIZE ··· 750 745 .globl decrementer_iSeries_masked 751 746 decrementer_iSeries_masked: 752 747 li r11,1 753 - stb r11,PACALPPACA+LPPACADECRINT(r13) 754 - LOADBASE(r12,tb_ticks_per_jiffy) 755 - lwz r12,OFF(tb_ticks_per_jiffy)(r12) 748 + ld r12,PACALPPACAPTR(r13) 749 + stb r11,LPPACADECRINT(r12) 750 + LOAD_REG_ADDRBASE(r12,tb_ticks_per_jiffy) 751 + lwz r12,ADDROFF(tb_ticks_per_jiffy)(r12) 756 752 mtspr SPRN_DEC,r12 757 753 /* fall through */ 758 754 759 755 .globl hardware_interrupt_iSeries_masked 760 756 hardware_interrupt_iSeries_masked: 761 757 mtcrf 0x80,r9 /* Restore regs */ 762 - ld r11,PACALPPACA+LPPACASRR0(r13) 763 - ld r12,PACALPPACA+LPPACASRR1(r13) 758 + ld r12,PACALPPACAPTR(r13) 759 + ld r11,LPPACASRR0(r12) 760 + ld r12,LPPACASRR1(r12) 764 761 mtspr SPRN_SRR0,r11 765 762 mtspr SPRN_SRR1,r12 766 763 ld r9,PACA_EXGEN+EX_R9(r13) ··· 1001 994 ld r3,PACA_EXSLB+EX_R3(r13) 1002 995 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ 1003 996 #ifdef CONFIG_PPC_ISERIES 1004 - ld r11,PACALPPACA+LPPACASRR0(r13) /* get SRR0 value */ 997 + ld r11,PACALPPACAPTR(r13) 998 + ld r11,LPPACASRR0(r11) /* get SRR0 value */ 1005 999 #endif /* CONFIG_PPC_ISERIES */ 1006 1000 1007 1001 mtlr r10 ··· 1420 1412 * physical cpu id in r24, we need to search the pacas to find 1421 1413 * which logical id maps to our physical one. 1422 1414 */ 1423 - LOADADDR(r13, paca) /* Get base vaddr of paca array */ 1415 + LOAD_REG_IMMEDIATE(r13, paca) /* Get base vaddr of paca array */ 1424 1416 li r5,0 /* logical cpu id */ 1425 1417 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */ 1426 1418 cmpw r6,r24 /* Compare to our id */ ··· 1454 1446 #ifdef CONFIG_PPC_ISERIES 1455 1447 _STATIC(__start_initialization_iSeries) 1456 1448 /* Clear out the BSS */ 1457 - LOADADDR(r11,__bss_stop) 1458 - LOADADDR(r8,__bss_start) 1449 + LOAD_REG_IMMEDIATE(r11,__bss_stop) 1450 + LOAD_REG_IMMEDIATE(r8,__bss_start) 1459 1451 sub r11,r11,r8 /* bss size */ 1460 1452 addi r11,r11,7 /* round up to an even double word */ 1461 1453 rldicl. r11,r11,61,3 /* shift right by 3 */ ··· 1466 1458 3: stdu r0,8(r8) 1467 1459 bdnz 3b 1468 1460 4: 1469 - LOADADDR(r1,init_thread_union) 1461 + LOAD_REG_IMMEDIATE(r1,init_thread_union) 1470 1462 addi r1,r1,THREAD_SIZE 1471 1463 li r0,0 1472 1464 stdu r0,-STACK_FRAME_OVERHEAD(r1) 1473 1465 1474 - LOADADDR(r3,cpu_specs) 1475 - LOADADDR(r4,cur_cpu_spec) 1466 + LOAD_REG_IMMEDIATE(r3,cpu_specs) 1467 + LOAD_REG_IMMEDIATE(r4,cur_cpu_spec) 1476 1468 li r5,0 1477 1469 bl .identify_cpu 1478 1470 1479 - LOADADDR(r2,__toc_start) 1471 + LOAD_REG_IMMEDIATE(r2,__toc_start) 1480 1472 addi r2,r2,0x4000 1481 1473 addi r2,r2,0x4000 1482 1474 ··· 1536 1528 li r24,0 1537 1529 1538 1530 /* Switch off MMU if not already */ 1539 - LOADADDR(r4, .__after_prom_start - KERNELBASE) 1531 + LOAD_REG_IMMEDIATE(r4, .__after_prom_start - KERNELBASE) 1540 1532 add r4,r4,r30 1541 1533 bl .__mmu_off 1542 1534 b .__after_prom_start ··· 1556 1548 /* put a relocation offset into r3 */ 1557 1549 bl .reloc_offset 1558 1550 1559 - LOADADDR(r2,__toc_start) 1551 + LOAD_REG_IMMEDIATE(r2,__toc_start) 1560 1552 addi r2,r2,0x4000 1561 1553 addi r2,r2,0x4000 1562 1554 ··· 1596 1588 */ 1597 1589 bl .reloc_offset 1598 1590 mr r26,r3 1599 - SET_REG_TO_CONST(r27,KERNELBASE) 1591 + LOAD_REG_IMMEDIATE(r27, KERNELBASE) 1600 1592 1601 - LOADADDR(r3, PHYSICAL_START) /* target addr */ 1593 + LOAD_REG_IMMEDIATE(r3, PHYSICAL_START) /* target addr */ 1602 1594 1603 1595 // XXX FIXME: Use phys returned by OF (r30) 1604 1596 add r4,r27,r26 /* source addr */ ··· 1606 1598 /* i.e. where we are running */ 1607 1599 /* the source addr */ 1608 1600 1609 - LOADADDR(r5,copy_to_here) /* # bytes of memory to copy */ 1601 + LOAD_REG_IMMEDIATE(r5,copy_to_here) /* # bytes of memory to copy */ 1610 1602 sub r5,r5,r27 1611 1603 1612 1604 li r6,0x100 /* Start offset, the first 0x100 */ ··· 1616 1608 /* this includes the code being */ 1617 1609 /* executed here. */ 1618 1610 1619 - LOADADDR(r0, 4f) /* Jump to the copy of this code */ 1611 + LOAD_REG_IMMEDIATE(r0, 4f) /* Jump to the copy of this code */ 1620 1612 mtctr r0 /* that we just made/relocated */ 1621 1613 bctr 1622 1614 1623 - 4: LOADADDR(r5,klimit) 1615 + 4: LOAD_REG_IMMEDIATE(r5,klimit) 1624 1616 add r5,r5,r26 1625 1617 ld r5,0(r5) /* get the value of klimit */ 1626 1618 sub r5,r5,r27 ··· 1702 1694 mtmsrd r3 /* RI on */ 1703 1695 1704 1696 /* Set up a paca value for this processor. */ 1705 - LOADADDR(r4, paca) /* Get base vaddr of paca array */ 1697 + LOAD_REG_IMMEDIATE(r4, paca) /* Get base vaddr of paca array */ 1706 1698 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */ 1707 1699 add r13,r13,r4 /* for this processor. */ 1708 1700 mtspr SPRN_SPRG3,r13 /* Save vaddr of paca in SPRG3 */ ··· 1739 1731 bl .early_setup_secondary 1740 1732 1741 1733 /* Initialize the kernel stack. Just a repeat for iSeries. */ 1742 - LOADADDR(r3,current_set) 1734 + LOAD_REG_ADDR(r3, current_set) 1743 1735 sldi r28,r24,3 /* get current_set[cpu#] */ 1744 1736 ldx r1,r3,r28 1745 1737 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD ··· 1750 1742 mtlr r7 1751 1743 1752 1744 /* enable MMU and jump to start_secondary */ 1753 - LOADADDR(r3,.start_secondary_prolog) 1754 - SET_REG_TO_CONST(r4, MSR_KERNEL) 1745 + LOAD_REG_ADDR(r3, .start_secondary_prolog) 1746 + LOAD_REG_IMMEDIATE(r4, MSR_KERNEL) 1755 1747 #ifdef DO_SOFT_DISABLE 1756 1748 ori r4,r4,MSR_EE 1757 1749 #endif ··· 1800 1792 * be detached from the kernel completely. Besides, we need 1801 1793 * to clear it now for kexec-style entry. 1802 1794 */ 1803 - LOADADDR(r11,__bss_stop) 1804 - LOADADDR(r8,__bss_start) 1795 + LOAD_REG_IMMEDIATE(r11,__bss_stop) 1796 + LOAD_REG_IMMEDIATE(r8,__bss_start) 1805 1797 sub r11,r11,r8 /* bss size */ 1806 1798 addi r11,r11,7 /* round up to an even double word */ 1807 1799 rldicl. r11,r11,61,3 /* shift right by 3 */ ··· 1839 1831 /* up the htab. This is done because we have relocated the */ 1840 1832 /* kernel but are still running in real mode. */ 1841 1833 1842 - LOADADDR(r3,init_thread_union) 1834 + LOAD_REG_IMMEDIATE(r3,init_thread_union) 1843 1835 add r3,r3,r26 1844 1836 1845 1837 /* set up a stack pointer (physical address) */ ··· 1848 1840 stdu r0,-STACK_FRAME_OVERHEAD(r1) 1849 1841 1850 1842 /* set up the TOC (physical address) */ 1851 - LOADADDR(r2,__toc_start) 1843 + LOAD_REG_IMMEDIATE(r2,__toc_start) 1852 1844 addi r2,r2,0x4000 1853 1845 addi r2,r2,0x4000 1854 1846 add r2,r2,r26 1855 1847 1856 - LOADADDR(r3,cpu_specs) 1848 + LOAD_REG_IMMEDIATE(r3, cpu_specs) 1857 1849 add r3,r3,r26 1858 - LOADADDR(r4,cur_cpu_spec) 1850 + LOAD_REG_IMMEDIATE(r4,cur_cpu_spec) 1859 1851 add r4,r4,r26 1860 1852 mr r5,r26 1861 1853 bl .identify_cpu ··· 1871 1863 * nowhere it can be initialized differently before we reach this 1872 1864 * code 1873 1865 */ 1874 - LOADADDR(r27, boot_cpuid) 1866 + LOAD_REG_IMMEDIATE(r27, boot_cpuid) 1875 1867 add r27,r27,r26 1876 1868 lwz r27,0(r27) 1877 1869 1878 - LOADADDR(r24, paca) /* Get base vaddr of paca array */ 1870 + LOAD_REG_IMMEDIATE(r24, paca) /* Get base vaddr of paca array */ 1879 1871 mulli r13,r27,PACA_SIZE /* Calculate vaddr of right paca */ 1880 1872 add r13,r13,r24 /* for this processor. */ 1881 1873 add r13,r13,r26 /* convert to physical addr */ ··· 1888 1880 mr r3,r31 1889 1881 bl .early_setup 1890 1882 1891 - LOADADDR(r3,.start_here_common) 1892 - SET_REG_TO_CONST(r4, MSR_KERNEL) 1883 + LOAD_REG_IMMEDIATE(r3, .start_here_common) 1884 + LOAD_REG_IMMEDIATE(r4, MSR_KERNEL) 1893 1885 mtspr SPRN_SRR0,r3 1894 1886 mtspr SPRN_SRR1,r4 1895 1887 rfid ··· 1903 1895 /* The following code sets up the SP and TOC now that we are */ 1904 1896 /* running with translation enabled. */ 1905 1897 1906 - LOADADDR(r3,init_thread_union) 1898 + LOAD_REG_IMMEDIATE(r3,init_thread_union) 1907 1899 1908 1900 /* set up the stack */ 1909 1901 addi r1,r3,THREAD_SIZE ··· 1916 1908 li r3,0 1917 1909 bl .do_cpu_ftr_fixups 1918 1910 1919 - LOADADDR(r26, boot_cpuid) 1911 + LOAD_REG_IMMEDIATE(r26, boot_cpuid) 1920 1912 lwz r26,0(r26) 1921 1913 1922 - LOADADDR(r24, paca) /* Get base vaddr of paca array */ 1914 + LOAD_REG_IMMEDIATE(r24, paca) /* Get base vaddr of paca array */ 1923 1915 mulli r13,r26,PACA_SIZE /* Calculate vaddr of right paca */ 1924 1916 add r13,r13,r24 /* for this processor. */ 1925 1917 mtspr SPRN_SPRG3,r13 1926 1918 1927 1919 /* ptr to current */ 1928 - LOADADDR(r4,init_task) 1920 + LOAD_REG_IMMEDIATE(r4, init_task) 1929 1921 std r4,PACACURRENT(r13) 1930 1922 1931 1923 /* Load the TOC */ ··· 1948 1940 1949 1941 _GLOBAL(hmt_init) 1950 1942 #ifdef CONFIG_HMT 1951 - LOADADDR(r5, hmt_thread_data) 1943 + LOAD_REG_IMMEDIATE(r5, hmt_thread_data) 1952 1944 mfspr r7,SPRN_PVR 1953 1945 srwi r7,r7,16 1954 1946 cmpwi r7,0x34 /* Pulsar */ ··· 1969 1961 b 101f 1970 1962 1971 1963 __hmt_secondary_hold: 1972 - LOADADDR(r5, hmt_thread_data) 1964 + LOAD_REG_IMMEDIATE(r5, hmt_thread_data) 1973 1965 clrldi r5,r5,4 1974 1966 li r7,0 1975 1967 mfspr r6,SPRN_PIR ··· 1997 1989 1998 1990 #ifdef CONFIG_HMT 1999 1991 _GLOBAL(hmt_start_secondary) 2000 - LOADADDR(r4,__hmt_secondary_hold) 1992 + LOAD_REG_IMMEDIATE(r4,__hmt_secondary_hold) 2001 1993 clrldi r4,r4,4 2002 1994 mtspr SPRN_NIADORM, r4 2003 1995 mfspr r4, SPRN_MSRDORM
+4 -4
arch/powerpc/kernel/idle_power4.S
··· 38 38 /* We must dynamically check for the NAP feature as it 39 39 * can be cleared by CPU init after the fixups are done 40 40 */ 41 - LOADBASE(r3,cur_cpu_spec) 42 - ld r4,OFF(cur_cpu_spec)(r3) 41 + LOAD_REG_ADDRBASE(r3,cur_cpu_spec) 42 + ld r4,ADDROFF(cur_cpu_spec)(r3) 43 43 ld r4,CPU_SPEC_FEATURES(r4) 44 44 andi. r0,r4,CPU_FTR_CAN_NAP 45 45 beqlr 46 46 /* Now check if user or arch enabled NAP mode */ 47 - LOADBASE(r3,powersave_nap) 48 - lwz r4,OFF(powersave_nap)(r3) 47 + LOAD_REG_ADDRBASE(r3,powersave_nap) 48 + lwz r4,ADDROFF(powersave_nap)(r3) 49 49 cmpwi 0,r4,0 50 50 beqlr 51 51
+4 -8
arch/powerpc/kernel/irq.c
··· 238 238 irq_exit(); 239 239 240 240 #ifdef CONFIG_PPC_ISERIES 241 - { 242 - struct paca_struct *lpaca = get_paca(); 243 - 244 - if (lpaca->lppaca.int_dword.fields.decr_int) { 245 - lpaca->lppaca.int_dword.fields.decr_int = 0; 246 - /* Signal a fake decrementer interrupt */ 247 - timer_interrupt(regs); 248 - } 241 + if (get_lppaca()->int_dword.fields.decr_int) { 242 + get_lppaca()->int_dword.fields.decr_int = 0; 243 + /* Signal a fake decrementer interrupt */ 244 + timer_interrupt(regs); 249 245 } 250 246 #endif 251 247 }
+5 -8
arch/powerpc/kernel/lparcfg.c
··· 55 55 { 56 56 unsigned long sum_purr = 0; 57 57 int cpu; 58 - struct paca_struct *lpaca; 59 58 60 59 for_each_cpu(cpu) { 61 - lpaca = paca + cpu; 62 - sum_purr += lpaca->lppaca.emulated_time_base; 60 + sum_purr += lppaca[cpu].emulated_time_base; 63 61 64 62 #ifdef PURR_DEBUG 65 63 printk(KERN_INFO "get_purr for cpu (%d) has value (%ld) \n", 66 - cpu, lpaca->lppaca.emulated_time_base); 64 + cpu, lppaca[cpu].emulated_time_base); 67 65 #endif 68 66 } 69 67 return sum_purr; ··· 77 79 unsigned long pool_id, lp_index; 78 80 int shared, entitled_capacity, max_entitled_capacity; 79 81 int processors, max_processors; 80 - struct paca_struct *lpaca = get_paca(); 81 82 unsigned long purr = get_purr(); 82 83 83 84 seq_printf(m, "%s %s \n", MODULE_NAME, MODULE_VERS); 84 85 85 - shared = (int)(lpaca->lppaca_ptr->shared_proc); 86 + shared = (int)(get_lppaca()->shared_proc); 86 87 seq_printf(m, "serial_number=%c%c%c%c%c%c%c\n", 87 88 e2a(xItExtVpdPanel.mfgID[2]), 88 89 e2a(xItExtVpdPanel.mfgID[3]), ··· 399 402 (h_resource >> 0 * 8) & 0xffff); 400 403 401 404 /* pool related entries are apropriate for shared configs */ 402 - if (paca[0].lppaca.shared_proc) { 405 + if (lppaca[0].shared_proc) { 403 406 404 407 h_pic(&pool_idle_time, &pool_procs); 405 408 ··· 448 451 seq_printf(m, "partition_potential_processors=%d\n", 449 452 partition_potential_processors); 450 453 451 - seq_printf(m, "shared_processor_mode=%d\n", paca[0].lppaca.shared_proc); 454 + seq_printf(m, "shared_processor_mode=%d\n", lppaca[0].shared_proc); 452 455 453 456 return 0; 454 457 }
+2 -2
arch/powerpc/kernel/misc_32.S
··· 68 68 mflr r0 69 69 bl 1f 70 70 1: mflr r3 71 - LOADADDR(r4,1b) 71 + LOAD_REG_IMMEDIATE(r4,1b) 72 72 subf r3,r4,r3 73 73 mtlr r0 74 74 blr ··· 80 80 mflr r0 81 81 bl 1f 82 82 1: mflr r5 83 - LOADADDR(r4,1b) 83 + LOAD_REG_IMMEDIATE(r4,1b) 84 84 subf r5,r4,r5 85 85 add r3,r3,r5 86 86 mtlr r0
+5 -5
arch/powerpc/kernel/misc_64.S
··· 39 39 mflr r0 40 40 bl 1f 41 41 1: mflr r3 42 - LOADADDR(r4,1b) 42 + LOAD_REG_IMMEDIATE(r4,1b) 43 43 subf r3,r4,r3 44 44 mtlr r0 45 45 blr ··· 51 51 mflr r0 52 52 bl 1f 53 53 1: mflr r5 54 - LOADADDR(r4,1b) 54 + LOAD_REG_IMMEDIATE(r4,1b) 55 55 subf r5,r4,r5 56 56 add r3,r3,r5 57 57 mtlr r0 ··· 498 498 */ 499 499 _GLOBAL(do_cpu_ftr_fixups) 500 500 /* Get CPU 0 features */ 501 - LOADADDR(r6,cur_cpu_spec) 501 + LOAD_REG_IMMEDIATE(r6,cur_cpu_spec) 502 502 sub r6,r6,r3 503 503 ld r4,0(r6) 504 504 sub r4,r4,r3 505 505 ld r4,CPU_SPEC_FEATURES(r4) 506 506 /* Get the fixup table */ 507 - LOADADDR(r6,__start___ftr_fixup) 507 + LOAD_REG_IMMEDIATE(r6,__start___ftr_fixup) 508 508 sub r6,r6,r3 509 - LOADADDR(r7,__stop___ftr_fixup) 509 + LOAD_REG_IMMEDIATE(r7,__stop___ftr_fixup) 510 510 sub r7,r7,r3 511 511 /* Do the fixup */ 512 512 1: cmpld r6,r7
+24 -12
arch/powerpc/kernel/paca.c
··· 25 25 * field correctly */ 26 26 extern unsigned long __toc_start; 27 27 28 + /* 29 + * iSeries structure which the hypervisor knows about - this structure 30 + * should not cross a page boundary. The vpa_init/register_vpa call 31 + * is now known to fail if the lppaca structure crosses a page 32 + * boundary. The lppaca is also used on POWER5 pSeries boxes. The 33 + * lppaca is 640 bytes long, and cannot readily change since the 34 + * hypervisor knows its layout, so a 1kB alignment will suffice to 35 + * ensure that it doesn't cross a page boundary. 36 + */ 37 + struct lppaca lppaca[] = { 38 + [0 ... (NR_CPUS-1)] = { 39 + .desc = 0xd397d781, /* "LpPa" */ 40 + .size = sizeof(struct lppaca), 41 + .dyn_proc_status = 2, 42 + .decr_val = 0x00ff0000, 43 + .fpregs_in_use = 1, 44 + .end_of_quantum = 0xfffffffffffffffful, 45 + .slb_count = 64, 46 + .vmxregs_in_use = 0, 47 + }, 48 + }; 49 + 28 50 /* The Paca is an array with one entry per processor. Each contains an 29 51 * lppaca, which contains the information shared between the 30 52 * hypervisor and Linux. ··· 57 35 * processor (not thread). 58 36 */ 59 37 #define PACA_INIT_COMMON(number, start, asrr, asrv) \ 38 + .lppaca_ptr = &lppaca[number], \ 60 39 .lock_token = 0x8000, \ 61 40 .paca_index = (number), /* Paca Index */ \ 62 41 .kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL, \ 63 42 .stab_real = (asrr), /* Real pointer to segment table */ \ 64 43 .stab_addr = (asrv), /* Virt pointer to segment table */ \ 65 44 .cpu_start = (start), /* Processor start */ \ 66 - .hw_cpu_id = 0xffff, \ 67 - .lppaca = { \ 68 - .desc = 0xd397d781, /* "LpPa" */ \ 69 - .size = sizeof(struct lppaca), \ 70 - .dyn_proc_status = 2, \ 71 - .decr_val = 0x00ff0000, \ 72 - .fpregs_in_use = 1, \ 73 - .end_of_quantum = 0xfffffffffffffffful, \ 74 - .slb_count = 64, \ 75 - .vmxregs_in_use = 0, \ 76 - }, \ 45 + .hw_cpu_id = 0xffff, 77 46 78 47 #ifdef CONFIG_PPC_ISERIES 79 48 #define PACA_INIT_ISERIES(number) \ 80 - .lppaca_ptr = &paca[number].lppaca, \ 81 49 .reg_save_ptr = &iseries_reg_save[number], 82 50 83 51 #define PACA_INIT(number) \
+1 -2
arch/powerpc/kernel/ppc_ksyms.c
··· 230 230 EXPORT_SYMBOL(cpm_install_handler); 231 231 EXPORT_SYMBOL(cpm_free_handler); 232 232 #endif /* CONFIG_8xx */ 233 - #if defined(CONFIG_8xx) || defined(CONFIG_40x) || defined(CONFIG_85xx) ||\ 234 - defined(CONFIG_83xx) 233 + #if defined(CONFIG_8xx) || defined(CONFIG_40x) 235 234 EXPORT_SYMBOL(__res); 236 235 #endif 237 236
+102 -9
arch/powerpc/kernel/prom.c
··· 1627 1627 kfree(prop->value); 1628 1628 kfree(prop); 1629 1629 prop = next; 1630 + 1631 + if (!prop) { 1632 + prop = node->deadprops; 1633 + node->deadprops = NULL; 1634 + } 1630 1635 } 1631 1636 kfree(node->intrs); 1632 1637 kfree(node->full_name); ··· 1779 1774 __initcall(prom_reconfig_setup); 1780 1775 #endif 1781 1776 1777 + struct property *of_find_property(struct device_node *np, const char *name, 1778 + int *lenp) 1779 + { 1780 + struct property *pp; 1781 + 1782 + read_lock(&devtree_lock); 1783 + for (pp = np->properties; pp != 0; pp = pp->next) 1784 + if (strcmp(pp->name, name) == 0) { 1785 + if (lenp != 0) 1786 + *lenp = pp->length; 1787 + break; 1788 + } 1789 + read_unlock(&devtree_lock); 1790 + 1791 + return pp; 1792 + } 1793 + 1782 1794 /* 1783 1795 * Find a property with a given name for a given node 1784 1796 * and return the value. ··· 1803 1781 unsigned char *get_property(struct device_node *np, const char *name, 1804 1782 int *lenp) 1805 1783 { 1806 - struct property *pp; 1807 - 1808 - for (pp = np->properties; pp != 0; pp = pp->next) 1809 - if (strcmp(pp->name, name) == 0) { 1810 - if (lenp != 0) 1811 - *lenp = pp->length; 1812 - return pp->value; 1813 - } 1814 - return NULL; 1784 + struct property *pp = of_find_property(np,name,lenp); 1785 + return pp ? pp->value : NULL; 1815 1786 } 1816 1787 EXPORT_SYMBOL(get_property); 1817 1788 ··· 1838 1823 return 0; 1839 1824 } 1840 1825 1826 + /* 1827 + * Remove a property from a node. Note that we don't actually 1828 + * remove it, since we have given out who-knows-how-many pointers 1829 + * to the data using get-property. Instead we just move the property 1830 + * to the "dead properties" list, so it won't be found any more. 1831 + */ 1832 + int prom_remove_property(struct device_node *np, struct property *prop) 1833 + { 1834 + struct property **next; 1835 + int found = 0; 1841 1836 1837 + write_lock(&devtree_lock); 1838 + next = &np->properties; 1839 + while (*next) { 1840 + if (*next == prop) { 1841 + /* found the node */ 1842 + *next = prop->next; 1843 + prop->next = np->deadprops; 1844 + np->deadprops = prop; 1845 + found = 1; 1846 + break; 1847 + } 1848 + next = &(*next)->next; 1849 + } 1850 + write_unlock(&devtree_lock); 1851 + 1852 + if (!found) 1853 + return -ENODEV; 1854 + 1855 + #ifdef CONFIG_PROC_DEVICETREE 1856 + /* try to remove the proc node as well */ 1857 + if (np->pde) 1858 + proc_device_tree_remove_prop(np->pde, prop); 1859 + #endif /* CONFIG_PROC_DEVICETREE */ 1860 + 1861 + return 0; 1862 + } 1863 + 1864 + /* 1865 + * Update a property in a node. Note that we don't actually 1866 + * remove it, since we have given out who-knows-how-many pointers 1867 + * to the data using get-property. Instead we just move the property 1868 + * to the "dead properties" list, and add the new property to the 1869 + * property list 1870 + */ 1871 + int prom_update_property(struct device_node *np, 1872 + struct property *newprop, 1873 + struct property *oldprop) 1874 + { 1875 + struct property **next; 1876 + int found = 0; 1877 + 1878 + write_lock(&devtree_lock); 1879 + next = &np->properties; 1880 + while (*next) { 1881 + if (*next == oldprop) { 1882 + /* found the node */ 1883 + newprop->next = oldprop->next; 1884 + *next = newprop; 1885 + oldprop->next = np->deadprops; 1886 + np->deadprops = oldprop; 1887 + found = 1; 1888 + break; 1889 + } 1890 + next = &(*next)->next; 1891 + } 1892 + write_unlock(&devtree_lock); 1893 + 1894 + if (!found) 1895 + return -ENODEV; 1896 + 1897 + #ifdef CONFIG_PROC_DEVICETREE 1898 + /* try to add to proc as well if it was initialized */ 1899 + if (np->pde) 1900 + proc_device_tree_update_prop(np->pde, newprop, oldprop); 1901 + #endif /* CONFIG_PROC_DEVICETREE */ 1902 + 1903 + return 0; 1904 + }
+2 -1
arch/powerpc/kernel/prom_parse.c
··· 113 113 114 114 static int of_bus_pci_match(struct device_node *np) 115 115 { 116 - return !strcmp(np->type, "pci"); 116 + /* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */ 117 + return !strcmp(np->type, "pci") || !strcmp(np->type, "vci"); 117 118 } 118 119 119 120 static void of_bus_pci_count_cells(struct device_node *np,
+95 -1
arch/powerpc/kernel/rtas.c
··· 36 36 .lock = SPIN_LOCK_UNLOCKED 37 37 }; 38 38 39 + struct rtas_suspend_me_data { 40 + long waiting; 41 + struct rtas_args *args; 42 + }; 43 + 39 44 EXPORT_SYMBOL(rtas); 40 45 41 46 DEFINE_SPINLOCK(rtas_data_buf_lock); ··· 561 556 } while (status == RTAS_BUSY); 562 557 } 563 558 559 + static int ibm_suspend_me_token = RTAS_UNKNOWN_SERVICE; 560 + #ifdef CONFIG_PPC_PSERIES 561 + static void rtas_percpu_suspend_me(void *info) 562 + { 563 + long rc; 564 + long flags; 565 + struct rtas_suspend_me_data *data = 566 + (struct rtas_suspend_me_data *)info; 567 + 568 + /* 569 + * We use "waiting" to indicate our state. As long 570 + * as it is >0, we are still trying to all join up. 571 + * If it goes to 0, we have successfully joined up and 572 + * one thread got H_Continue. If any error happens, 573 + * we set it to <0. 574 + */ 575 + local_irq_save(flags); 576 + do { 577 + rc = plpar_hcall_norets(H_JOIN); 578 + smp_rmb(); 579 + } while (rc == H_Success && data->waiting > 0); 580 + if (rc == H_Success) 581 + goto out; 582 + 583 + if (rc == H_Continue) { 584 + data->waiting = 0; 585 + rtas_call(ibm_suspend_me_token, 0, 1, 586 + data->args->args); 587 + } else { 588 + data->waiting = -EBUSY; 589 + printk(KERN_ERR "Error on H_Join hypervisor call\n"); 590 + } 591 + 592 + out: 593 + /* before we restore interrupts, make sure we don't 594 + * generate a spurious soft lockup errors 595 + */ 596 + touch_softlockup_watchdog(); 597 + local_irq_restore(flags); 598 + return; 599 + } 600 + 601 + static int rtas_ibm_suspend_me(struct rtas_args *args) 602 + { 603 + int i; 604 + 605 + struct rtas_suspend_me_data data; 606 + 607 + data.waiting = 1; 608 + data.args = args; 609 + 610 + /* Call function on all CPUs. One of us will make the 611 + * rtas call 612 + */ 613 + if (on_each_cpu(rtas_percpu_suspend_me, &data, 1, 0)) 614 + data.waiting = -EINVAL; 615 + 616 + if (data.waiting != 0) 617 + printk(KERN_ERR "Error doing global join\n"); 618 + 619 + /* Prod each CPU. This won't hurt, and will wake 620 + * anyone we successfully put to sleep with H_Join 621 + */ 622 + for_each_cpu(i) 623 + plpar_hcall_norets(H_PROD, i); 624 + 625 + return data.waiting; 626 + } 627 + #else /* CONFIG_PPC_PSERIES */ 628 + static int rtas_ibm_suspend_me(struct rtas_args *args) 629 + { 630 + return -ENOSYS; 631 + } 632 + #endif 564 633 565 634 asmlinkage int ppc_rtas(struct rtas_args __user *uargs) 566 635 { ··· 642 563 unsigned long flags; 643 564 char *buff_copy, *errbuf = NULL; 644 565 int nargs; 566 + int rc; 645 567 646 568 if (!capable(CAP_SYS_ADMIN)) 647 569 return -EPERM; ··· 660 580 if (copy_from_user(args.args, uargs->args, 661 581 nargs * sizeof(rtas_arg_t)) != 0) 662 582 return -EFAULT; 583 + 584 + if (args.token == RTAS_UNKNOWN_SERVICE) 585 + return -EINVAL; 586 + 587 + /* Need to handle ibm,suspend_me call specially */ 588 + if (args.token == ibm_suspend_me_token) { 589 + rc = rtas_ibm_suspend_me(&args); 590 + if (rc) 591 + return rc; 592 + goto copy_return; 593 + } 663 594 664 595 buff_copy = get_errorlog_buffer(); 665 596 ··· 695 604 kfree(buff_copy); 696 605 } 697 606 607 + copy_return: 698 608 /* Copy out args. */ 699 609 if (copy_to_user(uargs->args + nargs, 700 610 args.args + nargs, ··· 767 675 * the stop-self token if any 768 676 */ 769 677 #ifdef CONFIG_PPC64 770 - if (_machine == PLATFORM_PSERIES_LPAR) 678 + if (_machine == PLATFORM_PSERIES_LPAR) { 771 679 rtas_region = min(lmb.rmo_size, RTAS_INSTANTIATE_MAX); 680 + ibm_suspend_me_token = rtas_token("ibm,suspend-me"); 681 + } 772 682 #endif 773 683 rtas_rmo_buf = lmb_alloc_base(RTAS_RMOBUF_MAX, PAGE_SIZE, rtas_region); 774 684
+6 -3
arch/powerpc/kernel/setup-common.c
··· 100 100 void machine_restart(char *cmd) 101 101 { 102 102 machine_shutdown(); 103 - ppc_md.restart(cmd); 103 + if (ppc_md.restart) 104 + ppc_md.restart(cmd); 104 105 #ifdef CONFIG_SMP 105 106 smp_send_stop(); 106 107 #endif ··· 113 112 void machine_power_off(void) 114 113 { 115 114 machine_shutdown(); 116 - ppc_md.power_off(); 115 + if (ppc_md.power_off) 116 + ppc_md.power_off(); 117 117 #ifdef CONFIG_SMP 118 118 smp_send_stop(); 119 119 #endif ··· 131 129 void machine_halt(void) 132 130 { 133 131 machine_shutdown(); 134 - ppc_md.halt(); 132 + if (ppc_md.halt) 133 + ppc_md.halt(); 135 134 #ifdef CONFIG_SMP 136 135 smp_send_stop(); 137 136 #endif
+1 -1
arch/powerpc/kernel/time.c
··· 431 431 profile_tick(CPU_PROFILING, regs); 432 432 433 433 #ifdef CONFIG_PPC_ISERIES 434 - get_paca()->lppaca.int_dword.fields.decr_int = 0; 434 + get_lppaca()->int_dword.fields.decr_int = 0; 435 435 #endif 436 436 437 437 while ((ticks = tb_ticks_since(per_cpu(last_jiffy, cpu)))
+2 -6
arch/powerpc/lib/locks.c
··· 28 28 void __spin_yield(raw_spinlock_t *lock) 29 29 { 30 30 unsigned int lock_value, holder_cpu, yield_count; 31 - struct paca_struct *holder_paca; 32 31 33 32 lock_value = lock->slock; 34 33 if (lock_value == 0) 35 34 return; 36 35 holder_cpu = lock_value & 0xffff; 37 36 BUG_ON(holder_cpu >= NR_CPUS); 38 - holder_paca = &paca[holder_cpu]; 39 - yield_count = holder_paca->lppaca.yield_count; 37 + yield_count = lppaca[holder_cpu].yield_count; 40 38 if ((yield_count & 1) == 0) 41 39 return; /* virtual cpu is currently running */ 42 40 rmb(); ··· 58 60 { 59 61 int lock_value; 60 62 unsigned int holder_cpu, yield_count; 61 - struct paca_struct *holder_paca; 62 63 63 64 lock_value = rw->lock; 64 65 if (lock_value >= 0) 65 66 return; /* no write lock at present */ 66 67 holder_cpu = lock_value & 0xffff; 67 68 BUG_ON(holder_cpu >= NR_CPUS); 68 - holder_paca = &paca[holder_cpu]; 69 - yield_count = holder_paca->lppaca.yield_count; 69 + yield_count = lppaca[holder_cpu].yield_count; 70 70 if ((yield_count & 1) == 0) 71 71 return; /* virtual cpu is currently running */ 72 72 rmb();
+4 -4
arch/powerpc/oprofile/common.c
··· 140 140 141 141 switch (cur_cpu_spec->oprofile_type) { 142 142 #ifdef CONFIG_PPC64 143 - case RS64: 143 + case PPC_OPROFILE_RS64: 144 144 model = &op_model_rs64; 145 145 break; 146 - case POWER4: 146 + case PPC_OPROFILE_POWER4: 147 147 model = &op_model_power4; 148 148 break; 149 149 #else 150 - case G4: 150 + case PPC_OPROFILE_G4: 151 151 model = &op_model_7450; 152 152 break; 153 153 #endif 154 154 #ifdef CONFIG_FSL_BOOKE 155 - case BOOKE: 155 + case PPC_OPROFILE_BOOKE: 156 156 model = &op_model_fsl_booke; 157 157 break; 158 158 #endif
+1
arch/powerpc/platforms/83xx/Kconfig
··· 7 7 8 8 config MPC834x_SYS 9 9 bool "Freescale MPC834x SYS" 10 + select DEFAULT_UIMAGE 10 11 help 11 12 This option enables support for the MPC 834x SYS evaluation board. 12 13
+243
arch/powerpc/platforms/83xx/mpc834x_sys.c
··· 1 + /* 2 + * arch/powerpc/platforms/83xx/mpc834x_sys.c 3 + * 4 + * MPC834x SYS board specific routines 5 + * 6 + * Maintainer: Kumar Gala <galak@kernel.crashing.org> 7 + * 8 + * This program is free software; you can redistribute it and/or modify it 9 + * under the terms of the GNU General Public License as published by the 10 + * Free Software Foundation; either version 2 of the License, or (at your 11 + * option) any later version. 12 + */ 13 + 14 + #include <linux/config.h> 15 + #include <linux/stddef.h> 16 + #include <linux/kernel.h> 17 + #include <linux/init.h> 18 + #include <linux/errno.h> 19 + #include <linux/reboot.h> 20 + #include <linux/pci.h> 21 + #include <linux/kdev_t.h> 22 + #include <linux/major.h> 23 + #include <linux/console.h> 24 + #include <linux/delay.h> 25 + #include <linux/seq_file.h> 26 + #include <linux/root_dev.h> 27 + #include <linux/module.h> 28 + #include <linux/fsl_devices.h> 29 + 30 + #include <asm/system.h> 31 + #include <asm/pgtable.h> 32 + #include <asm/page.h> 33 + #include <asm/atomic.h> 34 + #include <asm/time.h> 35 + #include <asm/io.h> 36 + #include <asm/machdep.h> 37 + #include <asm/ipic.h> 38 + #include <asm/bootinfo.h> 39 + #include <asm/pci-bridge.h> 40 + #include <asm/mpc83xx.h> 41 + #include <asm/irq.h> 42 + #include <mm/mmu_decl.h> 43 + #include <asm/prom.h> 44 + #include <asm/udbg.h> 45 + #include <sysdev/fsl_soc.h> 46 + 47 + #include "mpc83xx.h" 48 + 49 + #ifndef CONFIG_PCI 50 + unsigned long isa_io_base = 0; 51 + unsigned long isa_mem_base = 0; 52 + #endif 53 + 54 + #ifdef CONFIG_PCI 55 + extern int mpc83xx_pci2_busno; 56 + 57 + static int 58 + mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) 59 + { 60 + static char pci_irq_table[][4] = 61 + /* 62 + * PCI IDSEL/INTPIN->INTLINE 63 + * A B C D 64 + */ 65 + { 66 + {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */ 67 + {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */ 68 + {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */ 69 + {0, 0, 0, 0}, 70 + {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */ 71 + {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */ 72 + {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */ 73 + {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */ 74 + {0, 0, 0, 0}, /* idsel 0x19 */ 75 + {0, 0, 0, 0}, /* idsel 0x20 */ 76 + }; 77 + 78 + const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4; 79 + return PCI_IRQ_TABLE_LOOKUP; 80 + } 81 + 82 + static int 83 + mpc83xx_exclude_device(u_char bus, u_char devfn) 84 + { 85 + if (bus == 0 && PCI_SLOT(devfn) == 0) 86 + return PCIBIOS_DEVICE_NOT_FOUND; 87 + if (mpc83xx_pci2_busno) 88 + if (bus == (mpc83xx_pci2_busno) && PCI_SLOT(devfn) == 0) 89 + return PCIBIOS_DEVICE_NOT_FOUND; 90 + return PCIBIOS_SUCCESSFUL; 91 + } 92 + #endif /* CONFIG_PCI */ 93 + 94 + /* ************************************************************************ 95 + * 96 + * Setup the architecture 97 + * 98 + */ 99 + static void __init 100 + mpc834x_sys_setup_arch(void) 101 + { 102 + struct device_node *np; 103 + 104 + if (ppc_md.progress) 105 + ppc_md.progress("mpc834x_sys_setup_arch()", 0); 106 + 107 + np = of_find_node_by_type(NULL, "cpu"); 108 + if (np != 0) { 109 + unsigned int *fp = (int *) get_property(np, "clock-frequency", NULL); 110 + if (fp != 0) 111 + loops_per_jiffy = *fp / HZ; 112 + else 113 + loops_per_jiffy = 50000000 / HZ; 114 + of_node_put(np); 115 + } 116 + 117 + #ifdef CONFIG_PCI 118 + for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) 119 + add_bridge(np); 120 + 121 + ppc_md.pci_swizzle = common_swizzle; 122 + ppc_md.pci_map_irq = mpc83xx_map_irq; 123 + ppc_md.pci_exclude_device = mpc83xx_exclude_device; 124 + #endif 125 + 126 + #ifdef CONFIG_ROOT_NFS 127 + ROOT_DEV = Root_NFS; 128 + #else 129 + ROOT_DEV = Root_HDA1; 130 + #endif 131 + } 132 + 133 + void __init 134 + mpc834x_sys_init_IRQ(void) 135 + { 136 + u8 senses[8] = { 137 + 0, /* EXT 0 */ 138 + IRQ_SENSE_LEVEL, /* EXT 1 */ 139 + IRQ_SENSE_LEVEL, /* EXT 2 */ 140 + 0, /* EXT 3 */ 141 + #ifdef CONFIG_PCI 142 + IRQ_SENSE_LEVEL, /* EXT 4 */ 143 + IRQ_SENSE_LEVEL, /* EXT 5 */ 144 + IRQ_SENSE_LEVEL, /* EXT 6 */ 145 + IRQ_SENSE_LEVEL, /* EXT 7 */ 146 + #else 147 + 0, /* EXT 4 */ 148 + 0, /* EXT 5 */ 149 + 0, /* EXT 6 */ 150 + 0, /* EXT 7 */ 151 + #endif 152 + }; 153 + 154 + ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8); 155 + 156 + /* Initialize the default interrupt mapping priorities, 157 + * in case the boot rom changed something on us. 158 + */ 159 + ipic_set_default_priority(); 160 + } 161 + 162 + #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374) 163 + extern ulong ds1374_get_rtc_time(void); 164 + extern int ds1374_set_rtc_time(ulong); 165 + 166 + static int __init 167 + mpc834x_rtc_hookup(void) 168 + { 169 + struct timespec tv; 170 + 171 + ppc_md.get_rtc_time = ds1374_get_rtc_time; 172 + ppc_md.set_rtc_time = ds1374_set_rtc_time; 173 + 174 + tv.tv_nsec = 0; 175 + tv.tv_sec = (ppc_md.get_rtc_time)(); 176 + do_settimeofday(&tv); 177 + 178 + return 0; 179 + } 180 + late_initcall(mpc834x_rtc_hookup); 181 + #endif 182 + 183 + static void 184 + mpc83xx_restart(char *cmd) 185 + { 186 + #define RST_OFFSET 0x00000900 187 + #define RST_PROT_REG 0x00000018 188 + #define RST_CTRL_REG 0x0000001c 189 + __be32 __iomem *reg; 190 + 191 + // map reset register space 192 + reg = ioremap(get_immrbase() + 0x900, 0xff); 193 + 194 + local_irq_disable(); 195 + 196 + /* enable software reset "RSTE" */ 197 + out_be32(reg + (RST_PROT_REG >> 2), 0x52535445); 198 + 199 + /* set software hard reset */ 200 + out_be32(reg + (RST_CTRL_REG >> 2), 0x52535445); 201 + for(;;); 202 + } 203 + 204 + static long __init 205 + mpc83xx_time_init(void) 206 + { 207 + #define SPCR_OFFSET 0x00000110 208 + #define SPCR_TBEN 0x00400000 209 + __be32 __iomem *spcr = ioremap(get_immrbase() + SPCR_OFFSET, 4); 210 + __be32 tmp; 211 + 212 + tmp = in_be32(spcr); 213 + out_be32(spcr, tmp|SPCR_TBEN); 214 + 215 + iounmap(spcr); 216 + 217 + return 0; 218 + } 219 + void __init 220 + platform_init(void) 221 + { 222 + /* setup the PowerPC module struct */ 223 + ppc_md.setup_arch = mpc834x_sys_setup_arch; 224 + 225 + ppc_md.init_IRQ = mpc834x_sys_init_IRQ; 226 + ppc_md.get_irq = ipic_get_irq; 227 + 228 + ppc_md.restart = mpc83xx_restart; 229 + 230 + ppc_md.time_init = mpc83xx_time_init; 231 + ppc_md.set_rtc_time = NULL; 232 + ppc_md.get_rtc_time = NULL; 233 + ppc_md.calibrate_decr = generic_calibrate_decr; 234 + 235 + ppc_md.progress = udbg_progress; 236 + 237 + if (ppc_md.progress) 238 + ppc_md.progress("mpc834x_sys_init(): exit", 0); 239 + 240 + return; 241 + } 242 + 243 +
+23
arch/powerpc/platforms/83xx/mpc834x_sys.h
··· 1 + /* 2 + * arch/powerppc/platforms/83xx/mpc834x_sys.h 3 + * 4 + * MPC834X SYS common board definitions 5 + * 6 + * Maintainer: Kumar Gala <galak@kernel.crashing.org> 7 + * 8 + * This program is free software; you can redistribute it and/or modify it 9 + * under the terms of the GNU General Public License as published by the 10 + * Free Software Foundation; either version 2 of the License, or (at your 11 + * option) any later version. 12 + * 13 + */ 14 + 15 + #ifndef __MACH_MPC83XX_SYS_H__ 16 + #define __MACH_MPC83XX_SYS_H__ 17 + 18 + #define PIRQA MPC83xx_IRQ_EXT4 19 + #define PIRQB MPC83xx_IRQ_EXT5 20 + #define PIRQC MPC83xx_IRQ_EXT6 21 + #define PIRQD MPC83xx_IRQ_EXT7 22 + 23 + #endif /* __MACH_MPC83XX_SYS_H__ */
+14
arch/powerpc/platforms/83xx/mpc83xx.h
··· 1 + #ifndef __MPC83XX_H__ 2 + #define __MPC83XX_H__ 3 + 4 + #include <linux/init.h> 5 + #include <linux/device.h> 6 + 7 + /* 8 + * Declaration for the various functions exported by the 9 + * mpc83xx_* files. Mostly for use by mpc83xx_setup 10 + */ 11 + 12 + extern int add_bridge(struct device_node *dev); 13 + 14 + #endif /* __MPC83XX_H__ */
+99
arch/powerpc/platforms/83xx/pci.c
··· 1 + /* 2 + * FSL SoC setup code 3 + * 4 + * Maintained by Kumar Gala (see MAINTAINERS for contact information) 5 + * 6 + * This program is free software; you can redistribute it and/or modify it 7 + * under the terms of the GNU General Public License as published by the 8 + * Free Software Foundation; either version 2 of the License, or (at your 9 + * option) any later version. 10 + */ 11 + 12 + #include <linux/config.h> 13 + #include <linux/stddef.h> 14 + #include <linux/kernel.h> 15 + #include <linux/init.h> 16 + #include <linux/errno.h> 17 + #include <linux/pci.h> 18 + #include <linux/delay.h> 19 + #include <linux/irq.h> 20 + #include <linux/module.h> 21 + 22 + #include <asm/system.h> 23 + #include <asm/atomic.h> 24 + #include <asm/io.h> 25 + #include <asm/pci-bridge.h> 26 + #include <asm/prom.h> 27 + #include <sysdev/fsl_soc.h> 28 + 29 + #undef DEBUG 30 + 31 + #ifdef DEBUG 32 + #define DBG(x...) printk(x) 33 + #else 34 + #define DBG(x...) 35 + #endif 36 + 37 + int mpc83xx_pci2_busno; 38 + 39 + #ifdef CONFIG_PCI 40 + int __init add_bridge(struct device_node *dev) 41 + { 42 + int len; 43 + struct pci_controller *hose; 44 + struct resource rsrc; 45 + int *bus_range; 46 + int primary = 1, has_address = 0; 47 + phys_addr_t immr = get_immrbase(); 48 + 49 + DBG("Adding PCI host bridge %s\n", dev->full_name); 50 + 51 + /* Fetch host bridge registers address */ 52 + has_address = (of_address_to_resource(dev, 0, &rsrc) == 0); 53 + 54 + /* Get bus range if any */ 55 + bus_range = (int *) get_property(dev, "bus-range", &len); 56 + if (bus_range == NULL || len < 2 * sizeof(int)) { 57 + printk(KERN_WARNING "Can't get bus-range for %s, assume" 58 + " bus 0\n", dev->full_name); 59 + } 60 + 61 + hose = pcibios_alloc_controller(); 62 + if (!hose) 63 + return -ENOMEM; 64 + hose->arch_data = dev; 65 + hose->set_cfg_type = 1; 66 + 67 + hose->first_busno = bus_range ? bus_range[0] : 0; 68 + hose->last_busno = bus_range ? bus_range[1] : 0xff; 69 + 70 + /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar 71 + * the other at 0x8600, we consider the 0x8500 the primary controller 72 + */ 73 + /* PCI 1 */ 74 + if ((rsrc.start & 0xfffff) == 0x8500) { 75 + setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304); 76 + } 77 + /* PCI 2*/ 78 + if ((rsrc.start & 0xfffff) == 0x8600) { 79 + setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384); 80 + primary = 0; 81 + hose->bus_offset = hose->first_busno; 82 + mpc83xx_pci2_busno = hose->first_busno; 83 + } 84 + 85 + printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%08lx. " 86 + "Firmware bus number: %d->%d\n", 87 + rsrc.start, hose->first_busno, hose->last_busno); 88 + 89 + DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", 90 + hose, hose->cfg_addr, hose->cfg_data); 91 + 92 + /* Interpret the "ranges" property */ 93 + /* This also maps the I/O region and sets isa_io/mem_base */ 94 + pci_process_bridge_OF_ranges(hose, dev, primary); 95 + 96 + return 0; 97 + } 98 + 99 + #endif
+17 -10
arch/powerpc/platforms/chrp/pci.c
··· 135 135 hydra_init(void) 136 136 { 137 137 struct device_node *np; 138 + struct resource r; 138 139 139 140 np = find_devices("mac-io"); 140 - if (np == NULL || np->n_addrs == 0) 141 + if (np == NULL || of_address_to_resource(np, 0, &r)) 141 142 return 0; 142 - Hydra = ioremap(np->addrs[0].address, np->addrs[0].size); 143 - printk("Hydra Mac I/O at %lx\n", np->addrs[0].address); 143 + Hydra = ioremap(r.start, r.end-r.start); 144 + printk("Hydra Mac I/O at %lx\n", r.start); 144 145 printk("Hydra Feature_Control was %x", 145 146 in_le32(&Hydra->Feature_Control)); 146 147 out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN | ··· 178 177 { 179 178 u32 __iomem *reg; 180 179 u32 val; 181 - unsigned long addr = dev->addrs[0].address; 180 + struct resource r; 182 181 183 - setup_indirect_pci(hose, addr + 0xf8000, addr + 0xf8010); 182 + if (of_address_to_resource(dev, 0, &r)) { 183 + printk(KERN_ERR "No address for Python PCI controller\n"); 184 + return; 185 + } 184 186 185 187 /* Clear the magic go-slow bit */ 186 - reg = ioremap(dev->addrs[0].address + 0xf6000, 0x40); 188 + reg = ioremap(r.start + 0xf6000, 0x40); 189 + BUG_ON(!reg); 187 190 val = in_be32(&reg[12]); 188 191 if (val & PRG_CL_RESET_VALID) { 189 192 out_be32(&reg[12], val & ~PRG_CL_RESET_VALID); 190 193 in_be32(&reg[12]); 191 194 } 192 195 iounmap(reg); 196 + 197 + setup_indirect_pci(hose, r.start + 0xf8000, r.start + 0xf8010); 193 198 } 194 199 195 200 /* Marvell Discovery II based Pegasos 2 */ ··· 225 218 char *model, *machine; 226 219 int is_longtrail = 0, is_mot = 0, is_pegasos = 0; 227 220 struct device_node *root = find_path_device("/"); 228 - 221 + struct resource r; 229 222 /* 230 223 * The PCI host bridge nodes on some machines don't have 231 224 * properties to adequately identify them, so we have to ··· 245 238 continue; 246 239 ++index; 247 240 /* The GG2 bridge on the LongTrail doesn't have an address */ 248 - if (dev->n_addrs < 1 && !is_longtrail) { 241 + if (of_address_to_resource(dev, 0, &r) && !is_longtrail) { 249 242 printk(KERN_WARNING "Can't use %s: no address\n", 250 243 dev->full_name); 251 244 continue; ··· 262 255 printk(KERN_INFO "PCI buses %d..%d", 263 256 bus_range[0], bus_range[1]); 264 257 printk(" controlled by %s", dev->type); 265 - if (dev->n_addrs > 0) 266 - printk(" at %lx", dev->addrs[0].address); 258 + if (!is_longtrail) 259 + printk(" at %lx", r.start); 267 260 printk("\n"); 268 261 269 262 hose = pcibios_alloc_controller();
+4 -3
arch/powerpc/platforms/chrp/setup.c
··· 352 352 opaddr = opprop[na-1]; /* assume 32-bit */ 353 353 oplen /= na * sizeof(unsigned int); 354 354 } else { 355 - if (np->n_addrs == 0) 355 + struct resource r; 356 + if (of_address_to_resource(np, 0, &r)) 356 357 return; 357 - opaddr = np->addrs[0].address; 358 + opaddr = r.start; 358 359 oplen = 0; 359 360 } 360 361 ··· 378 377 */ 379 378 if (oplen < len) { 380 379 printk(KERN_ERR "Insufficient addresses for distributed" 381 - " OpenPIC (%d < %d)\n", np->n_addrs, len); 380 + " OpenPIC (%d < %d)\n", oplen, len); 382 381 len = oplen; 383 382 } 384 383
+5 -2
arch/powerpc/platforms/chrp/time.c
··· 21 21 #include <linux/mc146818rtc.h> 22 22 #include <linux/init.h> 23 23 #include <linux/bcd.h> 24 + #include <linux/ioport.h> 24 25 25 26 #include <asm/io.h> 26 27 #include <asm/nvram.h> ··· 38 37 long __init chrp_time_init(void) 39 38 { 40 39 struct device_node *rtcs; 40 + struct resource r; 41 41 int base; 42 42 43 43 rtcs = find_compatible_devices("rtc", "pnpPNP,b00"); 44 44 if (rtcs == NULL) 45 45 rtcs = find_compatible_devices("rtc", "ds1385-rtc"); 46 - if (rtcs == NULL || rtcs->addrs == NULL) 46 + if (rtcs == NULL || of_address_to_resource(rtcs, 0, &r)) 47 47 return 0; 48 - base = rtcs->addrs[0].address; 48 + 49 + base = r.start; 49 50 nvram_as1 = 0; 50 51 nvram_as0 = base; 51 52 nvram_data = base + 1;
+2 -4
arch/powerpc/platforms/iseries/irq.c
··· 334 334 */ 335 335 int iSeries_get_irq(struct pt_regs *regs) 336 336 { 337 - struct paca_struct *lpaca; 338 337 /* -2 means ignore this interrupt */ 339 338 int irq = -2; 340 339 341 - lpaca = get_paca(); 342 340 #ifdef CONFIG_SMP 343 - if (lpaca->lppaca.int_dword.fields.ipi_cnt) { 344 - lpaca->lppaca.int_dword.fields.ipi_cnt = 0; 341 + if (get_lppaca()->int_dword.fields.ipi_cnt) { 342 + get_lppaca()->int_dword.fields.ipi_cnt = 0; 345 343 iSeries_smp_message_recv(regs); 346 344 } 347 345 #endif /* CONFIG_SMP */
+2 -1
arch/powerpc/platforms/iseries/misc.S
··· 44 44 /* Check pending interrupts */ 45 45 /* A decrementer, IPI or PMC interrupt may have occurred 46 46 * while we were in the hypervisor (which enables) */ 47 - ld r4,PACALPPACA+LPPACAANYINT(r13) 47 + ld r4,PACALPPACAPTR(r13) 48 + ld r4,LPPACAANYINT(r4) 48 49 cmpdi r4,0 49 50 beqlr 50 51
+4 -4
arch/powerpc/platforms/iseries/setup.c
··· 538 538 */ 539 539 static void __init iSeries_setup_arch(void) 540 540 { 541 - if (get_paca()->lppaca.shared_proc) { 541 + if (get_lppaca()->shared_proc) { 542 542 ppc_md.idle_loop = iseries_shared_idle; 543 543 printk(KERN_INFO "Using shared processor idle loop\n"); 544 544 } else { ··· 647 647 * The decrementer stops during the yield. Force a fake decrementer 648 648 * here and let the timer_interrupt code sort out the actual time. 649 649 */ 650 - get_paca()->lppaca.int_dword.fields.decr_int = 1; 650 + get_lppaca()->int_dword.fields.decr_int = 1; 651 651 process_iSeries_events(); 652 652 } 653 653 ··· 883 883 pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE); 884 884 885 885 for (i = 0; i < NR_CPUS; i++) { 886 - if (paca[i].lppaca.dyn_proc_status >= 2) 886 + if (lppaca[i].dyn_proc_status >= 2) 887 887 continue; 888 888 889 889 snprintf(p, 32 - (p - buf), "@%d", i); ··· 891 891 892 892 dt_prop_str(dt, "device_type", "cpu"); 893 893 894 - index = paca[i].lppaca.dyn_hv_phys_proc_index; 894 + index = lppaca[i].dyn_hv_phys_proc_index; 895 895 d = &xIoHriProcessorVpd[index]; 896 896 897 897 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
+1 -1
arch/powerpc/platforms/iseries/smp.c
··· 91 91 BUG_ON((nr < 0) || (nr >= NR_CPUS)); 92 92 93 93 /* Verify that our partition has a processor nr */ 94 - if (paca[nr].lppaca.dyn_proc_status >= 2) 94 + if (lppaca[nr].dyn_proc_status >= 2) 95 95 return; 96 96 97 97 /* The processor is currently spinning, waiting
+2 -2
arch/powerpc/platforms/pseries/lpar.c
··· 254 254 void vpa_init(int cpu) 255 255 { 256 256 int hwcpu = get_hard_smp_processor_id(cpu); 257 - unsigned long vpa = __pa(&paca[cpu].lppaca); 257 + unsigned long vpa = __pa(&lppaca[cpu]); 258 258 long ret; 259 259 260 260 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 261 - paca[cpu].lppaca.vmxregs_in_use = 1; 261 + lppaca[cpu].vmxregs_in_use = 1; 262 262 263 263 ret = register_vpa(hwcpu, vpa); 264 264
+100
arch/powerpc/platforms/pseries/reconfig.c
··· 350 350 return rv; 351 351 } 352 352 353 + static char *parse_node(char *buf, size_t bufsize, struct device_node **npp) 354 + { 355 + char *handle_str; 356 + phandle handle; 357 + *npp = NULL; 358 + 359 + handle_str = buf; 360 + 361 + buf = strchr(buf, ' '); 362 + if (!buf) 363 + return NULL; 364 + *buf = '\0'; 365 + buf++; 366 + 367 + handle = simple_strtoul(handle_str, NULL, 10); 368 + 369 + *npp = of_find_node_by_phandle(handle); 370 + return buf; 371 + } 372 + 373 + static int do_add_property(char *buf, size_t bufsize) 374 + { 375 + struct property *prop = NULL; 376 + struct device_node *np; 377 + unsigned char *value; 378 + char *name, *end; 379 + int length; 380 + end = buf + bufsize; 381 + buf = parse_node(buf, bufsize, &np); 382 + 383 + if (!np) 384 + return -ENODEV; 385 + 386 + if (parse_next_property(buf, end, &name, &length, &value) == NULL) 387 + return -EINVAL; 388 + 389 + prop = new_property(name, length, value, NULL); 390 + if (!prop) 391 + return -ENOMEM; 392 + 393 + prom_add_property(np, prop); 394 + 395 + return 0; 396 + } 397 + 398 + static int do_remove_property(char *buf, size_t bufsize) 399 + { 400 + struct device_node *np; 401 + char *tmp; 402 + struct property *prop; 403 + buf = parse_node(buf, bufsize, &np); 404 + 405 + if (!np) 406 + return -ENODEV; 407 + 408 + tmp = strchr(buf,' '); 409 + if (tmp) 410 + *tmp = '\0'; 411 + 412 + if (strlen(buf) == 0) 413 + return -EINVAL; 414 + 415 + prop = of_find_property(np, buf, NULL); 416 + 417 + return prom_remove_property(np, prop); 418 + } 419 + 420 + static int do_update_property(char *buf, size_t bufsize) 421 + { 422 + struct device_node *np; 423 + unsigned char *value; 424 + char *name, *end; 425 + int length; 426 + struct property *newprop, *oldprop; 427 + buf = parse_node(buf, bufsize, &np); 428 + end = buf + bufsize; 429 + 430 + if (!np) 431 + return -ENODEV; 432 + 433 + if (parse_next_property(buf, end, &name, &length, &value) == NULL) 434 + return -EINVAL; 435 + 436 + newprop = new_property(name, length, value, NULL); 437 + if (!newprop) 438 + return -ENOMEM; 439 + 440 + oldprop = of_find_property(np, name,NULL); 441 + if (!oldprop) 442 + return -ENODEV; 443 + 444 + return prom_update_property(np, newprop, oldprop); 445 + } 446 + 353 447 /** 354 448 * ofdt_write - perform operations on the Open Firmware device tree 355 449 * ··· 486 392 rv = do_add_node(tmp, count - (tmp - kbuf)); 487 393 else if (!strcmp(kbuf, "remove_node")) 488 394 rv = do_remove_node(tmp); 395 + else if (!strcmp(kbuf, "add_property")) 396 + rv = do_add_property(tmp, count - (tmp - kbuf)); 397 + else if (!strcmp(kbuf, "remove_property")) 398 + rv = do_remove_property(tmp, count - (tmp - kbuf)); 399 + else if (!strcmp(kbuf, "update_property")) 400 + rv = do_update_property(tmp, count - (tmp - kbuf)); 489 401 else 490 402 rv = -EINVAL; 491 403 out:
+9 -11
arch/powerpc/platforms/pseries/setup.c
··· 190 190 191 191 /* instruct hypervisor to maintain PMCs */ 192 192 if (firmware_has_feature(FW_FEATURE_SPLPAR)) 193 - get_paca()->lppaca.pmcregs_in_use = 1; 193 + get_lppaca()->pmcregs_in_use = 1; 194 194 } 195 195 196 196 static void __init pSeries_setup_arch(void) ··· 234 234 /* Choose an idle loop */ 235 235 if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 236 236 vpa_init(boot_cpuid); 237 - if (get_paca()->lppaca.shared_proc) { 237 + if (get_lppaca()->shared_proc) { 238 238 printk(KERN_INFO "Using shared processor idle loop\n"); 239 239 ppc_md.idle_loop = pseries_shared_idle; 240 240 } else { ··· 444 444 445 445 static inline void dedicated_idle_sleep(unsigned int cpu) 446 446 { 447 - struct paca_struct *ppaca = &paca[cpu ^ 1]; 447 + struct lppaca *plppaca = &lppaca[cpu ^ 1]; 448 448 449 449 /* Only sleep if the other thread is not idle */ 450 - if (!(ppaca->lppaca.idle)) { 450 + if (!(plppaca->idle)) { 451 451 local_irq_disable(); 452 452 453 453 /* ··· 480 480 481 481 static void pseries_dedicated_idle(void) 482 482 { 483 - struct paca_struct *lpaca = get_paca(); 484 483 unsigned int cpu = smp_processor_id(); 485 484 unsigned long start_snooze; 486 485 unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay); ··· 490 491 * Indicate to the HV that we are idle. Now would be 491 492 * a good time to find other work to dispatch. 492 493 */ 493 - lpaca->lppaca.idle = 1; 494 + get_lppaca()->idle = 1; 494 495 495 496 if (!need_resched()) { 496 497 start_snooze = get_tb() + ··· 517 518 HMT_medium(); 518 519 } 519 520 520 - lpaca->lppaca.idle = 0; 521 + get_lppaca()->idle = 0; 521 522 ppc64_runlatch_on(); 522 523 523 524 preempt_enable_no_resched(); ··· 531 532 532 533 static void pseries_shared_idle(void) 533 534 { 534 - struct paca_struct *lpaca = get_paca(); 535 535 unsigned int cpu = smp_processor_id(); 536 536 537 537 while (1) { ··· 538 540 * Indicate to the HV that we are idle. Now would be 539 541 * a good time to find other work to dispatch. 540 542 */ 541 - lpaca->lppaca.idle = 1; 543 + get_lppaca()->idle = 1; 542 544 543 545 while (!need_resched() && !cpu_is_offline(cpu)) { 544 546 local_irq_disable(); ··· 562 564 HMT_medium(); 563 565 } 564 566 565 - lpaca->lppaca.idle = 0; 567 + get_lppaca()->idle = 0; 566 568 ppc64_runlatch_on(); 567 569 568 570 preempt_enable_no_resched(); ··· 586 588 { 587 589 /* Don't risk a hypervisor call if we're crashing */ 588 590 if (!crash_shutdown) { 589 - unsigned long vpa = __pa(&get_paca()->lppaca); 591 + unsigned long vpa = __pa(get_lppaca()); 590 592 591 593 if (unregister_vpa(hard_smp_processor_id(), vpa)) { 592 594 printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
+1
arch/powerpc/sysdev/Makefile
··· 7 7 obj-$(CONFIG_U3_DART) += dart_iommu.o 8 8 obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o 9 9 obj-$(CONFIG_PPC_83xx) += ipic.o 10 + obj-$(CONFIG_FSL_SOC) += fsl_soc.o
+317
arch/powerpc/sysdev/fsl_soc.c
··· 1 + /* 2 + * FSL SoC setup code 3 + * 4 + * Maintained by Kumar Gala (see MAINTAINERS for contact information) 5 + * 6 + * This program is free software; you can redistribute it and/or modify it 7 + * under the terms of the GNU General Public License as published by the 8 + * Free Software Foundation; either version 2 of the License, or (at your 9 + * option) any later version. 10 + */ 11 + 12 + #include <linux/config.h> 13 + #include <linux/stddef.h> 14 + #include <linux/kernel.h> 15 + #include <linux/init.h> 16 + #include <linux/errno.h> 17 + #include <linux/major.h> 18 + #include <linux/delay.h> 19 + #include <linux/irq.h> 20 + #include <linux/module.h> 21 + #include <linux/device.h> 22 + #include <linux/platform_device.h> 23 + #include <linux/fsl_devices.h> 24 + 25 + #include <asm/system.h> 26 + #include <asm/atomic.h> 27 + #include <asm/io.h> 28 + #include <asm/irq.h> 29 + #include <asm/prom.h> 30 + #include <sysdev/fsl_soc.h> 31 + #include <mm/mmu_decl.h> 32 + 33 + static phys_addr_t immrbase = -1; 34 + 35 + phys_addr_t get_immrbase(void) 36 + { 37 + struct device_node *soc; 38 + 39 + if (immrbase != -1) 40 + return immrbase; 41 + 42 + soc = of_find_node_by_type(NULL, "soc"); 43 + if (soc != 0) { 44 + unsigned int size; 45 + void *prop = get_property(soc, "reg", &size); 46 + immrbase = of_translate_address(soc, prop); 47 + of_node_put(soc); 48 + }; 49 + 50 + return immrbase; 51 + } 52 + EXPORT_SYMBOL(get_immrbase); 53 + 54 + static const char * gfar_tx_intr = "tx"; 55 + static const char * gfar_rx_intr = "rx"; 56 + static const char * gfar_err_intr = "error"; 57 + 58 + static int __init gfar_of_init(void) 59 + { 60 + struct device_node *np; 61 + unsigned int i; 62 + struct platform_device *mdio_dev, *gfar_dev; 63 + struct resource res; 64 + int ret; 65 + 66 + for (np = NULL, i = 0; (np = of_find_compatible_node(np, "mdio", "gianfar")) != NULL; i++) { 67 + int k; 68 + struct device_node *child = NULL; 69 + struct gianfar_mdio_data mdio_data; 70 + 71 + memset(&res, 0, sizeof(res)); 72 + memset(&mdio_data, 0, sizeof(mdio_data)); 73 + 74 + ret = of_address_to_resource(np, 0, &res); 75 + if (ret) 76 + goto mdio_err; 77 + 78 + mdio_dev = platform_device_register_simple("fsl-gianfar_mdio", res.start, &res, 1); 79 + if (IS_ERR(mdio_dev)) { 80 + ret = PTR_ERR(mdio_dev); 81 + goto mdio_err; 82 + } 83 + 84 + for (k = 0; k < 32; k++) 85 + mdio_data.irq[k] = -1; 86 + 87 + while ((child = of_get_next_child(np, child)) != NULL) { 88 + if (child->n_intrs) { 89 + u32 *id = (u32 *) get_property(child, "reg", NULL); 90 + mdio_data.irq[*id] = child->intrs[0].line; 91 + } 92 + } 93 + 94 + ret = platform_device_add_data(mdio_dev, &mdio_data, sizeof(struct gianfar_mdio_data)); 95 + if (ret) 96 + goto mdio_unreg; 97 + } 98 + 99 + for (np = NULL, i = 0; (np = of_find_compatible_node(np, "network", "gianfar")) != NULL; i++) { 100 + struct resource r[4]; 101 + struct device_node *phy, *mdio; 102 + struct gianfar_platform_data gfar_data; 103 + unsigned int *id; 104 + char *model; 105 + void *mac_addr; 106 + phandle *ph; 107 + 108 + memset(r, 0, sizeof(r)); 109 + memset(&gfar_data, 0, sizeof(gfar_data)); 110 + 111 + ret = of_address_to_resource(np, 0, &r[0]); 112 + if (ret) 113 + goto gfar_err; 114 + 115 + r[1].start = np->intrs[0].line; 116 + r[1].end = np->intrs[0].line; 117 + r[1].flags = IORESOURCE_IRQ; 118 + 119 + model = get_property(np, "model", NULL); 120 + 121 + /* If we aren't the FEC we have multiple interrupts */ 122 + if (model && strcasecmp(model, "FEC")) { 123 + r[1].name = gfar_tx_intr; 124 + 125 + r[2].name = gfar_rx_intr; 126 + r[2].start = np->intrs[1].line; 127 + r[2].end = np->intrs[1].line; 128 + r[2].flags = IORESOURCE_IRQ; 129 + 130 + r[3].name = gfar_err_intr; 131 + r[3].start = np->intrs[2].line; 132 + r[3].end = np->intrs[2].line; 133 + r[3].flags = IORESOURCE_IRQ; 134 + } 135 + 136 + gfar_dev = platform_device_register_simple("fsl-gianfar", i, &r[0], np->n_intrs + 1); 137 + 138 + if (IS_ERR(gfar_dev)) { 139 + ret = PTR_ERR(gfar_dev); 140 + goto gfar_err; 141 + } 142 + 143 + mac_addr = get_property(np, "address", NULL); 144 + memcpy(gfar_data.mac_addr, mac_addr, 6); 145 + 146 + if (model && !strcasecmp(model, "TSEC")) 147 + gfar_data.device_flags = 148 + FSL_GIANFAR_DEV_HAS_GIGABIT | 149 + FSL_GIANFAR_DEV_HAS_COALESCE | 150 + FSL_GIANFAR_DEV_HAS_RMON | 151 + FSL_GIANFAR_DEV_HAS_MULTI_INTR; 152 + if (model && !strcasecmp(model, "eTSEC")) 153 + gfar_data.device_flags = 154 + FSL_GIANFAR_DEV_HAS_GIGABIT | 155 + FSL_GIANFAR_DEV_HAS_COALESCE | 156 + FSL_GIANFAR_DEV_HAS_RMON | 157 + FSL_GIANFAR_DEV_HAS_MULTI_INTR | 158 + FSL_GIANFAR_DEV_HAS_CSUM | 159 + FSL_GIANFAR_DEV_HAS_VLAN | 160 + FSL_GIANFAR_DEV_HAS_EXTENDED_HASH; 161 + 162 + ph = (phandle *) get_property(np, "phy-handle", NULL); 163 + phy = of_find_node_by_phandle(*ph); 164 + 165 + if (phy == NULL) { 166 + ret = -ENODEV; 167 + goto gfar_unreg; 168 + } 169 + 170 + mdio = of_get_parent(phy); 171 + 172 + id = (u32 *) get_property(phy, "reg", NULL); 173 + ret = of_address_to_resource(mdio, 0, &res); 174 + if (ret) { 175 + of_node_put(phy); 176 + of_node_put(mdio); 177 + goto gfar_unreg; 178 + } 179 + 180 + gfar_data.phy_id = *id; 181 + gfar_data.bus_id = res.start; 182 + 183 + of_node_put(phy); 184 + of_node_put(mdio); 185 + 186 + ret = platform_device_add_data(gfar_dev, &gfar_data, sizeof(struct gianfar_platform_data)); 187 + if (ret) 188 + goto gfar_unreg; 189 + } 190 + 191 + return 0; 192 + 193 + mdio_unreg: 194 + platform_device_unregister(mdio_dev); 195 + mdio_err: 196 + return ret; 197 + 198 + gfar_unreg: 199 + platform_device_unregister(gfar_dev); 200 + gfar_err: 201 + return ret; 202 + } 203 + arch_initcall(gfar_of_init); 204 + 205 + static int __init fsl_i2c_of_init(void) 206 + { 207 + struct device_node *np; 208 + unsigned int i; 209 + struct platform_device *i2c_dev; 210 + int ret; 211 + 212 + for (np = NULL, i = 0; (np = of_find_compatible_node(np, "i2c", "fsl-i2c")) != NULL; i++) { 213 + struct resource r[2]; 214 + struct fsl_i2c_platform_data i2c_data; 215 + unsigned char * flags = NULL; 216 + 217 + memset(&r, 0, sizeof(r)); 218 + memset(&i2c_data, 0, sizeof(i2c_data)); 219 + 220 + ret = of_address_to_resource(np, 0, &r[0]); 221 + if (ret) 222 + goto i2c_err; 223 + 224 + r[1].start = np->intrs[0].line; 225 + r[1].end = np->intrs[0].line; 226 + r[1].flags = IORESOURCE_IRQ; 227 + 228 + i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2); 229 + if (IS_ERR(i2c_dev)) { 230 + ret = PTR_ERR(i2c_dev); 231 + goto i2c_err; 232 + } 233 + 234 + i2c_data.device_flags = 0; 235 + flags = get_property(np, "dfsrr", NULL); 236 + if (flags) 237 + i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR; 238 + 239 + flags = get_property(np, "fsl5200-clocking", NULL); 240 + if (flags) 241 + i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200; 242 + 243 + ret = platform_device_add_data(i2c_dev, &i2c_data, sizeof(struct fsl_i2c_platform_data)); 244 + if (ret) 245 + goto i2c_unreg; 246 + } 247 + 248 + return 0; 249 + 250 + i2c_unreg: 251 + platform_device_unregister(i2c_dev); 252 + i2c_err: 253 + return ret; 254 + } 255 + arch_initcall(fsl_i2c_of_init); 256 + 257 + #ifdef CONFIG_PPC_83xx 258 + static int __init mpc83xx_wdt_init(void) 259 + { 260 + struct resource r; 261 + struct device_node *soc, *np; 262 + struct platform_device *dev; 263 + unsigned int *freq; 264 + int ret; 265 + 266 + np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt"); 267 + 268 + if (!np) { 269 + ret = -ENODEV; 270 + goto mpc83xx_wdt_nodev; 271 + } 272 + 273 + soc = of_find_node_by_type(NULL, "soc"); 274 + 275 + if (!soc) { 276 + ret = -ENODEV; 277 + goto mpc83xx_wdt_nosoc; 278 + } 279 + 280 + freq = (unsigned int *)get_property(soc, "bus-frequency", NULL); 281 + if (!freq) { 282 + ret = -ENODEV; 283 + goto mpc83xx_wdt_err; 284 + } 285 + 286 + memset(&r, 0, sizeof(r)); 287 + 288 + ret = of_address_to_resource(np, 0, &r); 289 + if (ret) 290 + goto mpc83xx_wdt_err; 291 + 292 + dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1); 293 + if (IS_ERR(dev)) { 294 + ret = PTR_ERR(dev); 295 + goto mpc83xx_wdt_err; 296 + } 297 + 298 + ret = platform_device_add_data(dev, freq, sizeof(int)); 299 + if (ret) 300 + goto mpc83xx_wdt_unreg; 301 + 302 + of_node_put(soc); 303 + of_node_put(np); 304 + 305 + return 0; 306 + 307 + mpc83xx_wdt_unreg: 308 + platform_device_unregister(dev); 309 + mpc83xx_wdt_err: 310 + of_node_put(soc); 311 + mpc83xx_wdt_nosoc: 312 + of_node_put(np); 313 + mpc83xx_wdt_nodev: 314 + return ret; 315 + } 316 + arch_initcall(mpc83xx_wdt_init); 317 + #endif
+8
arch/powerpc/sysdev/fsl_soc.h
··· 1 + #ifndef __PPC_FSL_SOC_H 2 + #define __PPC_FSL_SOC_H 3 + #ifdef __KERNEL__ 4 + 5 + extern phys_addr_t get_immrbase(void); 6 + 7 + #endif 8 + #endif
+77
arch/ppc/kernel/head_8xx.S
··· 375 375 lis r11, swapper_pg_dir@h 376 376 ori r11, r11, swapper_pg_dir@l 377 377 rlwimi r10, r11, 0, 2, 19 378 + stw r12, 16(r0) 379 + b LoadLargeDTLB 378 380 3: 379 381 lwz r11, 0(r10) /* Get the level 1 entry */ 380 382 rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ ··· 431 429 . = 0x1300 432 430 InstructionTLBError: 433 431 b InstructionAccess 432 + 433 + LoadLargeDTLB: 434 + li r12, 0 435 + lwz r11, 0(r10) /* Get the level 1 entry */ 436 + rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ 437 + beq 3f /* If zero, don't try to find a pte */ 438 + 439 + /* We have a pte table, so load fetch the pte from the table. 440 + */ 441 + ori r11, r11, 1 /* Set valid bit in physical L2 page */ 442 + DO_8xx_CPU6(0x3b80, r3) 443 + mtspr SPRN_MD_TWC, r11 /* Load pte table base address */ 444 + mfspr r10, SPRN_MD_TWC /* ....and get the pte address */ 445 + lwz r10, 0(r10) /* Get the pte */ 446 + 447 + /* Insert the Guarded flag into the TWC from the Linux PTE. 448 + * It is bit 27 of both the Linux PTE and the TWC (at least 449 + * I got that right :-). It will be better when we can put 450 + * this into the Linux pgd/pmd and load it in the operation 451 + * above. 452 + */ 453 + rlwimi r11, r10, 0, 27, 27 454 + 455 + rlwimi r12, r10, 0, 0, 9 /* extract phys. addr */ 456 + mfspr r3, SPRN_MD_EPN 457 + rlwinm r3, r3, 0, 0, 9 /* extract virtual address */ 458 + tophys(r3, r3) 459 + cmpw r3, r12 /* only use 8M page if it is a direct 460 + kernel mapping */ 461 + bne 1f 462 + ori r11, r11, MD_PS8MEG 463 + li r12, 1 464 + b 2f 465 + 1: 466 + li r12, 0 /* can't use 8MB TLB, so zero r12. */ 467 + 2: 468 + DO_8xx_CPU6(0x3b80, r3) 469 + mtspr SPRN_MD_TWC, r11 470 + 471 + /* The Linux PTE won't go exactly into the MMU TLB. 472 + * Software indicator bits 21, 22 and 28 must be clear. 473 + * Software indicator bits 24, 25, 26, and 27 must be 474 + * set. All other Linux PTE bits control the behavior 475 + * of the MMU. 476 + */ 477 + 3: li r11, 0x00f0 478 + rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */ 479 + cmpwi r12, 1 480 + bne 4f 481 + ori r10, r10, 0x8 482 + 483 + mfspr r12, SPRN_MD_EPN 484 + lis r3, 0xff80 /* 10-19 must be clear for 8MB TLB */ 485 + ori r3, r3, 0x0fff 486 + and r12, r3, r12 487 + DO_8xx_CPU6(0x3780, r3) 488 + mtspr SPRN_MD_EPN, r12 489 + 490 + lis r3, 0xff80 /* 10-19 must be clear for 8MB TLB */ 491 + ori r3, r3, 0x0fff 492 + and r10, r3, r10 493 + 4: 494 + DO_8xx_CPU6(0x3d80, r3) 495 + mtspr SPRN_MD_RPN, r10 /* Update TLB entry */ 496 + 497 + mfspr r10, SPRN_M_TW /* Restore registers */ 498 + lwz r11, 0(r0) 499 + mtcr r11 500 + lwz r11, 4(r0) 501 + 502 + lwz r12, 16(r0) 503 + #ifdef CONFIG_8xx_CPU6 504 + lwz r3, 8(r0) 505 + #endif 506 + rfi 434 507 435 508 /* This is the data TLB error on the MPC8xx. This could be due to 436 509 * many reasons, including a dirty update to a pte. We can catch that
-1
arch/ppc/kernel/ppc_ksyms.c
··· 270 270 EXPORT_SYMBOL(timer_interrupt); 271 271 EXPORT_SYMBOL(irq_desc); 272 272 EXPORT_SYMBOL(tb_ticks_per_jiffy); 273 - EXPORT_SYMBOL(get_wchan); 274 273 EXPORT_SYMBOL(console_drivers); 275 274 #ifdef CONFIG_XMON 276 275 EXPORT_SYMBOL(xmon);
+4 -6
arch/ppc/platforms/83xx/mpc834x_sys.c
··· 51 51 52 52 #include <syslib/ppc83xx_setup.h> 53 53 54 - static const char *GFAR_PHY_0 = "phy0:0"; 55 - static const char *GFAR_PHY_1 = "phy0:1"; 56 - 57 54 #ifndef CONFIG_PCI 58 55 unsigned long isa_io_base = 0; 59 56 unsigned long isa_mem_base = 0; ··· 126 129 mdata->irq[1] = MPC83xx_IRQ_EXT2; 127 130 mdata->irq[2] = -1; 128 131 mdata->irq[31] = -1; 129 - mdata->paddr += binfo->bi_immr_base; 130 132 131 133 /* setup the board related information for the enet controllers */ 132 134 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1); 133 135 if (pdata) { 134 136 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 135 - pdata->bus_id = GFAR_PHY_0; 137 + pdata->bus_id = 0; 138 + pdata->phy_id = 0; 136 139 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 137 140 } 138 141 139 142 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2); 140 143 if (pdata) { 141 144 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 142 - pdata->bus_id = GFAR_PHY_1; 145 + pdata->bus_id = 0; 146 + pdata->phy_id = 1; 143 147 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 144 148 } 145 149
+6 -8
arch/ppc/platforms/85xx/mpc8540_ads.c
··· 52 52 53 53 #include <syslib/ppc85xx_setup.h> 54 54 55 - static const char *GFAR_PHY_0 = "phy0:0"; 56 - static const char *GFAR_PHY_1 = "phy0:1"; 57 - static const char *GFAR_PHY_3 = "phy0:3"; 58 - 59 55 /* ************************************************************************ 60 56 * 61 57 * Setup the architecture ··· 98 102 mdata->irq[2] = -1; 99 103 mdata->irq[3] = MPC85xx_IRQ_EXT5; 100 104 mdata->irq[31] = -1; 101 - mdata->paddr += binfo->bi_immr_base; 102 105 103 106 /* setup the board related information for the enet controllers */ 104 107 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 105 108 if (pdata) { 106 109 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 107 - pdata->bus_id = GFAR_PHY_0; 110 + pdata->bus_id = 0; 111 + pdata->phy_id = 0; 108 112 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 109 113 } 110 114 111 115 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 112 116 if (pdata) { 113 117 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 114 - pdata->bus_id = GFAR_PHY_1; 118 + pdata->bus_id = 0; 119 + pdata->phy_id = 1; 115 120 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 116 121 } 117 122 118 123 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); 119 124 if (pdata) { 120 125 pdata->board_flags = 0; 121 - pdata->bus_id = GFAR_PHY_3; 126 + pdata->bus_id = 0; 127 + pdata->phy_id = 3; 122 128 memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); 123 129 } 124 130
+4 -7
arch/ppc/platforms/85xx/mpc8560_ads.c
··· 56 56 #include <syslib/ppc85xx_setup.h> 57 57 58 58 59 - static const char *GFAR_PHY_0 = "phy0:0"; 60 - static const char *GFAR_PHY_1 = "phy0:1"; 61 - static const char *GFAR_PHY_3 = "phy0:3"; 62 - 63 59 /* ************************************************************************ 64 60 * 65 61 * Setup the architecture ··· 95 99 mdata->irq[2] = -1; 96 100 mdata->irq[3] = MPC85xx_IRQ_EXT5; 97 101 mdata->irq[31] = -1; 98 - mdata->paddr += binfo->bi_immr_base; 99 102 100 103 /* setup the board related information for the enet controllers */ 101 104 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 102 105 if (pdata) { 103 106 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 104 - pdata->bus_id = GFAR_PHY_0; 107 + pdata->bus_id = 0; 108 + pdata->phy_id = 0; 105 109 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 106 110 } 107 111 108 112 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 109 113 if (pdata) { 110 114 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 111 - pdata->bus_id = GFAR_PHY_1; 115 + pdata->bus_id = 0; 116 + pdata->phy_id = 1; 112 117 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 113 118 } 114 119
+8 -8
arch/ppc/platforms/85xx/mpc85xx_cds_common.c
··· 395 395 396 396 TODC_ALLOC(); 397 397 398 - static const char *GFAR_PHY_0 = "phy0:0"; 399 - static const char *GFAR_PHY_1 = "phy0:1"; 400 - 401 398 /* ************************************************************************ 402 399 * 403 400 * Setup the architecture ··· 458 461 mdata->irq[2] = -1; 459 462 mdata->irq[3] = -1; 460 463 mdata->irq[31] = -1; 461 - mdata->paddr += binfo->bi_immr_base; 462 464 463 465 /* setup the board related information for the enet controllers */ 464 466 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 465 467 if (pdata) { 466 468 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 467 - pdata->bus_id = GFAR_PHY_0; 469 + pdata->bus_id = 0; 470 + pdata->phy_id = 0; 468 471 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 469 472 } 470 473 471 474 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 472 475 if (pdata) { 473 476 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 474 - pdata->bus_id = GFAR_PHY_1; 477 + pdata->bus_id = 0; 478 + pdata->phy_id = 1; 475 479 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 476 480 } 477 481 478 482 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1); 479 483 if (pdata) { 480 484 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 481 - pdata->bus_id = GFAR_PHY_0; 485 + pdata->bus_id = 0; 486 + pdata->phy_id = 0; 482 487 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 483 488 } 484 489 485 490 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2); 486 491 if (pdata) { 487 492 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 488 - pdata->bus_id = GFAR_PHY_1; 493 + pdata->bus_id = 0; 494 + pdata->phy_id = 1; 489 495 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 490 496 } 491 497
+4 -6
arch/ppc/platforms/85xx/sbc8560.c
··· 91 91 } 92 92 #endif 93 93 94 - static const char *GFAR_PHY_25 = "phy0:25"; 95 - static const char *GFAR_PHY_26 = "phy0:26"; 96 - 97 94 /* ************************************************************************ 98 95 * 99 96 * Setup the architecture ··· 133 136 mdata->irq[25] = MPC85xx_IRQ_EXT6; 134 137 mdata->irq[26] = MPC85xx_IRQ_EXT7; 135 138 mdata->irq[31] = -1; 136 - mdata->paddr += binfo->bi_immr_base; 137 139 138 140 /* setup the board related information for the enet controllers */ 139 141 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 140 142 if (pdata) { 141 143 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 142 - pdata->bus_id = GFAR_PHY_25; 144 + pdata->bus_id = 0; 145 + pdata->phy_id = 25; 143 146 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 144 147 } 145 148 146 149 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 147 150 if (pdata) { 148 151 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 149 - pdata->bus_id = GFAR_PHY_26; 152 + pdata->bus_id = 0; 153 + pdata->phy_id = 26; 150 154 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 151 155 } 152 156
+4 -6
arch/ppc/platforms/85xx/stx_gp3.c
··· 93 93 0x0, /* External 11: */ 94 94 }; 95 95 96 - static const char *GFAR_PHY_2 = "phy0:2"; 97 - static const char *GFAR_PHY_4 = "phy0:4"; 98 - 99 96 /* 100 97 * Setup the architecture 101 98 */ ··· 127 130 mdata->irq[2] = MPC85xx_IRQ_EXT5; 128 131 mdata->irq[4] = MPC85xx_IRQ_EXT5; 129 132 mdata->irq[31] = -1; 130 - mdata->paddr += binfo->bi_immr_base; 131 133 132 134 /* setup the board related information for the enet controllers */ 133 135 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 134 136 if (pdata) { 135 137 /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ 136 - pdata->bus_id = GFAR_PHY_2; 138 + pdata->bus_id = 0; 139 + pdata->phy_id = 2; 137 140 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 138 141 } 139 142 140 143 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 141 144 if (pdata) { 142 145 /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ 143 - pdata->bus_id = GFAR_PHY_4; 146 + pdata->bus_id = 0; 147 + pdata->phy_id = 4; 144 148 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 145 149 } 146 150
+6 -10
arch/ppc/platforms/85xx/tqm85xx.c
··· 91 91 0x0, /* External 11: */ 92 92 }; 93 93 94 - static const char *GFAR_PHY_0 = "phy0:2"; 95 - static const char *GFAR_PHY_1 = "phy0:1"; 96 - #ifdef CONFIG_MPC8540 97 - static const char *GFAR_PHY_3 = "phy0:3"; 98 - #endif 99 - 100 94 /* ************************************************************************ 101 95 * 102 96 * Setup the architecture ··· 143 149 mdata->irq[2] = -1; 144 150 mdata->irq[3] = MPC85xx_IRQ_EXT8; 145 151 mdata->irq[31] = -1; 146 - mdata->paddr += binfo->bi_immr_base; 147 152 148 153 /* setup the board related information for the enet controllers */ 149 154 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 150 155 if (pdata) { 151 156 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 152 - pdata->bus_id = GFAR_PHY_0; 157 + pdata->bus_id = 0; 158 + pdata->phy_id = 2; 153 159 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 154 160 } 155 161 156 162 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 157 163 if (pdata) { 158 164 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 159 - pdata->bus_id = GFAR_PHY_1; 165 + pdata->bus_id = 0; 166 + pdata->phy_id = 1; 160 167 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 161 168 } 162 169 ··· 165 170 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); 166 171 if (pdata) { 167 172 pdata->board_flags = 0; 168 - pdata->bus_id = GFAR_PHY_3; 173 + pdata->bus_id = 0; 174 + pdata->phy_id = 3; 169 175 memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); 170 176 } 171 177 #endif
+8 -2
arch/ppc/syslib/mpc83xx_devices.c
··· 28 28 */ 29 29 30 30 struct gianfar_mdio_data mpc83xx_mdio_pdata = { 31 - .paddr = 0x24520, 32 31 }; 33 32 34 33 static struct gianfar_platform_data mpc83xx_tsec1_pdata = { ··· 225 226 .name = "fsl-gianfar_mdio", 226 227 .id = 0, 227 228 .dev.platform_data = &mpc83xx_mdio_pdata, 228 - .num_resources = 0, 229 + .num_resources = 1, 230 + .resource = (struct resource[]) { 231 + { 232 + .start = 0x24520, 233 + .end = 0x2453f, 234 + .flags = IORESOURCE_MEM, 235 + }, 236 + }, 229 237 }, 230 238 }; 231 239
+8 -2
arch/ppc/syslib/mpc85xx_devices.c
··· 26 26 * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup 27 27 */ 28 28 struct gianfar_mdio_data mpc85xx_mdio_pdata = { 29 - .paddr = MPC85xx_MIIM_OFFSET, 30 29 }; 31 30 32 31 static struct gianfar_platform_data mpc85xx_tsec1_pdata = { ··· 719 720 .name = "fsl-gianfar_mdio", 720 721 .id = 0, 721 722 .dev.platform_data = &mpc85xx_mdio_pdata, 722 - .num_resources = 0, 723 + .num_resources = 1, 724 + .resource = (struct resource[]) { 725 + { 726 + .start = 0x24520, 727 + .end = 0x2453f, 728 + .flags = IORESOURCE_MEM, 729 + }, 730 + }, 723 731 }, 724 732 }; 725 733
+8 -5
drivers/macintosh/macio-adb.c
··· 17 17 #include <asm/irq.h> 18 18 #include <asm/system.h> 19 19 #include <linux/init.h> 20 + #include <linux/ioport.h> 20 21 21 22 struct preg { 22 23 unsigned char r; ··· 89 88 int macio_init(void) 90 89 { 91 90 struct device_node *adbs; 91 + struct resource r; 92 92 93 93 adbs = find_compatible_devices("adb", "chrp,adb0"); 94 94 if (adbs == 0) 95 95 return -ENXIO; 96 96 97 97 #if 0 98 - { int i; 98 + { int i = 0; 99 99 100 100 printk("macio_adb_init: node = %p, addrs =", adbs->node); 101 - for (i = 0; i < adbs->n_addrs; ++i) 102 - printk(" %x(%x)", adbs->addrs[i].address, adbs->addrs[i].size); 101 + while(!of_address_to_resource(adbs, i, &r)) 102 + printk(" %x(%x)", r.start, r.end - r.start); 103 103 printk(", intrs ="); 104 104 for (i = 0; i < adbs->n_intrs; ++i) 105 105 printk(" %x", adbs->intrs[i].line); 106 106 printk("\n"); } 107 107 #endif 108 - 109 - adb = ioremap(adbs->addrs->address, sizeof(struct adb_regs)); 108 + if (of_address_to_resource(adbs, 0, &r)) 109 + return -ENXIO; 110 + adb = ioremap(r.start, sizeof(struct adb_regs)); 110 111 111 112 out_8(&adb->ctrl.r, 0); 112 113 out_8(&adb->intr.r, 0);
+24
fs/proc/proc_devtree.c
··· 81 81 __proc_device_tree_add_prop(pde, prop); 82 82 } 83 83 84 + void proc_device_tree_remove_prop(struct proc_dir_entry *pde, 85 + struct property *prop) 86 + { 87 + remove_proc_entry(prop->name, pde); 88 + } 89 + 90 + void proc_device_tree_update_prop(struct proc_dir_entry *pde, 91 + struct property *newprop, 92 + struct property *oldprop) 93 + { 94 + struct proc_dir_entry *ent; 95 + 96 + for (ent = pde->subdir; ent != NULL; ent = ent->next) 97 + if (ent->data == oldprop) 98 + break; 99 + if (ent == NULL) { 100 + printk(KERN_WARNING "device-tree: property \"%s\" " 101 + " does not exist\n", oldprop->name); 102 + } else { 103 + ent->data = newprop; 104 + ent->size = newprop->length; 105 + } 106 + } 107 + 84 108 /* 85 109 * Process a node, adding entries for its children and its properties. 86 110 */
+23 -23
include/asm-powerpc/atomic.h
··· 36 36 int t; 37 37 38 38 __asm__ __volatile__( 39 - EIEIO_ON_SMP 39 + LWSYNC_ON_SMP 40 40 "1: lwarx %0,0,%2 # atomic_add_return\n\ 41 41 add %0,%1,%0\n" 42 42 PPC405_ERR77(0,%2) ··· 72 72 int t; 73 73 74 74 __asm__ __volatile__( 75 - EIEIO_ON_SMP 75 + LWSYNC_ON_SMP 76 76 "1: lwarx %0,0,%2 # atomic_sub_return\n\ 77 77 subf %0,%1,%0\n" 78 78 PPC405_ERR77(0,%2) ··· 106 106 int t; 107 107 108 108 __asm__ __volatile__( 109 - EIEIO_ON_SMP 109 + LWSYNC_ON_SMP 110 110 "1: lwarx %0,0,%1 # atomic_inc_return\n\ 111 111 addic %0,%0,1\n" 112 112 PPC405_ERR77(0,%1) ··· 150 150 int t; 151 151 152 152 __asm__ __volatile__( 153 - EIEIO_ON_SMP 153 + LWSYNC_ON_SMP 154 154 "1: lwarx %0,0,%1 # atomic_dec_return\n\ 155 155 addic %0,%0,-1\n" 156 156 PPC405_ERR77(0,%1) ··· 176 176 * Atomically adds @a to @v, so long as it was not @u. 177 177 * Returns non-zero if @v was not @u, and zero otherwise. 178 178 */ 179 - #define atomic_add_unless(v, a, u) \ 180 - ({ \ 181 - int c, old; \ 182 - c = atomic_read(v); \ 183 - for (;;) { \ 184 - if (unlikely(c == (u))) \ 185 - break; \ 186 - old = atomic_cmpxchg((v), c, c + (a)); \ 187 - if (likely(old == c)) \ 188 - break; \ 189 - c = old; \ 190 - } \ 191 - c != (u); \ 179 + #define atomic_add_unless(v, a, u) \ 180 + ({ \ 181 + int c, old; \ 182 + c = atomic_read(v); \ 183 + for (;;) { \ 184 + if (unlikely(c == (u))) \ 185 + break; \ 186 + old = atomic_cmpxchg((v), c, c + (a)); \ 187 + if (likely(old == c)) \ 188 + break; \ 189 + c = old; \ 190 + } \ 191 + c != (u); \ 192 192 }) 193 193 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) 194 194 ··· 204 204 int t; 205 205 206 206 __asm__ __volatile__( 207 - EIEIO_ON_SMP 207 + LWSYNC_ON_SMP 208 208 "1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ 209 209 addic. %0,%0,-1\n\ 210 210 blt- 2f\n" ··· 253 253 long t; 254 254 255 255 __asm__ __volatile__( 256 - EIEIO_ON_SMP 256 + LWSYNC_ON_SMP 257 257 "1: ldarx %0,0,%2 # atomic64_add_return\n\ 258 258 add %0,%1,%0\n\ 259 259 stdcx. %0,0,%2 \n\ ··· 287 287 long t; 288 288 289 289 __asm__ __volatile__( 290 - EIEIO_ON_SMP 290 + LWSYNC_ON_SMP 291 291 "1: ldarx %0,0,%2 # atomic64_sub_return\n\ 292 292 subf %0,%1,%0\n\ 293 293 stdcx. %0,0,%2 \n\ ··· 319 319 long t; 320 320 321 321 __asm__ __volatile__( 322 - EIEIO_ON_SMP 322 + LWSYNC_ON_SMP 323 323 "1: ldarx %0,0,%1 # atomic64_inc_return\n\ 324 324 addic %0,%0,1\n\ 325 325 stdcx. %0,0,%1 \n\ ··· 361 361 long t; 362 362 363 363 __asm__ __volatile__( 364 - EIEIO_ON_SMP 364 + LWSYNC_ON_SMP 365 365 "1: ldarx %0,0,%1 # atomic64_dec_return\n\ 366 366 addic %0,%0,-1\n\ 367 367 stdcx. %0,0,%1\n\ ··· 386 386 long t; 387 387 388 388 __asm__ __volatile__( 389 - EIEIO_ON_SMP 389 + LWSYNC_ON_SMP 390 390 "1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\ 391 391 addic. %0,%0,-1\n\ 392 392 blt- 2f\n\
+3 -3
include/asm-powerpc/bitops.h
··· 112 112 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); 113 113 114 114 __asm__ __volatile__( 115 - EIEIO_ON_SMP 115 + LWSYNC_ON_SMP 116 116 "1:" PPC_LLARX "%0,0,%3 # test_and_set_bit\n" 117 117 "or %1,%0,%2 \n" 118 118 PPC405_ERR77(0,%3) ··· 134 134 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); 135 135 136 136 __asm__ __volatile__( 137 - EIEIO_ON_SMP 137 + LWSYNC_ON_SMP 138 138 "1:" PPC_LLARX "%0,0,%3 # test_and_clear_bit\n" 139 139 "andc %1,%0,%2 \n" 140 140 PPC405_ERR77(0,%3) ··· 156 156 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); 157 157 158 158 __asm__ __volatile__( 159 - EIEIO_ON_SMP 159 + LWSYNC_ON_SMP 160 160 "1:" PPC_LLARX "%0,0,%3 # test_and_change_bit\n" 161 161 "xor %1,%0,%2 \n" 162 162 PPC405_ERR77(0,%3)
+9 -5
include/asm-powerpc/cputable.h
··· 19 19 #define PPC_FEATURE_POWER5 0x00040000 20 20 #define PPC_FEATURE_POWER5_PLUS 0x00020000 21 21 #define PPC_FEATURE_CELL 0x00010000 22 + #define PPC_FEATURE_BOOKE 0x00008000 22 23 23 24 #ifdef __KERNEL__ 24 25 #ifndef __ASSEMBLY__ ··· 32 31 typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); 33 32 34 33 enum powerpc_oprofile_type { 35 - INVALID = 0, 36 - RS64 = 1, 37 - POWER4 = 2, 38 - G4 = 3, 39 - BOOKE = 4, 34 + PPC_OPROFILE_INVALID = 0, 35 + PPC_OPROFILE_RS64 = 1, 36 + PPC_OPROFILE_POWER4 = 2, 37 + PPC_OPROFILE_G4 = 3, 38 + PPC_OPROFILE_BOOKE = 4, 40 39 }; 41 40 42 41 struct cpu_spec { ··· 65 64 66 65 /* Processor specific oprofile operations */ 67 66 enum powerpc_oprofile_type oprofile_type; 67 + 68 + /* Name of processor class, for the ELF AT_PLATFORM entry */ 69 + char *platform; 68 70 }; 69 71 70 72 extern struct cpu_spec *cur_cpu_spec;
+7 -9
include/asm-powerpc/elf.h
··· 221 221 instruction set this cpu supports. This could be done in userspace, 222 222 but it's not easy, and we've already done it here. */ 223 223 # define ELF_HWCAP (cur_cpu_spec->cpu_user_features) 224 + 225 + /* This yields a string that ld.so will use to load implementation 226 + specific libraries for optimization. This is more specific in 227 + intent than poking at uname or /proc/cpuinfo. */ 228 + 229 + #define ELF_PLATFORM (cur_cpu_spec->platform) 230 + 224 231 #ifdef __powerpc64__ 225 232 # define ELF_PLAT_INIT(_r, load_addr) do { \ 226 233 _r->gpr[2] = load_addr; \ 227 234 } while (0) 228 235 #endif /* __powerpc64__ */ 229 - 230 - /* This yields a string that ld.so will use to load implementation 231 - specific libraries for optimization. This is more specific in 232 - intent than poking at uname or /proc/cpuinfo. 233 - 234 - For the moment, we have only optimizations for the Intel generations, 235 - but that could change... */ 236 - 237 - #define ELF_PLATFORM (NULL) 238 236 239 237 #ifdef __KERNEL__ 240 238
+1 -1
include/asm-powerpc/futex.h
··· 11 11 12 12 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 13 13 __asm__ __volatile ( \ 14 - SYNC_ON_SMP \ 14 + LWSYNC_ON_SMP \ 15 15 "1: lwarx %0,0,%2\n" \ 16 16 insn \ 17 17 PPC405_ERR77(0, %2) \
+5
include/asm-powerpc/hvcall.h
··· 6 6 7 7 #define H_Success 0 8 8 #define H_Busy 1 /* Hardware busy -- retry later */ 9 + #define H_Closed 2 /* Resource closed */ 9 10 #define H_Constrained 4 /* Resource request constrained to max allowed */ 11 + #define H_InProgress 14 /* Kind of like busy */ 12 + #define H_Continue 18 /* Returned from H_Join on success */ 10 13 #define H_LongBusyStartRange 9900 /* Start of long busy range */ 11 14 #define H_LongBusyOrder1msec 9900 /* Long busy, hint that 1msec is a good time to retry */ 12 15 #define H_LongBusyOrder10msec 9901 /* Long busy, hint that 10msec is a good time to retry */ ··· 117 114 #define H_REGISTER_VTERM 0x154 118 115 #define H_FREE_VTERM 0x158 119 116 #define H_POLL_PENDING 0x1D8 117 + #define H_JOIN 0x298 118 + #define H_ENABLE_CRQ 0x2B0 120 119 121 120 #ifndef __ASSEMBLY__ 122 121
+5 -1
include/asm-powerpc/lppaca.h
··· 29 29 //---------------------------------------------------------------------------- 30 30 #include <asm/types.h> 31 31 32 - struct lppaca { 32 + /* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k 33 + * alignment is sufficient to prevent this */ 34 + struct __attribute__((__aligned__(0x400))) lppaca { 33 35 //============================================================================= 34 36 // CACHE_LINE_1 0x0000 - 0x007F Contains read-only data 35 37 // NOTE: The xDynXyz fields are fields that will be dynamically changed by ··· 130 128 //============================================================================= 131 129 u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF 132 130 }; 131 + 132 + extern struct lppaca lppaca[]; 133 133 134 134 #endif /* __KERNEL__ */ 135 135 #endif /* _ASM_POWERPC_LPPACA_H */
+1 -13
include/asm-powerpc/paca.h
··· 23 23 24 24 register struct paca_struct *local_paca asm("r13"); 25 25 #define get_paca() local_paca 26 + #define get_lppaca() (get_paca()->lppaca_ptr) 26 27 27 28 struct task_struct; 28 29 ··· 96 95 u64 saved_r1; /* r1 save for RTAS calls */ 97 96 u64 saved_msr; /* MSR saved here by enter_rtas */ 98 97 u8 proc_enabled; /* irq soft-enable flag */ 99 - 100 - /* 101 - * iSeries structure which the hypervisor knows about - 102 - * this structure should not cross a page boundary. 103 - * The vpa_init/register_vpa call is now known to fail if the 104 - * lppaca structure crosses a page boundary. 105 - * The lppaca is also used on POWER5 pSeries boxes. 106 - * The lppaca is 640 bytes long, and cannot readily change 107 - * since the hypervisor knows its layout, so a 1kB 108 - * alignment will suffice to ensure that it doesn't 109 - * cross a page boundary. 110 - */ 111 - struct lppaca lppaca __attribute__((__aligned__(0x400))); 112 98 }; 113 99 114 100 extern struct paca_struct paca[];
+38 -34
include/asm-powerpc/ppc_asm.h
··· 156 156 #endif 157 157 158 158 /* 159 - * LOADADDR( rn, name ) 160 - * loads the address of 'name' into 'rn' 159 + * LOAD_REG_IMMEDIATE(rn, expr) 160 + * Loads the value of the constant expression 'expr' into register 'rn' 161 + * using immediate instructions only. Use this when it's important not 162 + * to reference other data (i.e. on ppc64 when the TOC pointer is not 163 + * valid). 161 164 * 162 - * LOADBASE( rn, name ) 163 - * loads the address (possibly without the low 16 bits) of 'name' into 'rn' 164 - * suitable for base+disp addressing 165 + * LOAD_REG_ADDR(rn, name) 166 + * Loads the address of label 'name' into register 'rn'. Use this when 167 + * you don't particularly need immediate instructions only, but you need 168 + * the whole address in one register (e.g. it's a structure address and 169 + * you want to access various offsets within it). On ppc32 this is 170 + * identical to LOAD_REG_IMMEDIATE. 171 + * 172 + * LOAD_REG_ADDRBASE(rn, name) 173 + * ADDROFF(name) 174 + * LOAD_REG_ADDRBASE loads part of the address of label 'name' into 175 + * register 'rn'. ADDROFF(name) returns the remainder of the address as 176 + * a constant expression. ADDROFF(name) is a signed expression < 16 bits 177 + * in size, so is suitable for use directly as an offset in load and store 178 + * instructions. Use this when loading/storing a single word or less as: 179 + * LOAD_REG_ADDRBASE(rX, name) 180 + * ld rY,ADDROFF(name)(rX) 165 181 */ 166 182 #ifdef __powerpc64__ 167 - #define LOADADDR(rn,name) \ 168 - lis rn,name##@highest; \ 169 - ori rn,rn,name##@higher; \ 170 - rldicr rn,rn,32,31; \ 171 - oris rn,rn,name##@h; \ 172 - ori rn,rn,name##@l 183 + #define LOAD_REG_IMMEDIATE(reg,expr) \ 184 + lis (reg),(expr)@highest; \ 185 + ori (reg),(reg),(expr)@higher; \ 186 + rldicr (reg),(reg),32,31; \ 187 + oris (reg),(reg),(expr)@h; \ 188 + ori (reg),(reg),(expr)@l; 173 189 174 - #define LOADBASE(rn,name) \ 175 - ld rn,name@got(r2) 190 + #define LOAD_REG_ADDR(reg,name) \ 191 + ld (reg),name@got(r2) 176 192 177 - #define OFF(name) 0 178 - 179 - #define SET_REG_TO_CONST(reg, value) \ 180 - lis reg,(((value)>>48)&0xFFFF); \ 181 - ori reg,reg,(((value)>>32)&0xFFFF); \ 182 - rldicr reg,reg,32,31; \ 183 - oris reg,reg,(((value)>>16)&0xFFFF); \ 184 - ori reg,reg,((value)&0xFFFF); 185 - 186 - #define SET_REG_TO_LABEL(reg, label) \ 187 - lis reg,(label)@highest; \ 188 - ori reg,reg,(label)@higher; \ 189 - rldicr reg,reg,32,31; \ 190 - oris reg,reg,(label)@h; \ 191 - ori reg,reg,(label)@l; 193 + #define LOAD_REG_ADDRBASE(reg,name) LOAD_REG_ADDR(reg,name) 194 + #define ADDROFF(name) 0 192 195 193 196 /* offsets for stack frame layout */ 194 197 #define LRSAVE 16 195 198 196 199 #else /* 32-bit */ 197 - #define LOADADDR(rn,name) \ 198 - lis rn,name@ha; \ 199 - addi rn,rn,name@l 200 200 201 - #define LOADBASE(rn,name) \ 202 - lis rn,name@ha 201 + #define LOAD_REG_IMMEDIATE(reg,expr) \ 202 + lis (reg),(expr)@ha; \ 203 + addi (reg),(reg),(expr)@l; 203 204 204 - #define OFF(name) name@l 205 + #define LOAD_REG_ADDR(reg,name) LOAD_REG_IMMEDIATE(reg, name) 206 + 207 + #define LOAD_REG_ADDRBASE(reg, name) lis (reg),name@ha 208 + #define ADDROFF(name) name@l 205 209 206 210 /* offsets for stack frame layout */ 207 211 #define LRSAVE 4
+8
include/asm-powerpc/prom.h
··· 87 87 char *full_name; 88 88 89 89 struct property *properties; 90 + struct property *deadprops; /* removed properties */ 90 91 struct device_node *parent; 91 92 struct device_node *child; 92 93 struct device_node *sibling; ··· 136 135 extern struct device_node *of_get_parent(const struct device_node *node); 137 136 extern struct device_node *of_get_next_child(const struct device_node *node, 138 137 struct device_node *prev); 138 + extern struct property *of_find_property(struct device_node *np, 139 + const char *name, 140 + int *lenp); 139 141 extern struct device_node *of_node_get(struct device_node *node); 140 142 extern void of_node_put(struct device_node *node); 141 143 ··· 168 164 extern int prom_n_intr_cells(struct device_node* np); 169 165 extern void prom_get_irq_senses(unsigned char *senses, int off, int max); 170 166 extern int prom_add_property(struct device_node* np, struct property* prop); 167 + extern int prom_remove_property(struct device_node *np, struct property *prop); 168 + extern int prom_update_property(struct device_node *np, 169 + struct property *newprop, 170 + struct property *oldprop); 171 171 172 172 #ifdef CONFIG_PPC32 173 173 /*
+11 -10
include/asm-powerpc/spinlock.h
··· 46 46 47 47 token = LOCK_TOKEN; 48 48 __asm__ __volatile__( 49 - "1: lwarx %0,0,%2 # __spin_trylock\n\ 49 + "1: lwarx %0,0,%2\n\ 50 50 cmpwi 0,%0,0\n\ 51 51 bne- 2f\n\ 52 52 stwcx. %1,0,%2\n\ ··· 80 80 81 81 #if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES) 82 82 /* We only yield to the hypervisor if we are in shared processor mode */ 83 - #define SHARED_PROCESSOR (get_paca()->lppaca.shared_proc) 83 + #define SHARED_PROCESSOR (get_lppaca()->shared_proc) 84 84 extern void __spin_yield(raw_spinlock_t *lock); 85 85 extern void __rw_yield(raw_rwlock_t *lock); 86 86 #else /* SPLPAR || ISERIES */ ··· 124 124 125 125 static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock) 126 126 { 127 - __asm__ __volatile__(SYNC_ON_SMP" # __raw_spin_unlock" 128 - : : :"memory"); 127 + __asm__ __volatile__("# __raw_spin_unlock\n\t" 128 + LWSYNC_ON_SMP: : :"memory"); 129 129 lock->slock = 0; 130 130 } 131 131 ··· 167 167 long tmp; 168 168 169 169 __asm__ __volatile__( 170 - "1: lwarx %0,0,%1 # read_trylock\n" 170 + "1: lwarx %0,0,%1\n" 171 171 __DO_SIGN_EXTEND 172 172 " addic. %0,%0,1\n\ 173 173 ble- 2f\n" ··· 192 192 193 193 token = WRLOCK_TOKEN; 194 194 __asm__ __volatile__( 195 - "1: lwarx %0,0,%2 # write_trylock\n\ 195 + "1: lwarx %0,0,%2\n\ 196 196 cmpwi 0,%0,0\n\ 197 197 bne- 2f\n" 198 198 PPC405_ERR77(0,%1) ··· 249 249 long tmp; 250 250 251 251 __asm__ __volatile__( 252 - "eieio # read_unlock\n\ 253 - 1: lwarx %0,0,%1\n\ 252 + "# read_unlock\n\t" 253 + LWSYNC_ON_SMP 254 + "1: lwarx %0,0,%1\n\ 254 255 addic %0,%0,-1\n" 255 256 PPC405_ERR77(0,%1) 256 257 " stwcx. %0,0,%1\n\ ··· 263 262 264 263 static __inline__ void __raw_write_unlock(raw_rwlock_t *rw) 265 264 { 266 - __asm__ __volatile__(SYNC_ON_SMP" # write_unlock" 267 - : : :"memory"); 265 + __asm__ __volatile__("# write_unlock\n\t" 266 + LWSYNC_ON_SMP: : :"memory"); 268 267 rw->lock = 0; 269 268 } 270 269
+4 -19
include/asm-powerpc/synch.h
··· 2 2 #define _ASM_POWERPC_SYNCH_H 3 3 #ifdef __KERNEL__ 4 4 5 + #include <linux/stringify.h> 6 + 5 7 #ifdef __powerpc64__ 6 8 #define __SUBARCH_HAS_LWSYNC 7 9 #endif ··· 14 12 # define LWSYNC sync 15 13 #endif 16 14 17 - 18 - /* 19 - * Arguably the bitops and *xchg operations don't imply any memory barrier 20 - * or SMP ordering, but in fact a lot of drivers expect them to imply 21 - * both, since they do on x86 cpus. 22 - */ 23 15 #ifdef CONFIG_SMP 24 - #define EIEIO_ON_SMP "eieio\n" 25 16 #define ISYNC_ON_SMP "\n\tisync" 26 - #define SYNC_ON_SMP __stringify(LWSYNC) "\n" 17 + #define LWSYNC_ON_SMP __stringify(LWSYNC) "\n" 27 18 #else 28 - #define EIEIO_ON_SMP 29 19 #define ISYNC_ON_SMP 30 - #define SYNC_ON_SMP 20 + #define LWSYNC_ON_SMP 31 21 #endif 32 22 33 23 static inline void eieio(void) ··· 32 38 __asm__ __volatile__ ("isync" : : : "memory"); 33 39 } 34 40 35 - #ifdef CONFIG_SMP 36 - #define eieio_on_smp() eieio() 37 - #define isync_on_smp() isync() 38 - #else 39 - #define eieio_on_smp() __asm__ __volatile__("": : :"memory") 40 - #define isync_on_smp() __asm__ __volatile__("": : :"memory") 41 - #endif 42 - 43 41 #endif /* __KERNEL__ */ 44 42 #endif /* _ASM_POWERPC_SYNCH_H */ 45 -
+4 -4
include/asm-powerpc/system.h
··· 212 212 unsigned long prev; 213 213 214 214 __asm__ __volatile__( 215 - EIEIO_ON_SMP 215 + LWSYNC_ON_SMP 216 216 "1: lwarx %0,0,%2 \n" 217 217 PPC405_ERR77(0,%2) 218 218 " stwcx. %3,0,%2 \n\ ··· 232 232 unsigned long prev; 233 233 234 234 __asm__ __volatile__( 235 - EIEIO_ON_SMP 235 + LWSYNC_ON_SMP 236 236 "1: ldarx %0,0,%2 \n" 237 237 PPC405_ERR77(0,%2) 238 238 " stdcx. %3,0,%2 \n\ ··· 287 287 unsigned int prev; 288 288 289 289 __asm__ __volatile__ ( 290 - EIEIO_ON_SMP 290 + LWSYNC_ON_SMP 291 291 "1: lwarx %0,0,%2 # __cmpxchg_u32\n\ 292 292 cmpw 0,%0,%3\n\ 293 293 bne- 2f\n" ··· 311 311 unsigned long prev; 312 312 313 313 __asm__ __volatile__ ( 314 - EIEIO_ON_SMP 314 + LWSYNC_ON_SMP 315 315 "1: ldarx %0,0,%2 # __cmpxchg_u64\n\ 316 316 cmpd 0,%0,%3\n\ 317 317 bne- 2f\n\
+2 -3
include/asm-powerpc/time.h
··· 175 175 set_dec_cpu6(val); 176 176 #else 177 177 #ifdef CONFIG_PPC_ISERIES 178 - struct paca_struct *lpaca = get_paca(); 179 178 int cur_dec; 180 179 181 - if (lpaca->lppaca.shared_proc) { 182 - lpaca->lppaca.virtual_decr = val; 180 + if (get_lppaca()->shared_proc) { 181 + get_lppaca()->virtual_decr = val; 183 182 cur_dec = get_dec(); 184 183 if (cur_dec > val) 185 184 HvCall_setVirtualDecr();
+5
include/linux/proc_fs.h
··· 146 146 extern void proc_device_tree_init(void); 147 147 extern void proc_device_tree_add_node(struct device_node *, struct proc_dir_entry *); 148 148 extern void proc_device_tree_add_prop(struct proc_dir_entry *pde, struct property *prop); 149 + extern void proc_device_tree_remove_prop(struct proc_dir_entry *pde, 150 + struct property *prop); 151 + extern void proc_device_tree_update_prop(struct proc_dir_entry *pde, 152 + struct property *newprop, 153 + struct property *oldprop); 149 154 #endif /* CONFIG_PROC_DEVICETREE */ 150 155 151 156 extern struct proc_dir_entry *proc_symlink(const char *,