Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers

SoC attributes update for v5.9

1. Addition of ARM SMCCC ARCH_SOC_ID support
2. Usage of the custom soc attribute groups already supported in the
infrastucture instead of device_create_file which eliminates the need
for any cleanup when soc is unregistered
3. Minor clean up switching to use standard DEVICE_ATTR_RO() instead of
direct __ATTR

* tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: smccc: Add ARCH_SOC_ID support
ARM: OMAP2: Use custom soc attribute group instead of device_create_file
ARM: OMAP2: Switch to use DEVICE_ATTR_RO()
soc: ux500: Use custom soc attribute group instead of device_create_file
soc: ux500: Switch to use DEVICE_ATTR_RO()
soc: integrator: Use custom soc attribute group instead of device_create_file
soc: integrator: Switch to use DEVICE_ATTR_RO()
soc: realview: Use custom soc attribute group instead of device_create_file
soc: realview: Switch to use DEVICE_ATTR_RO()

Link: https://lore.kernel.org/r/20200706165312.40697-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+228 -69
+30
Documentation/ABI/testing/sysfs-devices-soc
··· 26 26 Read-only attribute common to all SoCs. Contains SoC family name 27 27 (e.g. DB8500). 28 28 29 + On many of ARM based silicon with SMCCC v1.2+ compliant firmware 30 + this will contain the JEDEC JEP106 manufacturer’s identification 31 + code. The format is "jep106:XXYY" where XX is identity code and 32 + YY is continuation code. 33 + 34 + This manufacturer’s identification code is defined by one 35 + or more eight (8) bit fields, each consisting of seven (7) 36 + data bits plus one (1) odd parity bit. It is a single field, 37 + limiting the possible number of vendors to 126. To expand 38 + the maximum number of identification codes, a continuation 39 + scheme has been defined. 40 + 41 + The specified mechanism is that an identity code of 0x7F 42 + represents the "continuation code" and implies the presence 43 + of an additional identity code field, and this mechanism 44 + may be extended to multiple continuation codes followed 45 + by the manufacturer's identity code. 46 + 47 + For example, ARM has identity code 0x7F 0x7F 0x7F 0x7F 0x3B, 48 + which is code 0x3B on the fifth 'page'. This is shortened 49 + as JEP106 identity code of 0x3B and a continuation code of 50 + 0x4 to represent the four continuation codes preceding the 51 + identity code. 52 + 29 53 What: /sys/devices/socX/serial_number 30 54 Date: January 2019 31 55 contact: Bjorn Andersson <bjorn.andersson@linaro.org> ··· 63 39 Description: 64 40 Read-only attribute supported by most SoCs. In the case of 65 41 ST-Ericsson's chips this contains the SoC serial number. 42 + 43 + On many of ARM based silicon with SMCCC v1.2+ compliant firmware 44 + this will contain the SOC ID appended to the family attribute 45 + to ensure there is no conflict in this namespace across various 46 + vendors. The format is "jep106:XXYY:ZZZZ" where XX is identity 47 + code, YY is continuation code and ZZZZ is the SOC ID. 66 48 67 49 What: /sys/devices/socX/revision 68 50 Date: January 2012
+11 -9
arch/arm/mach-omap2/id.c
··· 775 775 return kasprintf(GFP_KERNEL, "Unknown"); 776 776 } 777 777 778 - static ssize_t omap_get_type(struct device *dev, 779 - struct device_attribute *attr, 780 - char *buf) 778 + static ssize_t 779 + type_show(struct device *dev, struct device_attribute *attr, char *buf) 781 780 { 782 781 return sprintf(buf, "%s\n", omap_types[omap_type()]); 783 782 } 784 783 785 - static struct device_attribute omap_soc_attr = 786 - __ATTR(type, S_IRUGO, omap_get_type, NULL); 784 + static DEVICE_ATTR_RO(type); 785 + 786 + static struct attribute *omap_soc_attrs[] = { 787 + &dev_attr_type.attr, 788 + NULL 789 + }; 790 + 791 + ATTRIBUTE_GROUPS(omap_soc); 787 792 788 793 void __init omap_soc_device_init(void) 789 794 { 790 - struct device *parent; 791 795 struct soc_device *soc_dev; 792 796 struct soc_device_attribute *soc_dev_attr; 793 797 ··· 802 798 soc_dev_attr->machine = soc_name; 803 799 soc_dev_attr->family = omap_get_family(); 804 800 soc_dev_attr->revision = soc_rev; 801 + soc_dev_attr->custom_attr_group = omap_soc_groups[0]; 805 802 806 803 soc_dev = soc_device_register(soc_dev_attr); 807 804 if (IS_ERR(soc_dev)) { 808 805 kfree(soc_dev_attr); 809 806 return; 810 807 } 811 - 812 - parent = soc_device_to_device(soc_dev); 813 - device_create_file(parent, &omap_soc_attr); 814 808 } 815 809 #endif /* CONFIG_SOC_BUS */
+9
drivers/firmware/smccc/Kconfig
··· 14 14 to add SMCCC discovery mechanism though the PSCI firmware 15 15 implementation of PSCI_FEATURES(SMCCC_VERSION) which returns 16 16 success on firmware compliant to SMCCC v1.1 and above. 17 + 18 + config ARM_SMCCC_SOC_ID 19 + bool "SoC bus device for the ARM SMCCC SOC_ID" 20 + depends on HAVE_ARM_SMCCC_DISCOVERY 21 + default y 22 + select SOC_BUS 23 + help 24 + Include support for the SoC bus on the ARM SMCCC firmware based 25 + platforms providing some sysfs information about the SoC variant.
+1
drivers/firmware/smccc/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 # 3 3 obj-$(CONFIG_HAVE_ARM_SMCCC_DISCOVERY) += smccc.o 4 + obj-$(CONFIG_ARM_SMCCC_SOC_ID) += soc_id.o
+114
drivers/firmware/smccc/soc_id.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright 2020 Arm Limited 4 + */ 5 + 6 + #define pr_fmt(fmt) "SMCCC: SOC_ID: " fmt 7 + 8 + #include <linux/arm-smccc.h> 9 + #include <linux/bitfield.h> 10 + #include <linux/device.h> 11 + #include <linux/module.h> 12 + #include <linux/kernel.h> 13 + #include <linux/slab.h> 14 + #include <linux/sys_soc.h> 15 + 16 + #define SMCCC_SOC_ID_JEP106_BANK_IDX_MASK GENMASK(30, 24) 17 + /* 18 + * As per the SMC Calling Convention specification v1.2 (ARM DEN 0028C) 19 + * Section 7.4 SMCCC_ARCH_SOC_ID bits[23:16] are JEP-106 identification 20 + * code with parity bit for the SiP. We can drop the parity bit. 21 + */ 22 + #define SMCCC_SOC_ID_JEP106_ID_CODE_MASK GENMASK(22, 16) 23 + #define SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK GENMASK(15, 0) 24 + 25 + #define JEP106_BANK_CONT_CODE(x) \ 26 + (u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_BANK_IDX_MASK, (x))) 27 + #define JEP106_ID_CODE(x) \ 28 + (u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_ID_CODE_MASK, (x))) 29 + #define IMP_DEF_SOC_ID(x) \ 30 + (u16)(FIELD_GET(SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK, (x))) 31 + 32 + static struct soc_device *soc_dev; 33 + static struct soc_device_attribute *soc_dev_attr; 34 + 35 + static int __init smccc_soc_init(void) 36 + { 37 + struct arm_smccc_res res; 38 + int soc_id_rev, soc_id_version; 39 + static char soc_id_str[20], soc_id_rev_str[12]; 40 + static char soc_id_jep106_id_str[12]; 41 + 42 + if (arm_smccc_get_version() < ARM_SMCCC_VERSION_1_2) 43 + return 0; 44 + 45 + if (arm_smccc_1_1_get_conduit() == SMCCC_CONDUIT_NONE) { 46 + pr_err("%s: invalid SMCCC conduit\n", __func__); 47 + return -EOPNOTSUPP; 48 + } 49 + 50 + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, 51 + ARM_SMCCC_ARCH_SOC_ID, &res); 52 + 53 + if (res.a0 == SMCCC_RET_NOT_SUPPORTED) { 54 + pr_info("ARCH_SOC_ID not implemented, skipping ....\n"); 55 + return 0; 56 + } 57 + 58 + if ((int)res.a0 < 0) { 59 + pr_info("ARCH_FEATURES(ARCH_SOC_ID) returned error: %lx\n", 60 + res.a0); 61 + return -EINVAL; 62 + } 63 + 64 + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 0, &res); 65 + if ((int)res.a0 < 0) { 66 + pr_err("ARCH_SOC_ID(0) returned error: %lx\n", res.a0); 67 + return -EINVAL; 68 + } 69 + 70 + soc_id_version = res.a0; 71 + 72 + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 1, &res); 73 + if ((int)res.a0 < 0) { 74 + pr_err("ARCH_SOC_ID(1) returned error: %lx\n", res.a0); 75 + return -EINVAL; 76 + } 77 + 78 + soc_id_rev = res.a0; 79 + 80 + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 81 + if (!soc_dev_attr) 82 + return -ENOMEM; 83 + 84 + sprintf(soc_id_rev_str, "0x%08x", soc_id_rev); 85 + sprintf(soc_id_jep106_id_str, "jep106:%02x%02x", 86 + JEP106_BANK_CONT_CODE(soc_id_version), 87 + JEP106_ID_CODE(soc_id_version)); 88 + sprintf(soc_id_str, "%s:%04x", soc_id_jep106_id_str, 89 + IMP_DEF_SOC_ID(soc_id_version)); 90 + 91 + soc_dev_attr->soc_id = soc_id_str; 92 + soc_dev_attr->revision = soc_id_rev_str; 93 + soc_dev_attr->family = soc_id_jep106_id_str; 94 + 95 + soc_dev = soc_device_register(soc_dev_attr); 96 + if (IS_ERR(soc_dev)) { 97 + kfree(soc_dev_attr); 98 + return PTR_ERR(soc_dev); 99 + } 100 + 101 + pr_info("ID = %s Revision = %s\n", soc_dev_attr->soc_id, 102 + soc_dev_attr->revision); 103 + 104 + return 0; 105 + } 106 + module_init(smccc_soc_init); 107 + 108 + static void __exit smccc_soc_exit(void) 109 + { 110 + if (soc_dev) 111 + soc_device_unregister(soc_dev); 112 + kfree(soc_dev_attr); 113 + } 114 + module_exit(smccc_soc_exit);
+12 -10
drivers/soc/ux500/ux500-soc-id.c
··· 146 146 return kasprintf(GFP_KERNEL, "%s", "Unknown"); 147 147 } 148 148 149 - static ssize_t ux500_get_process(struct device *dev, 150 - struct device_attribute *attr, 151 - char *buf) 149 + static ssize_t 150 + process_show(struct device *dev, struct device_attribute *attr, char *buf) 152 151 { 153 152 if (dbx500_id.process == 0x00) 154 153 return sprintf(buf, "Standard\n"); 155 154 156 155 return sprintf(buf, "%02xnm\n", dbx500_id.process); 157 156 } 157 + 158 + static DEVICE_ATTR_RO(process); 159 + 160 + static struct attribute *ux500_soc_attrs[] = { 161 + &dev_attr_process.attr, 162 + NULL 163 + }; 164 + 165 + ATTRIBUTE_GROUPS(ux500_soc); 158 166 159 167 static const char *db8500_read_soc_id(struct device_node *backupram) 160 168 { ··· 192 184 soc_dev_attr->machine = ux500_get_machine(); 193 185 soc_dev_attr->family = ux500_get_family(); 194 186 soc_dev_attr->revision = ux500_get_revision(); 187 + soc_dev_attr->custom_attr_group = ux500_soc_groups[0]; 195 188 } 196 - 197 - static const struct device_attribute ux500_soc_attr = 198 - __ATTR(process, S_IRUGO, ux500_get_process, NULL); 199 189 200 190 static int __init ux500_soc_device_init(void) 201 191 { 202 - struct device *parent; 203 192 struct soc_device *soc_dev; 204 193 struct soc_device_attribute *soc_dev_attr; 205 194 struct device_node *backupram; ··· 221 216 kfree(soc_dev_attr); 222 217 return PTR_ERR(soc_dev); 223 218 } 224 - 225 - parent = soc_device_to_device(soc_dev); 226 - device_create_file(parent, &ux500_soc_attr); 227 219 228 220 return 0; 229 221 }
+23 -25
drivers/soc/versatile/soc-integrator.c
··· 56 56 } 57 57 } 58 58 59 - static ssize_t integrator_get_manf(struct device *dev, 60 - struct device_attribute *attr, 61 - char *buf) 59 + static ssize_t 60 + manufacturer_show(struct device *dev, struct device_attribute *attr, char *buf) 62 61 { 63 62 return sprintf(buf, "%02x\n", integrator_coreid >> 24); 64 63 } 65 64 66 - static struct device_attribute integrator_manf_attr = 67 - __ATTR(manufacturer, S_IRUGO, integrator_get_manf, NULL); 65 + static DEVICE_ATTR_RO(manufacturer); 68 66 69 - static ssize_t integrator_get_arch(struct device *dev, 70 - struct device_attribute *attr, 71 - char *buf) 67 + static ssize_t 68 + arch_show(struct device *dev, struct device_attribute *attr, char *buf) 72 69 { 73 70 return sprintf(buf, "%s\n", integrator_arch_str(integrator_coreid)); 74 71 } 75 72 76 - static struct device_attribute integrator_arch_attr = 77 - __ATTR(arch, S_IRUGO, integrator_get_arch, NULL); 73 + static DEVICE_ATTR_RO(arch); 78 74 79 - static ssize_t integrator_get_fpga(struct device *dev, 80 - struct device_attribute *attr, 81 - char *buf) 75 + static ssize_t 76 + fpga_show(struct device *dev, struct device_attribute *attr, char *buf) 82 77 { 83 78 return sprintf(buf, "%s\n", integrator_fpga_str(integrator_coreid)); 84 79 } 85 80 86 - static struct device_attribute integrator_fpga_attr = 87 - __ATTR(fpga, S_IRUGO, integrator_get_fpga, NULL); 81 + static DEVICE_ATTR_RO(fpga); 88 82 89 - static ssize_t integrator_get_build(struct device *dev, 90 - struct device_attribute *attr, 91 - char *buf) 83 + static ssize_t 84 + build_show(struct device *dev, struct device_attribute *attr, char *buf) 92 85 { 93 86 return sprintf(buf, "%02x\n", (integrator_coreid >> 4) & 0xFF); 94 87 } 95 88 96 - static struct device_attribute integrator_build_attr = 97 - __ATTR(build, S_IRUGO, integrator_get_build, NULL); 89 + static DEVICE_ATTR_RO(build); 90 + 91 + static struct attribute *integrator_attrs[] = { 92 + &dev_attr_manufacturer.attr, 93 + &dev_attr_arch.attr, 94 + &dev_attr_fpga.attr, 95 + &dev_attr_build.attr, 96 + NULL 97 + }; 98 + 99 + ATTRIBUTE_GROUPS(integrator); 98 100 99 101 static int __init integrator_soc_init(void) 100 102 { ··· 129 127 soc_dev_attr->soc_id = "Integrator"; 130 128 soc_dev_attr->machine = "Integrator"; 131 129 soc_dev_attr->family = "Versatile"; 130 + soc_dev_attr->custom_attr_group = integrator_groups[0]; 132 131 soc_dev = soc_device_register(soc_dev_attr); 133 132 if (IS_ERR(soc_dev)) { 134 133 kfree(soc_dev_attr); 135 134 return -ENODEV; 136 135 } 137 136 dev = soc_device_to_device(soc_dev); 138 - 139 - device_create_file(dev, &integrator_manf_attr); 140 - device_create_file(dev, &integrator_arch_attr); 141 - device_create_file(dev, &integrator_fpga_attr); 142 - device_create_file(dev, &integrator_build_attr); 143 137 144 138 dev_info(dev, "Detected ARM core module:\n"); 145 139 dev_info(dev, " Manufacturer: %02x\n", (val >> 24));
+23 -25
drivers/soc/versatile/soc-realview.c
··· 39 39 } 40 40 } 41 41 42 - static ssize_t realview_get_manf(struct device *dev, 43 - struct device_attribute *attr, 44 - char *buf) 42 + static ssize_t 43 + manufacturer_show(struct device *dev, struct device_attribute *attr, char *buf) 45 44 { 46 45 return sprintf(buf, "%02x\n", realview_coreid >> 24); 47 46 } 48 47 49 - static struct device_attribute realview_manf_attr = 50 - __ATTR(manufacturer, S_IRUGO, realview_get_manf, NULL); 48 + static DEVICE_ATTR_RO(manufacturer); 51 49 52 - static ssize_t realview_get_board(struct device *dev, 53 - struct device_attribute *attr, 54 - char *buf) 50 + static ssize_t 51 + board_show(struct device *dev, struct device_attribute *attr, char *buf) 55 52 { 56 53 return sprintf(buf, "HBI-%03x\n", ((realview_coreid >> 16) & 0xfff)); 57 54 } 58 55 59 - static struct device_attribute realview_board_attr = 60 - __ATTR(board, S_IRUGO, realview_get_board, NULL); 56 + static DEVICE_ATTR_RO(board); 61 57 62 - static ssize_t realview_get_arch(struct device *dev, 63 - struct device_attribute *attr, 64 - char *buf) 58 + static ssize_t 59 + fpga_show(struct device *dev, struct device_attribute *attr, char *buf) 65 60 { 66 61 return sprintf(buf, "%s\n", realview_arch_str(realview_coreid)); 67 62 } 68 63 69 - static struct device_attribute realview_arch_attr = 70 - __ATTR(fpga, S_IRUGO, realview_get_arch, NULL); 64 + static DEVICE_ATTR_RO(fpga); 71 65 72 - static ssize_t realview_get_build(struct device *dev, 73 - struct device_attribute *attr, 74 - char *buf) 66 + static ssize_t 67 + build_show(struct device *dev, struct device_attribute *attr, char *buf) 75 68 { 76 69 return sprintf(buf, "%02x\n", (realview_coreid & 0xFF)); 77 70 } 78 71 79 - static struct device_attribute realview_build_attr = 80 - __ATTR(build, S_IRUGO, realview_get_build, NULL); 72 + static DEVICE_ATTR_RO(build); 73 + 74 + static struct attribute *realview_attrs[] = { 75 + &dev_attr_manufacturer.attr, 76 + &dev_attr_board.attr, 77 + &dev_attr_fpga.attr, 78 + &dev_attr_build.attr, 79 + NULL 80 + }; 81 + 82 + ATTRIBUTE_GROUPS(realview); 81 83 82 84 static int realview_soc_probe(struct platform_device *pdev) 83 85 { ··· 104 102 105 103 soc_dev_attr->machine = "RealView"; 106 104 soc_dev_attr->family = "Versatile"; 105 + soc_dev_attr->custom_attr_group = realview_groups[0]; 107 106 soc_dev = soc_device_register(soc_dev_attr); 108 107 if (IS_ERR(soc_dev)) { 109 108 kfree(soc_dev_attr); ··· 114 111 &realview_coreid); 115 112 if (ret) 116 113 return -ENODEV; 117 - 118 - device_create_file(soc_device_to_device(soc_dev), &realview_manf_attr); 119 - device_create_file(soc_device_to_device(soc_dev), &realview_board_attr); 120 - device_create_file(soc_device_to_device(soc_dev), &realview_arch_attr); 121 - device_create_file(soc_device_to_device(soc_dev), &realview_build_attr); 122 114 123 115 dev_info(&pdev->dev, "RealView Syscon Core ID: 0x%08x, HBI-%03x\n", 124 116 realview_coreid,
+5
include/linux/arm-smccc.h
··· 71 71 ARM_SMCCC_SMC_32, \ 72 72 0, 1) 73 73 74 + #define ARM_SMCCC_ARCH_SOC_ID \ 75 + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 76 + ARM_SMCCC_SMC_32, \ 77 + 0, 2) 78 + 74 79 #define ARM_SMCCC_ARCH_WORKAROUND_1 \ 75 80 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 76 81 ARM_SMCCC_SMC_32, \