Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

m68k: Assorted spelling fixes

- s/acccess/access/
- s/accoding/according/
- s/addad/added/
- s/addreess/address/
- s/allocatiom/allocation/
- s/Assember/Assembler/
- s/compactnes/compactness/
- s/conneced/connected/
- s/decending/descending/
- s/diectly/directly/
- s/diplacement/displacement/

Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
[geert: Squashed, fix arch/m68k/ifpsp060/src/pfpsp.S]
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>

authored by

Andrea Gelmini and committed by
Geert Uytterhoeven
86a8280a 1a695a90

+16 -16
+1 -1
arch/m68k/coldfire/head.S
··· 288 288 #endif 289 289 290 290 /* 291 - * Assember start up done, start code proper. 291 + * Assembler start up done, start code proper. 292 292 */ 293 293 jsr start_kernel /* start Linux kernel */ 294 294
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arch/m68k/coldfire/m5272.c
··· 111 111 /***************************************************************************/ 112 112 113 113 /* 114 - * Some 5272 based boards have the FEC ethernet diectly connected to 114 + * Some 5272 based boards have the FEC ethernet directly connected to 115 115 * an ethernet switch. In this case we need to use the fixed phy type, 116 116 * and we need to declare it early in boot. 117 117 */
+1 -1
arch/m68k/coldfire/pci.c
··· 42 42 43 43 /* 44 44 * We need to be carefull probing on bus 0 (directly connected to host 45 - * bridge). We should only acccess the well defined possible devices in 45 + * bridge). We should only access the well defined possible devices in 46 46 * use, ignore aliases and the like. 47 47 */ 48 48 static unsigned char mcf_host_slot2sid[32] = {
+4 -4
arch/m68k/ifpsp060/src/fpsp.S
··· 10191 10191 xdnrm_sd: 10192 10192 mov.l %a1,-(%sp) 10193 10193 tst.b LOCAL_EX(%a0) # is denorm pos or neg? 10194 - smi.b %d1 # set d0 accodingly 10194 + smi.b %d1 # set d0 accordingly 10195 10195 bsr.l unf_sub 10196 10196 mov.l (%sp)+,%a1 10197 10197 xdnrm_exit: ··· 10990 10990 # routines where an instruction is selected by an index into 10991 10991 # a large jump table corresponding to a given instruction which 10992 10992 # has been decoded. Flow continues here where we now decode 10993 - # further accoding to the source operand type. 10993 + # further according to the source operand type. 10994 10994 # 10995 10995 10996 10996 global fsinh ··· 23196 23196 # 23197 23197 # 1. Branch on the sign of the adjusted exponent. 23198 23198 # 2p.(positive exp) 23199 - # 2. Check M16 and the digits in lwords 2 and 3 in decending order. 23199 + # 2. Check M16 and the digits in lwords 2 and 3 in descending order. 23200 23200 # 3. Add one for each zero encountered until a non-zero digit. 23201 23201 # 4. Subtract the count from the exp. 23202 23202 # 5. Check if the exp has crossed zero in #3 above; make the exp abs 23203 23203 # and set SE. 23204 23204 # 6. Multiply the mantissa by 10**count. 23205 23205 # 2n.(negative exp) 23206 - # 2. Check the digits in lwords 3 and 2 in decending order. 23206 + # 2. Check the digits in lwords 3 and 2 in descending order. 23207 23207 # 3. Add one for each zero encountered until a non-zero digit. 23208 23208 # 4. Add the count to the exp. 23209 23209 # 5. Check if the exp has crossed zero in #3 above; clear SE.
+2 -2
arch/m68k/ifpsp060/src/pfpsp.S
··· 13156 13156 # 13157 13157 # 1. Branch on the sign of the adjusted exponent. 13158 13158 # 2p.(positive exp) 13159 - # 2. Check M16 and the digits in lwords 2 and 3 in decending order. 13159 + # 2. Check M16 and the digits in lwords 2 and 3 in descending order. 13160 13160 # 3. Add one for each zero encountered until a non-zero digit. 13161 13161 # 4. Subtract the count from the exp. 13162 13162 # 5. Check if the exp has crossed zero in #3 above; make the exp abs 13163 13163 # and set SE. 13164 13164 # 6. Multiply the mantissa by 10**count. 13165 13165 # 2n.(negative exp) 13166 - # 2. Check the digits in lwords 3 and 2 in decending order. 13166 + # 2. Check the digits in lwords 3 and 2 in descending order. 13167 13167 # 3. Add one for each zero encountered until a non-zero digit. 13168 13168 # 4. Add the count to the exp. 13169 13169 # 5. Check if the exp has crossed zero in #3 above; clear SE.
+1 -1
arch/m68k/include/asm/dma.h
··· 18 18 * AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000 19 19 * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de) 20 20 * 21 - * AUG/25/2000 : addad support for 8, 16 and 32-bit Single-Address-Mode (K)2000 21 + * AUG/25/2000 : added support for 8, 16 and 32-bit Single-Address-Mode (K)2000 22 22 * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de) 23 23 * 24 24 * APR/18/2002 : added proper support for MCF5272 DMA controller.
+2 -2
arch/m68k/include/asm/m525xsim.h
··· 123 123 /* 124 124 * I2C module. 125 125 */ 126 - #define MCFI2C_BASE0 (MCF_MBAR + 0x280) /* Base addreess I2C0 */ 126 + #define MCFI2C_BASE0 (MCF_MBAR + 0x280) /* Base address I2C0 */ 127 127 #define MCFI2C_SIZE0 0x20 /* Register set size */ 128 128 129 - #define MCFI2C_BASE1 (MCF_MBAR2 + 0x440) /* Base addreess I2C1 */ 129 + #define MCFI2C_BASE1 (MCF_MBAR2 + 0x440) /* Base address I2C1 */ 130 130 #define MCFI2C_SIZE1 0x20 /* Register set size */ 131 131 132 132 /*
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arch/m68k/include/asm/mcfmmu.h
··· 38 38 /* 39 39 * MMU Operation register. 40 40 */ 41 - #define MMUOR_UAA 0x00000001 /* Update allocatiom address */ 41 + #define MMUOR_UAA 0x00000001 /* Update allocation address */ 42 42 #define MMUOR_ACC 0x00000002 /* TLB access */ 43 43 #define MMUOR_RD 0x00000004 /* TLB access read */ 44 44 #define MMUOR_WR 0x00000000 /* TLB access write */
+1 -1
arch/m68k/include/asm/q40_master.h
··· 1 1 /* 2 2 * Q40 master Chip Control 3 - * RTC stuff merged for compactnes.. 3 + * RTC stuff merged for compactness. 4 4 */ 5 5 6 6 #ifndef _Q40_MASTER_H
+1 -1
arch/m68k/mac/iop.c
··· 60 60 * 61 61 * The host talks to the IOPs using a rather simple message-passing scheme via 62 62 * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each 63 - * channel is conneced to a specific software driver on the IOP. For example 63 + * channel is connected to a specific software driver on the IOP. For example 64 64 * on the SCC IOP there is one channel for each serial port. Each channel has 65 65 * an incoming and and outgoing message queue with a depth of one. 66 66 *
+1 -1
arch/m68k/math-emu/fp_decode.h
··· 130 130 bfextu %d2{#13,#3},%d0 131 131 .endm 132 132 133 - | decode the 8bit diplacement from the brief extension word 133 + | decode the 8bit displacement from the brief extension word 134 134 .macro fp_decode_disp8 135 135 move.b %d2,%d0 136 136 ext.w %d0