···321321 */322322struct gic_intr_map {323323 unsigned int cpunum; /* Directed to this CPU */324324+#define GIC_UNUSED 0xdead /* Dummy data */324325 unsigned int pin; /* Directed to this Pin */325326 unsigned int polarity; /* Polarity : +/- */326327 unsigned int trigtype; /* Trigger : Edge/Levl */
-3
arch/mips/include/asm/mips-boards/maltaint.h
···88888989#define GIC_EXT_INTR(x) x90909191-/* Dummy data */9292-#define X 0xdead9393-9491/* External Interrupts used for IPI */9592#define GIC_IPI_EXT_INTR_RESCHED_VPE0 169693#define GIC_IPI_EXT_INTR_CALLFNC_VPE0 17
+1-2
arch/mips/kernel/irq-gic.c
···77#include <asm/io.h>88#include <asm/gic.h>99#include <asm/gcmpregs.h>1010-#include <asm/mips-boards/maltaint.h>1110#include <asm/irq.h>1211#include <linux/hardirq.h>1312#include <asm-generic/bitops/find.h>···221222 /* Setup specifics */222223 for (i = 0; i < mapsize; i++) {223224 cpu = intrmap[i].cpunum;224224- if (cpu == X)225225+ if (cpu == GIC_UNUSED)225226 continue;226227 if (cpu == 0 && i != 0 && intrmap[i].flags == 0)227228 continue;
+3
arch/mips/mti-malta/malta-int.c
···385385 */386386387387#define GIC_CPU_NMI GIC_MAP_TO_NMI_MSK388388+#define X GIC_UNUSED389389+388390static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = {389391 { X, X, X, X, 0 },390392 { X, X, X, X, 0 },···406404 { X, X, X, X, 0 },407405 /* The remainder of this table is initialised by fill_ipi_map */408406};407407+#undef X409408410409/*411410 * GCMP needs to be detected before any SMP initialisation