tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

Merge tag 'pci-v3.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI changes from Bjorn Helgaas:
"PCI device hotplug
- Add pci_alloc_dev() interface (Gu Zheng)
- Add pci_bus_get()/put() for reference counting (Jiang Liu)
- Fix SR-IOV reference count issues (Jiang Liu)
- Remove unused acpi_pci_roots list (Jiang Liu)

MSI
- Conserve interrupt resources on x86 (Alexander Gordeev)

AER
- Force fatal severity when component has been reset (Betty Dall)
- Reset link below Root Port as well as Downstream Port (Betty Dall)
- Fix "Firmware first" flag setting (Bjorn Helgaas)
- Don't parse HEST for non-PCIe devices (Bjorn Helgaas)

ASPM
- Warn when we can't disable ASPM as driver requests (Bjorn Helgaas)

Miscellaneous
- Add CircuitCo PCI IDs (Darren Hart)
- Add AMD CZ SATA and SMBus PCI IDs (Shane Huang)
- Work around Ivytown NTB BAR size issue (Jon Mason)
- Detect invalid initial BAR values (Kevin Hao)
- Add pcibios_release_device() (Sebastian Ott)
- Fix powerpc & sparc PCI_UNKNOWN power state usage (Bjorn Helgaas)"

* tag 'pci-v3.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (51 commits)
MAINTAINERS: Add ACPI folks for ACPI-related things under drivers/pci
PCI: Add CircuitCo vendor ID and subsystem ID
PCI: Use pdev->pm_cap instead of pci_find_capability(..,PCI_CAP_ID_PM)
PCI: Return early on allocation failures to unindent mainline code
PCI: Simplify IOV implementation and fix reference count races
PCI: Drop redundant setting of bus->is_added in virtfn_add_bus()
unicore32/PCI: Remove redundant call of pci_bus_add_devices()
m68k/PCI: Remove redundant call of pci_bus_add_devices()
PCI / ACPI / PM: Use correct power state strings in messages
PCI: Fix comment typo for pcie_pme_remove()
PCI: Rename pci_release_bus_bridge_dev() to pci_release_host_bridge_dev()
PCI: Fix refcount issue in pci_create_root_bus() error recovery path
ia64/PCI: Clean up pci_scan_root_bus() usage
PCI/AER: Reset link for devices below Root Port or Downstream Port
ACPI / APEI: Force fatal AER severity when component has been reset
PCI/AER: Remove "extern" from function declarations
PCI/AER: Move AER severity defines to aer.h
PCI/AER: Set dev->__aer_firmware_first only for matching devices
PCI/AER: Factor out HEST device type matching
PCI/AER: Don't parse HEST table for non-PCIe devices
...

Linus Torvalds 862f0012 f991fae5

+354 -274
+1 -1
Documentation/i2c/busses/i2c-piix4
··· 13 13 * AMD SP5100 (SB700 derivative found on some server mainboards) 14 14 Datasheet: Publicly available at the AMD website 15 15 http://support.amd.com/us/Embedded_TechDocs/44413.pdf 16 - * AMD Hudson-2 16 + * AMD Hudson-2, CZ 17 17 Datasheet: Not publicly available 18 18 * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge 19 19 Datasheet: Publicly available at the SMSC website http://www.smsc.com
+3
MAINTAINERS
··· 244 244 F: include/acpi/ 245 245 F: Documentation/acpi 246 246 F: Documentation/ABI/testing/sysfs-bus-acpi 247 + F: drivers/pci/*acpi* 248 + F: drivers/pci/*/*acpi* 249 + F: drivers/pci/*/*/*acpi* 247 250 248 251 ACPI FAN DRIVER 249 252 M: Zhang Rui <rui.zhang@intel.com>
+4 -11
arch/ia64/sn/kernel/io_init.c
··· 268 268 269 269 bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, controller, 270 270 &resources); 271 - if (bus == NULL) 272 - goto error_return; /* error, or bus already scanned */ 273 - 274 - bus->sysdata = controller; 275 - 276 - return; 277 - 278 - error_return: 279 - kfree(res); 280 - kfree(controller); 281 - return; 271 + if (bus == NULL) { 272 + kfree(res); 273 + kfree(controller); 274 + } 282 275 } 283 276 284 277 /*
-1
arch/m68k/platform/coldfire/pci.c
··· 320 320 pci_bus_size_bridges(rootbus); 321 321 pci_bus_assign_resources(rootbus); 322 322 pci_enable_bridges(rootbus); 323 - pci_bus_add_devices(rootbus); 324 323 return 0; 325 324 } 326 325
+2 -3
arch/powerpc/kernel/pci_of_scan.c
··· 128 128 const char *type; 129 129 struct pci_slot *slot; 130 130 131 - dev = alloc_pci_dev(); 131 + dev = pci_alloc_dev(bus); 132 132 if (!dev) 133 133 return NULL; 134 134 type = of_get_property(node, "device_type", NULL); ··· 137 137 138 138 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type); 139 139 140 - dev->bus = bus; 141 140 dev->dev.of_node = of_node_get(node); 142 141 dev->dev.parent = bus->bridge; 143 142 dev->dev.bus = &pci_bus_type; ··· 164 165 pr_debug(" class: 0x%x\n", dev->class); 165 166 pr_debug(" revision: 0x%x\n", dev->revision); 166 167 167 - dev->current_state = 4; /* unknown power state */ 168 + dev->current_state = PCI_UNKNOWN; /* unknown power state */ 168 169 dev->error_state = pci_channel_io_normal; 169 170 dev->dma_mask = 0xffffffff; 170 171
+2 -3
arch/sparc/kernel/pci.c
··· 254 254 const char *type; 255 255 u32 class; 256 256 257 - dev = alloc_pci_dev(); 257 + dev = pci_alloc_dev(bus); 258 258 if (!dev) 259 259 return NULL; 260 260 ··· 281 281 printk(" create device, devfn: %x, type: %s\n", 282 282 devfn, type); 283 283 284 - dev->bus = bus; 285 284 dev->sysdata = node; 286 285 dev->dev.parent = bus->bridge; 287 286 dev->dev.bus = &pci_bus_type; ··· 326 327 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) 327 328 pci_set_master(dev); 328 329 329 - dev->current_state = 4; /* unknown power state */ 330 + dev->current_state = PCI_UNKNOWN; /* unknown power state */ 330 331 dev->error_state = pci_channel_io_normal; 331 332 dev->dma_mask = 0xffffffff; 332 333
-5
arch/unicore32/kernel/pci.c
··· 277 277 pci_bus_assign_resources(puv3_bus); 278 278 } 279 279 280 - /* 281 - * Tell drivers about devices found. 282 - */ 283 - pci_bus_add_devices(puv3_bus); 284 - 285 280 return 0; 286 281 } 287 282 subsys_initcall(pci_common_init);
+2 -5
arch/x86/pci/acpi.c
··· 324 324 res->start = start; 325 325 res->end = end; 326 326 info->res_offset[info->res_num] = addr.translation_offset; 327 + info->res_num++; 327 328 328 - if (!pci_use_crs) { 329 + if (!pci_use_crs) 329 330 dev_printk(KERN_DEBUG, &info->bridge->dev, 330 331 "host bridge window %pR (ignored)\n", res); 331 - return AE_OK; 332 - } 333 - 334 - info->res_num++; 335 332 336 333 return AE_OK; 337 334 }
+10
drivers/acpi/apei/ghes.c
··· 449 449 pcie_err->validation_bits & CPER_PCIE_VALID_AER_INFO) { 450 450 unsigned int devfn; 451 451 int aer_severity; 452 + 452 453 devfn = PCI_DEVFN(pcie_err->device_id.device, 453 454 pcie_err->device_id.function); 454 455 aer_severity = cper_severity_to_aer(sev); 456 + 457 + /* 458 + * If firmware reset the component to contain 459 + * the error, we must reinitialize it before 460 + * use, so treat it as a fatal AER error. 461 + */ 462 + if (gdata->flags & CPER_SEC_RESET) 463 + aer_severity = AER_FATAL; 464 + 455 465 aer_recover_queue(pcie_err->device_id.segment, 456 466 pcie_err->device_id.bus, 457 467 devfn, aer_severity,
+39 -62
drivers/acpi/pci_root.c
··· 65 65 .detach = acpi_pci_root_remove, 66 66 }; 67 67 68 - /* Lock to protect both acpi_pci_roots lists */ 69 - static DEFINE_MUTEX(acpi_pci_root_lock); 70 - static LIST_HEAD(acpi_pci_roots); 71 - 72 68 static DEFINE_MUTEX(osc_lock); 73 69 74 70 /** ··· 96 100 { 97 101 struct resource *res = data; 98 102 struct acpi_resource_address64 address; 103 + acpi_status status; 99 104 100 - if (resource->type != ACPI_RESOURCE_TYPE_ADDRESS16 && 101 - resource->type != ACPI_RESOURCE_TYPE_ADDRESS32 && 102 - resource->type != ACPI_RESOURCE_TYPE_ADDRESS64) 105 + status = acpi_resource_to_address64(resource, &address); 106 + if (ACPI_FAILURE(status)) 103 107 return AE_OK; 104 108 105 - acpi_resource_to_address64(resource, &address); 106 109 if ((address.address_length > 0) && 107 110 (address.resource_type == ACPI_BUS_NUMBER_RANGE)) { 108 111 res->start = address.minimum; ··· 377 382 int result; 378 383 struct acpi_pci_root *root; 379 384 u32 flags, base_flags; 385 + acpi_handle handle = device->handle; 380 386 381 387 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL); 382 388 if (!root) 383 389 return -ENOMEM; 384 390 385 391 segment = 0; 386 - status = acpi_evaluate_integer(device->handle, METHOD_NAME__SEG, NULL, 392 + status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, 387 393 &segment); 388 394 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { 389 - printk(KERN_ERR PREFIX "can't evaluate _SEG\n"); 395 + dev_err(&device->dev, "can't evaluate _SEG\n"); 390 396 result = -ENODEV; 391 397 goto end; 392 398 } 393 399 394 400 /* Check _CRS first, then _BBN. If no _BBN, default to zero. */ 395 401 root->secondary.flags = IORESOURCE_BUS; 396 - status = try_get_root_bridge_busnr(device->handle, &root->secondary); 402 + status = try_get_root_bridge_busnr(handle, &root->secondary); 397 403 if (ACPI_FAILURE(status)) { 398 404 /* 399 405 * We need both the start and end of the downstream bus range ··· 403 407 * can do is assume [_BBN-0xFF] or [0-0xFF]. 404 408 */ 405 409 root->secondary.end = 0xFF; 406 - printk(KERN_WARNING FW_BUG PREFIX 407 - "no secondary bus range in _CRS\n"); 408 - status = acpi_evaluate_integer(device->handle, METHOD_NAME__BBN, 410 + dev_warn(&device->dev, 411 + FW_BUG "no secondary bus range in _CRS\n"); 412 + status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, 409 413 NULL, &bus); 410 414 if (ACPI_SUCCESS(status)) 411 415 root->secondary.start = bus; 412 416 else if (status == AE_NOT_FOUND) 413 417 root->secondary.start = 0; 414 418 else { 415 - printk(KERN_ERR PREFIX "can't evaluate _BBN\n"); 419 + dev_err(&device->dev, "can't evaluate _BBN\n"); 416 420 result = -ENODEV; 417 421 goto end; 418 422 } 419 423 } 420 424 421 - INIT_LIST_HEAD(&root->node); 422 425 root->device = device; 423 426 root->segment = segment & 0xFFFF; 424 427 strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME); 425 428 strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS); 426 429 device->driver_data = root; 427 430 428 - printk(KERN_INFO PREFIX "%s [%s] (domain %04x %pR)\n", 431 + pr_info(PREFIX "%s [%s] (domain %04x %pR)\n", 429 432 acpi_device_name(device), acpi_device_bid(device), 430 433 root->segment, &root->secondary); 431 434 432 - root->mcfg_addr = acpi_pci_root_get_mcfg_addr(device->handle); 435 + root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle); 433 436 434 437 /* 435 438 * All supported architectures that use ACPI have support for ··· 441 446 * TBD: Need PCI interface for enumeration/configuration of roots. 442 447 */ 443 448 444 - mutex_lock(&acpi_pci_root_lock); 445 - list_add_tail(&root->node, &acpi_pci_roots); 446 - mutex_unlock(&acpi_pci_root_lock); 447 - 448 449 /* 449 450 * Scan the Root Bridge 450 451 * -------------------- ··· 450 459 */ 451 460 root->bus = pci_acpi_scan_root(root); 452 461 if (!root->bus) { 453 - printk(KERN_ERR PREFIX 454 - "Bus %04x:%02x not present in PCI namespace\n", 455 - root->segment, (unsigned int)root->secondary.start); 462 + dev_err(&device->dev, 463 + "Bus %04x:%02x not present in PCI namespace\n", 464 + root->segment, (unsigned int)root->secondary.start); 456 465 result = -ENODEV; 457 - goto out_del_root; 466 + goto end; 458 467 } 459 468 460 469 /* Indicate support for various _OSC capabilities. */ ··· 493 502 dev_info(&device->dev, 494 503 "Requesting ACPI _OSC control (0x%02x)\n", flags); 495 504 496 - status = acpi_pci_osc_control_set(device->handle, &flags, 505 + status = acpi_pci_osc_control_set(handle, &flags, 497 506 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL); 498 507 if (ACPI_SUCCESS(status)) { 499 508 dev_info(&device->dev, ··· 510 519 "ACPI _OSC request failed (%s), " 511 520 "returned control mask: 0x%02x\n", 512 521 acpi_format_exception(status), flags); 513 - pr_info("ACPI _OSC control for PCIe not granted, " 514 - "disabling ASPM\n"); 522 + dev_info(&device->dev, 523 + "ACPI _OSC control for PCIe not granted, disabling ASPM\n"); 515 524 pcie_no_aspm(); 516 525 } 517 526 } else { ··· 527 536 if (system_state != SYSTEM_BOOTING) { 528 537 pcibios_resource_survey_bus(root->bus); 529 538 pci_assign_unassigned_bus_resources(root->bus); 530 - } 531 539 532 - /* need to after hot-added ioapic is registered */ 533 - if (system_state != SYSTEM_BOOTING) 540 + /* need to after hot-added ioapic is registered */ 534 541 pci_enable_bridges(root->bus); 542 + } 535 543 536 544 pci_bus_add_devices(root->bus); 537 545 return 1; 538 - 539 - out_del_root: 540 - mutex_lock(&acpi_pci_root_lock); 541 - list_del(&root->node); 542 - mutex_unlock(&acpi_pci_root_lock); 543 546 544 547 end: 545 548 kfree(root); ··· 551 566 552 567 pci_remove_root_bus(root->bus); 553 568 554 - mutex_lock(&acpi_pci_root_lock); 555 - list_del(&root->node); 556 - mutex_unlock(&acpi_pci_root_lock); 557 569 kfree(root); 558 570 } 559 571 ··· 570 588 struct acpi_device *device; 571 589 572 590 if (!acpi_bus_get_device(handle, &device)) { 573 - printk(KERN_DEBUG "acpi device exists...\n"); 591 + dev_printk(KERN_DEBUG, &device->dev, 592 + "acpi device already exists; ignoring notify\n"); 574 593 return; 575 594 } 576 595 577 596 if (acpi_bus_scan(handle)) 578 - printk(KERN_ERR "cannot add bridge to acpi list\n"); 597 + acpi_handle_err(handle, "cannot add bridge to acpi list\n"); 579 598 } 580 599 581 600 static void handle_root_bridge_removal(struct acpi_device *device) ··· 605 622 static void _handle_hotplug_event_root(struct work_struct *work) 606 623 { 607 624 struct acpi_pci_root *root; 608 - struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER }; 609 625 struct acpi_hp_work *hp_work; 610 626 acpi_handle handle; 611 627 u32 type; ··· 616 634 acpi_scan_lock_acquire(); 617 635 618 636 root = acpi_pci_find_root(handle); 619 - acpi_get_name(handle, ACPI_FULL_PATHNAME, &buffer); 620 637 621 638 switch (type) { 622 639 case ACPI_NOTIFY_BUS_CHECK: 623 640 /* bus enumerate */ 624 - printk(KERN_DEBUG "%s: Bus check notify on %s\n", __func__, 625 - (char *)buffer.pointer); 641 + acpi_handle_printk(KERN_DEBUG, handle, 642 + "Bus check notify on %s\n", __func__); 626 643 if (root) 627 644 acpiphp_check_host_bridge(handle); 628 645 else ··· 631 650 632 651 case ACPI_NOTIFY_DEVICE_CHECK: 633 652 /* device check */ 634 - printk(KERN_DEBUG "%s: Device check notify on %s\n", __func__, 635 - (char *)buffer.pointer); 653 + acpi_handle_printk(KERN_DEBUG, handle, 654 + "Device check notify on %s\n", __func__); 636 655 if (!root) 637 656 handle_root_bridge_insertion(handle); 638 657 break; 639 658 640 659 case ACPI_NOTIFY_EJECT_REQUEST: 641 660 /* request device eject */ 642 - printk(KERN_DEBUG "%s: Device eject notify on %s\n", __func__, 643 - (char *)buffer.pointer); 661 + acpi_handle_printk(KERN_DEBUG, handle, 662 + "Device eject notify on %s\n", __func__); 644 663 if (root) 645 664 handle_root_bridge_removal(root->device); 646 665 break; 647 666 default: 648 - printk(KERN_WARNING "notify_handler: unknown event type 0x%x for %s\n", 649 - type, (char *)buffer.pointer); 667 + acpi_handle_warn(handle, 668 + "notify_handler: unknown event type 0x%x\n", 669 + type); 650 670 break; 651 671 } 652 672 653 673 acpi_scan_lock_release(); 654 674 kfree(hp_work); /* allocated in handle_hotplug_event_bridge */ 655 - kfree(buffer.pointer); 656 675 } 657 676 658 677 static void handle_hotplug_event_root(acpi_handle handle, u32 type, ··· 666 685 find_root_bridges(acpi_handle handle, u32 lvl, void *context, void **rv) 667 686 { 668 687 acpi_status status; 669 - char objname[64]; 670 - struct acpi_buffer buffer = { .length = sizeof(objname), 671 - .pointer = objname }; 672 688 int *count = (int *)context; 673 689 674 690 if (!acpi_is_root_bridge(handle)) ··· 673 695 674 696 (*count)++; 675 697 676 - acpi_get_name(handle, ACPI_FULL_PATHNAME, &buffer); 677 - 678 698 status = acpi_install_notify_handler(handle, ACPI_SYSTEM_NOTIFY, 679 699 handle_hotplug_event_root, NULL); 680 700 if (ACPI_FAILURE(status)) 681 - printk(KERN_DEBUG "acpi root: %s notify handler is not installed, exit status: %u\n", 682 - objname, (unsigned int)status); 701 + acpi_handle_printk(KERN_DEBUG, handle, 702 + "notify handler is not installed, exit status: %u\n", 703 + (unsigned int)status); 683 704 else 684 - printk(KERN_DEBUG "acpi root: %s notify handler is installed\n", 685 - objname); 705 + acpi_handle_printk(KERN_DEBUG, handle, 706 + "notify handler is installed\n"); 686 707 687 708 return AE_OK; 688 709 }
+1
drivers/ata/ahci.c
··· 310 310 311 311 /* AMD */ 312 312 { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */ 313 + { PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */ 313 314 /* AMD is using RAID class only for ahci controllers */ 314 315 { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 315 316 PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },
+1 -1
drivers/char/agp/alpha-agp.c
··· 174 174 /* 175 175 * Build a fake pci_dev struct 176 176 */ 177 - pdev = alloc_pci_dev(); 177 + pdev = pci_alloc_dev(NULL); 178 178 if (!pdev) 179 179 return -ENOMEM; 180 180 pdev->vendor = 0xffff;
+1 -1
drivers/char/agp/parisc-agp.c
··· 333 333 struct agp_bridge_data *bridge; 334 334 int error = 0; 335 335 336 - fake_bridge_dev = alloc_pci_dev(); 336 + fake_bridge_dev = pci_alloc_dev(NULL); 337 337 if (!fake_bridge_dev) { 338 338 error = -ENOMEM; 339 339 goto fail;
+1
drivers/i2c/busses/Kconfig
··· 150 150 ATI SB700/SP5100 151 151 ATI SB800 152 152 AMD Hudson-2 153 + AMD CZ 153 154 Serverworks OSB4 154 155 Serverworks CSB5 155 156 Serverworks CSB6
+2 -1
drivers/i2c/busses/i2c-piix4.c
··· 22 22 Intel PIIX4, 440MX 23 23 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 24 24 ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800 25 - AMD Hudson-2 25 + AMD Hudson-2, CZ 26 26 SMSC Victory66 27 27 28 28 Note: we assume there can only be one device, with one or more ··· 522 522 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, 523 523 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, 524 524 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) }, 525 + { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x790b) }, 525 526 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 526 527 PCI_DEVICE_ID_SERVERWORKS_OSB4) }, 527 528 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
+7 -5
drivers/iommu/irq_remapping.c
··· 51 51 52 52 static int do_setup_msi_irqs(struct pci_dev *dev, int nvec) 53 53 { 54 - int node, ret, sub_handle, index = 0; 54 + int node, ret, sub_handle, nvec_pow2, index = 0; 55 55 unsigned int irq; 56 56 struct msi_desc *msidesc; 57 - 58 - nvec = __roundup_pow_of_two(nvec); 59 57 60 58 WARN_ON(!list_is_singular(&dev->msi_list)); 61 59 msidesc = list_entry(dev->msi_list.next, struct msi_desc, list); 62 60 WARN_ON(msidesc->irq); 63 61 WARN_ON(msidesc->msi_attrib.multiple); 62 + WARN_ON(msidesc->nvec_used); 64 63 65 64 node = dev_to_node(&dev->dev); 66 65 irq = __create_irqs(get_nr_irqs_gsi(), nvec, node); 67 66 if (irq == 0) 68 67 return -ENOSPC; 69 68 70 - msidesc->msi_attrib.multiple = ilog2(nvec); 69 + nvec_pow2 = __roundup_pow_of_two(nvec); 70 + msidesc->nvec_used = nvec; 71 + msidesc->msi_attrib.multiple = ilog2(nvec_pow2); 71 72 for (sub_handle = 0; sub_handle < nvec; sub_handle++) { 72 73 if (!sub_handle) { 73 - index = msi_alloc_remapped_irq(dev, irq, nvec); 74 + index = msi_alloc_remapped_irq(dev, irq, nvec_pow2); 74 75 if (index < 0) { 75 76 ret = index; 76 77 goto error; ··· 96 95 * IRQs from tearing down again in default_teardown_msi_irqs() 97 96 */ 98 97 msidesc->irq = 0; 98 + msidesc->nvec_used = 0; 99 99 msidesc->msi_attrib.multiple = 0; 100 100 101 101 return ret;
+15
drivers/pci/bus.c
··· 283 283 } 284 284 EXPORT_SYMBOL_GPL(pci_walk_bus); 285 285 286 + struct pci_bus *pci_bus_get(struct pci_bus *bus) 287 + { 288 + if (bus) 289 + get_device(&bus->dev); 290 + return bus; 291 + } 292 + EXPORT_SYMBOL(pci_bus_get); 293 + 294 + void pci_bus_put(struct pci_bus *bus) 295 + { 296 + if (bus) 297 + put_device(&bus->dev); 298 + } 299 + EXPORT_SYMBOL(pci_bus_put); 300 + 286 301 EXPORT_SYMBOL(pci_bus_alloc_resource); 287 302 EXPORT_SYMBOL_GPL(pci_bus_add_device); 288 303 EXPORT_SYMBOL(pci_bus_add_devices);
+1 -12
drivers/pci/ioapic.c
··· 113 113 .remove = ioapic_remove, 114 114 }; 115 115 116 - static int __init ioapic_init(void) 117 - { 118 - return pci_register_driver(&ioapic_driver); 119 - } 120 - 121 - static void __exit ioapic_exit(void) 122 - { 123 - pci_unregister_driver(&ioapic_driver); 124 - } 125 - 126 - module_init(ioapic_init); 127 - module_exit(ioapic_exit); 116 + module_pci_driver(ioapic_driver); 128 117 129 118 MODULE_LICENSE("GPL");
+28 -39
drivers/pci/iov.c
··· 47 47 return NULL; 48 48 49 49 pci_bus_insert_busn_res(child, busnr, busnr); 50 - bus->is_added = 1; 51 50 52 51 return child; 53 52 } 54 53 55 - static void virtfn_remove_bus(struct pci_bus *bus, int busnr) 54 + static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) 56 55 { 57 - struct pci_bus *child; 58 - 59 - if (bus->number == busnr) 60 - return; 61 - 62 - child = pci_find_bus(pci_domain_nr(bus), busnr); 63 - BUG_ON(!child); 64 - 65 - if (list_empty(&child->devices)) 66 - pci_remove_bus(child); 56 + if (physbus != virtbus && list_empty(&virtbus->devices)) 57 + pci_remove_bus(virtbus); 67 58 } 68 59 69 60 static int virtfn_add(struct pci_dev *dev, int id, int reset) 70 61 { 71 62 int i; 72 - int rc; 63 + int rc = -ENOMEM; 73 64 u64 size; 74 65 char buf[VIRTFN_ID_LEN]; 75 66 struct pci_dev *virtfn; 76 67 struct resource *res; 77 68 struct pci_sriov *iov = dev->sriov; 78 - 79 - virtfn = alloc_pci_dev(); 80 - if (!virtfn) 81 - return -ENOMEM; 69 + struct pci_bus *bus; 82 70 83 71 mutex_lock(&iov->dev->sriov->lock); 84 - virtfn->bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id)); 85 - if (!virtfn->bus) { 86 - kfree(virtfn); 87 - mutex_unlock(&iov->dev->sriov->lock); 88 - return -ENOMEM; 89 - } 72 + bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id)); 73 + if (!bus) 74 + goto failed; 75 + 76 + virtfn = pci_alloc_dev(bus); 77 + if (!virtfn) 78 + goto failed0; 79 + 90 80 virtfn->devfn = virtfn_devfn(dev, id); 91 81 virtfn->vendor = dev->vendor; 92 82 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device); 93 83 pci_setup_device(virtfn); 94 84 virtfn->dev.parent = dev->dev.parent; 85 + virtfn->physfn = pci_dev_get(dev); 86 + virtfn->is_virtfn = 1; 95 87 96 88 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 97 89 res = dev->resource + PCI_IOV_RESOURCES + i; ··· 105 113 pci_device_add(virtfn, virtfn->bus); 106 114 mutex_unlock(&iov->dev->sriov->lock); 107 115 108 - virtfn->physfn = pci_dev_get(dev); 109 - virtfn->is_virtfn = 1; 110 - 111 116 rc = pci_bus_add_device(virtfn); 112 117 sprintf(buf, "virtfn%u", id); 113 118 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); ··· 124 135 pci_dev_put(dev); 125 136 mutex_lock(&iov->dev->sriov->lock); 126 137 pci_stop_and_remove_bus_device(virtfn); 127 - virtfn_remove_bus(dev->bus, virtfn_bus(dev, id)); 138 + failed0: 139 + virtfn_remove_bus(dev->bus, bus); 140 + failed: 128 141 mutex_unlock(&iov->dev->sriov->lock); 129 142 130 143 return rc; ··· 135 144 static void virtfn_remove(struct pci_dev *dev, int id, int reset) 136 145 { 137 146 char buf[VIRTFN_ID_LEN]; 138 - struct pci_bus *bus; 139 147 struct pci_dev *virtfn; 140 148 struct pci_sriov *iov = dev->sriov; 141 149 142 - bus = pci_find_bus(pci_domain_nr(dev->bus), virtfn_bus(dev, id)); 143 - if (!bus) 144 - return; 145 - 146 - virtfn = pci_get_slot(bus, virtfn_devfn(dev, id)); 150 + virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), 151 + virtfn_bus(dev, id), 152 + virtfn_devfn(dev, id)); 147 153 if (!virtfn) 148 154 return; 149 - 150 - pci_dev_put(virtfn); 151 155 152 156 if (reset) { 153 157 device_release_driver(&virtfn->dev); ··· 161 175 162 176 mutex_lock(&iov->dev->sriov->lock); 163 177 pci_stop_and_remove_bus_device(virtfn); 164 - virtfn_remove_bus(dev->bus, virtfn_bus(dev, id)); 178 + virtfn_remove_bus(dev->bus, virtfn->bus); 165 179 mutex_unlock(&iov->dev->sriov->lock); 166 180 181 + /* balance pci_get_domain_bus_and_slot() */ 182 + pci_dev_put(virtfn); 167 183 pci_dev_put(dev); 168 184 } 169 185 ··· 322 334 if (!pdev) 323 335 return -ENODEV; 324 336 325 - pci_dev_put(pdev); 326 - 327 - if (!pdev->is_physfn) 337 + if (!pdev->is_physfn) { 338 + pci_dev_put(pdev); 328 339 return -ENODEV; 340 + } 329 341 330 342 rc = sysfs_create_link(&dev->dev.kobj, 331 343 &pdev->dev.kobj, "dep_link"); 344 + pci_dev_put(pdev); 332 345 if (rc) 333 346 return rc; 334 347 }
+8 -2
drivers/pci/msi.c
··· 81 81 int i, nvec; 82 82 if (entry->irq == 0) 83 83 continue; 84 - nvec = 1 << entry->msi_attrib.multiple; 84 + if (entry->nvec_used) 85 + nvec = entry->nvec_used; 86 + else 87 + nvec = 1 << entry->msi_attrib.multiple; 85 88 for (i = 0; i < nvec; i++) 86 89 arch_teardown_msi_irq(entry->irq + i); 87 90 } ··· 339 336 int i, nvec; 340 337 if (!entry->irq) 341 338 continue; 342 - nvec = 1 << entry->msi_attrib.multiple; 339 + if (entry->nvec_used) 340 + nvec = entry->nvec_used; 341 + else 342 + nvec = 1 << entry->msi_attrib.multiple; 343 343 #ifdef CONFIG_GENERIC_HARDIRQS 344 344 for (i = 0; i < nvec; i++) 345 345 BUG_ON(irq_has_action(entry->irq + i));
+5 -5
drivers/pci/pci-acpi.c
··· 186 186 [PCI_D0] = ACPI_STATE_D0, 187 187 [PCI_D1] = ACPI_STATE_D1, 188 188 [PCI_D2] = ACPI_STATE_D2, 189 - [PCI_D3hot] = ACPI_STATE_D3, 190 - [PCI_D3cold] = ACPI_STATE_D3 189 + [PCI_D3hot] = ACPI_STATE_D3_COLD, 190 + [PCI_D3cold] = ACPI_STATE_D3_COLD, 191 191 }; 192 192 int error = -EINVAL; 193 193 ··· 211 211 212 212 if (!error) 213 213 dev_info(&dev->dev, "power state changed by ACPI to %s\n", 214 - pci_power_name(state)); 214 + acpi_power_state_string(state_conv[state])); 215 215 216 216 return error; 217 217 } ··· 376 376 int ret; 377 377 378 378 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) { 379 - printk(KERN_INFO"ACPI FADT declares the system doesn't support MSI, so disable it\n"); 379 + pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n"); 380 380 pci_no_msi(); 381 381 } 382 382 383 383 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { 384 - printk(KERN_INFO"ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n"); 384 + pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n"); 385 385 pcie_no_aspm(); 386 386 } 387 387
+37 -11
drivers/pci/pci-sysfs.c
··· 66 66 struct pci_dev *pdev = to_pci_dev(dev); 67 67 unsigned long val; 68 68 69 - if (strict_strtoul(buf, 0, &val) < 0) 69 + if (kstrtoul(buf, 0, &val) < 0) 70 70 return -EINVAL; 71 71 72 72 pdev->broken_parity_status = !!val; ··· 188 188 { 189 189 struct pci_dev *pdev = to_pci_dev(dev); 190 190 unsigned long val; 191 - ssize_t result = strict_strtoul(buf, 0, &val); 191 + ssize_t result = kstrtoul(buf, 0, &val); 192 192 193 193 if (result < 0) 194 194 return result; ··· 259 259 struct pci_dev *pdev = to_pci_dev(dev); 260 260 unsigned long val; 261 261 262 - if (strict_strtoul(buf, 0, &val) < 0) 262 + if (kstrtoul(buf, 0, &val) < 0) 263 263 return -EINVAL; 264 264 265 265 /* bad things may happen if the no_msi flag is changed ··· 291 291 unsigned long val; 292 292 struct pci_bus *b = NULL; 293 293 294 - if (strict_strtoul(buf, 0, &val) < 0) 294 + if (kstrtoul(buf, 0, &val) < 0) 295 295 return -EINVAL; 296 296 297 297 if (val) { ··· 315 315 unsigned long val; 316 316 struct pci_dev *pdev = to_pci_dev(dev); 317 317 318 - if (strict_strtoul(buf, 0, &val) < 0) 318 + if (kstrtoul(buf, 0, &val) < 0) 319 319 return -EINVAL; 320 320 321 321 if (val) { ··· 325 325 } 326 326 return count; 327 327 } 328 + struct device_attribute dev_rescan_attr = __ATTR(rescan, (S_IWUSR|S_IWGRP), 329 + NULL, dev_rescan_store); 328 330 329 331 static void remove_callback(struct device *dev) 330 332 { ··· 344 342 int ret = 0; 345 343 unsigned long val; 346 344 347 - if (strict_strtoul(buf, 0, &val) < 0) 345 + if (kstrtoul(buf, 0, &val) < 0) 348 346 return -EINVAL; 349 347 350 348 /* An attribute cannot be unregistered by one of its own methods, ··· 356 354 count = ret; 357 355 return count; 358 356 } 357 + struct device_attribute dev_remove_attr = __ATTR(remove, (S_IWUSR|S_IWGRP), 358 + NULL, remove_store); 359 359 360 360 static ssize_t 361 361 dev_bus_rescan_store(struct device *dev, struct device_attribute *attr, ··· 366 362 unsigned long val; 367 363 struct pci_bus *bus = to_pci_bus(dev); 368 364 369 - if (strict_strtoul(buf, 0, &val) < 0) 365 + if (kstrtoul(buf, 0, &val) < 0) 370 366 return -EINVAL; 371 367 372 368 if (val) { ··· 388 384 struct pci_dev *pdev = to_pci_dev(dev); 389 385 unsigned long val; 390 386 391 - if (strict_strtoul(buf, 0, &val) < 0) 387 + if (kstrtoul(buf, 0, &val) < 0) 392 388 return -EINVAL; 393 389 394 390 pdev->d3cold_allowed = !!val; ··· 508 504 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR), 509 505 broken_parity_status_show,broken_parity_status_store), 510 506 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store), 511 - __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store), 512 - __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store), 513 507 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 514 508 __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store), 515 509 #endif ··· 1238 1236 { 1239 1237 struct pci_dev *pdev = to_pci_dev(dev); 1240 1238 unsigned long val; 1241 - ssize_t result = strict_strtoul(buf, 0, &val); 1239 + ssize_t result = kstrtoul(buf, 0, &val); 1242 1240 1243 1241 if (result < 0) 1244 1242 return result; ··· 1465 1463 return a->mode; 1466 1464 } 1467 1465 1466 + static struct attribute *pci_dev_hp_attrs[] = { 1467 + &dev_remove_attr.attr, 1468 + &dev_rescan_attr.attr, 1469 + NULL, 1470 + }; 1471 + 1472 + static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1473 + struct attribute *a, int n) 1474 + { 1475 + struct device *dev = container_of(kobj, struct device, kobj); 1476 + struct pci_dev *pdev = to_pci_dev(dev); 1477 + 1478 + if (pdev->is_virtfn) 1479 + return 0; 1480 + 1481 + return a->mode; 1482 + } 1483 + 1484 + static struct attribute_group pci_dev_hp_attr_group = { 1485 + .attrs = pci_dev_hp_attrs, 1486 + .is_visible = pci_dev_hp_attrs_are_visible, 1487 + }; 1488 + 1468 1489 #ifdef CONFIG_PCI_IOV 1469 1490 static struct attribute *sriov_dev_attrs[] = { 1470 1491 &sriov_totalvfs_attr.attr, ··· 1519 1494 1520 1495 static const struct attribute_group *pci_dev_attr_groups[] = { 1521 1496 &pci_dev_attr_group, 1497 + &pci_dev_hp_attr_group, 1522 1498 #ifdef CONFIG_PCI_IOV 1523 1499 &sriov_dev_attr_group, 1524 1500 #endif
+2 -2
drivers/pci/pci.c
··· 805 805 { 806 806 pci_power_t ret; 807 807 808 - if (!pci_find_capability(dev, PCI_CAP_ID_PM)) 808 + if (!dev->pm_cap) 809 809 return PCI_D0; 810 810 811 811 ret = platform_pci_choose_state(dev); ··· 2431 2431 /** 2432 2432 * pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge 2433 2433 * @dev: the PCI device 2434 - * @pin: the INTx pin (1=INTA, 2=INTB, 3=INTD, 4=INTD) 2434 + * @pin: the INTx pin (1=INTA, 2=INTB, 3=INTC, 4=INTD) 2435 2435 * 2436 2436 * Perform INTx swizzling for a device behind one level of bridge. This is 2437 2437 * required by section 9.1 of the PCI-to-PCI bridge specification for devices
-4
drivers/pci/pcie/aer/aerdrv.h
··· 13 13 #include <linux/aer.h> 14 14 #include <linux/interrupt.h> 15 15 16 - #define AER_NONFATAL 0 17 - #define AER_FATAL 1 18 - #define AER_CORRECTABLE 2 19 - 20 16 #define SYSTEM_ERROR_INTR_ON_MESG_MASK (PCI_EXP_RTCTL_SECEE| \ 21 17 PCI_EXP_RTCTL_SENFEE| \ 22 18 PCI_EXP_RTCTL_SEFEE)
+24 -23
drivers/pci/pcie/aer/aerdrv_acpi.c
··· 29 29 p->function == PCI_FUNC(pci->devfn)); 30 30 } 31 31 32 + static inline bool hest_match_type(struct acpi_hest_header *hest_hdr, 33 + struct pci_dev *dev) 34 + { 35 + u16 hest_type = hest_hdr->type; 36 + u8 pcie_type = pci_pcie_type(dev); 37 + 38 + if ((hest_type == ACPI_HEST_TYPE_AER_ROOT_PORT && 39 + pcie_type == PCI_EXP_TYPE_ROOT_PORT) || 40 + (hest_type == ACPI_HEST_TYPE_AER_ENDPOINT && 41 + pcie_type == PCI_EXP_TYPE_ENDPOINT) || 42 + (hest_type == ACPI_HEST_TYPE_AER_BRIDGE && 43 + (dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)) 44 + return true; 45 + return false; 46 + } 47 + 32 48 struct aer_hest_parse_info { 33 49 struct pci_dev *pci_dev; 34 50 int firmware_first; ··· 54 38 { 55 39 struct aer_hest_parse_info *info = data; 56 40 struct acpi_hest_aer_common *p; 57 - u8 pcie_type = 0; 58 - u8 bridge = 0; 59 - int ff = 0; 60 - 61 - switch (hest_hdr->type) { 62 - case ACPI_HEST_TYPE_AER_ROOT_PORT: 63 - pcie_type = PCI_EXP_TYPE_ROOT_PORT; 64 - break; 65 - case ACPI_HEST_TYPE_AER_ENDPOINT: 66 - pcie_type = PCI_EXP_TYPE_ENDPOINT; 67 - break; 68 - case ACPI_HEST_TYPE_AER_BRIDGE: 69 - if ((info->pci_dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) 70 - bridge = 1; 71 - break; 72 - default: 73 - return 0; 74 - } 41 + int ff; 75 42 76 43 p = (struct acpi_hest_aer_common *)(hest_hdr + 1); 44 + ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST); 77 45 if (p->flags & ACPI_HEST_GLOBAL) { 78 - if ((pci_is_pcie(info->pci_dev) && 79 - pci_pcie_type(info->pci_dev) == pcie_type) || bridge) 80 - ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST); 46 + if (hest_match_type(hest_hdr, info->pci_dev)) 47 + info->firmware_first = ff; 81 48 } else 82 49 if (hest_match_pci(p, info->pci_dev)) 83 - ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST); 84 - info->firmware_first = ff; 50 + info->firmware_first = ff; 85 51 86 52 return 0; 87 53 } ··· 87 89 88 90 int pcie_aer_get_firmware_first(struct pci_dev *dev) 89 91 { 92 + if (!pci_is_pcie(dev)) 93 + return 0; 94 + 90 95 if (!dev->__aer_firmware_first_valid) 91 96 aer_set_firmware_first(dev); 92 97 return dev->__aer_firmware_first;
+9 -8
drivers/pci/pcie/aer/aerdrv_core.c
··· 400 400 } 401 401 402 402 /** 403 - * default_downstream_reset_link - default reset function for Downstream Port 404 - * @dev: pointer to downstream port's pci_dev data structure 403 + * default_reset_link - default reset function 404 + * @dev: pointer to pci_dev data structure 405 405 * 406 - * Invoked when performing link reset at Downstream Port w/ no aer driver. 406 + * Invoked when performing link reset on a Downstream Port or a 407 + * Root Port with no aer driver. 407 408 */ 408 - static pci_ers_result_t default_downstream_reset_link(struct pci_dev *dev) 409 + static pci_ers_result_t default_reset_link(struct pci_dev *dev) 409 410 { 410 411 aer_do_secondary_bus_reset(dev); 411 - dev_printk(KERN_DEBUG, &dev->dev, 412 - "Downstream Port link has been reset\n"); 412 + dev_printk(KERN_DEBUG, &dev->dev, "downstream link has been reset\n"); 413 413 return PCI_ERS_RESULT_RECOVERED; 414 414 } 415 415 ··· 458 458 459 459 if (driver && driver->reset_link) { 460 460 status = driver->reset_link(udev); 461 - } else if (pci_pcie_type(udev) == PCI_EXP_TYPE_DOWNSTREAM) { 462 - status = default_downstream_reset_link(udev); 461 + } else if (pci_pcie_type(udev) == PCI_EXP_TYPE_DOWNSTREAM || 462 + pci_pcie_type(udev) == PCI_EXP_TYPE_ROOT_PORT) { 463 + status = default_reset_link(udev); 463 464 } else { 464 465 dev_printk(KERN_DEBUG, &dev->dev, 465 466 "no link-reset support at upstream device %s\n",
+22 -7
drivers/pci/pcie/aspm.c
··· 714 714 up_read(&pci_bus_sem); 715 715 } 716 716 717 - /* 718 - * pci_disable_link_state - disable pci device's link state, so the link will 719 - * never enter specific states 720 - */ 721 717 static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem, 722 718 bool force) 723 719 { 724 720 struct pci_dev *parent = pdev->bus->self; 725 721 struct pcie_link_state *link; 726 - 727 - if (aspm_disabled && !force) 728 - return; 729 722 730 723 if (!pci_is_pcie(pdev)) 731 724 return; ··· 728 735 parent = pdev; 729 736 if (!parent || !parent->link_state) 730 737 return; 738 + 739 + /* 740 + * A driver requested that ASPM be disabled on this device, but 741 + * if we don't have permission to manage ASPM (e.g., on ACPI 742 + * systems we have to observe the FADT ACPI_FADT_NO_ASPM bit and 743 + * the _OSC method), we can't honor that request. Windows has 744 + * a similar mechanism using "PciASPMOptOut", which is also 745 + * ignored in this situation. 746 + */ 747 + if (aspm_disabled && !force) { 748 + dev_warn(&pdev->dev, "can't disable ASPM; OS doesn't have ASPM control\n"); 749 + return; 750 + } 731 751 732 752 if (sem) 733 753 down_read(&pci_bus_sem); ··· 767 761 } 768 762 EXPORT_SYMBOL(pci_disable_link_state_locked); 769 763 764 + /** 765 + * pci_disable_link_state - Disable device's link state, so the link will 766 + * never enter specific states. Note that if the BIOS didn't grant ASPM 767 + * control to the OS, this does nothing because we can't touch the LNKCTL 768 + * register. 769 + * 770 + * @pdev: PCI device 771 + * @state: ASPM link state to disable 772 + */ 770 773 void pci_disable_link_state(struct pci_dev *pdev, int state) 771 774 { 772 775 __pci_disable_link_state(pdev, state, true, false);
+1 -1
drivers/pci/pcie/pme.c
··· 408 408 409 409 /** 410 410 * pcie_pme_remove - Prepare PCIe PME service device for removal. 411 - * @srv - PCIe service device to resume. 411 + * @srv - PCIe service device to remove. 412 412 */ 413 413 static void pcie_pme_remove(struct pcie_device *srv) 414 414 {
+72 -42
drivers/pci/probe.c
··· 170 170 { 171 171 u32 l, sz, mask; 172 172 u16 orig_cmd; 173 - struct pci_bus_region region; 173 + struct pci_bus_region region, inverted_region; 174 174 bool bar_too_big = false, bar_disabled = false; 175 175 176 176 mask = type ? PCI_ROM_ADDRESS_MASK : ~0; ··· 250 250 pci_write_config_dword(dev, pos + 4, 0); 251 251 region.start = 0; 252 252 region.end = sz64; 253 - pcibios_bus_to_resource(dev, res, &region); 254 253 bar_disabled = true; 255 254 } else { 256 255 region.start = l64; 257 256 region.end = l64 + sz64; 258 - pcibios_bus_to_resource(dev, res, &region); 259 257 } 260 258 } else { 261 259 sz = pci_size(l, sz, mask); ··· 263 265 264 266 region.start = l; 265 267 region.end = l + sz; 266 - pcibios_bus_to_resource(dev, res, &region); 268 + } 269 + 270 + pcibios_bus_to_resource(dev, res, &region); 271 + pcibios_resource_to_bus(dev, &inverted_region, res); 272 + 273 + /* 274 + * If "A" is a BAR value (a bus address), "bus_to_resource(A)" is 275 + * the corresponding resource address (the physical address used by 276 + * the CPU. Converting that resource address back to a bus address 277 + * should yield the original BAR value: 278 + * 279 + * resource_to_bus(bus_to_resource(A)) == A 280 + * 281 + * If it doesn't, CPU accesses to "bus_to_resource(A)" will not 282 + * be claimed by the device. 283 + */ 284 + if (inverted_region.start != region.start) { 285 + dev_info(&dev->dev, "reg 0x%x: initial BAR value %pa invalid; forcing reassignment\n", 286 + pos, &region.start); 287 + res->flags |= IORESOURCE_UNSET; 288 + res->end -= res->start; 289 + res->start = 0; 267 290 } 268 291 269 292 goto out; ··· 297 278 pci_write_config_word(dev, PCI_COMMAND, orig_cmd); 298 279 299 280 if (bar_too_big) 300 - dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n", pos); 281 + dev_err(&dev->dev, "reg 0x%x: can't handle 64-bit BAR\n", pos); 301 282 if (res->flags && !bar_disabled) 302 - dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res); 283 + dev_printk(KERN_DEBUG, &dev->dev, "reg 0x%x: %pR\n", pos, res); 303 284 304 285 return (res->flags & IORESOURCE_MEM_64) ? 1 : 0; 305 286 } ··· 470 451 } 471 452 } 472 453 473 - static struct pci_bus * pci_alloc_bus(void) 454 + static struct pci_bus *pci_alloc_bus(void) 474 455 { 475 456 struct pci_bus *b; 476 457 477 458 b = kzalloc(sizeof(*b), GFP_KERNEL); 478 - if (b) { 479 - INIT_LIST_HEAD(&b->node); 480 - INIT_LIST_HEAD(&b->children); 481 - INIT_LIST_HEAD(&b->devices); 482 - INIT_LIST_HEAD(&b->slots); 483 - INIT_LIST_HEAD(&b->resources); 484 - b->max_bus_speed = PCI_SPEED_UNKNOWN; 485 - b->cur_bus_speed = PCI_SPEED_UNKNOWN; 486 - } 459 + if (!b) 460 + return NULL; 461 + 462 + INIT_LIST_HEAD(&b->node); 463 + INIT_LIST_HEAD(&b->children); 464 + INIT_LIST_HEAD(&b->devices); 465 + INIT_LIST_HEAD(&b->slots); 466 + INIT_LIST_HEAD(&b->resources); 467 + b->max_bus_speed = PCI_SPEED_UNKNOWN; 468 + b->cur_bus_speed = PCI_SPEED_UNKNOWN; 487 469 return b; 470 + } 471 + 472 + static void pci_release_host_bridge_dev(struct device *dev) 473 + { 474 + struct pci_host_bridge *bridge = to_pci_host_bridge(dev); 475 + 476 + if (bridge->release_fn) 477 + bridge->release_fn(bridge); 478 + 479 + pci_free_resource_list(&bridge->windows); 480 + 481 + kfree(bridge); 488 482 } 489 483 490 484 static struct pci_host_bridge *pci_alloc_host_bridge(struct pci_bus *b) ··· 505 473 struct pci_host_bridge *bridge; 506 474 507 475 bridge = kzalloc(sizeof(*bridge), GFP_KERNEL); 508 - if (bridge) { 509 - INIT_LIST_HEAD(&bridge->windows); 510 - bridge->bus = b; 511 - } 476 + if (!bridge) 477 + return NULL; 512 478 479 + INIT_LIST_HEAD(&bridge->windows); 480 + bridge->bus = b; 513 481 return bridge; 514 482 } 515 483 ··· 1165 1133 pci_release_capabilities(pci_dev); 1166 1134 pci_release_of_node(pci_dev); 1167 1135 pcibios_release_device(pci_dev); 1136 + pci_bus_put(pci_dev->bus); 1168 1137 kfree(pci_dev); 1169 1138 } 1170 1139 ··· 1222 1189 return PCI_CFG_SPACE_SIZE; 1223 1190 } 1224 1191 1225 - static void pci_release_bus_bridge_dev(struct device *dev) 1226 - { 1227 - struct pci_host_bridge *bridge = to_pci_host_bridge(dev); 1228 - 1229 - if (bridge->release_fn) 1230 - bridge->release_fn(bridge); 1231 - 1232 - pci_free_resource_list(&bridge->windows); 1233 - 1234 - kfree(bridge); 1235 - } 1236 - 1237 - struct pci_dev *alloc_pci_dev(void) 1192 + struct pci_dev *pci_alloc_dev(struct pci_bus *bus) 1238 1193 { 1239 1194 struct pci_dev *dev; 1240 1195 ··· 1232 1211 1233 1212 INIT_LIST_HEAD(&dev->bus_list); 1234 1213 dev->dev.type = &pci_dev_type; 1214 + dev->bus = pci_bus_get(bus); 1235 1215 1236 1216 return dev; 1217 + } 1218 + EXPORT_SYMBOL(pci_alloc_dev); 1219 + 1220 + struct pci_dev *alloc_pci_dev(void) 1221 + { 1222 + return pci_alloc_dev(NULL); 1237 1223 } 1238 1224 EXPORT_SYMBOL(alloc_pci_dev); 1239 1225 ··· 1292 1264 if (!pci_bus_read_dev_vendor_id(bus, devfn, &l, 60*1000)) 1293 1265 return NULL; 1294 1266 1295 - dev = alloc_pci_dev(); 1267 + dev = pci_alloc_dev(bus); 1296 1268 if (!dev) 1297 1269 return NULL; 1298 1270 1299 - dev->bus = bus; 1300 1271 dev->devfn = devfn; 1301 1272 dev->vendor = l & 0xffff; 1302 1273 dev->device = (l >> 16) & 0xffff; ··· 1303 1276 pci_set_of_node(dev); 1304 1277 1305 1278 if (pci_setup_device(dev)) { 1279 + pci_bus_put(dev->bus); 1306 1280 kfree(dev); 1307 1281 return NULL; 1308 1282 } ··· 1729 1701 goto err_out; 1730 1702 1731 1703 bridge->dev.parent = parent; 1732 - bridge->dev.release = pci_release_bus_bridge_dev; 1704 + bridge->dev.release = pci_release_host_bridge_dev; 1733 1705 dev_set_name(&bridge->dev, "pci%04x:%02x", pci_domain_nr(b), bus); 1734 1706 error = pcibios_root_bridge_prepare(bridge); 1735 - if (error) 1736 - goto bridge_dev_reg_err; 1707 + if (error) { 1708 + kfree(bridge); 1709 + goto err_out; 1710 + } 1737 1711 1738 1712 error = device_register(&bridge->dev); 1739 - if (error) 1740 - goto bridge_dev_reg_err; 1713 + if (error) { 1714 + put_device(&bridge->dev); 1715 + goto err_out; 1716 + } 1741 1717 b->bridge = get_device(&bridge->dev); 1742 1718 device_enable_async_suspend(b->bridge); 1743 1719 pci_set_bus_of_node(b); ··· 1797 1765 class_dev_reg_err: 1798 1766 put_device(&bridge->dev); 1799 1767 device_unregister(&bridge->dev); 1800 - bridge_dev_reg_err: 1801 - kfree(bridge); 1802 1768 err_out: 1803 1769 kfree(b); 1804 1770 return NULL;
+29 -4
drivers/pci/quirks.c
··· 1022 1022 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode); 1023 1023 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode); 1024 1024 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode); 1025 + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x7900, quirk_amd_ide_mode); 1026 + DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, 0x7900, quirk_amd_ide_mode); 1025 1027 1026 1028 /* 1027 1029 * Serverworks CSB5 IDE does not fully support native mode ··· 1834 1832 u16 command, pmcsr; 1835 1833 u8 __iomem *csr; 1836 1834 u8 cmd_hi; 1837 - int pm; 1838 1835 1839 1836 switch (dev->device) { 1840 1837 /* PCI IDs taken from drivers/net/e100.c */ ··· 1871 1870 * Check that the device is in the D0 power state. If it's not, 1872 1871 * there is no point to look any further. 1873 1872 */ 1874 - pm = pci_find_capability(dev, PCI_CAP_ID_PM); 1875 - if (pm) { 1876 - pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr); 1873 + if (dev->pm_cap) { 1874 + pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); 1877 1875 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) 1878 1876 return; 1879 1877 } ··· 2864 2864 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata); 2865 2865 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata); 2866 2866 2867 + 2868 + /* 2869 + * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. To 2870 + * work around this, query the size it should be configured to by the device and 2871 + * modify the resource end to correspond to this new size. 2872 + */ 2873 + static void quirk_intel_ntb(struct pci_dev *dev) 2874 + { 2875 + int rc; 2876 + u8 val; 2877 + 2878 + rc = pci_read_config_byte(dev, 0x00D0, &val); 2879 + if (rc) 2880 + return; 2881 + 2882 + dev->resource[2].end = dev->resource[2].start + ((u64) 1 << val) - 1; 2883 + 2884 + rc = pci_read_config_byte(dev, 0x00D1, &val); 2885 + if (rc) 2886 + return; 2887 + 2888 + dev->resource[4].end = dev->resource[4].start + ((u64) 1 << val) - 1; 2889 + } 2890 + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb); 2891 + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb); 2867 2892 2868 2893 static ktime_t fixup_debug_start(struct pci_dev *dev, 2869 2894 void (*fn)(struct pci_dev *dev))
+1 -1
drivers/scsi/megaraid.c
··· 2026 2026 static inline int 2027 2027 make_local_pdev(adapter_t *adapter, struct pci_dev **pdev) 2028 2028 { 2029 - *pdev = alloc_pci_dev(); 2029 + *pdev = pci_alloc_dev(NULL); 2030 2030 2031 2031 if( *pdev == NULL ) return -1; 2032 2032
-1
include/acpi/acpi_bus.h
··· 434 434 int unregister_acpi_bus_type(struct acpi_bus_type *); 435 435 436 436 struct acpi_pci_root { 437 - struct list_head node; 438 437 struct acpi_device * device; 439 438 struct pci_bus *bus; 440 439 u16 segment;
+13 -9
include/linux/aer.h
··· 7 7 #ifndef _AER_H_ 8 8 #define _AER_H_ 9 9 10 + #define AER_NONFATAL 0 11 + #define AER_FATAL 1 12 + #define AER_CORRECTABLE 2 13 + 10 14 struct aer_header_log_regs { 11 15 unsigned int dw0; 12 16 unsigned int dw1; ··· 35 31 36 32 #if defined(CONFIG_PCIEAER) 37 33 /* pci-e port driver needs this function to enable aer */ 38 - extern int pci_enable_pcie_error_reporting(struct pci_dev *dev); 39 - extern int pci_disable_pcie_error_reporting(struct pci_dev *dev); 40 - extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); 34 + int pci_enable_pcie_error_reporting(struct pci_dev *dev); 35 + int pci_disable_pcie_error_reporting(struct pci_dev *dev); 36 + int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); 41 37 #else 42 38 static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev) 43 39 { ··· 53 49 } 54 50 #endif 55 51 56 - extern void cper_print_aer(struct pci_dev *dev, 57 - int cper_severity, struct aer_capability_regs *aer); 58 - extern int cper_severity_to_aer(int cper_severity); 59 - extern void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn, 60 - int severity, 61 - struct aer_capability_regs *aer_regs); 52 + void cper_print_aer(struct pci_dev *dev, int cper_severity, 53 + struct aer_capability_regs *aer); 54 + int cper_severity_to_aer(int cper_severity); 55 + void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn, 56 + int severity, 57 + struct aer_capability_regs *aer_regs); 62 58 #endif //_AER_H_ 63 59
+1
include/linux/msi.h
··· 35 35 36 36 u32 masked; /* mask bits */ 37 37 unsigned int irq; 38 + unsigned int nvec_used; /* number of messages */ 38 39 struct list_head list; 39 40 40 41 union {
+4 -1
include/linux/pci.h
··· 364 364 return dev; 365 365 } 366 366 367 - struct pci_dev *alloc_pci_dev(void); 367 + struct pci_dev *pci_alloc_dev(struct pci_bus *bus); 368 + struct pci_dev * __deprecated alloc_pci_dev(void); 368 369 369 370 #define to_pci_dev(n) container_of(n, struct pci_dev, dev) 370 371 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) ··· 1019 1018 void pci_release_selected_regions(struct pci_dev *, int); 1020 1019 1021 1020 /* drivers/pci/bus.c */ 1021 + struct pci_bus *pci_bus_get(struct pci_bus *bus); 1022 + void pci_bus_put(struct pci_bus *bus); 1022 1023 void pci_add_resource(struct list_head *resources, struct resource *res); 1023 1024 void pci_add_resource_offset(struct list_head *resources, struct resource *res, 1024 1025 resource_size_t offset);
+5 -2
include/linux/pci_ids.h
··· 556 556 #define PCI_DEVICE_ID_AMD_8131_BRIDGE 0x7450 557 557 #define PCI_DEVICE_ID_AMD_8131_APIC 0x7451 558 558 #define PCI_DEVICE_ID_AMD_8132_BRIDGE 0x7458 559 - #define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS 0x780b 560 559 #define PCI_DEVICE_ID_AMD_CS5535_IDE 0x208F 561 560 #define PCI_DEVICE_ID_AMD_CS5536_ISA 0x2090 562 561 #define PCI_DEVICE_ID_AMD_CS5536_FLASH 0x2091 ··· 567 568 #define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A 568 569 #define PCI_DEVICE_ID_AMD_LX_VIDEO 0x2081 569 570 #define PCI_DEVICE_ID_AMD_LX_AES 0x2082 570 - #define PCI_DEVICE_ID_AMD_HUDSON2_IDE 0x780c 571 571 #define PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE 0x7800 572 + #define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS 0x780b 573 + #define PCI_DEVICE_ID_AMD_HUDSON2_IDE 0x780c 572 574 573 575 #define PCI_VENDOR_ID_TRIDENT 0x1023 574 576 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000 ··· 2475 2475 #define PCI_VENDOR_ID_AZWAVE 0x1a3b 2476 2476 2477 2477 #define PCI_VENDOR_ID_ASMEDIA 0x1b21 2478 + 2479 + #define PCI_VENDOR_ID_CIRCUITCO 0x1cc8 2480 + #define PCI_SUBSYSTEM_ID_CIRCUITCO_MINNOWBOARD 0x0001 2478 2481 2479 2482 #define PCI_VENDOR_ID_TEKRAM 0x1de1 2480 2483 #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29
+1 -1
include/uapi/linux/pci_regs.h
··· 468 468 #define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */ 469 469 #define PCI_EXP_LNKCAP_L0SEL 0x00007000 /* L0s Exit Latency */ 470 470 #define PCI_EXP_LNKCAP_L1EL 0x00038000 /* L1 Exit Latency */ 471 - #define PCI_EXP_LNKCAP_CLKPM 0x00040000 /* L1 Clock Power Management */ 471 + #define PCI_EXP_LNKCAP_CLKPM 0x00040000 /* Clock Power Management */ 472 472 #define PCI_EXP_LNKCAP_SDERC 0x00080000 /* Surprise Down Error Reporting Capable */ 473 473 #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ 474 474 #define PCI_EXP_LNKCAP_LBNC 0x00200000 /* Link Bandwidth Notification Capability */