Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'wireless-drivers-next-for-davem-2017-01-02' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next

Kalle Valo says:

====================
wireless-drivers-next patches for 4.11

The most notable change here is the inclusion of airtime fairness
scheduling to ath9k. It prevents slow clients from hogging all the
airtime and unfairly slowing down faster clients.

Otherwise smaller changes and cleanup.

Major changes:

ath9k

* cleanup eeprom endian handling
* add airtime fairness scheduling

ath10k

* fix issues for new QCA9377 firmware version
* support dev_coredump() for firmware crash dump
* enable channel 169 on 5 GHz band
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

+1487 -1421
+24 -3
drivers/net/wireless/admtek/adm8211.c
··· 413 413 skb_tail_pointer(newskb), 414 414 RX_PKT_SIZE, 415 415 PCI_DMA_FROMDEVICE); 416 + if (pci_dma_mapping_error(priv->pdev, 417 + priv->rx_buffers[entry].mapping)) { 418 + priv->rx_buffers[entry].skb = NULL; 419 + dev_kfree_skb(newskb); 420 + skb = NULL; 421 + /* TODO: update rx dropped stats */ 422 + } 416 423 } else { 417 424 skb = NULL; 418 425 /* TODO: update rx dropped stats */ ··· 1457 1450 skb_tail_pointer(rx_info->skb), 1458 1451 RX_PKT_SIZE, 1459 1452 PCI_DMA_FROMDEVICE); 1453 + if (pci_dma_mapping_error(priv->pdev, rx_info->mapping)) { 1454 + dev_kfree_skb(rx_info->skb); 1455 + rx_info->skb = NULL; 1456 + break; 1457 + } 1458 + 1460 1459 desc->buffer1 = cpu_to_le32(rx_info->mapping); 1461 1460 desc->status = cpu_to_le32(RDES0_STATUS_OWN | RDES0_STATUS_SQL); 1462 1461 } ··· 1626 1613 } 1627 1614 1628 1615 /* Transmit skb w/adm8211_tx_hdr (802.11 header created by hardware) */ 1629 - static void adm8211_tx_raw(struct ieee80211_hw *dev, struct sk_buff *skb, 1616 + static int adm8211_tx_raw(struct ieee80211_hw *dev, struct sk_buff *skb, 1630 1617 u16 plcp_signal, 1631 1618 size_t hdrlen) 1632 1619 { ··· 1638 1625 1639 1626 mapping = pci_map_single(priv->pdev, skb->data, skb->len, 1640 1627 PCI_DMA_TODEVICE); 1628 + if (pci_dma_mapping_error(priv->pdev, mapping)) 1629 + return -ENOMEM; 1641 1630 1642 1631 spin_lock_irqsave(&priv->lock, flags); 1643 1632 ··· 1672 1657 1673 1658 /* Trigger transmit poll */ 1674 1659 ADM8211_CSR_WRITE(TDR, 0); 1660 + 1661 + return 0; 1675 1662 } 1676 1663 1677 1664 /* Put adm8211_tx_hdr on skb and transmit */ ··· 1727 1710 1728 1711 txhdr->retry_limit = info->control.rates[0].count; 1729 1712 1730 - adm8211_tx_raw(dev, skb, plcp_signal, hdrlen); 1713 + if (adm8211_tx_raw(dev, skb, plcp_signal, hdrlen)) { 1714 + /* Drop packet */ 1715 + ieee80211_free_txskb(dev, skb); 1716 + } 1731 1717 } 1732 1718 1733 1719 static int adm8211_alloc_rings(struct ieee80211_hw *dev) ··· 1863 1843 priv->rx_ring_size = rx_ring_size; 1864 1844 priv->tx_ring_size = tx_ring_size; 1865 1845 1866 - if (adm8211_alloc_rings(dev)) { 1846 + err = adm8211_alloc_rings(dev); 1847 + if (err) { 1867 1848 printk(KERN_ERR "%s (adm8211): Cannot allocate TX/RX ring\n", 1868 1849 pci_name(pdev)); 1869 1850 goto err_iounmap;
+10 -1
drivers/net/wireless/ath/ath10k/core.c
··· 694 694 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 695 695 result, board_id, chip_id); 696 696 697 - if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0) 697 + if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 698 + (board_id == 0)) { 699 + ath10k_warn(ar, "board id is not exist in otp, ignore it\n"); 698 700 return -EOPNOTSUPP; 701 + } 699 702 700 703 ar->id.bmi_ids_valid = true; 701 704 ar->id.bmi_board_id = board_id; ··· 1513 1510 static void ath10k_core_restart(struct work_struct *work) 1514 1511 { 1515 1512 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1513 + int ret; 1516 1514 1517 1515 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1518 1516 ··· 1565 1561 } 1566 1562 1567 1563 mutex_unlock(&ar->conf_mutex); 1564 + 1565 + ret = ath10k_debug_fw_devcoredump(ar); 1566 + if (ret) 1567 + ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1568 + ret); 1568 1569 } 1569 1570 1570 1571 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
+1 -1
drivers/net/wireless/ath/ath10k/core.h
··· 46 46 #define WMI_READY_TIMEOUT (5 * HZ) 47 47 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 48 48 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 49 - #define ATH10K_NUM_CHANS 39 49 + #define ATH10K_NUM_CHANS 40 50 50 51 51 /* Antenna noise floor */ 52 52 #define ATH10K_DEFAULT_NOISE_FLOOR -95
+40 -3
drivers/net/wireless/ath/ath10k/debug.c
··· 21 21 #include <linux/utsname.h> 22 22 #include <linux/crc32.h> 23 23 #include <linux/firmware.h> 24 + #include <linux/devcoredump.h> 24 25 25 26 #include "core.h" 26 27 #include "debug.h" ··· 722 721 } 723 722 EXPORT_SYMBOL(ath10k_debug_get_new_fw_crash_data); 724 723 725 - static struct ath10k_dump_file_data *ath10k_build_dump_file(struct ath10k *ar) 724 + static struct ath10k_dump_file_data *ath10k_build_dump_file(struct ath10k *ar, 725 + bool mark_read) 726 726 { 727 727 struct ath10k_fw_crash_data *crash_data = ar->debug.fw_crash_data; 728 728 struct ath10k_dump_file_data *dump_data; ··· 792 790 sizeof(crash_data->registers)); 793 791 sofar += sizeof(*dump_tlv) + sizeof(crash_data->registers); 794 792 795 - ar->debug.fw_crash_data->crashed_since_read = false; 793 + ar->debug.fw_crash_data->crashed_since_read = !mark_read; 796 794 797 795 spin_unlock_bh(&ar->data_lock); 798 796 799 797 return dump_data; 798 + } 799 + 800 + int ath10k_debug_fw_devcoredump(struct ath10k *ar) 801 + { 802 + struct ath10k_dump_file_data *dump; 803 + void *dump_ptr; 804 + u32 dump_len; 805 + 806 + /* To keep the dump file available also for debugfs don't mark the 807 + * file read, only debugfs should do that. 808 + */ 809 + dump = ath10k_build_dump_file(ar, false); 810 + if (!dump) { 811 + ath10k_warn(ar, "no crash dump data found for devcoredump"); 812 + return -ENODATA; 813 + } 814 + 815 + /* Make a copy of the dump file for dev_coredumpv() as during the 816 + * transition period we need to own the original file. Once 817 + * fw_crash_dump debugfs file is removed no need to have a copy 818 + * anymore. 819 + */ 820 + dump_len = le32_to_cpu(dump->len); 821 + dump_ptr = vzalloc(dump_len); 822 + 823 + if (!dump_ptr) 824 + return -ENOMEM; 825 + 826 + memcpy(dump_ptr, dump, dump_len); 827 + 828 + dev_coredumpv(ar->dev, dump_ptr, dump_len, GFP_KERNEL); 829 + 830 + return 0; 800 831 } 801 832 802 833 static int ath10k_fw_crash_dump_open(struct inode *inode, struct file *file) ··· 837 802 struct ath10k *ar = inode->i_private; 838 803 struct ath10k_dump_file_data *dump; 839 804 840 - dump = ath10k_build_dump_file(ar); 805 + ath10k_warn(ar, "fw_crash_dump debugfs file is deprecated, please use /sys/class/devcoredump instead."); 806 + 807 + dump = ath10k_build_dump_file(ar, true); 841 808 if (!dump) 842 809 return -ENODATA; 843 810
+8
drivers/net/wireless/ath/ath10k/debug.h
··· 84 84 ath10k_debug_get_new_fw_crash_data(struct ath10k *ar); 85 85 86 86 void ath10k_debug_dbglog_add(struct ath10k *ar, u8 *buffer, int len); 87 + 88 + int ath10k_debug_fw_devcoredump(struct ath10k *ar); 89 + 87 90 #define ATH10K_DFS_STAT_INC(ar, c) (ar->debug.dfs_stats.c++) 88 91 89 92 void ath10k_debug_get_et_strings(struct ieee80211_hw *hw, ··· 165 162 } 166 163 167 164 static inline u32 ath10k_debug_get_fw_dbglog_level(struct ath10k *ar) 165 + { 166 + return 0; 167 + } 168 + 169 + static inline int ath10k_debug_fw_devcoredump(struct ath10k *ar) 168 170 { 169 171 return 0; 170 172 }
+2
drivers/net/wireless/ath/ath10k/htt_tx.c
··· 239 239 240 240 size = htt->max_num_pending_tx * sizeof(struct ath10k_htt_txbuf); 241 241 dma_free_coherent(ar->dev, size, htt->txbuf.vaddr, htt->txbuf.paddr); 242 + htt->txbuf.vaddr = NULL; 242 243 } 243 244 244 245 static int ath10k_htt_tx_alloc_cont_txbuf(struct ath10k_htt *htt) ··· 269 268 size, 270 269 htt->frag_desc.vaddr, 271 270 htt->frag_desc.paddr); 271 + htt->frag_desc.vaddr = NULL; 272 272 } 273 273 274 274 static int ath10k_htt_tx_alloc_cont_frag_desc(struct ath10k_htt *htt)
+1 -1
drivers/net/wireless/ath/ath10k/hw.h
··· 512 512 /* Target specific defines for WMI-TLV firmware */ 513 513 #define TARGET_TLV_NUM_VDEVS 4 514 514 #define TARGET_TLV_NUM_STATIONS 32 515 - #define TARGET_TLV_NUM_PEERS 35 515 + #define TARGET_TLV_NUM_PEERS 33 516 516 #define TARGET_TLV_NUM_TDLS_VDEVS 1 517 517 #define TARGET_TLV_NUM_TIDS ((TARGET_TLV_NUM_PEERS) * 2) 518 518 #define TARGET_TLV_NUM_MSDU_DESC (1024 + 32)
+58 -15
drivers/net/wireless/ath/ath10k/mac.c
··· 1227 1227 return ath10k_monitor_stop(ar); 1228 1228 } 1229 1229 1230 + static bool ath10k_mac_can_set_cts_prot(struct ath10k_vif *arvif) 1231 + { 1232 + struct ath10k *ar = arvif->ar; 1233 + 1234 + lockdep_assert_held(&ar->conf_mutex); 1235 + 1236 + if (!arvif->is_started) { 1237 + ath10k_dbg(ar, ATH10K_DBG_MAC, "defer cts setup, vdev is not ready yet\n"); 1238 + return false; 1239 + } 1240 + 1241 + return true; 1242 + } 1243 + 1244 + static int ath10k_mac_set_cts_prot(struct ath10k_vif *arvif) 1245 + { 1246 + struct ath10k *ar = arvif->ar; 1247 + u32 vdev_param; 1248 + 1249 + lockdep_assert_held(&ar->conf_mutex); 1250 + 1251 + vdev_param = ar->wmi.vdev_param->protection_mode; 1252 + 1253 + ath10k_dbg(ar, ATH10K_DBG_MAC, "mac vdev %d cts_protection %d\n", 1254 + arvif->vdev_id, arvif->use_cts_prot); 1255 + 1256 + return ath10k_wmi_vdev_set_param(ar, arvif->vdev_id, vdev_param, 1257 + arvif->use_cts_prot ? 1 : 0); 1258 + } 1259 + 1230 1260 static int ath10k_recalc_rtscts_prot(struct ath10k_vif *arvif) 1231 1261 { 1232 1262 struct ath10k *ar = arvif->ar; ··· 1274 1244 else 1275 1245 rts_cts |= SM(WMI_RTSCTS_FOR_SECOND_RATESERIES, 1276 1246 WMI_RTSCTS_PROFILE); 1247 + 1248 + ath10k_dbg(ar, ATH10K_DBG_MAC, "mac vdev %d recalc rts/cts prot %d\n", 1249 + arvif->vdev_id, rts_cts); 1277 1250 1278 1251 return ath10k_wmi_vdev_set_param(ar, arvif->vdev_id, vdev_param, 1279 1252 rts_cts); ··· 3528 3495 */ 3529 3496 static int ath10k_mac_tx(struct ath10k *ar, 3530 3497 struct ieee80211_vif *vif, 3531 - struct ieee80211_sta *sta, 3532 3498 enum ath10k_hw_txrx_mode txmode, 3533 3499 enum ath10k_mac_tx_path txpath, 3534 3500 struct sk_buff *skb) ··· 3669 3637 txmode = ath10k_mac_tx_h_get_txmode(ar, vif, sta, skb); 3670 3638 txpath = ath10k_mac_tx_h_get_txpath(ar, skb, txmode); 3671 3639 3672 - ret = ath10k_mac_tx(ar, vif, sta, txmode, txpath, skb); 3640 + ret = ath10k_mac_tx(ar, vif, txmode, txpath, skb); 3673 3641 if (ret) { 3674 3642 ath10k_warn(ar, "failed to transmit offchannel frame: %d\n", 3675 3643 ret); ··· 3856 3824 spin_unlock_bh(&ar->htt.tx_lock); 3857 3825 } 3858 3826 3859 - ret = ath10k_mac_tx(ar, vif, sta, txmode, txpath, skb); 3827 + ret = ath10k_mac_tx(ar, vif, txmode, txpath, skb); 3860 3828 if (unlikely(ret)) { 3861 3829 ath10k_warn(ar, "failed to push frame: %d\n", ret); 3862 3830 ··· 4137 4105 spin_unlock_bh(&ar->htt.tx_lock); 4138 4106 } 4139 4107 4140 - ret = ath10k_mac_tx(ar, vif, sta, txmode, txpath, skb); 4108 + ret = ath10k_mac_tx(ar, vif, txmode, txpath, skb); 4141 4109 if (ret) { 4142 4110 ath10k_warn(ar, "failed to transmit frame: %d\n", ret); 4143 4111 if (is_htt) { ··· 4701 4669 lockdep_assert_held(&ar->conf_mutex); 4702 4670 4703 4671 list_for_each_entry(arvif, &ar->arvifs, list) { 4704 - WARN_ON(arvif->txpower < 0); 4672 + if (arvif->txpower <= 0) 4673 + continue; 4705 4674 4706 4675 if (txpower == -1) 4707 4676 txpower = arvif->txpower; ··· 4710 4677 txpower = min(txpower, arvif->txpower); 4711 4678 } 4712 4679 4713 - if (WARN_ON(txpower == -1)) 4714 - return -EINVAL; 4680 + if (txpower == -1) 4681 + return 0; 4715 4682 4716 4683 ret = ath10k_mac_txpower_setup(ar, txpower); 4717 4684 if (ret) { ··· 5227 5194 ath10k_warn(ar, "failed to recalc monitor: %d\n", ret); 5228 5195 } 5229 5196 5197 + ret = ath10k_mac_txpower_recalc(ar); 5198 + if (ret) 5199 + ath10k_warn(ar, "failed to recalc tx power: %d\n", ret); 5200 + 5230 5201 spin_lock_bh(&ar->htt.tx_lock); 5231 5202 ath10k_mac_vif_tx_unlock_all(arvif); 5232 5203 spin_unlock_bh(&ar->htt.tx_lock); ··· 5365 5328 5366 5329 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 5367 5330 arvif->use_cts_prot = info->use_cts_prot; 5368 - ath10k_dbg(ar, ATH10K_DBG_MAC, "mac vdev %d cts_prot %d\n", 5369 - arvif->vdev_id, info->use_cts_prot); 5370 5331 5371 5332 ret = ath10k_recalc_rtscts_prot(arvif); 5372 5333 if (ret) 5373 5334 ath10k_warn(ar, "failed to recalculate rts/cts prot for vdev %d: %d\n", 5374 5335 arvif->vdev_id, ret); 5375 5336 5376 - vdev_param = ar->wmi.vdev_param->protection_mode; 5377 - ret = ath10k_wmi_vdev_set_param(ar, arvif->vdev_id, vdev_param, 5378 - info->use_cts_prot ? 1 : 0); 5379 - if (ret) 5380 - ath10k_warn(ar, "failed to set protection mode %d on vdev %i: %d\n", 5381 - info->use_cts_prot, arvif->vdev_id, ret); 5337 + if (ath10k_mac_can_set_cts_prot(arvif)) { 5338 + ret = ath10k_mac_set_cts_prot(arvif); 5339 + if (ret) 5340 + ath10k_warn(ar, "failed to set cts protection for vdev %d: %d\n", 5341 + arvif->vdev_id, ret); 5342 + } 5382 5343 } 5383 5344 5384 5345 if (changed & BSS_CHANGED_ERP_SLOT) { ··· 7399 7364 arvif->is_up = true; 7400 7365 } 7401 7366 7367 + if (ath10k_mac_can_set_cts_prot(arvif)) { 7368 + ret = ath10k_mac_set_cts_prot(arvif); 7369 + if (ret) 7370 + ath10k_warn(ar, "failed to set cts protection for vdev %d: %d\n", 7371 + arvif->vdev_id, ret); 7372 + } 7373 + 7402 7374 mutex_unlock(&ar->conf_mutex); 7403 7375 return 0; 7404 7376 ··· 7590 7548 CHAN5G(157, 5785, 0), 7591 7549 CHAN5G(161, 5805, 0), 7592 7550 CHAN5G(165, 5825, 0), 7551 + CHAN5G(169, 5845, 0), 7593 7552 }; 7594 7553 7595 7554 struct ath10k *ath10k_mac_create(size_t priv_size)
+2 -2
drivers/net/wireless/ath/ath10k/pci.c
··· 1973 1973 } 1974 1974 break; 1975 1975 case QCA9377_1_0_DEVICE_ID: 1976 - return 2; 1976 + return 4; 1977 1977 } 1978 1978 1979 1979 ath10k_warn(ar, "unknown number of banks, assuming 1\n"); ··· 3132 3132 setup_timer(&ar_pci->rx_post_retry, ath10k_pci_rx_replenish_retry, 3133 3133 (unsigned long)ar); 3134 3134 3135 - if (QCA_REV_6174(ar)) 3135 + if (QCA_REV_6174(ar) || QCA_REV_9377(ar)) 3136 3136 ath10k_pci_override_ce_config(ar); 3137 3137 3138 3138 ret = ath10k_pci_alloc_pipes(ar);
+9 -3
drivers/net/wireless/ath/ath10k/wmi-tlv.c
··· 1105 1105 struct ath10k_fw_stats_pdev *dst; 1106 1106 1107 1107 src = data; 1108 - if (data_len < sizeof(*src)) 1108 + if (data_len < sizeof(*src)) { 1109 + kfree(tb); 1109 1110 return -EPROTO; 1111 + } 1110 1112 1111 1113 data += sizeof(*src); 1112 1114 data_len -= sizeof(*src); ··· 1128 1126 struct ath10k_fw_stats_vdev *dst; 1129 1127 1130 1128 src = data; 1131 - if (data_len < sizeof(*src)) 1129 + if (data_len < sizeof(*src)) { 1130 + kfree(tb); 1132 1131 return -EPROTO; 1132 + } 1133 1133 1134 1134 data += sizeof(*src); 1135 1135 data_len -= sizeof(*src); ··· 1149 1145 struct ath10k_fw_stats_peer *dst; 1150 1146 1151 1147 src = data; 1152 - if (data_len < sizeof(*src)) 1148 + if (data_len < sizeof(*src)) { 1149 + kfree(tb); 1153 1150 return -EPROTO; 1151 + } 1154 1152 1155 1153 data += sizeof(*src); 1156 1154 data_len -= sizeof(*src);
+1 -1
drivers/net/wireless/ath/ath9k/ar5008_phy.c
··· 524 524 return true; 525 525 526 526 /* Setup rf parameters */ 527 - eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV); 527 + eepMinorRev = ah->eep_ops->get_eeprom_rev(ah); 528 528 529 529 for (i = 0; i < ah->iniBank6.ia_rows; i++) 530 530 ah->analogBank6Data[i] = INI_RA(&ah->iniBank6, i, modesIndex);
+2 -4
drivers/net/wireless/ath/ath9k/ar9002_hw.c
··· 108 108 { 109 109 u32 rxgain_type; 110 110 111 - if (ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) >= 112 - AR5416_EEP_MINOR_VER_17) { 111 + if (ah->eep_ops->get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_17) { 113 112 rxgain_type = ah->eep_ops->get_eeprom(ah, EEP_RXGAIN_TYPE); 114 113 115 114 if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF) ··· 128 129 129 130 static void ar9280_20_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type) 130 131 { 131 - if (ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) >= 132 - AR5416_EEP_MINOR_VER_19) { 132 + if (ah->eep_ops->get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19) { 133 133 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) 134 134 INIT_INI_ARRAY(&ah->iniModesTxGain, 135 135 ar9280Modes_high_power_tx_gain_9280_2);
+14 -7
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
··· 53 53 .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */ 54 54 .opCapFlags = { 55 55 .opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A, 56 - .eepMisc = 0, 56 + .eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN, 57 57 }, 58 58 .rfSilent = 0, 59 59 .blueToothOptions = 0, ··· 631 631 .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */ 632 632 .opCapFlags = { 633 633 .opFlags = AR5416_OPFLAGS_11A, 634 - .eepMisc = 0, 634 + .eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN, 635 635 }, 636 636 .rfSilent = 0, 637 637 .blueToothOptions = 0, ··· 1210 1210 .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */ 1211 1211 .opCapFlags = { 1212 1212 .opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A, 1213 - .eepMisc = 0, 1213 + .eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN, 1214 1214 }, 1215 1215 .rfSilent = 0, 1216 1216 .blueToothOptions = 0, ··· 1789 1789 .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */ 1790 1790 .opCapFlags = { 1791 1791 .opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A, 1792 - .eepMisc = 0, 1792 + .eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN, 1793 1793 }, 1794 1794 .rfSilent = 0, 1795 1795 .blueToothOptions = 0, ··· 2367 2367 .txrxMask = 0x33, /* 4 bits tx and 4 bits rx */ 2368 2368 .opCapFlags = { 2369 2369 .opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A, 2370 - .eepMisc = 0, 2370 + .eepMisc = AR9300_EEPMISC_LITTLE_ENDIAN, 2371 2371 }, 2372 2372 .rfSilent = 0, 2373 2373 .blueToothOptions = 0, ··· 3468 3468 AR5416_OPFLAGS_N_5G_HT20)); 3469 3469 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags & 3470 3470 AR5416_OPFLAGS_N_5G_HT40)); 3471 - PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc & 0x01)); 3471 + PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc & 3472 + AR5416_EEPMISC_BIG_ENDIAN)); 3472 3473 PR_EEP("RF Silent", pBase->rfSilent); 3473 3474 PR_EEP("BT option", pBase->blueToothOptions); 3474 3475 PR_EEP("Device Cap", pBase->deviceCap); ··· 5498 5497 } 5499 5498 } 5500 5499 5500 + static u8 ar9003_get_eepmisc(struct ath_hw *ah) 5501 + { 5502 + return ah->eeprom.map4k.baseEepHeader.eepMisc; 5503 + } 5504 + 5501 5505 const struct eeprom_ops eep_ar9300_ops = { 5502 5506 .check_eeprom = ath9k_hw_ar9300_check_eeprom, 5503 5507 .get_eeprom = ath9k_hw_ar9300_get_eeprom, ··· 5513 5507 .set_board_values = ath9k_hw_ar9300_set_board_values, 5514 5508 .set_addac = ath9k_hw_ar9300_set_addac, 5515 5509 .set_txpower = ath9k_hw_ar9300_set_txpower, 5516 - .get_spur_channel = ath9k_hw_ar9300_get_spur_channel 5510 + .get_spur_channel = ath9k_hw_ar9300_get_spur_channel, 5511 + .get_eepmisc = ar9003_get_eepmisc 5517 5512 };
+3 -1
drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
··· 38 38 #define AR9300_NUM_CTLS_2G 12 39 39 #define AR9300_NUM_BAND_EDGES_5G 8 40 40 #define AR9300_NUM_BAND_EDGES_2G 4 41 - #define AR9300_EEPMISC_BIG_ENDIAN 0x01 42 41 #define AR9300_EEPMISC_WOW 0x02 43 42 #define AR9300_CUSTOMER_DATA_SIZE 20 44 43 ··· 68 69 #define AR9300_BASE_ADDR_4K 0xfff 69 70 #define AR9300_BASE_ADDR 0x3ff 70 71 #define AR9300_BASE_ADDR_512 0x1ff 72 + 73 + /* AR5416_EEPMISC_BIG_ENDIAN not set indicates little endian */ 74 + #define AR9300_EEPMISC_LITTLE_ENDIAN 0 71 75 72 76 #define AR9300_OTP_BASE \ 73 77 ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x30000 : 0x14000)
+33 -3
drivers/net/wireless/ath/ath9k/ath9k.h
··· 112 112 #define ATH_TXFIFO_DEPTH 8 113 113 #define ATH_TX_ERROR 0x01 114 114 115 + #define ATH_AIRTIME_QUANTUM 300 /* usec */ 116 + 115 117 /* Stop tx traffic 1ms before the GO goes away */ 116 118 #define ATH_P2P_PS_STOP_TIME 1000 117 119 ··· 249 247 bool has_queued; 250 248 }; 251 249 250 + void __ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid); 251 + void ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid); 252 + 252 253 struct ath_node { 253 254 struct ath_softc *sc; 254 255 struct ieee80211_sta *sta; /* station struct we're part of */ ··· 263 258 264 259 bool sleeping; 265 260 bool no_ps_filter; 261 + s64 airtime_deficit[IEEE80211_NUM_ACS]; 262 + u32 airtime_rx_start; 266 263 267 264 #ifdef CONFIG_ATH9K_STATION_STATISTICS 268 265 struct ath_rx_rate_stats rx_rate_stats; 266 + struct ath_airtime_stats airtime_stats; 269 267 #endif 270 268 u8 key_idx[4]; 271 269 ··· 325 317 /* Channel Context */ 326 318 /*******************/ 327 319 320 + struct ath_acq { 321 + struct list_head acq_new; 322 + struct list_head acq_old; 323 + spinlock_t lock; 324 + }; 325 + 328 326 struct ath_chanctx { 329 327 struct cfg80211_chan_def chandef; 330 328 struct list_head vifs; 331 - struct list_head acq[IEEE80211_NUM_ACS]; 329 + struct ath_acq acq[IEEE80211_NUM_ACS]; 332 330 int hw_queue_base; 333 331 334 332 /* do not dereference, use for comparison only */ ··· 569 555 570 556 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */ 571 557 558 + static inline void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq) 559 + { 560 + spin_lock_bh(&txq->axq_lock); 561 + } 562 + static inline void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq) 563 + { 564 + spin_unlock_bh(&txq->axq_lock); 565 + } 566 + 572 567 void ath_startrecv(struct ath_softc *sc); 573 568 bool ath_stoprecv(struct ath_softc *sc); 574 569 u32 ath_calcrxfilter(struct ath_softc *sc); ··· 585 562 void ath_rx_cleanup(struct ath_softc *sc); 586 563 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); 587 564 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); 588 - void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq); 589 - void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq); 590 565 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq); 591 566 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); 592 567 bool ath_drain_all_txq(struct ath_softc *sc); ··· 596 575 int ath_tx_init(struct ath_softc *sc, int nbufs); 597 576 int ath_txq_update(struct ath_softc *sc, int qnum, 598 577 struct ath9k_tx_queue_info *q); 578 + u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen, 579 + int width, int half_gi, bool shortPreamble); 599 580 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop); 600 581 void ath_assign_seq(struct ath_common *common, struct sk_buff *skb); 601 582 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, ··· 986 963 987 964 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */ 988 965 966 + #define AIRTIME_USE_TX BIT(0) 967 + #define AIRTIME_USE_RX BIT(1) 968 + #define AIRTIME_USE_NEW_QUEUES BIT(2) 969 + #define AIRTIME_ACTIVE(flags) (!!(flags & (AIRTIME_USE_TX|AIRTIME_USE_RX))) 970 + 989 971 struct ath_softc { 990 972 struct ieee80211_hw *hw; 991 973 struct device *dev; ··· 1032 1004 bool ps_idle; 1033 1005 short nbcnvifs; 1034 1006 unsigned long ps_usecount; 1007 + 1008 + u16 airtime_flags; /* AIRTIME_* */ 1035 1009 1036 1010 struct ath_rx rx; 1037 1011 struct ath_tx tx;
+10 -4
drivers/net/wireless/ath/ath9k/channel.c
··· 118 118 INIT_LIST_HEAD(&ctx->vifs); 119 119 ctx->txpower = ATH_TXPOWER_MAX; 120 120 ctx->flush_timeout = HZ / 5; /* 200ms */ 121 - for (j = 0; j < ARRAY_SIZE(ctx->acq); j++) 122 - INIT_LIST_HEAD(&ctx->acq[j]); 121 + for (j = 0; j < ARRAY_SIZE(ctx->acq); j++) { 122 + INIT_LIST_HEAD(&ctx->acq[j].acq_new); 123 + INIT_LIST_HEAD(&ctx->acq[j].acq_old); 124 + spin_lock_init(&ctx->acq[j].lock); 125 + } 123 126 } 124 127 } 125 128 ··· 1348 1345 ctx->txpower = ATH_TXPOWER_MAX; 1349 1346 cfg80211_chandef_create(&ctx->chandef, chan, NL80211_CHAN_HT20); 1350 1347 1351 - for (i = 0; i < ARRAY_SIZE(ctx->acq); i++) 1352 - INIT_LIST_HEAD(&ctx->acq[i]); 1348 + for (i = 0; i < ARRAY_SIZE(ctx->acq); i++) { 1349 + INIT_LIST_HEAD(&ctx->acq[i].acq_new); 1350 + INIT_LIST_HEAD(&ctx->acq[i].acq_old); 1351 + spin_lock_init(&ctx->acq[i].lock); 1352 + } 1353 1353 1354 1354 sc->offchannel.chan.offchannel = true; 1355 1355 }
+3
drivers/net/wireless/ath/ath9k/debug.c
··· 1399 1399 debugfs_create_file("tpc", S_IRUSR | S_IWUSR, 1400 1400 sc->debug.debugfs_phy, sc, &fops_tpc); 1401 1401 1402 + debugfs_create_u16("airtime_flags", S_IRUSR | S_IWUSR, 1403 + sc->debug.debugfs_phy, &sc->airtime_flags); 1404 + 1402 1405 return 0; 1403 1406 }
+13
drivers/net/wireless/ath/ath9k/debug.h
··· 221 221 } cck_stats[4]; 222 222 }; 223 223 224 + struct ath_airtime_stats { 225 + u32 rx_airtime; 226 + u32 tx_airtime; 227 + }; 228 + 224 229 #define ANT_MAIN 0 225 230 #define ANT_ALT 1 226 231 ··· 319 314 void ath_debug_rate_stats(struct ath_softc *sc, 320 315 struct ath_rx_status *rs, 321 316 struct sk_buff *skb); 317 + void ath_debug_airtime(struct ath_softc *sc, 318 + struct ath_node *an, 319 + u32 rx, u32 tx); 322 320 #else 323 321 static inline void ath_debug_rate_stats(struct ath_softc *sc, 324 322 struct ath_rx_status *rs, 325 323 struct sk_buff *skb) 324 + { 325 + } 326 + static inline void ath_debug_airtime(struct ath_softc *sc, 327 + struct ath_node *an, 328 + u32 rx, u32 tx) 326 329 { 327 330 } 328 331 #endif /* CONFIG_ATH9K_STATION_STATISTICS */
+54
drivers/net/wireless/ath/ath9k/debug_sta.c
··· 242 242 .llseek = default_llseek, 243 243 }; 244 244 245 + void ath_debug_airtime(struct ath_softc *sc, 246 + struct ath_node *an, 247 + u32 rx, 248 + u32 tx) 249 + { 250 + struct ath_airtime_stats *astats = &an->airtime_stats; 251 + 252 + astats->rx_airtime += rx; 253 + astats->tx_airtime += tx; 254 + } 255 + 256 + static ssize_t read_airtime(struct file *file, char __user *user_buf, 257 + size_t count, loff_t *ppos) 258 + { 259 + struct ath_node *an = file->private_data; 260 + struct ath_airtime_stats *astats; 261 + static const char *qname[4] = { 262 + "VO", "VI", "BE", "BK" 263 + }; 264 + u32 len = 0, size = 256; 265 + char *buf; 266 + size_t retval; 267 + int i; 268 + 269 + buf = kzalloc(size, GFP_KERNEL); 270 + if (buf == NULL) 271 + return -ENOMEM; 272 + 273 + astats = &an->airtime_stats; 274 + 275 + len += scnprintf(buf + len, size - len, "RX: %u us\n", astats->rx_airtime); 276 + len += scnprintf(buf + len, size - len, "TX: %u us\n", astats->tx_airtime); 277 + len += scnprintf(buf + len, size - len, "Deficit: "); 278 + for (i = 0; i < 4; i++) 279 + len += scnprintf(buf+len, size - len, "%s: %lld us ", qname[i], an->airtime_deficit[i]); 280 + if (len < size) 281 + buf[len++] = '\n'; 282 + 283 + retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); 284 + kfree(buf); 285 + 286 + return retval; 287 + } 288 + 289 + 290 + static const struct file_operations fops_airtime = { 291 + .read = read_airtime, 292 + .open = simple_open, 293 + .owner = THIS_MODULE, 294 + .llseek = default_llseek, 295 + }; 296 + 297 + 245 298 void ath9k_sta_add_debugfs(struct ieee80211_hw *hw, 246 299 struct ieee80211_vif *vif, 247 300 struct ieee80211_sta *sta, ··· 304 251 305 252 debugfs_create_file("node_aggr", S_IRUGO, dir, an, &fops_node_aggr); 306 253 debugfs_create_file("node_recv", S_IRUGO, dir, an, &fops_node_recv); 254 + debugfs_create_file("airtime", S_IRUGO, dir, an, &fops_airtime); 307 255 }
+26 -16
drivers/net/wireless/ath/ath9k/eeprom.c
··· 160 160 u16 magic; 161 161 u16 *eepdata; 162 162 int i; 163 + bool needs_byteswap = false; 163 164 struct ath_common *common = ath9k_hw_common(ah); 164 165 165 166 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) { ··· 168 167 return -EIO; 169 168 } 170 169 171 - *swap_needed = false; 172 170 if (swab16(magic) == AR5416_EEPROM_MAGIC) { 171 + needs_byteswap = true; 172 + ath_dbg(common, EEPROM, 173 + "EEPROM needs byte-swapping to correct endianness.\n"); 174 + } else if (magic != AR5416_EEPROM_MAGIC) { 175 + if (ath9k_hw_use_flash(ah)) { 176 + ath_dbg(common, EEPROM, 177 + "Ignoring invalid EEPROM magic (0x%04x).\n", 178 + magic); 179 + } else { 180 + ath_err(common, 181 + "Invalid EEPROM magic (0x%04x).\n", magic); 182 + return -EINVAL; 183 + } 184 + } 185 + 186 + if (needs_byteswap) { 173 187 if (ah->ah_flags & AH_NO_EEP_SWAP) { 174 188 ath_info(common, 175 189 "Ignoring endianness difference in EEPROM magic bytes.\n"); 176 190 } else { 177 - *swap_needed = true; 178 - } 179 - } else if (magic != AR5416_EEPROM_MAGIC) { 180 - if (ath9k_hw_use_flash(ah)) 181 - return 0; 191 + eepdata = (u16 *)(&ah->eeprom); 182 192 183 - ath_err(common, 184 - "Invalid EEPROM Magic (0x%04x).\n", magic); 185 - return -EINVAL; 193 + for (i = 0; i < size; i++) 194 + eepdata[i] = swab16(eepdata[i]); 195 + } 186 196 } 187 197 188 - eepdata = (u16 *)(&ah->eeprom); 189 - 190 - if (*swap_needed) { 198 + if (ah->eep_ops->get_eepmisc(ah) & AR5416_EEPMISC_BIG_ENDIAN) { 199 + *swap_needed = true; 191 200 ath_dbg(common, EEPROM, 192 - "EEPROM Endianness is not native.. Changing.\n"); 193 - 194 - for (i = 0; i < size; i++) 195 - eepdata[i] = swab16(eepdata[i]); 201 + "Big Endian EEPROM detected according to EEPMISC register.\n"); 202 + } else { 203 + *swap_needed = false; 196 204 } 197 205 198 206 return 0;
+49 -36
drivers/net/wireless/ath/ath9k/eeprom.h
··· 23 23 #include <net/cfg80211.h> 24 24 #include "ar9003_eeprom.h" 25 25 26 + /* helpers to swap EEPROM fields, which are stored as __le16 or __le32. Since 27 + * we are 100% sure about it we __force these to u16/u32 for the swab calls to 28 + * silence the sparse checks. These macros are used when we have a Big Endian 29 + * EEPROM (according to AR5416_EEPMISC_BIG_ENDIAN) and need to convert the 30 + * fields to __le16/__le32. 31 + */ 32 + #define EEPROM_FIELD_SWAB16(field) \ 33 + (field = (__force __le16)swab16((__force u16)field)) 34 + #define EEPROM_FIELD_SWAB32(field) \ 35 + (field = (__force __le32)swab32((__force u32)field)) 36 + 26 37 #ifdef __BIG_ENDIAN 27 38 #define AR5416_EEPROM_MAGIC 0x5aa5 28 39 #else ··· 110 99 #define FBIN2FREQ(x, y) ((y) ? (2300 + x) : (4800 + 5 * x)) 111 100 #define ath9k_hw_use_flash(_ah) (!(_ah->ah_flags & AH_USE_EEPROM)) 112 101 113 - #define AR5416_VER_MASK (eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) 114 102 #define OLC_FOR_AR9280_20_LATER (AR_SREV_9280_20_OR_LATER(ah) && \ 115 103 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)) 116 104 #define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_11_OR_LATER(ah) && \ ··· 131 121 132 122 #define AR5416_EEP_NO_BACK_VER 0x1 133 123 #define AR5416_EEP_VER 0xE 124 + #define AR5416_EEP_VER_MAJOR_SHIFT 12 125 + #define AR5416_EEP_VER_MAJOR_MASK 0xF000 134 126 #define AR5416_EEP_VER_MINOR_MASK 0x0FFF 135 127 #define AR5416_EEP_MINOR_VER_2 0x2 136 128 #define AR5416_EEP_MINOR_VER_3 0x3 ··· 173 161 #define AR5416_EEP_TXGAIN_ORIGINAL 0 174 162 #define AR5416_EEP_TXGAIN_HIGH_POWER 1 175 163 164 + /* Endianness of EEPROM content */ 165 + #define AR5416_EEPMISC_BIG_ENDIAN 0x01 166 + 176 167 #define AR5416_EEP4K_START_LOC 64 177 168 #define AR5416_EEP4K_NUM_2G_CAL_PIERS 3 178 169 #define AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS 3 ··· 189 174 #define AR9280_TX_GAIN_TABLE_SIZE 22 190 175 191 176 #define AR9287_EEP_VER 0xE 192 - #define AR9287_EEP_VER_MINOR_MASK 0xFFF 193 177 #define AR9287_EEP_MINOR_VER_1 0x1 194 178 #define AR9287_EEP_MINOR_VER_2 0x2 195 179 #define AR9287_EEP_MINOR_VER_3 0x3 ··· 205 191 #define AR9287_NUM_CTLS 12 206 192 #define AR9287_NUM_BAND_EDGES 4 207 193 #define AR9287_PD_GAIN_ICEPTS 1 208 - #define AR9287_EEPMISC_BIG_ENDIAN 0x01 209 194 #define AR9287_EEPMISC_WOW 0x02 210 195 #define AR9287_MAX_CHAINS 2 211 196 #define AR9287_ANT_16S 32 ··· 241 228 EEP_DB_5, 242 229 EEP_OB_2, 243 230 EEP_DB_2, 244 - EEP_MINOR_REV, 245 231 EEP_TX_MASK, 246 232 EEP_RX_MASK, 247 233 EEP_FSTCLK_5G, ··· 281 269 }; 282 270 283 271 struct base_eep_header { 284 - u16 length; 285 - u16 checksum; 286 - u16 version; 272 + __le16 length; 273 + __le16 checksum; 274 + __le16 version; 287 275 u8 opCapFlags; 288 276 u8 eepMisc; 289 - u16 regDmn[2]; 277 + __le16 regDmn[2]; 290 278 u8 macAddr[6]; 291 279 u8 rxMask; 292 280 u8 txMask; 293 - u16 rfSilent; 294 - u16 blueToothOptions; 295 - u16 deviceCap; 296 - u32 binBuildNumber; 281 + __le16 rfSilent; 282 + __le16 blueToothOptions; 283 + __le16 deviceCap; 284 + __le32 binBuildNumber; 297 285 u8 deviceType; 298 286 u8 pwdclkind; 299 287 u8 fastClk5g; ··· 311 299 } __packed; 312 300 313 301 struct base_eep_header_4k { 314 - u16 length; 315 - u16 checksum; 316 - u16 version; 302 + __le16 length; 303 + __le16 checksum; 304 + __le16 version; 317 305 u8 opCapFlags; 318 306 u8 eepMisc; 319 - u16 regDmn[2]; 307 + __le16 regDmn[2]; 320 308 u8 macAddr[6]; 321 309 u8 rxMask; 322 310 u8 txMask; 323 - u16 rfSilent; 324 - u16 blueToothOptions; 325 - u16 deviceCap; 326 - u32 binBuildNumber; 311 + __le16 rfSilent; 312 + __le16 blueToothOptions; 313 + __le16 deviceCap; 314 + __le32 binBuildNumber; 327 315 u8 deviceType; 328 316 u8 txGainType; 329 317 } __packed; 330 318 331 319 332 320 struct spur_chan { 333 - u16 spurChan; 321 + __le16 spurChan; 334 322 u8 spurRangeLow; 335 323 u8 spurRangeHigh; 336 324 } __packed; 337 325 338 326 struct modal_eep_header { 339 - u32 antCtrlChain[AR5416_MAX_CHAINS]; 340 - u32 antCtrlCommon; 327 + __le32 antCtrlChain[AR5416_MAX_CHAINS]; 328 + __le32 antCtrlCommon; 341 329 u8 antennaGainCh[AR5416_MAX_CHAINS]; 342 330 u8 switchSettling; 343 331 u8 txRxAttenCh[AR5416_MAX_CHAINS]; ··· 372 360 u8 db_ch1; 373 361 u8 lna_ctl; 374 362 u8 miscBits; 375 - u16 xpaBiasLvlFreq[3]; 363 + __le16 xpaBiasLvlFreq[3]; 376 364 u8 futureModal[6]; 377 365 378 366 struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS]; ··· 386 374 } __packed; 387 375 388 376 struct modal_eep_4k_header { 389 - u32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS]; 390 - u32 antCtrlCommon; 377 + __le32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS]; 378 + __le32 antCtrlCommon; 391 379 u8 antennaGainCh[AR5416_EEP4K_MAX_CHAINS]; 392 380 u8 switchSettling; 393 381 u8 txRxAttenCh[AR5416_EEP4K_MAX_CHAINS]; ··· 451 439 } __packed; 452 440 453 441 struct base_eep_ar9287_header { 454 - u16 length; 455 - u16 checksum; 456 - u16 version; 442 + __le16 length; 443 + __le16 checksum; 444 + __le16 version; 457 445 u8 opCapFlags; 458 446 u8 eepMisc; 459 - u16 regDmn[2]; 447 + __le16 regDmn[2]; 460 448 u8 macAddr[6]; 461 449 u8 rxMask; 462 450 u8 txMask; 463 - u16 rfSilent; 464 - u16 blueToothOptions; 465 - u16 deviceCap; 466 - u32 binBuildNumber; 451 + __le16 rfSilent; 452 + __le16 blueToothOptions; 453 + __le16 deviceCap; 454 + __le32 binBuildNumber; 467 455 u8 deviceType; 468 456 u8 openLoopPwrCntl; 469 457 int8_t pwrTableOffset; ··· 473 461 } __packed; 474 462 475 463 struct modal_eep_ar9287_header { 476 - u32 antCtrlChain[AR9287_MAX_CHAINS]; 477 - u32 antCtrlCommon; 464 + __le32 antCtrlChain[AR9287_MAX_CHAINS]; 465 + __le32 antCtrlCommon; 478 466 int8_t antennaGainCh[AR9287_MAX_CHAINS]; 479 467 u8 switchSettling; 480 468 u8 txRxAttenCh[AR9287_MAX_CHAINS]; ··· 665 653 u16 cfgCtl, u8 twiceAntennaReduction, 666 654 u8 powerLimit, bool test); 667 655 u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz); 656 + u8 (*get_eepmisc)(struct ath_hw *ah); 668 657 }; 669 658 670 659 void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val);
+55 -78
drivers/net/wireless/ath/ath9k/eeprom_4k.c
··· 20 20 21 21 static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah) 22 22 { 23 - return ((ah->eeprom.map4k.baseEepHeader.version >> 12) & 0xF); 23 + u16 version = le16_to_cpu(ah->eeprom.map4k.baseEepHeader.version); 24 + 25 + return (version & AR5416_EEP_VER_MAJOR_MASK) >> 26 + AR5416_EEP_VER_MAJOR_SHIFT; 24 27 } 25 28 26 29 static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah) 27 30 { 28 - return ((ah->eeprom.map4k.baseEepHeader.version) & 0xFFF); 31 + u16 version = le16_to_cpu(ah->eeprom.map4k.baseEepHeader.version); 32 + 33 + return version & AR5416_EEP_VER_MINOR_MASK; 29 34 } 30 35 31 36 #define SIZE_EEPROM_4K (sizeof(struct ar5416_eeprom_4k) / sizeof(u16)) ··· 76 71 static u32 ath9k_dump_4k_modal_eeprom(char *buf, u32 len, u32 size, 77 72 struct modal_eep_4k_header *modal_hdr) 78 73 { 79 - PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]); 80 - PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon); 74 + PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0])); 75 + PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon)); 81 76 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]); 82 77 PR_EEP("Switch Settle", modal_hdr->switchSettling); 83 78 PR_EEP("Chain0 TxRxAtten", modal_hdr->txRxAttenCh[0]); ··· 132 127 { 133 128 struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k; 134 129 struct base_eep_header_4k *pBase = &eep->baseEepHeader; 130 + u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber); 135 131 136 132 if (!dump_base_hdr) { 137 133 len += scnprintf(buf + len, size - len, ··· 142 136 goto out; 143 137 } 144 138 145 - PR_EEP("Major Version", pBase->version >> 12); 146 - PR_EEP("Minor Version", pBase->version & 0xFFF); 147 - PR_EEP("Checksum", pBase->checksum); 148 - PR_EEP("Length", pBase->length); 149 - PR_EEP("RegDomain1", pBase->regDmn[0]); 150 - PR_EEP("RegDomain2", pBase->regDmn[1]); 139 + PR_EEP("Major Version", ath9k_hw_4k_get_eeprom_ver(ah)); 140 + PR_EEP("Minor Version", ath9k_hw_4k_get_eeprom_rev(ah)); 141 + PR_EEP("Checksum", le16_to_cpu(pBase->checksum)); 142 + PR_EEP("Length", le16_to_cpu(pBase->length)); 143 + PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0])); 144 + PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1])); 151 145 PR_EEP("TX Mask", pBase->txMask); 152 146 PR_EEP("RX Mask", pBase->rxMask); 153 147 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); ··· 160 154 AR5416_OPFLAGS_N_5G_HT20)); 161 155 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & 162 156 AR5416_OPFLAGS_N_5G_HT40)); 163 - PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01)); 164 - PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF); 165 - PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF); 166 - PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF); 157 + PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN)); 158 + PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF); 159 + PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF); 160 + PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF); 167 161 PR_EEP("TX Gain type", pBase->txGainType); 168 162 169 163 len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress", ··· 195 189 return err; 196 190 197 191 if (need_swap) 198 - el = swab16(eep->baseEepHeader.length); 192 + el = swab16((__force u16)eep->baseEepHeader.length); 199 193 else 200 - el = eep->baseEepHeader.length; 194 + el = le16_to_cpu(eep->baseEepHeader.length); 201 195 202 196 el = min(el / sizeof(u16), SIZE_EEPROM_4K); 203 197 if (!ath9k_hw_nvram_validate_checksum(ah, el)) 204 198 return -EINVAL; 205 199 206 200 if (need_swap) { 207 - u32 integer; 208 - u16 word; 201 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.length); 202 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum); 203 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.version); 204 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]); 205 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]); 206 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent); 207 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions); 208 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap); 209 + EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlCommon); 209 210 210 - word = swab16(eep->baseEepHeader.length); 211 - eep->baseEepHeader.length = word; 211 + for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) 212 + EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlChain[i]); 212 213 213 - word = swab16(eep->baseEepHeader.checksum); 214 - eep->baseEepHeader.checksum = word; 215 - 216 - word = swab16(eep->baseEepHeader.version); 217 - eep->baseEepHeader.version = word; 218 - 219 - word = swab16(eep->baseEepHeader.regDmn[0]); 220 - eep->baseEepHeader.regDmn[0] = word; 221 - 222 - word = swab16(eep->baseEepHeader.regDmn[1]); 223 - eep->baseEepHeader.regDmn[1] = word; 224 - 225 - word = swab16(eep->baseEepHeader.rfSilent); 226 - eep->baseEepHeader.rfSilent = word; 227 - 228 - word = swab16(eep->baseEepHeader.blueToothOptions); 229 - eep->baseEepHeader.blueToothOptions = word; 230 - 231 - word = swab16(eep->baseEepHeader.deviceCap); 232 - eep->baseEepHeader.deviceCap = word; 233 - 234 - integer = swab32(eep->modalHeader.antCtrlCommon); 235 - eep->modalHeader.antCtrlCommon = integer; 236 - 237 - for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) { 238 - integer = swab32(eep->modalHeader.antCtrlChain[i]); 239 - eep->modalHeader.antCtrlChain[i] = integer; 240 - } 241 - 242 - for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) { 243 - word = swab16(eep->modalHeader.spurChans[i].spurChan); 244 - eep->modalHeader.spurChans[i].spurChan = word; 245 - } 214 + for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) 215 + EEPROM_FIELD_SWAB16( 216 + eep->modalHeader.spurChans[i].spurChan); 246 217 } 247 218 248 219 if (!ath9k_hw_nvram_check_version(ah, AR5416_EEP_VER, ··· 237 254 struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k; 238 255 struct modal_eep_4k_header *pModal = &eep->modalHeader; 239 256 struct base_eep_header_4k *pBase = &eep->baseEepHeader; 240 - u16 ver_minor; 241 - 242 - ver_minor = pBase->version & AR5416_EEP_VER_MINOR_MASK; 243 257 244 258 switch (param) { 245 259 case EEP_NFTHRESH_2: ··· 248 268 case EEP_MAC_MSW: 249 269 return get_unaligned_be16(pBase->macAddr + 4); 250 270 case EEP_REG_0: 251 - return pBase->regDmn[0]; 271 + return le16_to_cpu(pBase->regDmn[0]); 252 272 case EEP_OP_CAP: 253 - return pBase->deviceCap; 273 + return le16_to_cpu(pBase->deviceCap); 254 274 case EEP_OP_MODE: 255 275 return pBase->opCapFlags; 256 276 case EEP_RF_SILENT: 257 - return pBase->rfSilent; 277 + return le16_to_cpu(pBase->rfSilent); 258 278 case EEP_OB_2: 259 279 return pModal->ob_0; 260 280 case EEP_DB_2: 261 281 return pModal->db1_1; 262 - case EEP_MINOR_REV: 263 - return ver_minor; 264 282 case EEP_TX_MASK: 265 283 return pBase->txMask; 266 284 case EEP_RX_MASK: ··· 297 319 298 320 xpdMask = pEepData->modalHeader.xpdGain; 299 321 300 - if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >= 301 - AR5416_EEP_MINOR_VER_2) { 322 + if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) 302 323 pdGainOverlap_t2 = 303 324 pEepData->modalHeader.pdGainOverlap; 304 - } else { 325 + else 305 326 pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5), 306 327 AR_PHY_TPCRG5_PD_GAIN_OVERLAP)); 307 - } 308 328 309 329 pCalBChans = pEepData->calFreqPier2G; 310 330 numPiers = AR5416_EEP4K_NUM_2G_CAL_PIERS; ··· 588 612 589 613 memset(ratesArray, 0, sizeof(ratesArray)); 590 614 591 - if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >= 592 - AR5416_EEP_MINOR_VER_2) { 615 + if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) 593 616 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; 594 - } 595 617 596 618 ath9k_hw_set_4k_power_per_rate_table(ah, chan, 597 619 &ratesArray[0], cfgCtl, ··· 702 728 { 703 729 ENABLE_REG_RMW_BUFFER(ah); 704 730 REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 705 - pModal->antCtrlChain[0], 0); 731 + le32_to_cpu(pModal->antCtrlChain[0]), 0); 706 732 707 733 REG_RMW(ah, AR_PHY_TIMING_CTRL4(0), 708 734 SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) | 709 735 SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF), 710 736 AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF | AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF); 711 737 712 - if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >= 713 - AR5416_EEP_MINOR_VER_3) { 738 + if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) { 714 739 txRxAttenLocal = pModal->txRxAttenCh[0]; 715 740 716 741 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, ··· 768 795 pModal = &eep->modalHeader; 769 796 txRxAttenLocal = 23; 770 797 771 - REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon); 798 + REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon)); 772 799 773 800 /* Single chain for 4K EEPROM*/ 774 801 ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal); ··· 987 1014 REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62, 988 1015 pModal->thresh62); 989 1016 990 - if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >= 991 - AR5416_EEP_MINOR_VER_2) { 1017 + if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) { 992 1018 REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_DATA_START, 993 1019 pModal->txFrameToDataStart); 994 1020 REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON, 995 1021 pModal->txFrameToPaOn); 996 1022 } 997 1023 998 - if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >= 999 - AR5416_EEP_MINOR_VER_3) { 1024 + if (ath9k_hw_4k_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) { 1000 1025 if (IS_CHAN_HT40(chan)) 1001 1026 REG_RMW_FIELD(ah, AR_PHY_SETTLING, 1002 1027 AR_PHY_SETTLING_SWITCH, ··· 1032 1061 1033 1062 static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) 1034 1063 { 1035 - return ah->eeprom.map4k.modalHeader.spurChans[i].spurChan; 1064 + return le16_to_cpu(ah->eeprom.map4k.modalHeader.spurChans[i].spurChan); 1065 + } 1066 + 1067 + static u8 ath9k_hw_4k_get_eepmisc(struct ath_hw *ah) 1068 + { 1069 + return ah->eeprom.map4k.baseEepHeader.eepMisc; 1036 1070 } 1037 1071 1038 1072 const struct eeprom_ops eep_4k_ops = { ··· 1049 1073 .get_eeprom_rev = ath9k_hw_4k_get_eeprom_rev, 1050 1074 .set_board_values = ath9k_hw_4k_set_board_values, 1051 1075 .set_txpower = ath9k_hw_4k_set_txpower, 1052 - .get_spur_channel = ath9k_hw_4k_get_spur_channel 1076 + .get_spur_channel = ath9k_hw_4k_get_spur_channel, 1077 + .get_eepmisc = ath9k_hw_4k_get_eepmisc 1053 1078 };
+56 -69
drivers/net/wireless/ath/ath9k/eeprom_9287.c
··· 22 22 23 23 static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah) 24 24 { 25 - return (ah->eeprom.map9287.baseEepHeader.version >> 12) & 0xF; 25 + u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version); 26 + 27 + return (version & AR5416_EEP_VER_MAJOR_MASK) >> 28 + AR5416_EEP_VER_MAJOR_SHIFT; 26 29 } 27 30 28 31 static int ath9k_hw_ar9287_get_eeprom_rev(struct ath_hw *ah) 29 32 { 30 - return (ah->eeprom.map9287.baseEepHeader.version) & 0xFFF; 33 + u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version); 34 + 35 + return version & AR5416_EEP_VER_MINOR_MASK; 31 36 } 32 37 33 38 static bool __ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah) ··· 79 74 static u32 ar9287_dump_modal_eeprom(char *buf, u32 len, u32 size, 80 75 struct modal_eep_ar9287_header *modal_hdr) 81 76 { 82 - PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]); 83 - PR_EEP("Chain1 Ant. Control", modal_hdr->antCtrlChain[1]); 84 - PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon); 77 + PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0])); 78 + PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1])); 79 + PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon)); 85 80 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]); 86 81 PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]); 87 82 PR_EEP("Switch Settle", modal_hdr->switchSettling); ··· 128 123 { 129 124 struct ar9287_eeprom *eep = &ah->eeprom.map9287; 130 125 struct base_eep_ar9287_header *pBase = &eep->baseEepHeader; 126 + u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber); 131 127 132 128 if (!dump_base_hdr) { 133 129 len += scnprintf(buf + len, size - len, ··· 138 132 goto out; 139 133 } 140 134 141 - PR_EEP("Major Version", pBase->version >> 12); 142 - PR_EEP("Minor Version", pBase->version & 0xFFF); 143 - PR_EEP("Checksum", pBase->checksum); 144 - PR_EEP("Length", pBase->length); 145 - PR_EEP("RegDomain1", pBase->regDmn[0]); 146 - PR_EEP("RegDomain2", pBase->regDmn[1]); 135 + PR_EEP("Major Version", ath9k_hw_ar9287_get_eeprom_ver(ah)); 136 + PR_EEP("Minor Version", ath9k_hw_ar9287_get_eeprom_rev(ah)); 137 + PR_EEP("Checksum", le16_to_cpu(pBase->checksum)); 138 + PR_EEP("Length", le16_to_cpu(pBase->length)); 139 + PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0])); 140 + PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1])); 147 141 PR_EEP("TX Mask", pBase->txMask); 148 142 PR_EEP("RX Mask", pBase->rxMask); 149 143 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); ··· 156 150 AR5416_OPFLAGS_N_5G_HT20)); 157 151 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & 158 152 AR5416_OPFLAGS_N_5G_HT40)); 159 - PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01)); 160 - PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF); 161 - PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF); 162 - PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF); 153 + PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN)); 154 + PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF); 155 + PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF); 156 + PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF); 163 157 PR_EEP("Power Table Offset", pBase->pwrTableOffset); 164 158 PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl); 165 159 ··· 183 177 184 178 static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah) 185 179 { 186 - u32 el, integer; 187 - u16 word; 180 + u32 el; 188 181 int i, err; 189 182 bool need_swap; 190 183 struct ar9287_eeprom *eep = &ah->eeprom.map9287; ··· 193 188 return err; 194 189 195 190 if (need_swap) 196 - el = swab16(eep->baseEepHeader.length); 191 + el = swab16((__force u16)eep->baseEepHeader.length); 197 192 else 198 - el = eep->baseEepHeader.length; 193 + el = le16_to_cpu(eep->baseEepHeader.length); 199 194 200 195 el = min(el / sizeof(u16), SIZE_EEPROM_AR9287); 201 196 if (!ath9k_hw_nvram_validate_checksum(ah, el)) 202 197 return -EINVAL; 203 198 204 199 if (need_swap) { 205 - word = swab16(eep->baseEepHeader.length); 206 - eep->baseEepHeader.length = word; 200 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.length); 201 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum); 202 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.version); 203 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]); 204 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]); 205 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent); 206 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions); 207 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap); 208 + EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlCommon); 207 209 208 - word = swab16(eep->baseEepHeader.checksum); 209 - eep->baseEepHeader.checksum = word; 210 + for (i = 0; i < AR9287_MAX_CHAINS; i++) 211 + EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlChain[i]); 210 212 211 - word = swab16(eep->baseEepHeader.version); 212 - eep->baseEepHeader.version = word; 213 - 214 - word = swab16(eep->baseEepHeader.regDmn[0]); 215 - eep->baseEepHeader.regDmn[0] = word; 216 - 217 - word = swab16(eep->baseEepHeader.regDmn[1]); 218 - eep->baseEepHeader.regDmn[1] = word; 219 - 220 - word = swab16(eep->baseEepHeader.rfSilent); 221 - eep->baseEepHeader.rfSilent = word; 222 - 223 - word = swab16(eep->baseEepHeader.blueToothOptions); 224 - eep->baseEepHeader.blueToothOptions = word; 225 - 226 - word = swab16(eep->baseEepHeader.deviceCap); 227 - eep->baseEepHeader.deviceCap = word; 228 - 229 - integer = swab32(eep->modalHeader.antCtrlCommon); 230 - eep->modalHeader.antCtrlCommon = integer; 231 - 232 - for (i = 0; i < AR9287_MAX_CHAINS; i++) { 233 - integer = swab32(eep->modalHeader.antCtrlChain[i]); 234 - eep->modalHeader.antCtrlChain[i] = integer; 235 - } 236 - 237 - for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) { 238 - word = swab16(eep->modalHeader.spurChans[i].spurChan); 239 - eep->modalHeader.spurChans[i].spurChan = word; 240 - } 213 + for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) 214 + EEPROM_FIELD_SWAB16( 215 + eep->modalHeader.spurChans[i].spurChan); 241 216 } 242 217 243 218 if (!ath9k_hw_nvram_check_version(ah, AR9287_EEP_VER, ··· 235 250 struct ar9287_eeprom *eep = &ah->eeprom.map9287; 236 251 struct modal_eep_ar9287_header *pModal = &eep->modalHeader; 237 252 struct base_eep_ar9287_header *pBase = &eep->baseEepHeader; 238 - u16 ver_minor; 239 - 240 - ver_minor = pBase->version & AR9287_EEP_VER_MINOR_MASK; 253 + u16 ver_minor = ath9k_hw_ar9287_get_eeprom_rev(ah); 241 254 242 255 switch (param) { 243 256 case EEP_NFTHRESH_2: ··· 247 264 case EEP_MAC_MSW: 248 265 return get_unaligned_be16(pBase->macAddr + 4); 249 266 case EEP_REG_0: 250 - return pBase->regDmn[0]; 267 + return le16_to_cpu(pBase->regDmn[0]); 251 268 case EEP_OP_CAP: 252 - return pBase->deviceCap; 269 + return le16_to_cpu(pBase->deviceCap); 253 270 case EEP_OP_MODE: 254 271 return pBase->opCapFlags; 255 272 case EEP_RF_SILENT: 256 - return pBase->rfSilent; 257 - case EEP_MINOR_REV: 258 - return ver_minor; 273 + return le16_to_cpu(pBase->rfSilent); 259 274 case EEP_TX_MASK: 260 275 return pBase->txMask; 261 276 case EEP_RX_MASK: ··· 368 387 369 388 xpdMask = pEepData->modalHeader.xpdGain; 370 389 371 - if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >= 372 - AR9287_EEP_MINOR_VER_2) 390 + if (ath9k_hw_ar9287_get_eeprom_rev(ah) >= AR9287_EEP_MINOR_VER_2) 373 391 pdGainOverlap_t2 = pEepData->modalHeader.pdGainOverlap; 374 392 else 375 393 pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5), ··· 717 737 718 738 memset(ratesArray, 0, sizeof(ratesArray)); 719 739 720 - if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >= 721 - AR9287_EEP_MINOR_VER_2) 740 + if (ath9k_hw_ar9287_get_eeprom_rev(ah) >= AR9287_EEP_MINOR_VER_2) 722 741 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; 723 742 724 743 ath9k_hw_set_ar9287_power_per_rate_table(ah, chan, ··· 858 879 859 880 pModal = &eep->modalHeader; 860 881 861 - REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon); 882 + REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon)); 862 883 863 884 for (i = 0; i < AR9287_MAX_CHAINS; i++) { 864 885 regChainOffset = i * 0x1000; 865 886 866 887 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, 867 - pModal->antCtrlChain[i]); 888 + le32_to_cpu(pModal->antCtrlChain[i])); 868 889 869 890 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, 870 891 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) ··· 962 983 static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah, 963 984 u16 i, bool is2GHz) 964 985 { 965 - return ah->eeprom.map9287.modalHeader.spurChans[i].spurChan; 986 + __le16 spur_ch = ah->eeprom.map9287.modalHeader.spurChans[i].spurChan; 987 + 988 + return le16_to_cpu(spur_ch); 989 + } 990 + 991 + static u8 ath9k_hw_ar9287_get_eepmisc(struct ath_hw *ah) 992 + { 993 + return ah->eeprom.map9287.baseEepHeader.eepMisc; 966 994 } 967 995 968 996 const struct eeprom_ops eep_ar9287_ops = { ··· 981 995 .get_eeprom_rev = ath9k_hw_ar9287_get_eeprom_rev, 982 996 .set_board_values = ath9k_hw_ar9287_set_board_values, 983 997 .set_txpower = ath9k_hw_ar9287_set_txpower, 984 - .get_spur_channel = ath9k_hw_ar9287_get_spur_channel 998 + .get_spur_channel = ath9k_hw_ar9287_get_spur_channel, 999 + .get_eepmisc = ath9k_hw_ar9287_get_eepmisc 985 1000 };
+77 -86
drivers/net/wireless/ath/ath9k/eeprom_def.c
··· 79 79 80 80 static int ath9k_hw_def_get_eeprom_ver(struct ath_hw *ah) 81 81 { 82 - return ((ah->eeprom.def.baseEepHeader.version >> 12) & 0xF); 82 + u16 version = le16_to_cpu(ah->eeprom.def.baseEepHeader.version); 83 + 84 + return (version & AR5416_EEP_VER_MAJOR_MASK) >> 85 + AR5416_EEP_VER_MAJOR_SHIFT; 83 86 } 84 87 85 88 static int ath9k_hw_def_get_eeprom_rev(struct ath_hw *ah) 86 89 { 87 - return ((ah->eeprom.def.baseEepHeader.version) & 0xFFF); 90 + u16 version = le16_to_cpu(ah->eeprom.def.baseEepHeader.version); 91 + 92 + return version & AR5416_EEP_VER_MINOR_MASK; 88 93 } 89 94 90 95 #define SIZE_EEPROM_DEF (sizeof(struct ar5416_eeprom_def) / sizeof(u16)) ··· 135 130 static u32 ath9k_def_dump_modal_eeprom(char *buf, u32 len, u32 size, 136 131 struct modal_eep_header *modal_hdr) 137 132 { 138 - PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]); 139 - PR_EEP("Chain1 Ant. Control", modal_hdr->antCtrlChain[1]); 140 - PR_EEP("Chain2 Ant. Control", modal_hdr->antCtrlChain[2]); 141 - PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon); 133 + PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0])); 134 + PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1])); 135 + PR_EEP("Chain2 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[2])); 136 + PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon)); 142 137 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]); 143 138 PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]); 144 139 PR_EEP("Chain2 Ant. Gain", modal_hdr->antennaGainCh[2]); ··· 194 189 PR_EEP("Chain1 OutputBias", modal_hdr->ob_ch1); 195 190 PR_EEP("Chain1 DriverBias", modal_hdr->db_ch1); 196 191 PR_EEP("LNA Control", modal_hdr->lna_ctl); 197 - PR_EEP("XPA Bias Freq0", modal_hdr->xpaBiasLvlFreq[0]); 198 - PR_EEP("XPA Bias Freq1", modal_hdr->xpaBiasLvlFreq[1]); 199 - PR_EEP("XPA Bias Freq2", modal_hdr->xpaBiasLvlFreq[2]); 192 + PR_EEP("XPA Bias Freq0", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[0])); 193 + PR_EEP("XPA Bias Freq1", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[1])); 194 + PR_EEP("XPA Bias Freq2", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[2])); 200 195 201 196 return len; 202 197 } ··· 206 201 { 207 202 struct ar5416_eeprom_def *eep = &ah->eeprom.def; 208 203 struct base_eep_header *pBase = &eep->baseEepHeader; 204 + u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber); 209 205 210 206 if (!dump_base_hdr) { 211 207 len += scnprintf(buf + len, size - len, ··· 220 214 goto out; 221 215 } 222 216 223 - PR_EEP("Major Version", pBase->version >> 12); 224 - PR_EEP("Minor Version", pBase->version & 0xFFF); 225 - PR_EEP("Checksum", pBase->checksum); 226 - PR_EEP("Length", pBase->length); 227 - PR_EEP("RegDomain1", pBase->regDmn[0]); 228 - PR_EEP("RegDomain2", pBase->regDmn[1]); 217 + PR_EEP("Major Version", ath9k_hw_def_get_eeprom_ver(ah)); 218 + PR_EEP("Minor Version", ath9k_hw_def_get_eeprom_rev(ah)); 219 + PR_EEP("Checksum", le16_to_cpu(pBase->checksum)); 220 + PR_EEP("Length", le16_to_cpu(pBase->length)); 221 + PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0])); 222 + PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1])); 229 223 PR_EEP("TX Mask", pBase->txMask); 230 224 PR_EEP("RX Mask", pBase->rxMask); 231 225 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); ··· 238 232 AR5416_OPFLAGS_N_5G_HT20)); 239 233 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & 240 234 AR5416_OPFLAGS_N_5G_HT40)); 241 - PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01)); 242 - PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF); 243 - PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF); 244 - PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF); 235 + PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN)); 236 + PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF); 237 + PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF); 238 + PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF); 245 239 PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl); 246 240 247 241 len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress", ··· 274 268 return err; 275 269 276 270 if (need_swap) 277 - el = swab16(eep->baseEepHeader.length); 271 + el = swab16((__force u16)eep->baseEepHeader.length); 278 272 else 279 - el = eep->baseEepHeader.length; 273 + el = le16_to_cpu(eep->baseEepHeader.length); 280 274 281 275 el = min(el / sizeof(u16), SIZE_EEPROM_DEF); 282 276 if (!ath9k_hw_nvram_validate_checksum(ah, el)) 283 277 return -EINVAL; 284 278 285 279 if (need_swap) { 286 - u32 integer, j; 287 - u16 word; 280 + u32 j; 288 281 289 - word = swab16(eep->baseEepHeader.length); 290 - eep->baseEepHeader.length = word; 291 - 292 - word = swab16(eep->baseEepHeader.checksum); 293 - eep->baseEepHeader.checksum = word; 294 - 295 - word = swab16(eep->baseEepHeader.version); 296 - eep->baseEepHeader.version = word; 297 - 298 - word = swab16(eep->baseEepHeader.regDmn[0]); 299 - eep->baseEepHeader.regDmn[0] = word; 300 - 301 - word = swab16(eep->baseEepHeader.regDmn[1]); 302 - eep->baseEepHeader.regDmn[1] = word; 303 - 304 - word = swab16(eep->baseEepHeader.rfSilent); 305 - eep->baseEepHeader.rfSilent = word; 306 - 307 - word = swab16(eep->baseEepHeader.blueToothOptions); 308 - eep->baseEepHeader.blueToothOptions = word; 309 - 310 - word = swab16(eep->baseEepHeader.deviceCap); 311 - eep->baseEepHeader.deviceCap = word; 282 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.length); 283 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum); 284 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.version); 285 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]); 286 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]); 287 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent); 288 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions); 289 + EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap); 312 290 313 291 for (j = 0; j < ARRAY_SIZE(eep->modalHeader); j++) { 314 292 struct modal_eep_header *pModal = 315 293 &eep->modalHeader[j]; 316 - integer = swab32(pModal->antCtrlCommon); 317 - pModal->antCtrlCommon = integer; 294 + EEPROM_FIELD_SWAB32(pModal->antCtrlCommon); 318 295 319 - for (i = 0; i < AR5416_MAX_CHAINS; i++) { 320 - integer = swab32(pModal->antCtrlChain[i]); 321 - pModal->antCtrlChain[i] = integer; 322 - } 323 - for (i = 0; i < 3; i++) { 324 - word = swab16(pModal->xpaBiasLvlFreq[i]); 325 - pModal->xpaBiasLvlFreq[i] = word; 326 - } 296 + for (i = 0; i < AR5416_MAX_CHAINS; i++) 297 + EEPROM_FIELD_SWAB32(pModal->antCtrlChain[i]); 327 298 328 - for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) { 329 - word = swab16(pModal->spurChans[i].spurChan); 330 - pModal->spurChans[i].spurChan = word; 331 - } 299 + for (i = 0; i < 3; i++) 300 + EEPROM_FIELD_SWAB16(pModal->xpaBiasLvlFreq[i]); 301 + 302 + for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) 303 + EEPROM_FIELD_SWAB16( 304 + pModal->spurChans[i].spurChan); 332 305 } 333 306 } 334 307 ··· 317 332 318 333 /* Enable fixup for AR_AN_TOP2 if necessary */ 319 334 if ((ah->hw_version.devid == AR9280_DEVID_PCI) && 320 - ((eep->baseEepHeader.version & 0xff) > 0x0a) && 335 + ((le16_to_cpu(eep->baseEepHeader.version) & 0xff) > 0x0a) && 321 336 (eep->baseEepHeader.pwdclkind == 0)) 322 337 ah->need_an_top2_fixup = true; 323 338 ··· 350 365 case EEP_MAC_MSW: 351 366 return get_unaligned_be16(pBase->macAddr + 4); 352 367 case EEP_REG_0: 353 - return pBase->regDmn[0]; 368 + return le16_to_cpu(pBase->regDmn[0]); 354 369 case EEP_OP_CAP: 355 - return pBase->deviceCap; 370 + return le16_to_cpu(pBase->deviceCap); 356 371 case EEP_OP_MODE: 357 372 return pBase->opCapFlags; 358 373 case EEP_RF_SILENT: 359 - return pBase->rfSilent; 374 + return le16_to_cpu(pBase->rfSilent); 360 375 case EEP_OB_5: 361 376 return pModal[0].ob; 362 377 case EEP_DB_5: ··· 365 380 return pModal[1].ob; 366 381 case EEP_DB_2: 367 382 return pModal[1].db; 368 - case EEP_MINOR_REV: 369 - return AR5416_VER_MASK; 370 383 case EEP_TX_MASK: 371 384 return pBase->txMask; 372 385 case EEP_RX_MASK: ··· 376 393 case EEP_TXGAIN_TYPE: 377 394 return pBase->txGainType; 378 395 case EEP_OL_PWRCTRL: 379 - if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19) 396 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19) 380 397 return pBase->openLoopPwrCntl ? true : false; 381 398 else 382 399 return false; 383 400 case EEP_RC_CHAIN_MASK: 384 - if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19) 401 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19) 385 402 return pBase->rcChainMask; 386 403 else 387 404 return 0; 388 405 case EEP_DAC_HPWR_5G: 389 - if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_20) 406 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_20) 390 407 return pBase->dacHiPwrMode_5G; 391 408 else 392 409 return 0; 393 410 case EEP_FRAC_N_5G: 394 - if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_22) 411 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_22) 395 412 return pBase->frac_n_5g; 396 413 else 397 414 return 0; 398 415 case EEP_PWR_TABLE_OFFSET: 399 - if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_21) 416 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_21) 400 417 return pBase->pwr_table_offset; 401 418 else 402 419 return AR5416_PWR_TABLE_OFFSET_DB; ··· 419 436 u8 txRxAttenLocal, int regChainOffset, int i) 420 437 { 421 438 ENABLE_REG_RMW_BUFFER(ah); 422 - if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) { 439 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) { 423 440 txRxAttenLocal = pModal->txRxAttenCh[i]; 424 441 425 442 if (AR_SREV_9280_20_OR_LATER(ah)) { ··· 470 487 struct ar5416_eeprom_def *eep = &ah->eeprom.def; 471 488 int i, regChainOffset; 472 489 u8 txRxAttenLocal; 490 + u32 antCtrlCommon; 473 491 474 492 pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]); 475 493 txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44; 494 + antCtrlCommon = le32_to_cpu(pModal->antCtrlCommon); 476 495 477 - REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon & 0xffff); 496 + REG_WRITE(ah, AR_PHY_SWITCH_COM, antCtrlCommon & 0xffff); 478 497 479 498 for (i = 0; i < AR5416_MAX_CHAINS; i++) { 480 499 if (AR_SREV_9280(ah)) { ··· 490 505 regChainOffset = i * 0x1000; 491 506 492 507 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, 493 - pModal->antCtrlChain[i]); 508 + le32_to_cpu(pModal->antCtrlChain[i])); 494 509 495 510 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, 496 511 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) & ··· 590 605 pModal->thresh62); 591 606 } 592 607 593 - if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_2) { 608 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) { 594 609 REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, 595 610 AR_PHY_TX_END_DATA_START, 596 611 pModal->txFrameToDataStart); ··· 598 613 pModal->txFrameToPaOn); 599 614 } 600 615 601 - if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) { 616 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_3) { 602 617 if (IS_CHAN_HT40(chan)) 603 618 REG_RMW_FIELD(ah, AR_PHY_SETTLING, 604 619 AR_PHY_SETTLING_SWITCH, ··· 606 621 } 607 622 608 623 if (AR_SREV_9280_20_OR_LATER(ah) && 609 - AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19) 624 + ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_19) 610 625 REG_RMW_FIELD(ah, AR_PHY_CCK_TX_CTRL, 611 626 AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK, 612 627 pModal->miscBits); 613 628 614 629 615 - if (AR_SREV_9280_20(ah) && AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_20) { 630 + if (AR_SREV_9280_20(ah) && 631 + ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_20) { 616 632 if (IS_CHAN_2GHZ(chan)) 617 633 REG_RMW_FIELD(ah, AR_AN_TOP1, AR_AN_TOP1_DACIPMODE, 618 634 eep->baseEepHeader.dacLpMode); ··· 637 651 static void ath9k_hw_def_set_addac(struct ath_hw *ah, 638 652 struct ath9k_channel *chan) 639 653 { 640 - #define XPA_LVL_FREQ(cnt) (pModal->xpaBiasLvlFreq[cnt]) 654 + #define XPA_LVL_FREQ(cnt) (le16_to_cpu(pModal->xpaBiasLvlFreq[cnt])) 641 655 struct modal_eep_header *pModal; 642 656 struct ar5416_eeprom_def *eep = &ah->eeprom.def; 643 657 u8 biaslevel; ··· 784 798 785 799 pwr_table_offset = ah->eep_ops->get_eeprom(ah, EEP_PWR_TABLE_OFFSET); 786 800 787 - if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >= 788 - AR5416_EEP_MINOR_VER_2) { 801 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) { 789 802 pdGainOverlap_t2 = 790 803 pEepData->modalHeader[modalIdx].pdGainOverlap; 791 804 } else { ··· 1156 1171 1157 1172 memset(ratesArray, 0, sizeof(ratesArray)); 1158 1173 1159 - if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >= 1160 - AR5416_EEP_MINOR_VER_2) { 1174 + if (ath9k_hw_def_get_eeprom_rev(ah) >= AR5416_EEP_MINOR_VER_2) 1161 1175 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; 1162 - } 1163 1176 1164 1177 ath9k_hw_set_def_power_per_rate_table(ah, chan, 1165 1178 &ratesArray[0], cfgCtl, ··· 1297 1314 1298 1315 static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) 1299 1316 { 1300 - return ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan; 1317 + __le16 spch = ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan; 1318 + 1319 + return le16_to_cpu(spch); 1320 + } 1321 + 1322 + static u8 ath9k_hw_def_get_eepmisc(struct ath_hw *ah) 1323 + { 1324 + return ah->eeprom.def.baseEepHeader.eepMisc; 1301 1325 } 1302 1326 1303 1327 const struct eeprom_ops eep_def_ops = { ··· 1317 1327 .set_board_values = ath9k_hw_def_set_board_values, 1318 1328 .set_addac = ath9k_hw_def_set_addac, 1319 1329 .set_txpower = ath9k_hw_def_set_txpower, 1320 - .get_spur_channel = ath9k_hw_def_get_spur_channel 1330 + .get_spur_channel = ath9k_hw_def_get_spur_channel, 1331 + .get_eepmisc = ath9k_hw_def_get_eepmisc 1321 1332 };
+2
drivers/net/wireless/ath/ath9k/init.c
··· 620 620 621 621 /* Will be cleared in ath9k_start() */ 622 622 set_bit(ATH_OP_INVALID, &common->op_flags); 623 + sc->airtime_flags = (AIRTIME_USE_TX | AIRTIME_USE_RX | 624 + AIRTIME_USE_NEW_QUEUES); 623 625 624 626 sc->sc_ah = ah; 625 627 sc->dfs_detector = dfs_pattern_detector_init(common, NL80211_DFS_UNSET);
+3 -3
drivers/net/wireless/ath/ath9k/main.c
··· 70 70 goto out; 71 71 72 72 if (txq->mac80211_qnum >= 0) { 73 - struct list_head *list; 73 + struct ath_acq *acq; 74 74 75 - list = &sc->cur_chan->acq[txq->mac80211_qnum]; 76 - if (!list_empty(list)) 75 + acq = &sc->cur_chan->acq[txq->mac80211_qnum]; 76 + if (!list_empty(&acq->acq_new) || !list_empty(&acq->acq_old)) 77 77 pending = true; 78 78 } 79 79 out:
+65
drivers/net/wireless/ath/ath9k/recv.c
··· 1002 1002 } 1003 1003 } 1004 1004 1005 + static void ath_rx_count_airtime(struct ath_softc *sc, 1006 + struct ath_rx_status *rs, 1007 + struct sk_buff *skb) 1008 + { 1009 + struct ath_node *an; 1010 + struct ath_acq *acq; 1011 + struct ath_vif *avp; 1012 + struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 1013 + struct ath_hw *ah = sc->sc_ah; 1014 + struct ath_common *common = ath9k_hw_common(ah); 1015 + struct ieee80211_sta *sta; 1016 + struct ieee80211_rx_status *rxs; 1017 + const struct ieee80211_rate *rate; 1018 + bool is_sgi, is_40, is_sp; 1019 + int phy; 1020 + u16 len = rs->rs_datalen; 1021 + u32 airtime = 0; 1022 + u8 tidno, acno; 1023 + 1024 + if (!ieee80211_is_data(hdr->frame_control)) 1025 + return; 1026 + 1027 + rcu_read_lock(); 1028 + 1029 + sta = ieee80211_find_sta_by_ifaddr(sc->hw, hdr->addr2, NULL); 1030 + if (!sta) 1031 + goto exit; 1032 + an = (struct ath_node *) sta->drv_priv; 1033 + avp = (struct ath_vif *) an->vif->drv_priv; 1034 + tidno = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 1035 + acno = TID_TO_WME_AC(tidno); 1036 + acq = &avp->chanctx->acq[acno]; 1037 + 1038 + rxs = IEEE80211_SKB_RXCB(skb); 1039 + 1040 + is_sgi = !!(rxs->flag & RX_FLAG_SHORT_GI); 1041 + is_40 = !!(rxs->flag & RX_FLAG_40MHZ); 1042 + is_sp = !!(rxs->flag & RX_FLAG_SHORTPRE); 1043 + 1044 + if (!!(rxs->flag & RX_FLAG_HT)) { 1045 + /* MCS rates */ 1046 + 1047 + airtime += ath_pkt_duration(sc, rxs->rate_idx, len, 1048 + is_40, is_sgi, is_sp); 1049 + } else { 1050 + 1051 + phy = IS_CCK_RATE(rs->rs_rate) ? WLAN_RC_PHY_CCK : WLAN_RC_PHY_OFDM; 1052 + rate = &common->sbands[rxs->band].bitrates[rxs->rate_idx]; 1053 + airtime += ath9k_hw_computetxtime(ah, phy, rate->bitrate * 100, 1054 + len, rxs->rate_idx, is_sp); 1055 + } 1056 + 1057 + if (!!(sc->airtime_flags & AIRTIME_USE_RX)) { 1058 + spin_lock_bh(&acq->lock); 1059 + an->airtime_deficit[acno] -= airtime; 1060 + if (an->airtime_deficit[acno] <= 0) 1061 + __ath_tx_queue_tid(sc, ATH_AN_2_TID(an, tidno)); 1062 + spin_unlock_bh(&acq->lock); 1063 + } 1064 + ath_debug_airtime(sc, an, airtime, 0); 1065 + exit: 1066 + rcu_read_unlock(); 1067 + } 1068 + 1005 1069 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) 1006 1070 { 1007 1071 struct ath_rxbuf *bf; ··· 1212 1148 ath9k_antenna_check(sc, &rs); 1213 1149 ath9k_apply_ampdu_details(sc, &rs, rxs); 1214 1150 ath_debug_rate_stats(sc, &rs, skb); 1151 + ath_rx_count_airtime(sc, &rs, skb); 1215 1152 1216 1153 hdr = (struct ieee80211_hdr *)skb->data; 1217 1154 if (ieee80211_is_ack(hdr->frame_control))
+135 -65
drivers/net/wireless/ath/ath9k/xmit.c
··· 97 97 dev_kfree_skb(skb); 98 98 } 99 99 100 - void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq) 101 - __acquires(&txq->axq_lock) 102 - { 103 - spin_lock_bh(&txq->axq_lock); 104 - } 105 - 106 - void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq) 107 - __releases(&txq->axq_lock) 108 - { 109 - spin_unlock_bh(&txq->axq_lock); 110 - } 111 - 112 100 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq) 113 101 __releases(&txq->axq_lock) 114 102 { ··· 112 124 ath_tx_status(hw, skb); 113 125 } 114 126 115 - static void ath_tx_queue_tid(struct ath_softc *sc, struct ath_txq *txq, 116 - struct ath_atx_tid *tid) 127 + void __ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid) 117 128 { 118 - struct list_head *list; 119 129 struct ath_vif *avp = (struct ath_vif *) tid->an->vif->drv_priv; 120 130 struct ath_chanctx *ctx = avp->chanctx; 131 + struct ath_acq *acq; 132 + struct list_head *tid_list; 133 + u8 acno = TID_TO_WME_AC(tid->tidno); 121 134 122 - if (!ctx) 135 + if (!ctx || !list_empty(&tid->list)) 123 136 return; 124 137 125 - list = &ctx->acq[TID_TO_WME_AC(tid->tidno)]; 126 - if (list_empty(&tid->list)) 127 - list_add_tail(&tid->list, list); 138 + 139 + acq = &ctx->acq[acno]; 140 + if ((sc->airtime_flags & AIRTIME_USE_NEW_QUEUES) && 141 + tid->an->airtime_deficit[acno] > 0) 142 + tid_list = &acq->acq_new; 143 + else 144 + tid_list = &acq->acq_old; 145 + 146 + list_add_tail(&tid->list, tid_list); 128 147 } 148 + 149 + void ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid) 150 + { 151 + struct ath_vif *avp = (struct ath_vif *) tid->an->vif->drv_priv; 152 + struct ath_chanctx *ctx = avp->chanctx; 153 + struct ath_acq *acq; 154 + 155 + if (!ctx || !list_empty(&tid->list)) 156 + return; 157 + 158 + acq = &ctx->acq[TID_TO_WME_AC(tid->tidno)]; 159 + spin_lock_bh(&acq->lock); 160 + __ath_tx_queue_tid(sc, tid); 161 + spin_unlock_bh(&acq->lock); 162 + } 163 + 129 164 130 165 void ath9k_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *queue) 131 166 { ··· 164 153 ath_txq_lock(sc, txq); 165 154 166 155 tid->has_queued = true; 167 - ath_tx_queue_tid(sc, txq, tid); 156 + ath_tx_queue_tid(sc, tid); 168 157 ath_txq_schedule(sc, txq); 169 158 170 159 ath_txq_unlock(sc, txq); ··· 671 660 672 661 skb_queue_splice_tail(&bf_pending, &tid->retry_q); 673 662 if (!an->sleeping) { 674 - ath_tx_queue_tid(sc, txq, tid); 663 + ath_tx_queue_tid(sc, tid); 675 664 676 665 if (ts->ts_status & (ATH9K_TXERR_FILT | ATH9K_TXERR_XRETRY)) 677 666 tid->clear_ps_filter = true; ··· 699 688 return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE); 700 689 } 701 690 691 + static void ath_tx_count_airtime(struct ath_softc *sc, struct ath_txq *txq, 692 + struct ath_buf *bf, struct ath_tx_status *ts) 693 + { 694 + struct ath_node *an; 695 + struct ath_acq *acq = &sc->cur_chan->acq[txq->mac80211_qnum]; 696 + struct sk_buff *skb; 697 + struct ieee80211_hdr *hdr; 698 + struct ieee80211_hw *hw = sc->hw; 699 + struct ieee80211_tx_rate rates[4]; 700 + struct ieee80211_sta *sta; 701 + int i; 702 + u32 airtime = 0; 703 + 704 + skb = bf->bf_mpdu; 705 + if(!skb) 706 + return; 707 + 708 + hdr = (struct ieee80211_hdr *)skb->data; 709 + memcpy(rates, bf->rates, sizeof(rates)); 710 + 711 + rcu_read_lock(); 712 + 713 + sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr1, hdr->addr2); 714 + if(!sta) 715 + goto exit; 716 + 717 + 718 + an = (struct ath_node *) sta->drv_priv; 719 + 720 + airtime += ts->duration * (ts->ts_longretry + 1); 721 + 722 + for(i=0; i < ts->ts_rateindex; i++) 723 + airtime += ath9k_hw_get_duration(sc->sc_ah, bf->bf_desc, i) * rates[i].count; 724 + 725 + if (!!(sc->airtime_flags & AIRTIME_USE_TX)) { 726 + spin_lock_bh(&acq->lock); 727 + an->airtime_deficit[txq->mac80211_qnum] -= airtime; 728 + if (an->airtime_deficit[txq->mac80211_qnum] <= 0) 729 + __ath_tx_queue_tid(sc, ath_get_skb_tid(sc, an, skb)); 730 + spin_unlock_bh(&acq->lock); 731 + } 732 + ath_debug_airtime(sc, an, 0, airtime); 733 + 734 + exit: 735 + rcu_read_unlock(); 736 + } 737 + 702 738 static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq, 703 739 struct ath_tx_status *ts, struct ath_buf *bf, 704 740 struct list_head *bf_head) ··· 767 709 768 710 ts->duration = ath9k_hw_get_duration(sc->sc_ah, bf->bf_desc, 769 711 ts->ts_rateindex); 712 + ath_tx_count_airtime(sc, txq, bf, ts); 770 713 771 714 hdr = (struct ieee80211_hdr *) bf->bf_mpdu->data; 772 715 sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr1, hdr->addr2); ··· 1127 1068 * width - 0 for 20 MHz, 1 for 40 MHz 1128 1069 * half_gi - to use 4us v/s 3.6 us for symbol time 1129 1070 */ 1130 - static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen, 1131 - int width, int half_gi, bool shortPreamble) 1071 + u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen, 1072 + int width, int half_gi, bool shortPreamble) 1132 1073 { 1133 1074 u32 nbits, nsymbits, duration, nsymbols; 1134 1075 int streams; ··· 1210 1151 if (is_40) { 1211 1152 u8 power_ht40delta; 1212 1153 struct ar5416_eeprom_def *eep = &ah->eeprom.def; 1154 + u16 eeprom_rev = ah->eep_ops->get_eeprom_rev(ah); 1213 1155 1214 - if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_2) { 1156 + if (eeprom_rev >= AR5416_EEP_MINOR_VER_2) { 1215 1157 bool is_2ghz; 1216 1158 struct modal_eep_header *pmodal; 1217 1159 ··· 1527 1467 } 1528 1468 1529 1469 static bool ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq, 1530 - struct ath_atx_tid *tid, bool *stop) 1470 + struct ath_atx_tid *tid) 1531 1471 { 1532 1472 struct ath_buf *bf; 1533 1473 struct ieee80211_tx_info *tx_info; ··· 1549 1489 if ((aggr && txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH) || 1550 1490 (!aggr && txq->axq_depth >= ATH_NON_AGGR_MIN_QDEPTH)) { 1551 1491 __skb_queue_tail(&tid->retry_q, bf->bf_mpdu); 1552 - *stop = true; 1553 1492 return false; 1554 1493 } 1555 1494 ··· 1672 1613 ath_txq_lock(sc, txq); 1673 1614 tid->clear_ps_filter = true; 1674 1615 if (ath_tid_has_buffered(tid)) { 1675 - ath_tx_queue_tid(sc, txq, tid); 1616 + ath_tx_queue_tid(sc, tid); 1676 1617 ath_txq_schedule(sc, txq); 1677 1618 } 1678 1619 ath_txq_unlock_complete(sc, txq); ··· 1971 1912 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq) 1972 1913 { 1973 1914 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1974 - struct ath_atx_tid *tid, *last_tid; 1915 + struct ath_atx_tid *tid; 1975 1916 struct list_head *tid_list; 1976 - bool sent = false; 1917 + struct ath_acq *acq; 1918 + bool active = AIRTIME_ACTIVE(sc->airtime_flags); 1977 1919 1978 1920 if (txq->mac80211_qnum < 0) 1979 1921 return; ··· 1983 1923 return; 1984 1924 1985 1925 spin_lock_bh(&sc->chan_lock); 1986 - tid_list = &sc->cur_chan->acq[txq->mac80211_qnum]; 1987 - 1988 - if (list_empty(tid_list)) { 1989 - spin_unlock_bh(&sc->chan_lock); 1990 - return; 1991 - } 1992 - 1993 1926 rcu_read_lock(); 1927 + acq = &sc->cur_chan->acq[txq->mac80211_qnum]; 1994 1928 1995 - last_tid = list_entry(tid_list->prev, struct ath_atx_tid, list); 1996 - while (!list_empty(tid_list)) { 1997 - bool stop = false; 1929 + if (sc->cur_chan->stopped) 1930 + goto out; 1998 1931 1999 - if (sc->cur_chan->stopped) 2000 - break; 1932 + begin: 1933 + tid_list = &acq->acq_new; 1934 + if (list_empty(tid_list)) { 1935 + tid_list = &acq->acq_old; 1936 + if (list_empty(tid_list)) 1937 + goto out; 1938 + } 1939 + tid = list_first_entry(tid_list, struct ath_atx_tid, list); 2001 1940 2002 - tid = list_first_entry(tid_list, struct ath_atx_tid, list); 2003 - list_del_init(&tid->list); 2004 - 2005 - if (ath_tx_sched_aggr(sc, txq, tid, &stop)) 2006 - sent = true; 2007 - 2008 - /* 2009 - * add tid to round-robin queue if more frames 2010 - * are pending for the tid 2011 - */ 2012 - if (ath_tid_has_buffered(tid)) 2013 - ath_tx_queue_tid(sc, txq, tid); 2014 - 2015 - if (stop) 2016 - break; 2017 - 2018 - if (tid == last_tid) { 2019 - if (!sent) 2020 - break; 2021 - 2022 - sent = false; 2023 - last_tid = list_entry(tid_list->prev, 2024 - struct ath_atx_tid, list); 2025 - } 1941 + if (active && tid->an->airtime_deficit[txq->mac80211_qnum] <= 0) { 1942 + spin_lock_bh(&acq->lock); 1943 + tid->an->airtime_deficit[txq->mac80211_qnum] += ATH_AIRTIME_QUANTUM; 1944 + list_move_tail(&tid->list, &acq->acq_old); 1945 + spin_unlock_bh(&acq->lock); 1946 + goto begin; 2026 1947 } 2027 1948 1949 + if (!ath_tid_has_buffered(tid)) { 1950 + spin_lock_bh(&acq->lock); 1951 + if ((tid_list == &acq->acq_new) && !list_empty(&acq->acq_old)) 1952 + list_move_tail(&tid->list, &acq->acq_old); 1953 + else { 1954 + list_del_init(&tid->list); 1955 + } 1956 + spin_unlock_bh(&acq->lock); 1957 + goto begin; 1958 + } 1959 + 1960 + 1961 + /* 1962 + * If we succeed in scheduling something, immediately restart to make 1963 + * sure we keep the HW busy. 1964 + */ 1965 + if(ath_tx_sched_aggr(sc, txq, tid)) { 1966 + if (!active) { 1967 + spin_lock_bh(&acq->lock); 1968 + list_move_tail(&tid->list, &acq->acq_old); 1969 + spin_unlock_bh(&acq->lock); 1970 + } 1971 + goto begin; 1972 + } 1973 + 1974 + out: 2028 1975 rcu_read_unlock(); 2029 1976 spin_unlock_bh(&sc->chan_lock); 2030 1977 } ··· 2884 2817 { 2885 2818 struct ath_atx_tid *tid; 2886 2819 int tidno, acno; 2820 + 2821 + for (acno = 0; acno < IEEE80211_NUM_ACS; acno++) 2822 + an->airtime_deficit[acno] = ATH_AIRTIME_QUANTUM; 2887 2823 2888 2824 for (tidno = 0; tidno < IEEE80211_NUM_TIDS; tidno++) { 2889 2825 tid = ath_node_to_tid(an, tidno);
+2 -2
drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
··· 3971 3971 pval |= AES_ENABLED; 3972 3972 break; 3973 3973 default: 3974 - brcmf_err("Ivalid unicast security info\n"); 3974 + brcmf_err("Invalid unicast security info\n"); 3975 3975 } 3976 3976 offset++; 3977 3977 } ··· 4015 4015 wpa_auth |= WPA2_AUTH_1X_SHA256; 4016 4016 break; 4017 4017 default: 4018 - brcmf_err("Ivalid key mgmt info\n"); 4018 + brcmf_err("Invalid key mgmt info\n"); 4019 4019 } 4020 4020 offset++; 4021 4021 }
+10 -10
drivers/net/wireless/intel/iwlegacy/3945-mac.c
··· 3469 3469 .attrs = il3945_sysfs_entries, 3470 3470 }; 3471 3471 3472 - static struct ieee80211_ops il3945_mac_ops __read_mostly = { 3472 + static struct ieee80211_ops il3945_mac_ops __ro_after_init = { 3473 3473 .tx = il3945_mac_tx, 3474 3474 .start = il3945_mac_start, 3475 3475 .stop = il3945_mac_stop, ··· 3626 3626 SET_IEEE80211_DEV(hw, &pdev->dev); 3627 3627 3628 3628 il->cmd_queue = IL39_CMD_QUEUE_NUM; 3629 - 3630 - /* 3631 - * Disabling hardware scan means that mac80211 will perform scans 3632 - * "the hard way", rather than using device's scan. 3633 - */ 3634 - if (il3945_mod_params.disable_hw_scan) { 3635 - D_INFO("Disabling hw_scan\n"); 3636 - il3945_mac_ops.hw_scan = NULL; 3637 - } 3638 3629 3639 3630 D_INFO("*** LOAD DRIVER ***\n"); 3640 3631 il->cfg = cfg; ··· 3903 3912 int ret; 3904 3913 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n"); 3905 3914 pr_info(DRV_COPYRIGHT "\n"); 3915 + 3916 + /* 3917 + * Disabling hardware scan means that mac80211 will perform scans 3918 + * "the hard way", rather than using device's scan. 3919 + */ 3920 + if (il3945_mod_params.disable_hw_scan) { 3921 + pr_info("hw_scan is disabled\n"); 3922 + il3945_mac_ops.hw_scan = NULL; 3923 + } 3906 3924 3907 3925 ret = il3945_rate_control_register(); 3908 3926 if (ret) {
+26 -18
drivers/net/wireless/intersil/orinoco/mic.c
··· 16 16 /********************************************************************/ 17 17 int orinoco_mic_init(struct orinoco_private *priv) 18 18 { 19 - priv->tx_tfm_mic = crypto_alloc_ahash("michael_mic", 0, 19 + priv->tx_tfm_mic = crypto_alloc_shash("michael_mic", 0, 20 20 CRYPTO_ALG_ASYNC); 21 21 if (IS_ERR(priv->tx_tfm_mic)) { 22 22 printk(KERN_DEBUG "orinoco_mic_init: could not allocate " ··· 25 25 return -ENOMEM; 26 26 } 27 27 28 - priv->rx_tfm_mic = crypto_alloc_ahash("michael_mic", 0, 28 + priv->rx_tfm_mic = crypto_alloc_shash("michael_mic", 0, 29 29 CRYPTO_ALG_ASYNC); 30 30 if (IS_ERR(priv->rx_tfm_mic)) { 31 31 printk(KERN_DEBUG "orinoco_mic_init: could not allocate " ··· 40 40 void orinoco_mic_free(struct orinoco_private *priv) 41 41 { 42 42 if (priv->tx_tfm_mic) 43 - crypto_free_ahash(priv->tx_tfm_mic); 43 + crypto_free_shash(priv->tx_tfm_mic); 44 44 if (priv->rx_tfm_mic) 45 - crypto_free_ahash(priv->rx_tfm_mic); 45 + crypto_free_shash(priv->rx_tfm_mic); 46 46 } 47 47 48 - int orinoco_mic(struct crypto_ahash *tfm_michael, u8 *key, 48 + int orinoco_mic(struct crypto_shash *tfm_michael, u8 *key, 49 49 u8 *da, u8 *sa, u8 priority, 50 50 u8 *data, size_t data_len, u8 *mic) 51 51 { 52 - AHASH_REQUEST_ON_STACK(req, tfm_michael); 53 - struct scatterlist sg[2]; 52 + SHASH_DESC_ON_STACK(desc, tfm_michael); 54 53 u8 hdr[ETH_HLEN + 2]; /* size of header + padding */ 55 54 int err; 56 55 ··· 66 67 hdr[ETH_ALEN * 2 + 2] = 0; 67 68 hdr[ETH_ALEN * 2 + 3] = 0; 68 69 69 - /* Use scatter gather to MIC header and data in one go */ 70 - sg_init_table(sg, 2); 71 - sg_set_buf(&sg[0], hdr, sizeof(hdr)); 72 - sg_set_buf(&sg[1], data, data_len); 70 + desc->tfm = tfm_michael; 71 + desc->flags = 0; 73 72 74 - if (crypto_ahash_setkey(tfm_michael, key, MIC_KEYLEN)) 75 - return -1; 73 + err = crypto_shash_setkey(tfm_michael, key, MIC_KEYLEN); 74 + if (err) 75 + return err; 76 76 77 - ahash_request_set_tfm(req, tfm_michael); 78 - ahash_request_set_callback(req, 0, NULL, NULL); 79 - ahash_request_set_crypt(req, sg, mic, data_len + sizeof(hdr)); 80 - err = crypto_ahash_digest(req); 81 - ahash_request_zero(req); 77 + err = crypto_shash_init(desc); 78 + if (err) 79 + return err; 80 + 81 + err = crypto_shash_update(desc, hdr, sizeof(hdr)); 82 + if (err) 83 + return err; 84 + 85 + err = crypto_shash_update(desc, data, data_len); 86 + if (err) 87 + return err; 88 + 89 + err = crypto_shash_final(desc, mic); 90 + shash_desc_zero(desc); 91 + 82 92 return err; 83 93 }
+2 -1
drivers/net/wireless/intersil/orinoco/mic.h
··· 6 6 #define _ORINOCO_MIC_H_ 7 7 8 8 #include <linux/types.h> 9 + #include <crypto/hash.h> 9 10 10 11 #define MICHAEL_MIC_LEN 8 11 12 ··· 16 15 17 16 int orinoco_mic_init(struct orinoco_private *priv); 18 17 void orinoco_mic_free(struct orinoco_private *priv); 19 - int orinoco_mic(struct crypto_ahash *tfm_michael, u8 *key, 18 + int orinoco_mic(struct crypto_shash *tfm_michael, u8 *key, 20 19 u8 *da, u8 *sa, u8 priority, 21 20 u8 *data, size_t data_len, u8 *mic); 22 21
+2 -2
drivers/net/wireless/intersil/orinoco/orinoco.h
··· 152 152 u8 *wpa_ie; 153 153 int wpa_ie_len; 154 154 155 - struct crypto_ahash *rx_tfm_mic; 156 - struct crypto_ahash *tx_tfm_mic; 155 + struct crypto_shash *rx_tfm_mic; 156 + struct crypto_shash *tx_tfm_mic; 157 157 158 158 unsigned int wpa_enabled:1; 159 159 unsigned int tkip_cm_active:1;
+1 -1
drivers/net/wireless/marvell/libertas/cfg.c
··· 2086 2086 * Initialization 2087 2087 */ 2088 2088 2089 - static struct cfg80211_ops lbs_cfg80211_ops = { 2089 + static const struct cfg80211_ops lbs_cfg80211_ops = { 2090 2090 .set_monitor_channel = lbs_cfg_set_monitor_channel, 2091 2091 .libertas_set_mesh_channel = lbs_cfg_set_mesh_channel, 2092 2092 .scan = lbs_cfg_scan,
+9 -10
drivers/net/wireless/marvell/mwifiex/fw.h
··· 434 434 #define HostCmd_ACT_BITWISE_SET 0x0002 435 435 #define HostCmd_ACT_BITWISE_CLR 0x0003 436 436 #define HostCmd_RESULT_OK 0x0000 437 - 438 - #define HostCmd_ACT_MAC_RX_ON 0x0001 439 - #define HostCmd_ACT_MAC_TX_ON 0x0002 440 - #define HostCmd_ACT_MAC_WEP_ENABLE 0x0008 441 - #define HostCmd_ACT_MAC_ETHERNETII_ENABLE 0x0010 442 - #define HostCmd_ACT_MAC_PROMISCUOUS_ENABLE 0x0080 443 - #define HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE 0x0100 444 - #define HostCmd_ACT_MAC_ADHOC_G_PROTECTION_ON 0x2000 437 + #define HostCmd_ACT_MAC_RX_ON BIT(0) 438 + #define HostCmd_ACT_MAC_TX_ON BIT(1) 439 + #define HostCmd_ACT_MAC_WEP_ENABLE BIT(3) 440 + #define HostCmd_ACT_MAC_ETHERNETII_ENABLE BIT(4) 441 + #define HostCmd_ACT_MAC_PROMISCUOUS_ENABLE BIT(7) 442 + #define HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE BIT(8) 443 + #define HostCmd_ACT_MAC_ADHOC_G_PROTECTION_ON BIT(13) 444 + #define HostCmd_ACT_MAC_DYNAMIC_BW_ENABLE BIT(16) 445 445 446 446 #define HostCmd_BSS_MODE_IBSS 0x0002 447 447 #define HostCmd_BSS_MODE_ANY 0x0003 ··· 1084 1084 }; 1085 1085 1086 1086 struct host_cmd_ds_mac_control { 1087 - __le16 action; 1088 - __le16 reserved; 1087 + __le32 action; 1089 1088 }; 1090 1089 1091 1090 struct host_cmd_ds_mac_multicast_adr {
+2 -1
drivers/net/wireless/marvell/mwifiex/init.c
··· 92 92 for (i = 0; i < ARRAY_SIZE(priv->wep_key); i++) 93 93 memset(&priv->wep_key[i], 0, sizeof(struct mwifiex_wep_key)); 94 94 priv->wep_key_curr_index = 0; 95 - priv->curr_pkt_filter = HostCmd_ACT_MAC_RX_ON | HostCmd_ACT_MAC_TX_ON | 95 + priv->curr_pkt_filter = HostCmd_ACT_MAC_DYNAMIC_BW_ENABLE | 96 + HostCmd_ACT_MAC_RX_ON | HostCmd_ACT_MAC_TX_ON | 96 97 HostCmd_ACT_MAC_ETHERNETII_ENABLE; 97 98 98 99 priv->beacon_period = 100; /* beacon interval */
+1 -1
drivers/net/wireless/marvell/mwifiex/main.h
··· 530 530 u8 tx_timeout_cnt; 531 531 struct net_device *netdev; 532 532 struct net_device_stats stats; 533 - u16 curr_pkt_filter; 533 + u32 curr_pkt_filter; 534 534 u32 bss_mode; 535 535 u32 pkt_tx_ctrl; 536 536 u16 tx_power_level;
+6
drivers/net/wireless/marvell/mwifiex/sdio.c
··· 2237 2237 mmc_hw_reset(func->card->host); 2238 2238 sdio_release_host(func); 2239 2239 2240 + /* Previous save_adapter won't be valid after this. We will cancel 2241 + * pending work requests. 2242 + */ 2243 + clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags); 2244 + clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &iface_work_flags); 2245 + 2240 2246 mwifiex_sdio_probe(func, device_id); 2241 2247 } 2242 2248
+4 -4
drivers/net/wireless/marvell/mwifiex/sta_cmd.c
··· 76 76 */ 77 77 static int mwifiex_cmd_mac_control(struct mwifiex_private *priv, 78 78 struct host_cmd_ds_command *cmd, 79 - u16 cmd_action, u16 *action) 79 + u16 cmd_action, u32 *action) 80 80 { 81 81 struct host_cmd_ds_mac_control *mac_ctrl = &cmd->params.mac_ctrl; 82 82 ··· 89 89 cmd->command = cpu_to_le16(HostCmd_CMD_MAC_CONTROL); 90 90 cmd->size = 91 91 cpu_to_le16(sizeof(struct host_cmd_ds_mac_control) + S_DS_GEN); 92 - mac_ctrl->action = cpu_to_le16(*action); 92 + mac_ctrl->action = cpu_to_le32(*action); 93 93 94 94 return 0; 95 95 } ··· 1935 1935 mwifiex_dbg(priv->adapter, ERROR, 1936 1936 "0x%x command not supported by firmware\n", 1937 1937 cmd_no); 1938 - return -EOPNOTSUPP; 1939 - } 1938 + return -EOPNOTSUPP; 1939 + } 1940 1940 1941 1941 /* Prepare command */ 1942 1942 switch (cmd_no) {
+2
drivers/net/wireless/ralink/rt2x00/rt2800.h
··· 2979 2979 u8 bbp26; 2980 2980 u8 txmixer_gain_24g; 2981 2981 u8 txmixer_gain_5g; 2982 + u8 max_psdu; 2982 2983 unsigned int tbtt_tick; 2984 + unsigned int ampdu_factor_cnt[4]; 2983 2985 DECLARE_BITMAP(sta_ids, STA_IDS_SIZE); 2984 2986 }; 2985 2987
+62 -17
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
··· 1418 1418 } 1419 1419 EXPORT_SYMBOL_GPL(rt2800_config_pairwise_key); 1420 1420 1421 + static void rt2800_set_max_psdu_len(struct rt2x00_dev *rt2x00dev) 1422 + { 1423 + u8 i, max_psdu; 1424 + u32 reg; 1425 + struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; 1426 + 1427 + for (i = 0; i < 3; i++) 1428 + if (drv_data->ampdu_factor_cnt[i] > 0) 1429 + break; 1430 + 1431 + max_psdu = min(drv_data->max_psdu, i); 1432 + 1433 + rt2800_register_read(rt2x00dev, MAX_LEN_CFG, &reg); 1434 + rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, max_psdu); 1435 + rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg); 1436 + } 1437 + 1421 1438 int rt2800_sta_add(struct rt2x00_dev *rt2x00dev, struct ieee80211_vif *vif, 1422 1439 struct ieee80211_sta *sta) 1423 1440 { 1424 1441 int wcid; 1425 1442 struct rt2x00_sta *sta_priv = sta_to_rt2x00_sta(sta); 1426 1443 struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; 1444 + 1445 + /* 1446 + * Limit global maximum TX AMPDU length to smallest value of all 1447 + * connected stations. In AP mode this can be suboptimal, but we 1448 + * do not have a choice if some connected STA is not capable to 1449 + * receive the same amount of data like the others. 1450 + */ 1451 + if (sta->ht_cap.ht_supported) { 1452 + drv_data->ampdu_factor_cnt[sta->ht_cap.ampdu_factor & 3]++; 1453 + rt2800_set_max_psdu_len(rt2x00dev); 1454 + } 1427 1455 1428 1456 /* 1429 1457 * Search for the first free WCID entry and return the corresponding ··· 1485 1457 } 1486 1458 EXPORT_SYMBOL_GPL(rt2800_sta_add); 1487 1459 1488 - int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, int wcid) 1460 + int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, struct ieee80211_sta *sta) 1489 1461 { 1490 1462 struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; 1463 + struct rt2x00_sta *sta_priv = sta_to_rt2x00_sta(sta); 1464 + int wcid = sta_priv->wcid; 1465 + 1466 + if (sta->ht_cap.ht_supported) { 1467 + drv_data->ampdu_factor_cnt[sta->ht_cap.ampdu_factor & 3]--; 1468 + rt2800_set_max_psdu_len(rt2x00dev); 1469 + } 1491 1470 1492 1471 if (wcid > WCID_END) 1493 1472 return 0; ··· 1939 1904 1940 1905 #define FREQ_OFFSET_BOUND 0x5f 1941 1906 1942 - static void rt2800_adjust_freq_offset(struct rt2x00_dev *rt2x00dev) 1907 + static void rt2800_freq_cal_mode1(struct rt2x00_dev *rt2x00dev) 1943 1908 { 1944 1909 u8 freq_offset, prev_freq_offset; 1945 1910 u8 rfcsr, prev_rfcsr; ··· 2110 2075 rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr); 2111 2076 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1); 2112 2077 rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); 2113 - msleep(1); 2078 + 2079 + usleep_range(1000, 1500); 2080 + 2114 2081 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0); 2115 2082 rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); 2116 2083 } ··· 2417 2380 } 2418 2381 rt2800_rfcsr_write(rt2x00dev, 1, rfcsr); 2419 2382 2420 - rt2800_adjust_freq_offset(rt2x00dev); 2383 + rt2800_freq_cal_mode1(rt2x00dev); 2421 2384 2422 2385 if (conf_is_ht40(conf)) { 2423 2386 txrx_agc_fc = rt2x00_get_field8(drv_data->calibration_bw40, ··· 2607 2570 rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1); 2608 2571 rt2800_rfcsr_write(rt2x00dev, 49, rfcsr); 2609 2572 2610 - rt2800_adjust_freq_offset(rt2x00dev); 2573 + rt2800_freq_cal_mode1(rt2x00dev); 2611 2574 2612 2575 if (rf->channel <= 14) { 2613 2576 if (rf->channel == 6) ··· 2648 2611 else 2649 2612 rt2800_rfcsr_write(rt2x00dev, 48, info->default_power2); 2650 2613 2651 - rt2800_adjust_freq_offset(rt2x00dev); 2614 + rt2800_freq_cal_mode1(rt2x00dev); 2652 2615 2653 2616 rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr); 2654 2617 rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); ··· 2713 2676 rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1); 2714 2677 rt2800_rfcsr_write(rt2x00dev, 1, rfcsr); 2715 2678 2716 - rt2800_adjust_freq_offset(rt2x00dev); 2679 + rt2800_freq_cal_mode1(rt2x00dev); 2717 2680 2718 2681 if (rf->channel <= 14) { 2719 2682 int idx = rf->channel-1; ··· 3008 2971 } 3009 2972 3010 2973 /* TODO proper frequency adjustment */ 3011 - rt2800_adjust_freq_offset(rt2x00dev); 2974 + rt2800_freq_cal_mode1(rt2x00dev); 3012 2975 3013 2976 /* TODO merge with others */ 3014 2977 rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr); ··· 3444 3407 } 3445 3408 } 3446 3409 3447 - msleep(1); 3410 + usleep_range(1000, 1500); 3448 3411 3449 3412 /* 3450 3413 * Clear channel statistic counters ··· 4343 4306 case RF5372: 4344 4307 case RF5390: 4345 4308 case RF5392: 4309 + case RF5592: 4346 4310 rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr); 4347 4311 rt2x00_set_field8(&rfcsr, RFCSR3_VCOCAL_EN, 1); 4348 4312 rt2800_rfcsr_write(rt2x00dev, 3, rfcsr); 4349 4313 break; 4350 4314 default: 4315 + WARN_ONCE(1, "Not supported RF chipet %x for VCO recalibration", 4316 + rt2x00dev->chip.rf); 4351 4317 return; 4352 4318 } 4353 4319 4354 - mdelay(1); 4320 + usleep_range(1000, 1500); 4355 4321 4356 4322 rt2800_register_read(rt2x00dev, TX_PIN_CFG, &tx_pin); 4357 4323 if (rt2x00dev->rf_channel <= 14) { ··· 4576 4536 */ 4577 4537 static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) 4578 4538 { 4539 + struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; 4579 4540 u32 reg; 4580 4541 u16 eeprom; 4581 4542 unsigned int i; ··· 4745 4704 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE); 4746 4705 if (rt2x00_rt_rev_gte(rt2x00dev, RT2872, REV_RT2872E) || 4747 4706 rt2x00_rt(rt2x00dev, RT2883) || 4748 - rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070E)) 4707 + rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070E)) { 4708 + drv_data->max_psdu = 2; 4749 4709 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2); 4750 - else 4710 + } else { 4711 + drv_data->max_psdu = 1; 4751 4712 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1); 4752 - rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 0); 4753 - rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0); 4713 + } 4714 + rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 10); 4715 + rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 10); 4754 4716 rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg); 4755 4717 4756 4718 rt2800_register_read(rt2x00dev, LED_CFG, &reg); ··· 6459 6415 rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1); 6460 6416 rt2800_rfcsr_write(rt2x00dev, 2, rfcsr); 6461 6417 6462 - rt2800_adjust_freq_offset(rt2x00dev); 6418 + rt2800_freq_cal_mode1(rt2x00dev); 6463 6419 6464 6420 rt2800_rfcsr_read(rt2x00dev, 18, &rfcsr); 6465 6421 rt2x00_set_field8(&rfcsr, RFCSR18_XO_TUNE_BYPASS, 1); ··· 6685 6641 rt2800_rfcsr_write(rt2x00dev, 2, 0x80); 6686 6642 msleep(1); 6687 6643 6688 - rt2800_adjust_freq_offset(rt2x00dev); 6644 + rt2800_freq_cal_mode1(rt2x00dev); 6689 6645 6690 6646 /* Enable DC filter */ 6691 6647 if (rt2x00_rt_rev_gte(rt2x00dev, RT5592, REV_RT5592C)) ··· 7637 7593 7638 7594 spec->ht.cap |= rx_chains << IEEE80211_HT_CAP_RX_STBC_SHIFT; 7639 7595 7640 - spec->ht.ampdu_factor = 3; 7596 + spec->ht.ampdu_factor = (rx_chains > 1) ? 3 : 2; 7641 7597 spec->ht.ampdu_density = 4; 7642 7598 spec->ht.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 7643 7599 if (tx_chains != rx_chains) { ··· 7719 7675 case RF5372: 7720 7676 case RF5390: 7721 7677 case RF5392: 7678 + case RF5592: 7722 7679 __set_bit(CAPABILITY_VCO_RECALIBRATION, &rt2x00dev->cap_flags); 7723 7680 break; 7724 7681 }
+1 -1
drivers/net/wireless/ralink/rt2x00/rt2800lib.h
··· 183 183 struct ieee80211_key_conf *key); 184 184 int rt2800_sta_add(struct rt2x00_dev *rt2x00dev, struct ieee80211_vif *vif, 185 185 struct ieee80211_sta *sta); 186 - int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, int wcid); 186 + int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, struct ieee80211_sta *sta); 187 187 void rt2800_config_filter(struct rt2x00_dev *rt2x00dev, 188 188 const unsigned int filter_flags); 189 189 void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf,
+5 -1
drivers/net/wireless/ralink/rt2x00/rt2x00.h
··· 627 627 struct ieee80211_vif *vif, 628 628 struct ieee80211_sta *sta); 629 629 int (*sta_remove) (struct rt2x00_dev *rt2x00dev, 630 - int wcid); 630 + struct ieee80211_sta *sta); 631 631 }; 632 632 633 633 /* ··· 833 833 */ 834 834 struct mutex csr_mutex; 835 835 836 + /* 837 + * Mutex to synchronize config and link tuner. 838 + */ 839 + struct mutex conf_mutex; 836 840 /* 837 841 * Current packet filter configuration for the device. 838 842 * This contains all currently active FIF_* flags send
+1 -6
drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
··· 87 87 */ 88 88 rt2x00queue_start_queues(rt2x00dev); 89 89 rt2x00link_start_tuner(rt2x00dev); 90 - rt2x00link_start_agc(rt2x00dev); 91 - if (rt2x00_has_cap_vco_recalibration(rt2x00dev)) 92 - rt2x00link_start_vcocal(rt2x00dev); 93 90 94 91 /* 95 92 * Start watchdog monitoring. ··· 109 112 /* 110 113 * Stop all queues 111 114 */ 112 - rt2x00link_stop_agc(rt2x00dev); 113 - if (rt2x00_has_cap_vco_recalibration(rt2x00dev)) 114 - rt2x00link_stop_vcocal(rt2x00dev); 115 115 rt2x00link_stop_tuner(rt2x00dev); 116 116 rt2x00queue_stop_queues(rt2x00dev); 117 117 rt2x00queue_flush_queues(rt2x00dev, true); ··· 1313 1319 1314 1320 spin_lock_init(&rt2x00dev->irqmask_lock); 1315 1321 mutex_init(&rt2x00dev->csr_mutex); 1322 + mutex_init(&rt2x00dev->conf_mutex); 1316 1323 INIT_LIST_HEAD(&rt2x00dev->bar_list); 1317 1324 spin_lock_init(&rt2x00dev->bar_list_lock); 1318 1325
+4 -27
drivers/net/wireless/ralink/rt2x00/rt2x00lib.h
··· 29 29 * Interval defines 30 30 */ 31 31 #define WATCHDOG_INTERVAL round_jiffies_relative(HZ) 32 - #define LINK_TUNE_INTERVAL round_jiffies_relative(HZ) 33 - #define AGC_INTERVAL round_jiffies_relative(4 * HZ) 34 - #define VCO_INTERVAL round_jiffies_relative(10 * HZ) /* 10 sec */ 32 + #define LINK_TUNE_SECONDS 1 33 + #define LINK_TUNE_INTERVAL round_jiffies_relative(LINK_TUNE_SECONDS * HZ) 34 + #define AGC_SECONDS 4 35 + #define VCO_SECONDS 10 35 36 36 37 /* 37 38 * rt2x00_rate: Per rate device information ··· 270 269 * be running until &rt2x00link_start_watchdog is called. 271 270 */ 272 271 void rt2x00link_stop_watchdog(struct rt2x00_dev *rt2x00dev); 273 - 274 - /** 275 - * rt2x00link_start_agc - Start periodic gain calibration 276 - * @rt2x00dev: Pointer to &struct rt2x00_dev. 277 - */ 278 - void rt2x00link_start_agc(struct rt2x00_dev *rt2x00dev); 279 - 280 - /** 281 - * rt2x00link_start_vcocal - Start periodic VCO calibration 282 - * @rt2x00dev: Pointer to &struct rt2x00_dev. 283 - */ 284 - void rt2x00link_start_vcocal(struct rt2x00_dev *rt2x00dev); 285 - 286 - /** 287 - * rt2x00link_stop_agc - Stop periodic gain calibration 288 - * @rt2x00dev: Pointer to &struct rt2x00_dev. 289 - */ 290 - void rt2x00link_stop_agc(struct rt2x00_dev *rt2x00dev); 291 - 292 - /** 293 - * rt2x00link_stop_vcocal - Stop periodic VCO calibration 294 - * @rt2x00dev: Pointer to &struct rt2x00_dev. 295 - */ 296 - void rt2x00link_stop_vcocal(struct rt2x00_dev *rt2x00dev); 297 272 298 273 /** 299 274 * rt2x00link_register - Initialize link tuning & watchdog functionality
+37 -95
drivers/net/wireless/ralink/rt2x00/rt2x00link.c
··· 233 233 struct link *link = &rt2x00dev->link; 234 234 235 235 /* 236 - * Link tuning should only be performed when 237 - * an active sta interface exists. AP interfaces 238 - * don't need link tuning and monitor mode interfaces 239 - * should never have to work with link tuners. 236 + * Single monitor mode interfaces should never have 237 + * work with link tuners. 240 238 */ 241 - if (!rt2x00dev->intf_sta_count) 239 + if (!rt2x00dev->intf_ap_count && !rt2x00dev->intf_sta_count) 242 240 return; 243 241 244 - /** 242 + /* 245 243 * While scanning, link tuning is disabled. By default 246 244 * the most sensitive settings will be used to make sure 247 245 * that all beacons and probe responses will be received ··· 306 308 qual->tx_failed = 0; 307 309 } 308 310 309 - static void rt2x00link_tuner(struct work_struct *work) 311 + static void rt2x00link_tuner_sta(struct rt2x00_dev *rt2x00dev, struct link *link) 310 312 { 311 - struct rt2x00_dev *rt2x00dev = 312 - container_of(work, struct rt2x00_dev, link.work.work); 313 - struct link *link = &rt2x00dev->link; 314 313 struct link_qual *qual = &rt2x00dev->link.qual; 315 - 316 - /* 317 - * When the radio is shutting down we should 318 - * immediately cease all link tuning. 319 - */ 320 - if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags) || 321 - test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) 322 - return; 323 314 324 315 /* 325 316 * Update statistics. ··· 347 360 */ 348 361 if (rt2x00lib_antenna_diversity(rt2x00dev)) 349 362 rt2x00link_reset_qual(rt2x00dev); 363 + } 364 + 365 + static void rt2x00link_tuner(struct work_struct *work) 366 + { 367 + struct rt2x00_dev *rt2x00dev = 368 + container_of(work, struct rt2x00_dev, link.work.work); 369 + struct link *link = &rt2x00dev->link; 370 + 371 + /* 372 + * When the radio is shutting down we should 373 + * immediately cease all link tuning. 374 + */ 375 + if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags) || 376 + test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) 377 + return; 378 + 379 + /* Do not race with rt2x00mac_config(). */ 380 + mutex_lock(&rt2x00dev->conf_mutex); 381 + 382 + if (rt2x00dev->intf_sta_count) 383 + rt2x00link_tuner_sta(rt2x00dev, link); 384 + 385 + if (rt2x00dev->ops->lib->gain_calibration && 386 + (link->count % (AGC_SECONDS / LINK_TUNE_SECONDS)) == 0) 387 + rt2x00dev->ops->lib->gain_calibration(rt2x00dev); 388 + 389 + if (rt2x00dev->ops->lib->vco_calibration && 390 + rt2x00_has_cap_vco_recalibration(rt2x00dev) && 391 + (link->count % (VCO_SECONDS / LINK_TUNE_SECONDS)) == 0) 392 + rt2x00dev->ops->lib->vco_calibration(rt2x00dev); 393 + 394 + mutex_unlock(&rt2x00dev->conf_mutex); 350 395 351 396 /* 352 397 * Increase tuner counter, and reschedule the next link tuner run. ··· 427 408 WATCHDOG_INTERVAL); 428 409 } 429 410 430 - void rt2x00link_start_agc(struct rt2x00_dev *rt2x00dev) 431 - { 432 - struct link *link = &rt2x00dev->link; 433 - 434 - if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags) && 435 - rt2x00dev->ops->lib->gain_calibration) 436 - ieee80211_queue_delayed_work(rt2x00dev->hw, 437 - &link->agc_work, 438 - AGC_INTERVAL); 439 - } 440 - 441 - void rt2x00link_start_vcocal(struct rt2x00_dev *rt2x00dev) 442 - { 443 - struct link *link = &rt2x00dev->link; 444 - 445 - if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags) && 446 - rt2x00dev->ops->lib->vco_calibration) 447 - ieee80211_queue_delayed_work(rt2x00dev->hw, 448 - &link->vco_work, 449 - VCO_INTERVAL); 450 - } 451 - 452 - void rt2x00link_stop_agc(struct rt2x00_dev *rt2x00dev) 453 - { 454 - cancel_delayed_work_sync(&rt2x00dev->link.agc_work); 455 - } 456 - 457 - void rt2x00link_stop_vcocal(struct rt2x00_dev *rt2x00dev) 458 - { 459 - cancel_delayed_work_sync(&rt2x00dev->link.vco_work); 460 - } 461 - 462 - static void rt2x00link_agc(struct work_struct *work) 463 - { 464 - struct rt2x00_dev *rt2x00dev = 465 - container_of(work, struct rt2x00_dev, link.agc_work.work); 466 - struct link *link = &rt2x00dev->link; 467 - 468 - /* 469 - * When the radio is shutting down we should 470 - * immediately cease the watchdog monitoring. 471 - */ 472 - if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) 473 - return; 474 - 475 - rt2x00dev->ops->lib->gain_calibration(rt2x00dev); 476 - 477 - if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) 478 - ieee80211_queue_delayed_work(rt2x00dev->hw, 479 - &link->agc_work, 480 - AGC_INTERVAL); 481 - } 482 - 483 - static void rt2x00link_vcocal(struct work_struct *work) 484 - { 485 - struct rt2x00_dev *rt2x00dev = 486 - container_of(work, struct rt2x00_dev, link.vco_work.work); 487 - struct link *link = &rt2x00dev->link; 488 - 489 - /* 490 - * When the radio is shutting down we should 491 - * immediately cease the VCO calibration. 492 - */ 493 - if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) 494 - return; 495 - 496 - rt2x00dev->ops->lib->vco_calibration(rt2x00dev); 497 - 498 - if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) 499 - ieee80211_queue_delayed_work(rt2x00dev->hw, 500 - &link->vco_work, 501 - VCO_INTERVAL); 502 - } 503 - 504 411 void rt2x00link_register(struct rt2x00_dev *rt2x00dev) 505 412 { 506 - INIT_DELAYED_WORK(&rt2x00dev->link.agc_work, rt2x00link_agc); 507 - if (rt2x00_has_cap_vco_recalibration(rt2x00dev)) 508 - INIT_DELAYED_WORK(&rt2x00dev->link.vco_work, rt2x00link_vcocal); 509 413 INIT_DELAYED_WORK(&rt2x00dev->link.watchdog_work, rt2x00link_watchdog); 510 414 INIT_DELAYED_WORK(&rt2x00dev->link.work, rt2x00link_tuner); 511 415 }
+6 -2
drivers/net/wireless/ralink/rt2x00/rt2x00mac.c
··· 320 320 */ 321 321 rt2x00queue_stop_queue(rt2x00dev->rx); 322 322 323 + /* Do not race with with link tuner. */ 324 + mutex_lock(&rt2x00dev->conf_mutex); 325 + 323 326 /* 324 327 * When we've just turned on the radio, we want to reprogram 325 328 * everything to ensure a consistent state ··· 337 334 * have been made since the last configuration change. 338 335 */ 339 336 rt2x00lib_config_antenna(rt2x00dev, rt2x00dev->default_ant); 337 + 338 + mutex_unlock(&rt2x00dev->conf_mutex); 340 339 341 340 /* Turn RX back on */ 342 341 rt2x00queue_start_queue(rt2x00dev->rx); ··· 544 539 struct ieee80211_sta *sta) 545 540 { 546 541 struct rt2x00_dev *rt2x00dev = hw->priv; 547 - struct rt2x00_sta *sta_priv = sta_to_rt2x00_sta(sta); 548 542 549 - return rt2x00dev->ops->lib->sta_remove(rt2x00dev, sta_priv->wcid); 543 + return rt2x00dev->ops->lib->sta_remove(rt2x00dev, sta); 550 544 } 551 545 EXPORT_SYMBOL_GPL(rt2x00mac_sta_remove); 552 546
+6 -6
drivers/net/wireless/ralink/rt2x00/rt2x00queue.c
··· 306 306 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0]; 307 307 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 308 308 struct rt2x00_sta *sta_priv = NULL; 309 + u8 density = 0; 309 310 310 311 if (sta) { 311 - txdesc->u.ht.mpdu_density = 312 - sta->ht_cap.ampdu_density; 313 - 314 312 sta_priv = sta_to_rt2x00_sta(sta); 315 313 txdesc->u.ht.wcid = sta_priv->wcid; 314 + density = sta->ht_cap.ampdu_density; 316 315 } 317 316 318 317 /* ··· 344 345 return; 345 346 } 346 347 347 - txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */ 348 - 349 348 /* 350 349 * Only one STBC stream is supported for now. 351 350 */ ··· 355 358 * frames that are intended to probe a specific tx rate. 356 359 */ 357 360 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU && 358 - !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) 361 + !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) { 359 362 __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags); 363 + txdesc->u.ht.mpdu_density = density; 364 + txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */ 365 + } 360 366 361 367 /* 362 368 * Set 40Mhz mode if necessary (for legacy rates this will
+6 -9
drivers/net/wireless/realtek/rtlwifi/base.c
··· 207 207 *highest supported RX rate 208 208 */ 209 209 if (rtlpriv->dm.supp_phymode_switch) { 210 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, 211 - "Support phy mode switch\n"); 210 + pr_info("Support phy mode switch\n"); 212 211 213 212 ht_cap->mcs.rx_mask[0] = 0xFF; 214 213 ht_cap->mcs.rx_mask[1] = 0xFF; ··· 388 389 /* <4> set mac->sband to wiphy->sband */ 389 390 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband; 390 391 } else { 391 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Err BAND %d\n", 392 - rtlhal->current_bandtype); 392 + pr_err("Err BAND %d\n", 393 + rtlhal->current_bandtype); 393 394 } 394 395 } 395 396 /* <5> set hw caps */ ··· 543 544 * mac80211 hw in _rtl_init_mac80211. 544 545 */ 545 546 if (rtl_regd_init(hw, rtl_reg_notifier)) { 546 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "REGD init failed\n"); 547 + pr_err("REGD init failed\n"); 547 548 return 1; 548 549 } 549 550 ··· 1693 1694 * we should reconnect this AP 1694 1695 */ 1695 1696 if (rtlpriv->link_info.roam_times >= 5) { 1696 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1697 - "AP off, try to reconnect now\n"); 1697 + pr_err("AP off, try to reconnect now\n"); 1698 1698 rtlpriv->link_info.roam_times = 0; 1699 1699 ieee80211_connection_loss( 1700 1700 rtlpriv->mac80211.vif); ··· 1884 1886 (u8 *)&iotype); 1885 1887 break; 1886 1888 default: 1887 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1888 - "Unknown Scan Backup operation.\n"); 1889 + pr_err("Unknown Scan Backup operation.\n"); 1889 1890 break; 1890 1891 } 1891 1892 }
+5 -9
drivers/net/wireless/realtek/rtlwifi/cam.c
··· 285 285 u8 i, *addr; 286 286 287 287 if (NULL == sta_addr) { 288 - RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG, 289 - "sta_addr is NULL.\n"); 288 + pr_err("sta_addr is NULL.\n"); 290 289 return TOTAL_CAM_ENTRY; 291 290 } 292 291 /* Does STA already exist? */ ··· 297 298 /* Get a free CAM entry. */ 298 299 for (entry_idx = 4; entry_idx < TOTAL_CAM_ENTRY; entry_idx++) { 299 300 if ((bitmap & BIT(0)) == 0) { 300 - RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG, 301 - "-----hwsec_cam_bitmap: 0x%x entry_idx=%d\n", 302 - rtlpriv->sec.hwsec_cam_bitmap, entry_idx); 301 + pr_err("-----hwsec_cam_bitmap: 0x%x entry_idx=%d\n", 302 + rtlpriv->sec.hwsec_cam_bitmap, entry_idx); 303 303 rtlpriv->sec.hwsec_cam_bitmap |= BIT(0) << entry_idx; 304 304 memcpy(rtlpriv->sec.hwsec_cam_sta_addr[entry_idx], 305 305 sta_addr, ETH_ALEN); ··· 317 319 u8 i, *addr; 318 320 319 321 if (NULL == sta_addr) { 320 - RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG, 321 - "sta_addr is NULL.\n"); 322 + pr_err("sta_addr is NULL.\n"); 322 323 return; 323 324 } 324 325 325 326 if (is_zero_ether_addr(sta_addr)) { 326 - RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG, 327 - "sta_addr is %pM\n", sta_addr); 327 + pr_err("sta_addr is %pM\n", sta_addr); 328 328 return; 329 329 } 330 330 /* Does STA already exist? */
+13 -18
drivers/net/wireless/realtek/rtlwifi/core.c
··· 117 117 } 118 118 found_alt: 119 119 if (firmware->size > rtlpriv->max_fw_size) { 120 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 121 - "Firmware is too big!\n"); 120 + pr_err("Firmware is too big!\n"); 122 121 release_firmware(firmware); 123 122 return; 124 123 } ··· 302 303 (u8 *)(&mac->basic_rates)); 303 304 break; 304 305 default: 305 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 306 - "operation mode %d is not support!\n", vif->type); 306 + pr_err("operation mode %d is not supported!\n", 307 + vif->type); 307 308 err = -EOPNOTSUPP; 308 309 goto out; 309 310 } ··· 763 764 default: 764 765 mac->bw_40 = false; 765 766 mac->bw_80 = false; 766 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 767 - "switch case %#x not processed\n", 768 - channel_type); 767 + pr_err("switch case %#x not processed\n", 768 + channel_type); 769 769 break; 770 770 } 771 771 } ··· 1397 1399 "IEEE80211_AMPDU_RX_STOP:TID:%d\n", tid); 1398 1400 return rtl_rx_agg_stop(hw, sta, tid); 1399 1401 default: 1400 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1401 - "IEEE80211_AMPDU_ERR!!!!:\n"); 1402 + pr_err("IEEE80211_AMPDU_ERR!!!!:\n"); 1402 1403 return -EOPNOTSUPP; 1403 1404 } 1404 1405 return 0; ··· 1529 1532 key_type = AESCMAC_ENCRYPTION; 1530 1533 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "alg:CMAC\n"); 1531 1534 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, 1532 - "HW don't support CMAC encrypiton, use software CMAC encrypiton\n"); 1535 + "HW don't support CMAC encryption, use software CMAC encryption\n"); 1533 1536 err = -EOPNOTSUPP; 1534 1537 goto out_unlock; 1535 1538 default: 1536 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1537 - "alg_err:%x!!!!:\n", key->cipher); 1539 + pr_err("alg_err:%x!!!!:\n", key->cipher); 1538 1540 goto out_unlock; 1539 1541 } 1540 1542 if (key_type == WEP40_ENCRYPTION || ··· 1609 1613 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, 1610 1614 "set pairwise key\n"); 1611 1615 if (!sta) { 1612 - RT_ASSERT(false, 1613 - "pairwise key without mac_addr\n"); 1616 + WARN_ONCE(true, 1617 + "rtlwifi: pairwise key without mac_addr\n"); 1614 1618 1615 1619 err = -EOPNOTSUPP; 1616 1620 goto out_unlock; ··· 1658 1662 rtl_cam_delete_one_entry(hw, mac_addr, key_idx); 1659 1663 break; 1660 1664 default: 1661 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1662 - "cmd_err:%x!!!!:\n", cmd); 1665 + pr_err("cmd_err:%x!!!!:\n", cmd); 1663 1666 } 1664 1667 out_unlock: 1665 1668 mutex_unlock(&rtlpriv->locks.conf_mutex); ··· 1799 1804 "rtl_hal_pwrseqcmdparsing(): PWR_CMD_END\n"); 1800 1805 return true; 1801 1806 default: 1802 - RT_ASSERT(false, 1803 - "rtl_hal_pwrseqcmdparsing(): Unknown CMD!!\n"); 1807 + WARN_ONCE(true, 1808 + "rtlwifi: rtl_hal_pwrseqcmdparsing(): Unknown CMD!!\n"); 1804 1809 break; 1805 1810 } 1806 1811 }
+1 -15
drivers/net/wireless/realtek/rtlwifi/debug.h
··· 36 36 *unexpected HW behavior, HW BUG 37 37 *and so on. 38 38 */ 39 - #define DBG_EMERG 0 39 + /*#define DBG_EMERG 0 */ 40 40 41 41 /* 42 42 *Abnormal, rare, or unexpeted cases. ··· 166 166 167 167 #ifdef CONFIG_RTLWIFI_DEBUG 168 168 169 - #define RT_ASSERT(_exp, fmt, ...) \ 170 - do { \ 171 - if (!(_exp)) { \ 172 - printk(KERN_DEBUG KBUILD_MODNAME ":%s(): " fmt, \ 173 - __func__, ##__VA_ARGS__); \ 174 - } \ 175 - } while (0) 176 - 177 - 178 169 struct rtl_priv; 179 170 180 171 __printf(5, 6) ··· 200 209 #else 201 210 202 211 struct rtl_priv; 203 - 204 - __printf(2, 3) 205 - static inline void RT_ASSERT(int exp, const char *fmt, ...) 206 - { 207 - } 208 212 209 213 __printf(4, 5) 210 214 static inline void RT_TRACE(struct rtl_priv *rtlpriv,
+1 -2
drivers/net/wireless/realtek/rtlwifi/efuse.c
··· 1259 1259 break; 1260 1260 1261 1261 case EEPROM_93C46: 1262 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1263 - "RTL8XXX did not boot from eeprom, check it !!\n"); 1262 + pr_err("RTL8XXX did not boot from eeprom, check it !!\n"); 1264 1263 return 1; 1265 1264 1266 1265 default:
+19 -29
drivers/net/wireless/realtek/rtlwifi/pci.c
··· 174 174 } 175 175 break; 176 176 default: 177 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 178 - "switch case %#x not processed\n", 179 - rtlpci->const_support_pciaspm); 177 + pr_err("switch case %#x not processed\n", 178 + rtlpci->const_support_pciaspm); 180 179 break; 181 180 } 182 181 ··· 1246 1247 &buffer_desc_dma); 1247 1248 1248 1249 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) { 1249 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1250 - "Cannot allocate TX ring (prio = %d)\n", 1251 - prio); 1250 + pr_err("Cannot allocate TX ring (prio = %d)\n", 1251 + prio); 1252 1252 return -ENOMEM; 1253 1253 } 1254 1254 ··· 1264 1266 sizeof(*desc) * entries, &desc_dma); 1265 1267 1266 1268 if (!desc || (unsigned long)desc & 0xFF) { 1267 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1268 - "Cannot allocate TX ring (prio = %d)\n", prio); 1269 + pr_err("Cannot allocate TX ring (prio = %d)\n", prio); 1269 1270 return -ENOMEM; 1270 1271 } 1271 1272 ··· 1311 1314 &rtlpci->rx_ring[rxring_idx].dma); 1312 1315 if (!rtlpci->rx_ring[rxring_idx].buffer_desc || 1313 1316 (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) { 1314 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1315 - "Cannot allocate RX ring\n"); 1317 + pr_err("Cannot allocate RX ring\n"); 1316 1318 return -ENOMEM; 1317 1319 } 1318 1320 ··· 1334 1338 &rtlpci->rx_ring[rxring_idx].dma); 1335 1339 if (!rtlpci->rx_ring[rxring_idx].desc || 1336 1340 (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) { 1337 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1338 - "Cannot allocate RX ring\n"); 1341 + pr_err("Cannot allocate RX ring\n"); 1339 1342 return -ENOMEM; 1340 1343 } 1341 1344 ··· 1794 1799 1795 1800 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev) 1796 1801 { 1797 - struct rtl_priv *rtlpriv = rtl_priv(hw); 1798 1802 int err; 1799 1803 1800 1804 _rtl_pci_init_struct(hw, pdev); 1801 1805 1802 1806 err = _rtl_pci_init_trx_ring(hw); 1803 1807 if (err) { 1804 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1805 - "tx ring initialization failed\n"); 1808 + pr_err("tx ring initialization failed\n"); 1806 1809 return err; 1807 1810 } 1808 1811 ··· 2167 2174 2168 2175 err = pci_enable_device(pdev); 2169 2176 if (err) { 2170 - RT_ASSERT(false, "%s : Cannot enable new PCI device\n", 2177 + WARN_ONCE(true, "%s : Cannot enable new PCI device\n", 2171 2178 pci_name(pdev)); 2172 2179 return err; 2173 2180 } 2174 2181 2175 2182 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { 2176 2183 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 2177 - RT_ASSERT(false, 2178 - "Unable to obtain 32bit DMA for consistent allocations\n"); 2184 + WARN_ONCE(true, 2185 + "rtlwifi: Unable to obtain 32bit DMA for consistent allocations\n"); 2179 2186 err = -ENOMEM; 2180 2187 goto fail1; 2181 2188 } ··· 2186 2193 hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) + 2187 2194 sizeof(struct rtl_priv), &rtl_ops); 2188 2195 if (!hw) { 2189 - RT_ASSERT(false, 2196 + WARN_ONCE(true, 2190 2197 "%s : ieee80211 alloc failed\n", pci_name(pdev)); 2191 2198 err = -ENOMEM; 2192 2199 goto fail1; ··· 2225 2232 /* MEM map */ 2226 2233 err = pci_request_regions(pdev, KBUILD_MODNAME); 2227 2234 if (err) { 2228 - RT_ASSERT(false, "Can't obtain PCI resources\n"); 2235 + WARN_ONCE(true, "rtlwifi: Can't obtain PCI resources\n"); 2229 2236 goto fail1; 2230 2237 } 2231 2238 ··· 2238 2245 (unsigned long)pci_iomap(pdev, 2239 2246 rtlpriv->cfg->bar_id, pmem_len); 2240 2247 if (rtlpriv->io.pci_mem_start == 0) { 2241 - RT_ASSERT(false, "Can't map PCI mem\n"); 2248 + WARN_ONCE(true, "rtlwifi: Can't map PCI mem\n"); 2242 2249 err = -ENOMEM; 2243 2250 goto fail2; 2244 2251 } ··· 2268 2275 rtlpriv->cfg->ops->read_eeprom_info(hw); 2269 2276 2270 2277 if (rtlpriv->cfg->ops->init_sw_vars(hw)) { 2271 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n"); 2278 + pr_err("Can't init_sw_vars\n"); 2272 2279 err = -ENODEV; 2273 2280 goto fail3; 2274 2281 } ··· 2280 2287 /* Init mac80211 sw */ 2281 2288 err = rtl_init_core(hw); 2282 2289 if (err) { 2283 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2284 - "Can't allocate sw for mac80211\n"); 2290 + pr_err("Can't allocate sw for mac80211\n"); 2285 2291 goto fail3; 2286 2292 } 2287 2293 2288 2294 /* Init PCI sw */ 2289 2295 err = rtl_pci_init(hw, pdev); 2290 2296 if (err) { 2291 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n"); 2297 + pr_err("Failed to init PCI\n"); 2292 2298 goto fail3; 2293 2299 } 2294 2300 2295 2301 err = ieee80211_register_hw(hw); 2296 2302 if (err) { 2297 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2298 - "Can't register mac80211 hw.\n"); 2303 + pr_err("Can't register mac80211 hw.\n"); 2299 2304 err = -ENODEV; 2300 2305 goto fail3; 2301 2306 } ··· 2301 2310 2302 2311 err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group); 2303 2312 if (err) { 2304 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2305 - "failed to create sysfs device attributes\n"); 2313 + pr_err("failed to create sysfs device attributes\n"); 2306 2314 goto fail3; 2307 2315 } 2308 2316
+1 -2
drivers/net/wireless/realtek/rtlwifi/ps.c
··· 150 150 break; 151 151 152 152 default: 153 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 154 - "switch case %#x not processed\n", state_toset); 153 + pr_err("switch case %#x not processed\n", state_toset); 155 154 break; 156 155 } 157 156
+1 -2
drivers/net/wireless/realtek/rtlwifi/rc.c
··· 267 267 268 268 rate_priv = kzalloc(sizeof(struct rtl_rate_priv), gfp); 269 269 if (!rate_priv) { 270 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 271 - "Unable to allocate private rc structure\n"); 270 + pr_err("Unable to allocate private rc structure\n"); 272 271 return NULL; 273 272 } 274 273
+1 -1
drivers/net/wireless/realtek/rtlwifi/regd.c
··· 440 440 441 441 if (rtlpriv->regd.country_code >= COUNTRY_CODE_MAX) { 442 442 RT_TRACE(rtlpriv, COMP_REGD, DBG_DMESG, 443 - "rtl: EEPROM indicates invalid contry code, world wide 13 should be used\n"); 443 + "rtl: EEPROM indicates invalid country code, world wide 13 should be used\n"); 444 444 445 445 rtlpriv->regd.country_code = COUNTRY_CODE_WORLD_WIDE_13; 446 446 }
+13 -31
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.c
··· 125 125 pagenums = size / FW_8192C_PAGE_SIZE; 126 126 remainsize = size % FW_8192C_PAGE_SIZE; 127 127 128 - if (pagenums > 8) { 129 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 130 - "Page numbers should not greater then 8\n"); 131 - } 128 + if (pagenums > 8) 129 + pr_err("Page numbers should not greater then 8\n"); 132 130 133 131 for (page = 0; page < pagenums; page++) { 134 132 offset = page * FW_8192C_PAGE_SIZE; ··· 155 157 (!(value32 & FWDL_CHKSUM_RPT))); 156 158 157 159 if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) { 158 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 159 - "chksum report faill ! REG_MCUFWDL:0x%08x .\n", 160 - value32); 160 + pr_err("chksum report fail! REG_MCUFWDL:0x%08x .\n", 161 + value32); 161 162 goto exit; 162 163 } 163 - 164 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, 165 - "Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32); 166 - 167 164 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL); 168 165 value32 |= MCUFWDL_RDY; 169 166 value32 &= ~WINTINI_RDY; ··· 169 176 170 177 do { 171 178 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL); 172 - if (value32 & WINTINI_RDY) { 173 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, 174 - "Polling FW ready success!! REG_MCUFWDL:0x%08x.\n", 175 - value32); 176 - err = 0; 177 - goto exit; 178 - } 179 + if (value32 & WINTINI_RDY) 180 + return 0; 179 181 180 182 udelay(FW_8192C_POLLING_DELAY); 181 183 182 184 } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT); 183 185 184 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 185 - "Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32); 186 + pr_err("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", 187 + value32); 186 188 187 189 exit: 188 190 return err; ··· 222 234 _rtl88e_enable_fw_download(hw, false); 223 235 224 236 err = _rtl88e_fw_free_to_go(hw); 225 - if (err) { 226 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 227 - "Firmware is not ready to run!\n"); 228 - } else { 229 - RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, 230 - "Firmware is ready to run!\n"); 231 - } 237 + if (err) 238 + pr_err("Firmware is not ready to run!\n"); 232 239 233 240 return 0; 234 241 } ··· 292 309 while (!write_sucess) { 293 310 wait_writeh2c_limit--; 294 311 if (wait_writeh2c_limit == 0) { 295 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 296 - "Write H2C fail because no trigger for FW INT!\n"); 312 + pr_err("Write H2C fail because no trigger for FW INT!\n"); 297 313 break; 298 314 } 299 315 ··· 416 434 u32 tmp_cmdbuf[2]; 417 435 418 436 if (!rtlhal->fw_ready) { 419 - RT_ASSERT(false, 420 - "return H2C cmd because of Fw download fail!!!\n"); 437 + WARN_ONCE(true, 438 + "rtl8188ee: error H2C cmd because of Fw download fail!!!\n"); 421 439 return; 422 440 } 423 441
+13 -20
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/hw.c
··· 358 358 case HAL_DEF_WOWLAN: 359 359 break; 360 360 default: 361 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 362 - "switch case %#x not processed\n", variable); 361 + pr_err("switch case %#x not processed\n", variable); 363 362 break; 364 363 } 365 364 } ··· 571 572 acm_ctrl &= (~ACMHW_VOQEN); 572 573 break; 573 574 default: 574 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 575 - "switch case %#x not processed\n", 576 - e_aci); 575 + pr_err("switch case %#x not processed\n", 576 + e_aci); 577 577 break; 578 578 } 579 579 } ··· 735 737 2, array); 736 738 break; } 737 739 default: 738 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 739 - "switch case %#x not processed\n", variable); 740 + pr_err("switch case %#x not processed\n", variable); 740 741 break; 741 742 } 742 743 } ··· 756 759 break; 757 760 758 761 if (count > POLLING_LLT_THRESHOLD) { 759 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 760 - "Failed to polling write LLT done at address %d!\n", 761 - address); 762 + pr_err("Failed to polling write LLT done at address %d!\n", 763 + address); 762 764 status = false; 763 765 break; 764 766 } ··· 1092 1096 1093 1097 rtstatus = _rtl88ee_init_mac(hw); 1094 1098 if (rtstatus != true) { 1095 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); 1099 + pr_info("Init MAC failed\n"); 1096 1100 err = 1; 1097 1101 goto exit; 1098 1102 } ··· 1248 1252 "Set Network type to AP!\n"); 1249 1253 break; 1250 1254 default: 1251 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1252 - "Network type %d not support!\n", type); 1255 + pr_err("Network type %d not support!\n", type); 1253 1256 return 1; 1254 1257 break; 1255 1258 } ··· 1347 1352 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); 1348 1353 break; 1349 1354 default: 1350 - RT_ASSERT(false, "invalid aci: %d !\n", aci); 1355 + WARN_ONCE(true, "rtl8188ee: invalid aci: %d !\n", aci); 1351 1356 break; 1352 1357 } 1353 1358 } ··· 1982 1987 rtlefuse->autoload_failflag = false; 1983 1988 _rtl88ee_read_adapter_info(hw); 1984 1989 } else { 1985 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); 1990 + pr_err("Autoload ERR!!\n"); 1986 1991 } 1987 1992 _rtl88ee_hal_customized_behavior(hw); 1988 1993 } ··· 2349 2354 enc_algo = CAM_AES; 2350 2355 break; 2351 2356 default: 2352 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2353 - "switch case %#x not processed\n", enc_algo); 2357 + pr_err("switch case %#x not processed\n", 2358 + enc_algo); 2354 2359 enc_algo = CAM_TKIP; 2355 2360 break; 2356 2361 } ··· 2368 2373 entry_id = 2369 2374 rtl_cam_get_free_entry(hw, p_macaddr); 2370 2375 if (entry_id >= TOTAL_CAM_ENTRY) { 2371 - RT_TRACE(rtlpriv, COMP_SEC, 2372 - DBG_EMERG, 2373 - "Can not find free hw security cam entry\n"); 2376 + pr_err("Can not find free hw security cam entry\n"); 2374 2377 return; 2375 2378 } 2376 2379 } else {
+17 -18
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c
··· 176 176 offset &= 0xff; 177 177 newoffset = offset; 178 178 if (RT_CANNOT_IO(hw)) { 179 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "return all one\n"); 179 + pr_err("return all one\n"); 180 180 return 0xFFFFFFFF; 181 181 } 182 182 tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD); ··· 220 220 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; 221 221 222 222 if (RT_CANNOT_IO(hw)) { 223 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "stop\n"); 223 + pr_err("stop\n"); 224 224 return; 225 225 } 226 226 offset &= 0xff; ··· 373 373 374 374 rtstatus = phy_config_bb_with_headerfile(hw, BASEBAND_CONFIG_PHY_REG); 375 375 if (!rtstatus) { 376 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n"); 376 + pr_err("Write BB Reg Fail!!\n"); 377 377 return false; 378 378 } 379 379 ··· 383 383 phy_config_bb_with_pghdr(hw, BASEBAND_CONFIG_PHY_REG); 384 384 } 385 385 if (!rtstatus) { 386 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n"); 386 + pr_err("BB_PG Reg Fail!!\n"); 387 387 return false; 388 388 } 389 389 rtstatus = 390 390 phy_config_bb_with_headerfile(hw, BASEBAND_CONFIG_AGC_TAB); 391 391 if (!rtstatus) { 392 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n"); 392 + pr_err("AGC Table Fail\n"); 393 393 return false; 394 394 } 395 395 rtlphy->cck_high_power = ··· 1095 1095 (u8 *)&iotype); 1096 1096 break; 1097 1097 default: 1098 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1099 - "Unknown Scan Backup operation.\n"); 1098 + pr_err("Unknown Scan Backup operation.\n"); 1100 1099 break; 1101 1100 } 1102 1101 } ··· 1136 1137 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc); 1137 1138 break; 1138 1139 default: 1139 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1140 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 1140 + pr_err("unknown bandwidth: %#X\n", 1141 + rtlphy->current_chan_bw); 1141 1142 break; 1142 1143 } 1143 1144 ··· 1161 1162 HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); 1162 1163 break; 1163 1164 default: 1164 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1165 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 1165 + pr_err("unknown bandwidth: %#X\n", 1166 + rtlphy->current_chan_bw); 1166 1167 break; 1167 1168 } 1168 1169 rtl88e_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); ··· 1230 1231 return 0; 1231 1232 if (rtlphy->set_bwmode_inprogress) 1232 1233 return 0; 1233 - RT_ASSERT((rtlphy->current_channel <= 14), 1234 - "WIRELESS_MODE_G but channel>14"); 1234 + WARN_ONCE((rtlphy->current_channel > 14), 1235 + "rtl8188ee: WIRELESS_MODE_G but channel>14"); 1235 1236 rtlphy->sw_chnl_inprogress = true; 1236 1237 rtlphy->sw_chnl_stage = 0; 1237 1238 rtlphy->sw_chnl_step = 0; ··· 1279 1280 1280 1281 rfdependcmdcnt = 0; 1281 1282 1282 - RT_ASSERT((channel >= 1 && channel <= 14), 1283 - "illegal channel for Zebra: %d\n", channel); 1283 + WARN_ONCE((channel < 1 || channel > 14), 1284 + "rtl8188ee: illegal channel for Zebra: %d\n", channel); 1284 1285 1285 1286 _rtl88e_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++, 1286 1287 MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG, ··· 1302 1303 currentcmd = &postcommoncmd[*step]; 1303 1304 break; 1304 1305 default: 1305 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1306 - "Invalid 'stage' = %d, Check it!\n", *stage); 1306 + pr_err("Invalid 'stage' = %d, Check it!\n", 1307 + *stage); 1307 1308 return true; 1308 1309 } 1309 1310 ··· 1366 1367 struct swchnlcmd *pcmd; 1367 1368 1368 1369 if (cmdtable == NULL) { 1369 - RT_ASSERT(false, "cmdtable cannot be NULL.\n"); 1370 + WARN_ONCE(true, "rtl8188ee: cmdtable cannot be NULL.\n"); 1370 1371 return false; 1371 1372 } 1372 1373
+1 -2
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/rf.c
··· 51 51 rtlphy->rfreg_chnlval[0]); 52 52 break; 53 53 default: 54 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 55 - "unknown bandwidth: %#X\n", bandwidth); 54 + pr_err("unknown bandwidth: %#X\n", bandwidth); 56 55 break; 57 56 } 58 57 }
+3 -5
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/sw.c
··· 165 165 /* for firmware buf */ 166 166 rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); 167 167 if (!rtlpriv->rtlhal.pfirmware) { 168 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 169 - "Can't alloc buffer for fw.\n"); 168 + pr_info("Can't alloc buffer for fw.\n"); 170 169 return 1; 171 170 } 172 171 ··· 176 177 rtlpriv->io.dev, GFP_KERNEL, hw, 177 178 rtl_fw_cb); 178 179 if (err) { 179 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 180 - "Failed to request firmware!\n"); 180 + pr_info("Failed to request firmware!\n"); 181 181 return 1; 182 182 } 183 183 ··· 276 278 .swctrl_lps = false, 277 279 .fwctrl_lps = false, 278 280 .msi_support = true, 279 - .debug = DBG_EMERG, 281 + .debug = 0, 280 282 }; 281 283 282 284 static const struct rtl_hal_cfg rtl88ee_hal_cfg = {
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/trx.c
··· 760 760 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val); 761 761 break; 762 762 default: 763 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 763 + WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n", 764 764 desc_name); 765 765 break; 766 766 } ··· 779 779 SET_RX_DESC_EOR(pdesc, 1); 780 780 break; 781 781 default: 782 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 782 + WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n", 783 783 desc_name); 784 784 break; 785 785 } ··· 799 799 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc); 800 800 break; 801 801 default: 802 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 802 + WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n", 803 803 desc_name); 804 804 break; 805 805 } ··· 815 815 ret = GET_RX_DESC_BUFF_ADDR(pdesc); 816 816 break; 817 817 default: 818 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 818 + WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n", 819 819 desc_name); 820 820 break; 821 821 }
+14 -32
drivers/net/wireless/realtek/rtlwifi/rtl8192c/fw_common.c
··· 145 145 pageNums = size / FW_8192C_PAGE_SIZE; 146 146 remainsize = size % FW_8192C_PAGE_SIZE; 147 147 148 - if (pageNums > 4) { 149 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 150 - "Page numbers should not greater then 4\n"); 151 - } 148 + if (pageNums > 4) 149 + pr_err("Page numbers should not greater then 4\n"); 152 150 153 151 for (page = 0; page < pageNums; page++) { 154 152 offset = page * FW_8192C_PAGE_SIZE; ··· 178 180 (!(value32 & FWDL_ChkSum_rpt))); 179 181 180 182 if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) { 181 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 182 - "chksum report faill ! REG_MCUFWDL:0x%08x .\n", 183 - value32); 183 + pr_err("chksum report fail! REG_MCUFWDL:0x%08x .\n", 184 + value32); 184 185 goto exit; 185 186 } 186 - 187 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, 188 - "Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32); 189 - 190 187 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL); 191 188 value32 |= MCUFWDL_RDY; 192 189 value32 &= ~WINTINI_RDY; ··· 191 198 192 199 do { 193 200 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL); 194 - if (value32 & WINTINI_RDY) { 195 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, 196 - "Polling FW ready success!! REG_MCUFWDL:0x%08x .\n", 197 - value32); 198 - err = 0; 199 - goto exit; 200 - } 201 + if (value32 & WINTINI_RDY) 202 + return 0; 201 203 202 204 mdelay(FW_8192C_POLLING_DELAY); 203 205 204 206 } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT); 205 207 206 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 207 - "Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32); 208 + pr_err("Polling FW ready fail! REG_MCUFWDL:0x%08x.\n", 209 + value32); 208 210 209 211 exit: 210 212 return err; ··· 238 250 _rtl92c_enable_fw_download(hw, false); 239 251 240 252 err = _rtl92c_fw_free_to_go(hw); 241 - if (err) { 242 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 243 - "Firmware is not ready to run!\n"); 244 - } else { 245 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, 246 - "Firmware is ready to run!\n"); 247 - } 253 + if (err) 254 + pr_err("Firmware is not ready to run!\n"); 248 255 249 256 return 0; 250 257 } ··· 310 327 while (!bwrite_sucess) { 311 328 wait_writeh2c_limmit--; 312 329 if (wait_writeh2c_limmit == 0) { 313 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 314 - "Write H2C fail because no trigger for FW INT!\n"); 330 + pr_err("Write H2C fail because no trigger for FW INT!\n"); 315 331 break; 316 332 } 317 333 ··· 467 485 u32 tmp_cmdbuf[2]; 468 486 469 487 if (!rtlhal->fw_ready) { 470 - RT_ASSERT(false, 471 - "return H2C cmd because of Fw download fail!!!\n"); 488 + WARN_ONCE(true, 489 + "rtl8192c-common: return H2C cmd because of Fw download fail!!!\n"); 472 490 return; 473 491 } 474 492 ··· 492 510 while (u1b_tmp & BIT(2)) { 493 511 delay--; 494 512 if (delay == 0) { 495 - RT_ASSERT(false, "8051 reset fail.\n"); 513 + WARN_ONCE(true, "rtl8192c-common: 8051 reset fail.\n"); 496 514 break; 497 515 } 498 516 udelay(50);
+14 -14
drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c
··· 77 77 u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw, 78 78 enum radio_path rfpath, u32 offset) 79 79 { 80 - RT_ASSERT(false, "deprecated!\n"); 80 + WARN_ONCE(true, "rtl8192c-common: _rtl92c_phy_fw_rf_serial_read deprecated!\n"); 81 81 return 0; 82 82 } 83 83 EXPORT_SYMBOL(_rtl92c_phy_fw_rf_serial_read); ··· 86 86 enum radio_path rfpath, u32 offset, 87 87 u32 data) 88 88 { 89 - RT_ASSERT(false, "deprecated!\n"); 89 + WARN_ONCE(true, "rtl8192c-common: _rtl92c_phy_fw_rf_serial_write deprecated!\n"); 90 90 } 91 91 EXPORT_SYMBOL(_rtl92c_phy_fw_rf_serial_write); 92 92 ··· 104 104 offset &= 0x3f; 105 105 newoffset = offset; 106 106 if (RT_CANNOT_IO(hw)) { 107 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "return all one\n"); 107 + pr_err("return all one\n"); 108 108 return 0xFFFFFFFF; 109 109 } 110 110 tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD); ··· 152 152 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; 153 153 154 154 if (RT_CANNOT_IO(hw)) { 155 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "stop\n"); 155 + pr_err("stop\n"); 156 156 return; 157 157 } 158 158 offset &= 0x3f; ··· 209 209 rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw, 210 210 BASEBAND_CONFIG_PHY_REG); 211 211 if (!rtstatus) { 212 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n"); 212 + pr_err("Write BB Reg Fail!!\n"); 213 213 return false; 214 214 } 215 215 if (rtlphy->rf_type == RF_1T2R) { ··· 222 222 BASEBAND_CONFIG_PHY_REG); 223 223 } 224 224 if (!rtstatus) { 225 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n"); 225 + pr_err("BB_PG Reg Fail!!\n"); 226 226 return false; 227 227 } 228 228 rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw, 229 229 BASEBAND_CONFIG_AGC_TAB); 230 230 if (!rtstatus) { 231 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n"); 231 + pr_err("AGC Table Fail\n"); 232 232 return false; 233 233 } 234 234 rtlphy->cck_high_power = ··· 745 745 return 0; 746 746 if (rtlphy->set_bwmode_inprogress) 747 747 return 0; 748 - RT_ASSERT((rtlphy->current_channel <= 14), 749 - "WIRELESS_MODE_G but channel>14"); 748 + WARN_ONCE((rtlphy->current_channel > 14), 749 + "rtl8192c-common: WIRELESS_MODE_G but channel>14"); 750 750 rtlphy->sw_chnl_inprogress = true; 751 751 rtlphy->sw_chnl_stage = 0; 752 752 rtlphy->sw_chnl_step = 0; ··· 792 792 struct swchnlcmd *pcmd; 793 793 794 794 if (cmdtable == NULL) { 795 - RT_ASSERT(false, "cmdtable cannot be NULL.\n"); 795 + WARN_ONCE(true, "rtl8192c-common: cmdtable cannot be NULL.\n"); 796 796 return false; 797 797 } 798 798 ··· 837 837 838 838 rfdependcmdcnt = 0; 839 839 840 - RT_ASSERT((channel >= 1 && channel <= 14), 841 - "illegal channel for Zebra: %d\n", channel); 840 + WARN_ONCE((channel < 1 || channel > 14), 841 + "rtl8192c-common: illegal channel for Zebra: %d\n", channel); 842 842 843 843 _rtl92c_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++, 844 844 MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG, ··· 860 860 currentcmd = &postcommoncmd[*step]; 861 861 break; 862 862 default: 863 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 864 - "Invalid 'stage' = %d, Check it!\n", *stage); 863 + pr_err("Invalid 'stage' = %d, Check it!\n", 864 + *stage); 865 865 return true; 866 866 } 867 867
+15 -24
drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.c
··· 140 140 case HAL_DEF_WOWLAN: 141 141 break; 142 142 default: 143 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 144 - "switch case %#x not processed\n", variable); 143 + pr_err("switch case %#x not processed\n", variable); 145 144 break; 146 145 } 147 146 } ··· 363 364 acm_ctrl &= (~AcmHw_VoqEn); 364 365 break; 365 366 default: 366 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 367 - "switch case %#x not processed\n", 368 - e_aci); 367 + pr_err("switch case %#x not processed\n", 368 + e_aci); 369 369 break; 370 370 } 371 371 } ··· 549 551 rtl92c_fill_h2c_cmd(hw, H2C_92C_KEEP_ALIVE_CTRL, 2, array); 550 552 break; } 551 553 default: 552 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 553 - "switch case %d not processed\n", variable); 554 + pr_err("switch case %d not processed\n", variable); 554 555 break; 555 556 } 556 557 } ··· 570 573 break; 571 574 572 575 if (count > POLLING_LLT_THRESHOLD) { 573 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 574 - "Failed to polling write LLT done at address %d!\n", 575 - address); 576 + pr_err("Failed to polling write LLT done at address %d!\n", 577 + address); 576 578 status = false; 577 579 break; 578 580 } ··· 959 963 rtlpriv->intf_ops->disable_aspm(hw); 960 964 rtstatus = _rtl92ce_init_mac(hw); 961 965 if (!rtstatus) { 962 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); 966 + pr_err("Init MAC failed\n"); 963 967 err = 1; 964 968 goto exit; 965 969 } ··· 1124 1128 break; 1125 1129 } 1126 1130 1127 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, 1128 - "Chip Version ID: %s\n", versionid); 1131 + pr_info("Chip Version ID: %s\n", versionid); 1129 1132 1130 1133 switch (version & 0x3) { 1131 1134 case CHIP_88C: ··· 1138 1143 break; 1139 1144 default: 1140 1145 rtlphy->rf_type = RF_1T1R; 1141 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1142 - "ERROR RF_Type is set!!\n"); 1146 + pr_err("ERROR RF_Type is set!!\n"); 1143 1147 break; 1144 1148 } 1145 1149 ··· 1187 1193 "Set Network type to Mesh Point!\n"); 1188 1194 break; 1189 1195 default: 1190 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1191 - "Network type %d not supported!\n", type); 1196 + pr_err("Network type %d not supported!\n", type); 1192 1197 return 1; 1193 1198 1194 1199 } ··· 1285 1292 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); 1286 1293 break; 1287 1294 default: 1288 - RT_ASSERT(false, "invalid aci: %d !\n", aci); 1295 + WARN_ONCE(true, "rtl8192ce: invalid aci: %d !\n", aci); 1289 1296 break; 1290 1297 } 1291 1298 } ··· 1773 1780 rtlefuse->autoload_failflag = false; 1774 1781 _rtl92ce_read_adapter_info(hw); 1775 1782 } else { 1776 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); 1783 + pr_err("Autoload ERR!!\n"); 1777 1784 } 1778 1785 _rtl92ce_hal_customized_behavior(hw); 1779 1786 } ··· 2145 2152 enc_algo = CAM_AES; 2146 2153 break; 2147 2154 default: 2148 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2149 - "switch case %#x not processed\n", enc_algo); 2155 + pr_err("switch case %#x not processed\n", 2156 + enc_algo); 2150 2157 enc_algo = CAM_TKIP; 2151 2158 break; 2152 2159 } ··· 2164 2171 entry_id = rtl_cam_get_free_entry(hw, 2165 2172 p_macaddr); 2166 2173 if (entry_id >= TOTAL_CAM_ENTRY) { 2167 - RT_TRACE(rtlpriv, COMP_SEC, 2168 - DBG_EMERG, 2169 - "Can not find free hw security cam entry\n"); 2174 + pr_err("Can not find free hw security cam entry\n"); 2170 2175 return; 2171 2176 } 2172 2177 } else {
+3 -4
drivers/net/wireless/realtek/rtlwifi/rtl8192ce/led.c
··· 57 57 rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg & 0x0f) | BIT(5)); 58 58 break; 59 59 default: 60 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 61 - "switch case %#x not processed\n", pled->ledpin); 60 + pr_err("switch case %#x not processed\n", 61 + pled->ledpin); 62 62 break; 63 63 } 64 64 pled->ledon = true; ··· 92 92 rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg | BIT(3))); 93 93 break; 94 94 default: 95 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 96 - "switch case %#x not processed\n", pled->ledpin); 95 + pr_info("switch case %#x not processed\n", pled->ledpin); 97 96 break; 98 97 } 99 98 pled->ledon = false;
+7 -8
drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.c
··· 297 297 break; 298 298 case RF90_PATH_C: 299 299 case RF90_PATH_D: 300 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 301 - "switch case %#x not processed\n", rfpath); 300 + pr_info("Incorrect rfpath %#x\n", rfpath); 302 301 break; 303 302 default: 303 + pr_info("switch case %#x not processed\n", rfpath); 304 304 break; 305 305 } 306 306 return true; ··· 340 340 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc); 341 341 break; 342 342 default: 343 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 344 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 343 + pr_info("unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 345 344 break; 346 345 } 347 346 ··· 364 365 HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); 365 366 break; 366 367 default: 367 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 368 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 368 + pr_err("unknown bandwidth: %#X\n", 369 + rtlphy->current_chan_bw); 369 370 break; 370 371 } 371 372 rtl92ce_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); ··· 545 546 break; 546 547 } 547 548 default: 548 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 549 - "switch case %#x not processed\n", rfpwr_state); 549 + pr_err("switch case %#x not processed\n", 550 + rfpwr_state); 550 551 bresult = false; 551 552 break; 552 553 }
+1 -2
drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c
··· 51 51 rtlphy->rfreg_chnlval[0]); 52 52 break; 53 53 default: 54 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 55 - "unknown bandwidth: %#X\n", bandwidth); 54 + pr_err("unknown bandwidth: %#X\n", bandwidth); 56 55 break; 57 56 } 58 57 }
+3 -5
drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c
··· 158 158 /* for firmware buf */ 159 159 rtlpriv->rtlhal.pfirmware = vzalloc(0x4000); 160 160 if (!rtlpriv->rtlhal.pfirmware) { 161 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 162 - "Can't alloc buffer for fw\n"); 161 + pr_err("Can't alloc buffer for fw\n"); 163 162 return 1; 164 163 } 165 164 ··· 172 173 rtlpriv->io.dev, GFP_KERNEL, hw, 173 174 rtl_fw_cb); 174 175 if (err) { 175 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 176 - "Failed to request firmware!\n"); 176 + pr_err("Failed to request firmware!\n"); 177 177 return 1; 178 178 } 179 179 ··· 247 249 .inactiveps = true, 248 250 .swctrl_lps = false, 249 251 .fwctrl_lps = true, 250 - .debug = DBG_EMERG, 252 + .debug = 0, 251 253 }; 252 254 253 255 static const struct rtl_hal_cfg rtl92ce_hal_cfg = {
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8192ce/trx.c
··· 670 670 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val); 671 671 break; 672 672 default: 673 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 673 + WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n", 674 674 desc_name); 675 675 break; 676 676 } ··· 690 690 SET_RX_DESC_EOR(pdesc, 1); 691 691 break; 692 692 default: 693 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 693 + WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n", 694 694 desc_name); 695 695 break; 696 696 } ··· 710 710 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(p_desc); 711 711 break; 712 712 default: 713 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 713 + WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n", 714 714 desc_name); 715 715 break; 716 716 } ··· 726 726 ret = GET_RX_DESC_BUFF_ADDR(p_desc); 727 727 break; 728 728 default: 729 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 729 + WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n", 730 730 desc_name); 731 731 break; 732 732 }
+12 -23
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c
··· 452 452 break; 453 453 } 454 454 if (pollingCount++ > 100) { 455 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, 456 - "Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n"); 455 + pr_err("Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n"); 457 456 return -ENODEV; 458 457 } 459 458 } while (true); ··· 485 486 break; 486 487 } 487 488 if (pollingCount++ > 1000) { 488 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, 489 - "Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n"); 489 + pr_err("Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n"); 490 490 return -ENODEV; 491 491 } 492 492 } while (true); ··· 685 687 u8 queue_sel) 686 688 { 687 689 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; 688 - struct rtl_priv *rtlpriv = rtl_priv(hw); 689 690 690 691 if (!wmm_enable) { /* typical setting */ 691 692 beQ = QUEUE_LOW; ··· 702 705 hiQ = QUEUE_HIGH; 703 706 } 704 707 _rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ); 705 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Tx queue select :0x%02x..\n", 706 - queue_sel); 708 + pr_info("Tx queue select :0x%02x..\n", queue_sel); 707 709 } 708 710 709 711 static void _rtl92cu_init_chipN_queue_priority(struct ieee80211_hw *hw, ··· 761 765 break; 762 766 } 763 767 rtl_write_byte(rtlpriv, (REG_TRXDMA_CTRL+1), hq_sele); 764 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Tx queue select :0x%02x..\n", 765 - hq_sele); 768 + pr_info("Tx queue select :0x%02x..\n", hq_sele); 766 769 } 767 770 768 771 static void _rtl92cu_init_queue_priority(struct ieee80211_hw *hw, ··· 843 848 err = _rtl92cu_init_power_on(hw); 844 849 845 850 if (err) { 846 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 847 - "Failed to init power on!\n"); 851 + pr_err("Failed to init power on!\n"); 848 852 return err; 849 853 } 850 854 if (!wmm_enable) { ··· 854 860 : WMM_CHIP_A_TX_PAGE_BOUNDARY; 855 861 } 856 862 if (false == rtl92c_init_llt_table(hw, boundary)) { 857 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 858 - "Failed to init LLT Table!\n"); 863 + pr_err("Failed to init LLT Table!\n"); 859 864 return -EINVAL; 860 865 } 861 866 _rtl92cu_init_queue_reserved_page(hw, wmm_enable, out_ep_nums, ··· 979 986 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CU; 980 987 err = _rtl92cu_init_mac(hw); 981 988 if (err) { 982 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "init mac failed!\n"); 989 + pr_err("init mac failed!\n"); 983 990 goto exit; 984 991 } 985 992 err = rtl92c_download_fw(hw); ··· 1092 1099 udelay(50); 1093 1100 } 1094 1101 if (retry_cnts >= 100) { 1095 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1096 - "#####=> 8051 reset failed!.........................\n"); 1102 + pr_err("8051 reset failed!.........................\n"); 1097 1103 /* if 8051 reset fail, reset MAC. */ 1098 1104 rtl_write_byte(rtlpriv, 1099 1105 REG_SYS_FUNC_EN + 1, ··· 1332 1340 "Set Network type to AP!\n"); 1333 1341 break; 1334 1342 default: 1335 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1336 - "Network type %d not supported!\n", type); 1343 + pr_err("Network type %d not supported!\n", type); 1337 1344 goto error_out; 1338 1345 } 1339 1346 rtl_write_byte(rtlpriv, MSR, bt_msr); ··· 1546 1555 case HAL_DEF_WOWLAN: 1547 1556 break; 1548 1557 default: 1549 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1550 - "switch case %#x not processed\n", variable); 1558 + pr_err("switch case %#x not processed\n", variable); 1551 1559 break; 1552 1560 } 1553 1561 } ··· 1780 1790 u4b_ac_param); 1781 1791 break; 1782 1792 default: 1783 - RT_ASSERT(false, "invalid aci: %d !\n", 1793 + WARN_ONCE(true, "rtl8192cu: invalid aci: %d !\n", 1784 1794 e_aci); 1785 1795 break; 1786 1796 } ··· 1916 1926 break; 1917 1927 } 1918 1928 default: 1919 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1920 - "switch case %#x not processed\n", variable); 1929 + pr_err("switch case %#x not processed\n", variable); 1921 1930 break; 1922 1931 } 1923 1932 }
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/led.c
··· 57 57 rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg & 0x0f) | BIT(5)); 58 58 break; 59 59 default: 60 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 61 - "switch case %#x not processed\n", pled->ledpin); 60 + pr_err("switch case %#x not processed\n", 61 + pled->ledpin); 62 62 break; 63 63 } 64 64 pled->ledon = true; ··· 90 90 rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg | BIT(3))); 91 91 break; 92 92 default: 93 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 94 - "switch case %#x not processed\n", pled->ledpin); 93 + pr_err("switch case %#x not processed\n", 94 + pled->ledpin); 95 95 break; 96 96 } 97 97 pled->ledon = false;
+4 -8
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/mac.c
··· 157 157 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) 158 158 break; 159 159 if (count > POLLING_LLT_THRESHOLD) { 160 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 161 - "Failed to polling write LLT done at address %d! _LLT_OP_VALUE(%x)\n", 162 - address, _LLT_OP_VALUE(value)); 160 + pr_err("Failed to polling write LLT done at address %d! _LLT_OP_VALUE(%x)\n", 161 + address, _LLT_OP_VALUE(value)); 163 162 status = false; 164 163 break; 165 164 } ··· 261 262 enc_algo = CAM_AES; 262 263 break; 263 264 default: 264 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 265 - "illegal switch case\n"); 265 + pr_err("illegal switch case\n"); 266 266 enc_algo = CAM_TKIP; 267 267 break; 268 268 } ··· 278 280 entry_id = rtl_cam_get_free_entry(hw, 279 281 p_macaddr); 280 282 if (entry_id >= TOTAL_CAM_ENTRY) { 281 - RT_TRACE(rtlpriv, COMP_SEC, 282 - DBG_EMERG, 283 - "Can not find free hw security cam entry\n"); 283 + pr_err("Can not find free hw security cam entry\n"); 284 284 return; 285 285 } 286 286 } else {
+7 -8
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/phy.c
··· 274 274 break; 275 275 case RF90_PATH_C: 276 276 case RF90_PATH_D: 277 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 278 - "switch case %#x not processed\n", rfpath); 277 + pr_err("switch case %#x not processed\n", rfpath); 279 278 break; 280 279 default: 281 280 break; ··· 313 314 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc); 314 315 break; 315 316 default: 316 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 317 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 317 + pr_err("unknown bandwidth: %#X\n", 318 + rtlphy->current_chan_bw); 318 319 break; 319 320 } 320 321 switch (rtlphy->current_chan_bw) { ··· 335 336 HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); 336 337 break; 337 338 default: 338 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 339 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 339 + pr_err("unknown bandwidth: %#X\n", 340 + rtlphy->current_chan_bw); 340 341 break; 341 342 } 342 343 rtl92cu_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); ··· 508 509 _rtl92c_phy_set_rf_sleep(hw); 509 510 break; 510 511 default: 511 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 512 - "switch case %#x not processed\n", rfpwr_state); 512 + pr_err("switch case %#x not processed\n", 513 + rfpwr_state); 513 514 bresult = false; 514 515 break; 515 516 }
+1 -2
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c
··· 51 51 rtlphy->rfreg_chnlval[0]); 52 52 break; 53 53 default: 54 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 55 - "unknown bandwidth: %#X\n", bandwidth); 54 + pr_err("unknown bandwidth: %#X\n", bandwidth); 56 55 break; 57 56 } 58 57 }
+2 -3
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c
··· 68 68 /* for firmware buf */ 69 69 rtlpriv->rtlhal.pfirmware = vzalloc(0x4000); 70 70 if (!rtlpriv->rtlhal.pfirmware) { 71 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 72 - "Can't alloc buffer for fw\n"); 71 + pr_err("Can't alloc buffer for fw\n"); 73 72 return 1; 74 73 } 75 74 if (IS_VENDOR_UMC_A_CUT(rtlpriv->rtlhal.version) && ··· 157 158 158 159 static struct rtl_mod_params rtl92cu_mod_params = { 159 160 .sw_crypto = 0, 160 - .debug = DBG_EMERG, 161 + .debug = 0, 161 162 }; 162 163 163 164 module_param_named(swenc, rtl92cu_mod_params.sw_crypto, bool, 0444);
+1 -1
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c
··· 241 241 break; 242 242 default: 243 243 hw_queue_index = RTL_TXQ_BE; 244 - RT_ASSERT(false, "QSLT_BE queue, skb_queue:%d\n", 244 + WARN_ONCE(true, "rtl8192cu: QSLT_BE queue, skb_queue:%d\n", 245 245 mac80211_queue_index); 246 246 break; 247 247 }
+12 -22
drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.c
··· 125 125 _rtl92d_fill_dummy(bufferPtr, &size); 126 126 pagenums = size / FW_8192D_PAGE_SIZE; 127 127 remainSize = size % FW_8192D_PAGE_SIZE; 128 - if (pagenums > 8) { 129 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 130 - "Page numbers should not greater then 8\n"); 131 - } 128 + if (pagenums > 8) 129 + pr_err("Page numbers should not greater then 8\n"); 132 130 for (page = 0; page < pagenums; page++) { 133 131 offset = page * FW_8192D_PAGE_SIZE; 134 132 _rtl92d_fw_page_write(hw, page, (bufferPtr + offset), ··· 151 153 } while ((counter++ < FW_8192D_POLLING_TIMEOUT_COUNT) && 152 154 (!(value32 & FWDL_ChkSum_rpt))); 153 155 if (counter >= FW_8192D_POLLING_TIMEOUT_COUNT) { 154 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 155 - "chksum report faill ! REG_MCUFWDL:0x%08x\n", 156 - value32); 156 + pr_err("chksum report fail! REG_MCUFWDL:0x%08x\n", 157 + value32); 157 158 return -EIO; 158 159 } 159 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, 160 - "Checksum report OK ! REG_MCUFWDL:0x%08x\n", value32); 161 160 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL); 162 161 value32 |= MCUFWDL_RDY; 163 162 rtl_write_dword(rtlpriv, REG_MCUFWDL, value32); ··· 177 182 udelay(50); 178 183 u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1); 179 184 } 180 - RT_ASSERT((delay > 0), "8051 reset failed!\n"); 185 + WARN_ONCE((delay <= 0), "rtl8192de: 8051 reset failed!\n"); 181 186 RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG, 182 187 "=====> 8051 reset success (%d)\n", delay); 183 188 } ··· 321 326 value &= (~BIT(5)); 322 327 rtl_write_byte(rtlpriv, 0x1f, value); 323 328 spin_unlock_irqrestore(&globalmutex_for_fwdownload, flags); 324 - if (err) { 325 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 326 - "fw is not ready to run!\n"); 329 + if (err) 330 + pr_err("fw is not ready to run!\n"); 327 331 goto exit; 328 - } else { 329 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, "fw is ready to run!\n"); 330 - } 331 332 exit: 332 333 err = _rtl92d_fw_init(hw); 333 334 return err; ··· 398 407 while (!bwrite_success) { 399 408 wait_writeh2c_limmit--; 400 409 if (wait_writeh2c_limmit == 0) { 401 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 402 - "Write H2C fail because no trigger for FW INT!\n"); 410 + pr_err("Write H2C fail because no trigger for FW INT!\n"); 403 411 break; 404 412 } 405 413 boxnum = rtlhal->last_hmeboxnum; ··· 420 430 box_extreg = REG_HMEBOX_EXT_3; 421 431 break; 422 432 default: 423 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 424 - "switch case %#x not processed\n", boxnum); 433 + pr_err("switch case %#x not processed\n", 434 + boxnum); 425 435 break; 426 436 } 427 437 isfw_read = _rtl92d_check_fw_read_last_h2c(hw, boxnum); ··· 497 507 boxcontent[idx]); 498 508 break; 499 509 default: 500 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 501 - "switch case %#x not processed\n", cmd_len); 510 + pr_err("switch case %#x not processed\n", 511 + cmd_len); 502 512 break; 503 513 } 504 514 bwrite_success = true;
+13 -22
drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.c
··· 163 163 case HAL_DEF_WOWLAN: 164 164 break; 165 165 default: 166 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 167 - "switch case %#x not processed\n", variable); 166 + pr_err("switch case %#x not processed\n", variable); 168 167 break; 169 168 } 170 169 } ··· 357 358 acm_ctrl &= (~ACMHW_VOQEN); 358 359 break; 359 360 default: 360 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 361 - "switch case %#x not processed\n", 362 - e_aci); 361 + pr_err("switch case %#x not processed\n", 362 + e_aci); 363 363 break; 364 364 } 365 365 } ··· 498 500 break; 499 501 } 500 502 default: 501 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 502 - "switch case %#x not processed\n", variable); 503 + pr_err("switch case %#x not processed\n", variable); 503 504 break; 504 505 } 505 506 } ··· 517 520 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) 518 521 break; 519 522 if (count > POLLING_LLT_THRESHOLD) { 520 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 521 - "Failed to polling write LLT done at address %d!\n", 522 - address); 523 + pr_err("Failed to polling write LLT done at address %d!\n", 524 + address); 523 525 status = false; 524 526 break; 525 527 } ··· 916 920 /* rtlpriv->intf_ops->disable_aspm(hw); */ 917 921 rtstatus = _rtl92de_init_mac(hw); 918 922 if (!rtstatus) { 919 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); 923 + pr_err("Init MAC failed\n"); 920 924 err = 1; 921 925 spin_unlock_irqrestore(&globalmutex_for_power_and_efuse, flags); 922 926 return err; ··· 1115 1119 "Set Network type to AP!\n"); 1116 1120 break; 1117 1121 default: 1118 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1119 - "Network type %d not supported!\n", type); 1122 + pr_err("Network type %d not supported!\n", type); 1120 1123 return 1; 1121 - break; 1122 - 1123 1124 } 1124 1125 rtl_write_byte(rtlpriv, MSR, bt_msr); 1125 1126 rtlpriv->cfg->ops->led_control(hw, ledaction); ··· 1725 1732 break; 1726 1733 default: 1727 1734 chipver |= CHIP_92D_D_CUT; 1728 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Unknown CUT!\n"); 1735 + pr_err("Unknown CUT!\n"); 1729 1736 break; 1730 1737 } 1731 1738 rtlpriv->rtlhal.version = chipver; ··· 1809 1816 rtlefuse->autoload_failflag = false; 1810 1817 _rtl92de_read_adapter_info(hw); 1811 1818 } else { 1812 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); 1819 + pr_err("Autoload ERR!!\n"); 1813 1820 } 1814 1821 return; 1815 1822 } ··· 2162 2169 enc_algo = CAM_AES; 2163 2170 break; 2164 2171 default: 2165 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2166 - "switch case %#x not processed\n", enc_algo); 2172 + pr_err("switch case %#x not processed\n", 2173 + enc_algo); 2167 2174 enc_algo = CAM_TKIP; 2168 2175 break; 2169 2176 } ··· 2179 2186 entry_id = rtl_cam_get_free_entry(hw, 2180 2187 p_macaddr); 2181 2188 if (entry_id >= TOTAL_CAM_ENTRY) { 2182 - RT_TRACE(rtlpriv, COMP_SEC, 2183 - DBG_EMERG, 2184 - "Can not find free hw security cam entry\n"); 2189 + pr_err("Can not find free hw security cam entry\n"); 2185 2190 return; 2186 2191 } 2187 2192 } else {
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8192de/led.c
··· 66 66 rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg & 0x0f) | BIT(5)); 67 67 break; 68 68 default: 69 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 70 - "switch case %#x not processed\n", pled->ledpin); 69 + pr_err("switch case %#x not processed\n", 70 + pled->ledpin); 71 71 break; 72 72 } 73 73 pled->ledon = true; ··· 101 101 rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg | BIT(3))); 102 102 break; 103 103 default: 104 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 105 - "switch case %#x not processed\n", pled->ledpin); 104 + pr_err("switch case %#x not processed\n", 105 + pled->ledpin); 106 106 break; 107 107 } 108 108 pled->ledon = false;
+21 -24
drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c
··· 716 716 rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw, 717 717 BASEBAND_CONFIG_PHY_REG); 718 718 if (!rtstatus) { 719 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n"); 719 + pr_err("Write BB Reg Fail!!\n"); 720 720 return false; 721 721 } 722 722 ··· 731 731 BASEBAND_CONFIG_PHY_REG); 732 732 } 733 733 if (!rtstatus) { 734 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n"); 734 + pr_err("BB_PG Reg Fail!!\n"); 735 735 return false; 736 736 } 737 737 rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw, 738 738 BASEBAND_CONFIG_AGC_TAB); 739 739 if (!rtstatus) { 740 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n"); 740 + pr_err("AGC Table Fail\n"); 741 741 return false; 742 742 } 743 743 rtlphy->cck_high_power = (bool) (rtl_get_bbreg(hw, ··· 833 833 break; 834 834 case RF90_PATH_C: 835 835 case RF90_PATH_D: 836 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 837 - "switch case %#x not processed\n", rfpath); 836 + pr_err("switch case %#x not processed\n", rfpath); 838 837 break; 839 838 } 840 839 return true; ··· 986 987 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc); 987 988 break; 988 989 default: 989 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 990 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 990 + pr_err("unknown bandwidth: %#X\n", 991 + rtlphy->current_chan_bw); 991 992 break; 992 993 } 993 994 switch (rtlphy->current_chan_bw) { ··· 1018 1019 HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); 1019 1020 break; 1020 1021 default: 1021 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1022 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 1022 + pr_err("unknown bandwidth: %#X\n", 1023 + rtlphy->current_chan_bw); 1023 1024 break; 1024 1025 1025 1026 } ··· 2699 2700 struct swchnlcmd *pcmd; 2700 2701 2701 2702 if (cmdtable == NULL) { 2702 - RT_ASSERT(false, "cmdtable cannot be NULL\n"); 2703 + WARN_ONCE(true, "rtl8192de: cmdtable cannot be NULL\n"); 2703 2704 return false; 2704 2705 } 2705 2706 if (cmdtableidx >= cmdtablesz) ··· 2841 2842 rtl92d_phy_reload_iqk_setting(hw, channel); 2842 2843 break; 2843 2844 default: 2844 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2845 - "switch case %#x not processed\n", 2846 - currentcmd->cmdid); 2845 + pr_err("switch case %#x not processed\n", 2846 + currentcmd->cmdid); 2847 2847 break; 2848 2848 } 2849 2849 break; ··· 2891 2893 * 5G and 2.4G band. */ 2892 2894 if (channel <= 14) 2893 2895 return 0; 2894 - RT_ASSERT((channel > 14), "5G but channel<=14\n"); 2896 + WARN_ONCE((channel <= 14), "rtl8192de: 5G but channel<=14\n"); 2895 2897 break; 2896 2898 case BAND_ON_2_4G: 2897 2899 /* Get first channel error when change between 2898 2900 * 5G and 2.4G band. */ 2899 2901 if (channel > 14) 2900 2902 return 0; 2901 - RT_ASSERT((channel <= 14), "2G but channel>14\n"); 2903 + WARN_ONCE((channel > 14), "rtl8192de: 2G but channel>14\n"); 2902 2904 break; 2903 2905 default: 2904 - RT_ASSERT(false, "Invalid WirelessMode(%#x)!!\n", 2906 + WARN_ONCE(true, "rtl8192de: Invalid WirelessMode(%#x)!!\n", 2905 2907 rtlpriv->mac80211.mode); 2906 2908 break; 2907 2909 } ··· 2954 2956 rtl92d_dm_write_dig(hw); 2955 2957 break; 2956 2958 default: 2957 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2958 - "switch case %#x not processed\n", 2959 - rtlphy->current_io_type); 2959 + pr_err("switch case %#x not processed\n", 2960 + rtlphy->current_io_type); 2960 2961 break; 2961 2962 } 2962 2963 rtlphy->set_io_inprogress = false; ··· 2985 2988 postprocessing = true; 2986 2989 break; 2987 2990 default: 2988 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2989 - "switch case %#x not processed\n", iotype); 2991 + pr_err("switch case %#x not processed\n", 2992 + iotype); 2990 2993 break; 2991 2994 } 2992 2995 } while (false); ··· 3173 3176 _rtl92d_phy_set_rfsleep(hw); 3174 3177 break; 3175 3178 default: 3176 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 3177 - "switch case %#x not processed\n", rfpwr_state); 3179 + pr_err("switch case %#x not processed\n", 3180 + rfpwr_state); 3178 3181 bresult = false; 3179 3182 break; 3180 3183 } ··· 3333 3336 } 3334 3337 } 3335 3338 if (i == 200) 3336 - RT_ASSERT(false, "Another mac power off over time\n"); 3339 + WARN_ONCE(true, "rtl8192de: Another mac power off over time\n"); 3337 3340 } 3338 3341 } 3339 3342
+1 -2
drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.c
··· 63 63 } 64 64 break; 65 65 default: 66 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 67 - "unknown bandwidth: %#X\n", bandwidth); 66 + pr_err("unknown bandwidth: %#X\n", bandwidth); 68 67 break; 69 68 } 70 69 }
+4 -6
drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c
··· 171 171 /* for firmware buf */ 172 172 rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); 173 173 if (!rtlpriv->rtlhal.pfirmware) { 174 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 175 - "Can't alloc buffer for fw\n"); 174 + pr_err("Can't alloc buffer for fw\n"); 176 175 return 1; 177 176 } 178 177 ··· 184 185 rtlpriv->io.dev, GFP_KERNEL, hw, 185 186 rtl_fw_cb); 186 187 if (err) { 187 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 188 - "Failed to request firmware!\n"); 188 + pr_err("Failed to request firmware!\n"); 189 189 return 1; 190 190 } 191 191 ··· 254 256 .inactiveps = true, 255 257 .swctrl_lps = true, 256 258 .fwctrl_lps = false, 257 - .debug = DBG_EMERG, 259 + .debug = 0, 258 260 }; 259 261 260 262 static const struct rtl_hal_cfg rtl92de_hal_cfg = { ··· 400 402 401 403 ret = pci_register_driver(&rtl92de_driver); 402 404 if (ret) 403 - RT_ASSERT(false, "No device found\n"); 405 + WARN_ONCE(true, "rtl8192de: No device found\n"); 404 406 return ret; 405 407 } 406 408
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.c
··· 794 794 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val); 795 795 break; 796 796 default: 797 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 797 + WARN_ONCE(true, "rtl8192de: ERR txdesc :%d not processed\n", 798 798 desc_name); 799 799 break; 800 800 } ··· 814 814 SET_RX_DESC_EOR(pdesc, 1); 815 815 break; 816 816 default: 817 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 817 + WARN_ONCE(true, "rtl8192de: ERR rxdesc :%d not processed\n", 818 818 desc_name); 819 819 break; 820 820 } ··· 834 834 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(p_desc); 835 835 break; 836 836 default: 837 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 837 + WARN_ONCE(true, "rtl8192de: ERR txdesc :%d not processed\n", 838 838 desc_name); 839 839 break; 840 840 } ··· 848 848 ret = GET_RX_DESC_PKT_LEN(pdesc); 849 849 break; 850 850 default: 851 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 851 + WARN_ONCE(true, "rtl8192de: ERR rxdesc :%d not processed\n", 852 852 desc_name); 853 853 break; 854 854 }
+10 -30
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/fw.c
··· 122 122 pagenums = size / FW_8192C_PAGE_SIZE; 123 123 remainsize = size % FW_8192C_PAGE_SIZE; 124 124 125 - if (pagenums > 8) { 126 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 127 - "Page numbers should not greater then 8\n"); 128 - } 125 + if (pagenums > 8) 126 + pr_err("Page numbers should not greater then 8\n"); 129 127 130 128 for (page = 0; page < pagenums; page++) { 131 129 offset = page * FW_8192C_PAGE_SIZE; ··· 153 155 (!(value32 & FWDL_CHKSUM_RPT))); 154 156 155 157 if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) { 156 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 157 - "chksum report faill ! REG_MCUFWDL:0x%08x .\n", 158 - value32); 158 + pr_err("chksum report fail! REG_MCUFWDL:0x%08x\n", 159 + value32); 159 160 goto exit; 160 161 } 161 - 162 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, 163 - "Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32); 164 - 165 162 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL); 166 163 value32 |= MCUFWDL_RDY; 167 164 value32 &= ~WINTINI_RDY; ··· 167 174 168 175 do { 169 176 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL); 170 - if (value32 & WINTINI_RDY) { 171 - RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD , 172 - "Polling FW ready success!! REG_MCUFWDL:0x%08x. count = %d\n", 173 - value32, counter); 174 - err = 0; 175 - goto exit; 176 - } 177 + if (value32 & WINTINI_RDY) 178 + return 0; 177 179 178 180 udelay(FW_8192C_POLLING_DELAY*10); 179 181 180 182 } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT); 181 183 182 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 183 - "Polling FW ready fail!! REG_MCUFWDL:0x%08x. count = %d\n", 184 - value32, counter); 184 + pr_err("Polling FW ready fail!! REG_MCUFWDL:0x%08x. count = %d\n", 185 + value32, counter); 185 186 186 187 exit: 187 188 return err; ··· 227 240 _rtl92ee_enable_fw_download(hw, false); 228 241 229 242 err = _rtl92ee_fw_free_to_go(hw); 230 - if (err) { 231 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 232 - "Firmware is not ready to run!\n"); 233 - } else { 234 - RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD , 235 - "Firmware is ready to run!\n"); 236 - } 237 243 238 244 return 0; 239 245 } ··· 442 462 u32 tmp_cmdbuf[2]; 443 463 444 464 if (!rtlhal->fw_ready) { 445 - RT_ASSERT(false, 446 - "return H2C cmd because of Fw download fail!!!\n"); 465 + WARN_ONCE(true, 466 + "rtl8192ee: error H2C cmd because of Fw download fail!!!\n"); 447 467 return; 448 468 } 449 469
+6 -9
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/hw.c
··· 1006 1006 rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x100a); 1007 1007 1008 1008 /* Note Data sheet don't define */ 1009 - rtl_write_word(rtlpriv, 0x4C7, 0x80); 1009 + rtl_write_byte(rtlpriv, 0x4C7, 0x80); 1010 1010 1011 1011 rtl_write_byte(rtlpriv, REG_RX_PKT_LIMIT, 0x20); 1012 1012 ··· 1320 1320 rtl_write_byte(rtlpriv, 0x65, 1); 1321 1321 } 1322 1322 if (!rtstatus) { 1323 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); 1323 + pr_err("Init MAC failed\n"); 1324 1324 err = 1; 1325 1325 return err; 1326 1326 } ··· 1485 1485 "Set Network type to AP!\n"); 1486 1486 break; 1487 1487 default: 1488 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1489 - "Network type %d not support!\n", type); 1488 + pr_err("Network type %d not support!\n", type); 1490 1489 return 1; 1491 1490 } 1492 1491 ··· 1581 1582 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); 1582 1583 break; 1583 1584 default: 1584 - RT_ASSERT(false, "invalid aci: %d !\n", aci); 1585 + WARN_ONCE(true, "rtl8192ee: invalid aci: %d !\n", aci); 1585 1586 break; 1586 1587 } 1587 1588 } ··· 2205 2206 rtlefuse->autoload_failflag = false; 2206 2207 _rtl92ee_read_adapter_info(hw); 2207 2208 } else { 2208 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); 2209 + pr_err("Autoload ERR!!\n"); 2209 2210 } 2210 2211 _rtl92ee_hal_customized_behavior(hw); 2211 2212 ··· 2483 2484 entry_id = rtl_cam_get_free_entry(hw, 2484 2485 p_macaddr); 2485 2486 if (entry_id >= TOTAL_CAM_ENTRY) { 2486 - RT_TRACE(rtlpriv, COMP_SEC, 2487 - DBG_EMERG, 2488 - "Can not find free hw security cam entry\n"); 2487 + pr_err("Can not find free hw security cam entry\n"); 2489 2488 return; 2490 2489 } 2491 2490 } else {
+19 -20
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c
··· 170 170 offset &= 0xff; 171 171 newoffset = offset; 172 172 if (RT_CANNOT_IO(hw)) { 173 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "return all one\n"); 173 + pr_err("return all one\n"); 174 174 return 0xFFFFFFFF; 175 175 } 176 176 tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD); ··· 214 214 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; 215 215 216 216 if (RT_CANNOT_IO(hw)) { 217 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "stop\n"); 217 + pr_err("stop\n"); 218 218 return; 219 219 } 220 220 offset &= 0xff; ··· 650 650 651 651 rtstatus = phy_config_bb_with_hdr_file(hw, BASEBAND_CONFIG_PHY_REG); 652 652 if (!rtstatus) { 653 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n"); 653 + pr_err("Write BB Reg Fail!!\n"); 654 654 return false; 655 655 } 656 656 ··· 662 662 } 663 663 _rtl92ee_phy_txpower_by_rate_configuration(hw); 664 664 if (!rtstatus) { 665 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n"); 665 + pr_err("BB_PG Reg Fail!!\n"); 666 666 return false; 667 667 } 668 668 rtstatus = phy_config_bb_with_hdr_file(hw, BASEBAND_CONFIG_AGC_TAB); 669 669 if (!rtstatus) { 670 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n"); 670 + pr_err("AGC Table Fail\n"); 671 671 return false; 672 672 } 673 673 rtlphy->cck_high_power = (bool)(rtl_get_bbreg(hw, ··· 1176 1176 rate_section = 7; 1177 1177 break; 1178 1178 default: 1179 - RT_ASSERT(true, "Rate_Section is Illegal\n"); 1179 + WARN_ONCE(true, "rtl8192ee: Rate_Section is Illegal\n"); 1180 1180 break; 1181 1181 } 1182 1182 return rate_section; ··· 1239 1239 shift = 24; 1240 1240 break; 1241 1241 default: 1242 - RT_ASSERT(true, "Rate_Section is Illegal\n"); 1242 + WARN_ONCE(true, "rtl8192ee: Rate_Section is Illegal\n"); 1243 1243 break; 1244 1244 } 1245 1245 ··· 1675 1675 (u8 *)&iotype); 1676 1676 break; 1677 1677 default: 1678 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1679 - "Unknown Scan Backup operation.\n"); 1678 + pr_err("Unknown Scan Backup operation.\n"); 1680 1679 break; 1681 1680 } 1682 1681 } ··· 1716 1717 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc); 1717 1718 break; 1718 1719 default: 1719 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1720 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 1720 + pr_err("unknown bandwidth: %#X\n", 1721 + rtlphy->current_chan_bw); 1721 1722 break; 1722 1723 } 1723 1724 ··· 1741 1742 HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); 1742 1743 break; 1743 1744 default: 1744 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1745 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 1745 + pr_err("unknown bandwidth: %#X\n", 1746 + rtlphy->current_chan_bw); 1746 1747 break; 1747 1748 } 1748 1749 rtl92ee_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); ··· 1810 1811 return 0; 1811 1812 if (rtlphy->set_bwmode_inprogress) 1812 1813 return 0; 1813 - RT_ASSERT((rtlphy->current_channel <= 14), 1814 - "WIRELESS_MODE_G but channel>14"); 1814 + WARN_ONCE((rtlphy->current_channel > 14), 1815 + "rtl8192ee: WIRELESS_MODE_G but channel>14"); 1815 1816 rtlphy->sw_chnl_inprogress = true; 1816 1817 rtlphy->sw_chnl_stage = 0; 1817 1818 rtlphy->sw_chnl_step = 0; ··· 1859 1860 1860 1861 rfdependcmdcnt = 0; 1861 1862 1862 - RT_ASSERT((channel >= 1 && channel <= 14), 1863 - "illegal channel for Zebra: %d\n", channel); 1863 + WARN_ONCE((channel < 1 || channel > 14), 1864 + "rtl8192ee: illegal channel for Zebra: %d\n", channel); 1864 1865 1865 1866 _rtl92ee_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++, 1866 1867 MAX_RFDEPENDCMD_CNT, ··· 1883 1884 currentcmd = &postcommoncmd[*step]; 1884 1885 break; 1885 1886 default: 1886 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1887 - "Invalid 'stage' = %d, Check it!\n" , *stage); 1887 + pr_err("Invalid 'stage' = %d, Check it!\n", 1888 + *stage); 1888 1889 return true; 1889 1890 } 1890 1891 ··· 1947 1948 struct swchnlcmd *pcmd; 1948 1949 1949 1950 if (cmdtable == NULL) { 1950 - RT_ASSERT(false, "cmdtable cannot be NULL.\n"); 1951 + WARN_ONCE(true, "rtl8192ee: cmdtable cannot be NULL.\n"); 1951 1952 return false; 1952 1953 } 1953 1954
+1 -2
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/rf.c
··· 55 55 rtlphy->rfreg_chnlval[0]); 56 56 break; 57 57 default: 58 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 59 - "unknown bandwidth: %#X\n", bandwidth); 58 + pr_err("unknown bandwidth: %#X\n", bandwidth); 60 59 break; 61 60 } 62 61 }
+3 -5
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/sw.c
··· 165 165 /* for firmware buf */ 166 166 rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); 167 167 if (!rtlpriv->rtlhal.pfirmware) { 168 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 169 - "Can't alloc buffer for fw\n"); 168 + pr_err("Can't alloc buffer for fw\n"); 170 169 return 1; 171 170 } 172 171 ··· 178 179 rtlpriv->io.dev, GFP_KERNEL, hw, 179 180 rtl_fw_cb); 180 181 if (err) { 181 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 182 - "Failed to request firmware!\n"); 182 + pr_err("Failed to request firmware!\n"); 183 183 return 1; 184 184 } 185 185 ··· 258 260 .swctrl_lps = false, 259 261 .fwctrl_lps = true, 260 262 .msi_support = true, 261 - .debug = DBG_EMERG, 263 + .debug = 0, 262 264 }; 263 265 264 266 static const struct rtl_hal_cfg rtl92ee_hal_cfg = {
+9 -6
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
··· 991 991 SET_RX_DESC_EOR(pdesc, 1); 992 992 break; 993 993 default: 994 - RT_ASSERT(false, 995 - "ERR rxdesc :%d not process\n", desc_name); 994 + WARN_ONCE(true, 995 + "rtl8192ee: ERR rxdesc :%d not processed\n", 996 + desc_name); 996 997 break; 997 998 } 998 999 } ··· 1012 1011 ret = GET_TXBUFFER_DESC_ADDR_LOW(pdesc, 1); 1013 1012 break; 1014 1013 default: 1015 - RT_ASSERT(false, 1016 - "ERR txdesc :%d not process\n", desc_name); 1014 + WARN_ONCE(true, 1015 + "rtl8192ee: ERR txdesc :%d not processed\n", 1016 + desc_name); 1017 1017 break; 1018 1018 } 1019 1019 } else { ··· 1029 1027 ret = GET_RX_DESC_BUFF_ADDR(pdesc); 1030 1028 break; 1031 1029 default: 1032 - RT_ASSERT(false, 1033 - "ERR rxdesc :%d not process\n", desc_name); 1030 + WARN_ONCE(true, 1031 + "rtl8192ee: ERR rxdesc :%d not processed\n", 1032 + desc_name); 1034 1033 break; 1035 1034 } 1036 1035 }
+17 -29
drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.c
··· 113 113 case RF_2T2R: 114 114 return 0x22; 115 115 default: 116 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Unknown RF type(%x)\n", 117 - rtlphy->rf_type); 116 + pr_err("Unknown RF type(%x)\n", rtlphy->rf_type); 118 117 break; 119 118 } 120 119 return 0x22; ··· 167 168 _rtl92s_fw_set_rqpn(hw); 168 169 169 170 if (buffer_len >= MAX_FIRMWARE_CODE_SIZE) { 170 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 171 - "Size over FIRMWARE_CODE_SIZE!\n"); 172 - 171 + pr_err("Size over FIRMWARE_CODE_SIZE!\n"); 173 172 return false; 174 173 } 175 174 ··· 236 239 } while (pollingcnt--); 237 240 238 241 if (!(cpustatus & IMEM_CHK_RPT) || (pollingcnt <= 0)) { 239 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 240 - "FW_STATUS_LOAD_IMEM FAIL CPU, Status=%x\n", 241 - cpustatus); 242 + pr_err("FW_STATUS_LOAD_IMEM FAIL CPU, Status=%x\n", 243 + cpustatus); 242 244 goto status_check_fail; 243 245 } 244 246 break; ··· 253 257 } while (pollingcnt--); 254 258 255 259 if (!(cpustatus & EMEM_CHK_RPT) || (pollingcnt <= 0)) { 256 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 257 - "FW_STATUS_LOAD_EMEM FAIL CPU, Status=%x\n", 258 - cpustatus); 260 + pr_err("FW_STATUS_LOAD_EMEM FAIL CPU, Status=%x\n", 261 + cpustatus); 259 262 goto status_check_fail; 260 263 } 261 264 262 265 /* Turn On CPU */ 263 266 rtstatus = _rtl92s_firmware_enable_cpu(hw); 264 267 if (!rtstatus) { 265 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 266 - "Enable CPU fail!\n"); 268 + pr_err("Enable CPU fail!\n"); 267 269 goto status_check_fail; 268 270 } 269 271 break; ··· 276 282 } while (pollingcnt--); 277 283 278 284 if (!(cpustatus & DMEM_CODE_DONE) || (pollingcnt <= 0)) { 279 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 280 - "Polling DMEM code done fail ! cpustatus(%#x)\n", 281 - cpustatus); 285 + pr_err("Polling DMEM code done fail ! cpustatus(%#x)\n", 286 + cpustatus); 282 287 goto status_check_fail; 283 288 } 284 289 ··· 301 308 302 309 if (((cpustatus & LOAD_FW_READY) != LOAD_FW_READY) || 303 310 (pollingcnt <= 0)) { 304 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 305 - "Polling Load Firmware ready fail ! cpustatus(%x)\n", 306 - cpustatus); 311 + pr_err("Polling Load Firmware ready fail ! cpustatus(%x)\n", 312 + cpustatus); 307 313 goto status_check_fail; 308 314 } 309 315 ··· 323 331 break; 324 332 325 333 default: 326 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, 327 - "Unknown status check!\n"); 334 + pr_err("Unknown status check!\n"); 328 335 rtstatus = false; 329 336 break; 330 337 } ··· 371 380 /* 2. Retrieve IMEM image. */ 372 381 if ((pfwheader->img_imem_size == 0) || (pfwheader->img_imem_size > 373 382 sizeof(firmware->fw_imem))) { 374 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 375 - "memory for data image is less than IMEM required\n"); 383 + pr_err("memory for data image is less than IMEM required\n"); 376 384 goto fail; 377 385 } else { 378 386 puc_mappedfile += fwhdr_size; ··· 383 393 384 394 /* 3. Retriecve EMEM image. */ 385 395 if (pfwheader->img_sram_size > sizeof(firmware->fw_emem)) { 386 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 387 - "memory for data image is less than EMEM required\n"); 396 + pr_err("memory for data image is less than EMEM required\n"); 388 397 goto fail; 389 398 } else { 390 399 puc_mappedfile += firmware->fw_imem_len; ··· 417 428 RT_8192S_FIRMWARE_HDR_EXCLUDE_PRI_SIZE; 418 429 break; 419 430 default: 420 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 421 - "Unexpected Download step!!\n"); 431 + pr_err("Unexpected Download step!!\n"); 422 432 goto fail; 423 433 } 424 434 ··· 426 438 ul_filelength); 427 439 428 440 if (!rtstatus) { 429 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n"); 441 + pr_err("fail!\n"); 430 442 goto fail; 431 443 } 432 444 433 445 /* <3> Check whether load FW process is ready */ 434 446 rtstatus = _rtl92s_firmware_checkready(hw, fwstatus); 435 447 if (!rtstatus) { 436 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n"); 448 + pr_err("rtl8192se: firmware fail!\n"); 437 449 goto fail; 438 450 } 439 451
+17 -26
drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c
··· 75 75 } 76 76 case HAL_DEF_WOWLAN: 77 77 break; 78 - default: { 79 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 80 - "switch case %#x not processed\n", variable); 81 - break; 82 - } 78 + default: 79 + pr_err("switch case %#x not processed\n", variable); 80 + break; 83 81 } 84 82 } 85 83 ··· 292 294 acm_ctrl &= (~AcmHw_VoqEn); 293 295 break; 294 296 default: 295 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 296 - "switch case %#x not processed\n", 297 - e_aci); 297 + pr_err("switch case %#x not processed\n", 298 + e_aci); 298 299 break; 299 300 } 300 301 } ··· 428 431 } 429 432 break; } 430 433 default: 431 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 432 - "switch case %#x not processed\n", variable); 434 + pr_err("switch case %#x not processed\n", variable); 433 435 break; 434 436 } 435 437 ··· 741 745 } while (pollingcnt--); 742 746 743 747 if (pollingcnt <= 0) { 744 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 745 - "Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", 746 - tmpu1b); 748 + pr_err("Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", 749 + tmpu1b); 747 750 tmpu1b = rtl_read_byte(rtlpriv, CMDR); 748 751 rtl_write_byte(rtlpriv, CMDR, tmpu1b & (~TXDMA_EN)); 749 752 udelay(2); ··· 999 1004 1000 1005 /* 3. Initialize MAC/PHY Config by MACPHY_reg.txt */ 1001 1006 if (!rtl92s_phy_mac_config(hw)) { 1002 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "MAC Config failed\n"); 1007 + pr_err("MAC Config failed\n"); 1003 1008 err = rtstatus; 1004 1009 goto exit; 1005 1010 } ··· 1019 1024 1020 1025 /* 4. Initialize BB After MAC Config PHY_reg.txt, AGC_Tab.txt */ 1021 1026 if (!rtl92s_phy_bb_config(hw)) { 1022 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "BB Config failed\n"); 1027 + pr_err("BB Config failed\n"); 1023 1028 err = rtstatus; 1024 1029 goto exit; 1025 1030 } ··· 1189 1194 "Set Network type to AP!\n"); 1190 1195 break; 1191 1196 default: 1192 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1193 - "Network type %d not supported!\n", type); 1197 + pr_err("Network type %d not supported!\n", type); 1194 1198 return 1; 1195 1199 1196 1200 } ··· 1245 1251 rtl_write_dword(rtlpriv, EDCAPARA_VO, 0x2f3222); 1246 1252 break; 1247 1253 default: 1248 - RT_ASSERT(false, "invalid aci: %d !\n", aci); 1254 + WARN_ONCE(true, "rtl8192se: invalid aci: %d !\n", aci); 1249 1255 break; 1250 1256 } 1251 1257 } ··· 1679 1685 break; 1680 1686 1681 1687 case EEPROM_93C46: 1682 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1683 - "RTL819X Not boot from eeprom, check it !!\n"); 1688 + pr_err("RTL819X Not boot from eeprom, check it !!\n"); 1684 1689 return; 1685 1690 1686 1691 default: ··· 2023 2030 rtlefuse->autoload_failflag = false; 2024 2031 _rtl92se_read_adapter_info(hw); 2025 2032 } else { 2026 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); 2033 + pr_err("Autoload ERR!!\n"); 2027 2034 rtlefuse->autoload_failflag = true; 2028 2035 } 2029 2036 } ··· 2456 2463 enc_algo = CAM_AES; 2457 2464 break; 2458 2465 default: 2459 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2460 - "switch case %#x not processed\n", enc_algo); 2466 + pr_err("switch case %#x not processed\n", 2467 + enc_algo); 2461 2468 enc_algo = CAM_TKIP; 2462 2469 break; 2463 2470 } ··· 2474 2481 entry_id = rtl_cam_get_free_entry(hw, 2475 2482 p_macaddr); 2476 2483 if (entry_id >= TOTAL_CAM_ENTRY) { 2477 - RT_TRACE(rtlpriv, 2478 - COMP_SEC, DBG_EMERG, 2479 - "Can not find free hw security cam entry\n"); 2484 + pr_err("Can not find free hw security cam entry\n"); 2480 2485 return; 2481 2486 } 2482 2487 } else {
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8192se/led.c
··· 63 63 rtl_write_byte(rtlpriv, LEDCFG, ledcfg & 0x0f); 64 64 break; 65 65 default: 66 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 67 - "switch case %#x not processed\n", pled->ledpin); 66 + pr_err("switch case %#x not processed\n", 67 + pled->ledpin); 68 68 break; 69 69 } 70 70 pled->ledon = true; ··· 99 99 rtl_write_byte(rtlpriv, LEDCFG, (ledcfg | BIT(3))); 100 100 break; 101 101 default: 102 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 103 - "switch case %#x not processed\n", pled->ledpin); 102 + pr_err("switch case %#x not processed\n", 103 + pled->ledpin); 104 104 break; 105 105 } 106 106 pled->ledon = false;
+19 -26
drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c
··· 235 235 void rtl92s_phy_scan_operation_backup(struct ieee80211_hw *hw, 236 236 u8 operation) 237 237 { 238 - struct rtl_priv *rtlpriv = rtl_priv(hw); 239 238 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 240 239 241 240 if (!is_hal_stop(rtlhal)) { ··· 246 247 rtl92s_phy_set_fw_cmd(hw, FW_CMD_RESUME_DM_BY_SCAN); 247 248 break; 248 249 default: 249 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 250 - "Unknown operation\n"); 250 + pr_err("Unknown operation\n"); 251 251 break; 252 252 } 253 253 } ··· 286 288 rtl_write_byte(rtlpriv, BW_OPMODE, reg_bw_opmode); 287 289 break; 288 290 default: 289 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 290 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 291 + pr_err("unknown bandwidth: %#X\n", 292 + rtlphy->current_chan_bw); 291 293 break; 292 294 } 293 295 ··· 311 313 rtl_write_byte(rtlpriv, RFPGA0_ANALOGPARAMETER2, 0x18); 312 314 break; 313 315 default: 314 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 315 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 316 + pr_err("unknown bandwidth: %#X\n", 317 + rtlphy->current_chan_bw); 316 318 break; 317 319 } 318 320 ··· 328 330 struct swchnlcmd *pcmd; 329 331 330 332 if (cmdtable == NULL) { 331 - RT_ASSERT(false, "cmdtable cannot be NULL\n"); 333 + WARN_ONCE(true, "rtl8192se: cmdtable cannot be NULL\n"); 332 334 return false; 333 335 } 334 336 ··· 372 374 373 375 rfdependcmdcnt = 0; 374 376 375 - RT_ASSERT((channel >= 1 && channel <= 14), 376 - "invalid channel for Zebra: %d\n", channel); 377 + WARN_ONCE((channel < 1 || channel > 14), 378 + "rtl8192se: invalid channel for Zebra: %d\n", channel); 377 379 378 380 _rtl92s_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++, 379 381 MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG, ··· 435 437 } 436 438 break; 437 439 default: 438 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 439 - "switch case %#x not processed\n", 440 - currentcmd->cmdid); 440 + pr_err("switch case %#x not processed\n", 441 + currentcmd->cmdid); 441 442 break; 442 443 } 443 444 ··· 641 644 _rtl92se_phy_set_rf_sleep(hw); 642 645 break; 643 646 default: 644 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 645 - "switch case %#x not processed\n", rfpwr_state); 647 + pr_err("switch case %#x not processed\n", 648 + rfpwr_state); 646 649 bresult = false; 647 650 break; 648 651 } ··· 934 937 } 935 938 936 939 if (!rtstatus) { 937 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, 938 - "Write BB Reg Fail!!\n"); 940 + pr_err("Write BB Reg Fail!!\n"); 939 941 goto phy_BB8190_Config_ParaFile_Fail; 940 942 } 941 943 ··· 947 951 BASEBAND_CONFIG_PHY_REG); 948 952 } 949 953 if (!rtstatus) { 950 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, 951 - "_rtl92s_phy_bb_config_parafile(): BB_PG Reg Fail!!\n"); 954 + pr_err("_rtl92s_phy_bb_config_parafile(): BB_PG Reg Fail!!\n"); 952 955 goto phy_BB8190_Config_ParaFile_Fail; 953 956 } 954 957 ··· 1072 1077 (rtlphy->rf_type == RF_1T2R && rf_num != 2) || 1073 1078 (rtlphy->rf_type == RF_2T2R && rf_num != 2) || 1074 1079 (rtlphy->rf_type == RF_2T2R_GREEN && rf_num != 2)) { 1075 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, 1076 - "RF_Type(%x) does not match RF_Num(%x)!!\n", 1077 - rtlphy->rf_type, rf_num); 1078 - RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, 1079 - "path1 0x%x, path2 0x%x, pathmap 0x%x\n", 1080 - path1, path2, pathmap); 1080 + pr_err("RF_Type(%x) does not match RF_Num(%x)!!\n", 1081 + rtlphy->rf_type, rf_num); 1082 + pr_err("path1 0x%x, path2 0x%x, pathmap 0x%x\n", 1083 + path1, path2, pathmap); 1081 1084 } 1082 1085 1083 1086 return rtstatus; ··· 1214 1221 } while (--pollingcnt); 1215 1222 1216 1223 if (pollingcnt == 0) 1217 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Set FW Cmd fail!!\n"); 1224 + pr_err("Set FW Cmd fail!!\n"); 1218 1225 } 1219 1226 1220 1227
+1 -2
drivers/net/wireless/realtek/rtlwifi/rtl8192se/rf.c
··· 523 523 rtlphy->rfreg_chnlval[0]); 524 524 break; 525 525 default: 526 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 527 - "unknown bandwidth: %#X\n", bandwidth); 526 + pr_err("unknown bandwidth: %#X\n", bandwidth); 528 527 break; 529 528 } 530 529 }
+3 -5
drivers/net/wireless/realtek/rtlwifi/rtl8192se/sw.c
··· 96 96 return; 97 97 } 98 98 if (firmware->size > rtlpriv->max_fw_size) { 99 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 100 - "Firmware is too big!\n"); 99 + pr_err("Firmware is too big!\n"); 101 100 rtlpriv->max_fw_size = 0; 102 101 release_firmware(firmware); 103 102 return; ··· 217 218 rtlpriv->io.dev, GFP_KERNEL, hw, 218 219 rtl92se_fw_cb); 219 220 if (err) { 220 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 221 - "Failed to request firmware!\n"); 221 + pr_err("Failed to request firmware!\n"); 222 222 return 1; 223 223 } 224 224 ··· 297 299 .inactiveps = true, 298 300 .swctrl_lps = true, 299 301 .fwctrl_lps = false, 300 - .debug = DBG_EMERG, 302 + .debug = 0, 301 303 }; 302 304 303 305 /* Because memory R/W bursting will cause system hang/crash
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8192se/trx.c
··· 583 583 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val); 584 584 break; 585 585 default: 586 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 586 + WARN_ONCE(true, "rtl8192se: ERR txdesc :%d not processed\n", 587 587 desc_name); 588 588 break; 589 589 } ··· 603 603 SET_RX_STATUS_DESC_EOR(pdesc, 1); 604 604 break; 605 605 default: 606 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 606 + WARN_ONCE(true, "rtl8192se: ERR rxdesc :%d not processed\n", 607 607 desc_name); 608 608 break; 609 609 } ··· 623 623 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(desc); 624 624 break; 625 625 default: 626 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 626 + WARN_ONCE(true, "rtl8192se: ERR txdesc :%d not processed\n", 627 627 desc_name); 628 628 break; 629 629 } ··· 639 639 ret = GET_RX_STATUS_DESC_BUFF_ADDR(desc); 640 640 break; 641 641 default: 642 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 642 + WARN_ONCE(true, "rtl8192se: ERR rxdesc :%d not processed\n", 643 643 desc_name); 644 644 break; 645 645 }
+7 -8
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/fw.c
··· 99 99 while (!bwrite_sucess) { 100 100 wait_writeh2c_limmit--; 101 101 if (wait_writeh2c_limmit == 0) { 102 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 103 - "Write H2C fail because no trigger for FW INT!\n"); 102 + pr_err("Write H2C fail because no trigger for FW INT!\n"); 104 103 break; 105 104 } 106 105 ··· 122 123 box_extreg = REG_HMEBOX_EXT_3; 123 124 break; 124 125 default: 125 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 126 - "switch case %#x not processed\n", boxnum); 126 + pr_err("switch case %#x not processed\n", 127 + boxnum); 127 128 break; 128 129 } 129 130 ··· 228 229 } 229 230 break; 230 231 default: 231 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 232 - "switch case %#x not processed\n", cmd_len); 232 + pr_err("switch case %#x not processed\n", 233 + cmd_len); 233 234 break; 234 235 } 235 236 ··· 258 259 u32 tmp_cmdbuf[2]; 259 260 260 261 if (!rtlhal->fw_ready) { 261 - RT_ASSERT(false, 262 - "return H2C cmd because of Fw download fail!!!\n"); 262 + WARN_ONCE(true, 263 + "rtl8723ae: error H2C cmd because of Fw download fail!!!\n"); 263 264 return; 264 265 } 265 266 memset(tmp_cmdbuf, 0, 8);
+8 -13
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.c
··· 570 570 break; 571 571 572 572 if (count > POLLING_LLT_THRESHOLD) { 573 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 574 - "Failed to polling write LLT done at address %d!\n", 575 - address); 573 + pr_err("Failed to polling write LLT done at address %d!\n", 574 + address); 576 575 status = false; 577 576 break; 578 577 } ··· 960 961 rtlpriv->intf_ops->disable_aspm(hw); 961 962 rtstatus = _rtl8712e_init_mac(hw); 962 963 if (rtstatus != true) { 963 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); 964 + pr_err("Init MAC failed\n"); 964 965 err = 1; 965 966 goto exit; 966 967 } ··· 1106 1107 "Chip Version ID: VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT.\n"); 1107 1108 break; 1108 1109 default: 1109 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1110 - "Chip Version ID: Unknown. Bug?\n"); 1110 + pr_err("Chip Version ID: Unknown. Bug?\n"); 1111 1111 break; 1112 1112 } 1113 1113 ··· 1155 1157 "Set Network type to AP!\n"); 1156 1158 break; 1157 1159 default: 1158 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1159 - "Network type %d not support!\n", type); 1160 + pr_err("Network type %d not support!\n", type); 1160 1161 return 1; 1161 1162 break; 1162 1163 } ··· 1253 1256 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); 1254 1257 break; 1255 1258 default: 1256 - RT_ASSERT(false, "invalid aci: %d !\n", aci); 1259 + WARN_ONCE(true, "rtl8723ae: invalid aci: %d !\n", aci); 1257 1260 break; 1258 1261 } 1259 1262 } ··· 1849 1852 } else { 1850 1853 rtlefuse->autoload_failflag = true; 1851 1854 _rtl8723e_read_adapter_info(hw, false); 1852 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); 1855 + pr_err("Autoload ERR!!\n"); 1853 1856 } 1854 1857 _rtl8723e_hal_customized_behavior(hw); 1855 1858 } ··· 2242 2245 entry_id = 2243 2246 rtl_cam_get_free_entry(hw, p_macaddr); 2244 2247 if (entry_id >= TOTAL_CAM_ENTRY) { 2245 - RT_TRACE(rtlpriv, COMP_SEC, 2246 - DBG_EMERG, 2247 - "Can not find free hw security cam entry\n"); 2248 + pr_err("Can not find free hw security cam entry\n"); 2248 2249 return; 2249 2250 } 2250 2251 } else {
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/led.c
··· 58 58 rtl_write_byte(rtlpriv, REG_LEDCFG1, ledcfg & 0x10); 59 59 break; 60 60 default: 61 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 62 - "switch case %#x not processed\n", pled->ledpin); 61 + pr_err("switch case %#x not processed\n", 62 + pled->ledpin); 63 63 break; 64 64 } 65 65 pled->ledon = true; ··· 100 100 101 101 break; 102 102 default: 103 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 104 - "switch case %#x not processed\n", pled->ledpin); 103 + pr_err("switch case %#x not processed\n", 104 + pled->ledpin); 105 105 break; 106 106 } 107 107 pled->ledon = false;
+15 -16
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.c
··· 133 133 enum radio_path rfpath, u32 offset, 134 134 u32 data) 135 135 { 136 - RT_ASSERT(false, "deprecated!\n"); 136 + WARN_ONCE(true, "rtl8723ae: _rtl8723e_phy_fw_rf_serial_write deprecated!\n"); 137 137 } 138 138 139 139 static void _rtl8723e_phy_bb_config_1t(struct ieee80211_hw *hw) ··· 213 213 rtstatus = _rtl8723e_phy_config_bb_with_headerfile(hw, 214 214 BASEBAND_CONFIG_PHY_REG); 215 215 if (rtstatus != true) { 216 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n"); 216 + pr_err("Write BB Reg Fail!!\n"); 217 217 return false; 218 218 } 219 219 ··· 227 227 BASEBAND_CONFIG_PHY_REG); 228 228 } 229 229 if (rtstatus != true) { 230 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n"); 230 + pr_err("BB_PG Reg Fail!!\n"); 231 231 return false; 232 232 } 233 233 rtstatus = 234 234 _rtl8723e_phy_config_bb_with_headerfile(hw, BASEBAND_CONFIG_AGC_TAB); 235 235 if (rtstatus != true) { 236 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n"); 236 + pr_err("AGC Table Fail\n"); 237 237 return false; 238 238 } 239 239 rtlphy->cck_high_power = (bool) (rtl_get_bbreg(hw, ··· 749 749 (u8 *)&iotype); 750 750 break; 751 751 default: 752 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 753 - "Unknown Scan Backup operation.\n"); 752 + pr_err("Unknown Scan Backup operation.\n"); 754 753 break; 755 754 } 756 755 } ··· 790 791 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc); 791 792 break; 792 793 default: 793 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 794 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 794 + pr_err("unknown bandwidth: %#X\n", 795 + rtlphy->current_chan_bw); 795 796 break; 796 797 } 797 798 ··· 815 816 HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); 816 817 break; 817 818 default: 818 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 819 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 819 + pr_err("unknown bandwidth: %#X\n", 820 + rtlphy->current_chan_bw); 820 821 break; 821 822 } 822 823 rtl8723e_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); ··· 884 885 return 0; 885 886 if (rtlphy->set_bwmode_inprogress) 886 887 return 0; 887 - RT_ASSERT((rtlphy->current_channel <= 14), 888 - "WIRELESS_MODE_G but channel>14"); 888 + WARN_ONCE((rtlphy->current_channel > 14), 889 + "rtl8723ae: WIRELESS_MODE_G but channel>14"); 889 890 rtlphy->sw_chnl_inprogress = true; 890 891 rtlphy->sw_chnl_stage = 0; 891 892 rtlphy->sw_chnl_step = 0; ··· 953 954 954 955 rfdependcmdcnt = 0; 955 956 956 - RT_ASSERT((channel >= 1 && channel <= 14), 957 - "illegal channel for Zebra: %d\n", channel); 957 + WARN_ONCE((channel < 1 || channel > 14), 958 + "rtl8723ae: illegal channel for Zebra: %d\n", channel); 958 959 959 960 rtl8723_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++, 960 961 MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG, ··· 976 977 currentcmd = &postcommoncmd[*step]; 977 978 break; 978 979 default: 979 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 980 - "Invalid 'stage' = %d, Check it!\n", *stage); 980 + pr_err("Invalid 'stage' = %d, Check it!\n", 981 + *stage); 981 982 return true; 982 983 } 983 984
+1 -2
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/rf.c
··· 51 51 rtlphy->rfreg_chnlval[0]); 52 52 break; 53 53 default: 54 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 55 - "unknown bandwidth: %#X\n", bandwidth); 54 + pr_err("unknown bandwidth: %#X\n", bandwidth); 56 55 break; 57 56 } 58 57 }
+3 -5
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/sw.c
··· 172 172 /* for firmware buf */ 173 173 rtlpriv->rtlhal.pfirmware = vzalloc(0x6000); 174 174 if (!rtlpriv->rtlhal.pfirmware) { 175 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 176 - "Can't alloc buffer for fw.\n"); 175 + pr_err("Can't alloc buffer for fw.\n"); 177 176 return 1; 178 177 } 179 178 ··· 185 186 rtlpriv->io.dev, GFP_KERNEL, hw, 186 187 rtl_fw_cb); 187 188 if (err) { 188 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 189 - "Failed to request firmware!\n"); 189 + pr_err("Failed to request firmware!\n"); 190 190 return 1; 191 191 } 192 192 return 0; ··· 268 270 .inactiveps = true, 269 271 .swctrl_lps = false, 270 272 .fwctrl_lps = true, 271 - .debug = DBG_EMERG, 273 + .debug = 0, 272 274 .msi_support = false, 273 275 .disable_watchdog = false, 274 276 };
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/trx.c
··· 617 617 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val); 618 618 break; 619 619 default: 620 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 620 + WARN_ONCE(true, "rtl8723ae: ERR txdesc :%d not processed\n", 621 621 desc_name); 622 622 break; 623 623 } ··· 636 636 SET_RX_DESC_EOR(pdesc, 1); 637 637 break; 638 638 default: 639 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 639 + WARN_ONCE(true, "rtl8723ae: ERR rxdesc :%d not processed\n", 640 640 desc_name); 641 641 break; 642 642 } ··· 656 656 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc); 657 657 break; 658 658 default: 659 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 659 + WARN_ONCE(true, "rtl8723ae: ERR txdesc :%d not processed\n", 660 660 desc_name); 661 661 break; 662 662 } ··· 672 672 ret = GET_RX_DESC_BUFF_ADDR(pdesc); 673 673 break; 674 674 default: 675 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 675 + WARN_ONCE(true, "rtl8723ae: ERR rxdesc :%d not processed\n", 676 676 desc_name); 677 677 break; 678 678 }
+7 -8
drivers/net/wireless/realtek/rtlwifi/rtl8723be/fw.c
··· 97 97 while (!bwrite_sucess) { 98 98 wait_writeh2c_limmit--; 99 99 if (wait_writeh2c_limmit == 0) { 100 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 101 - "Write H2C fail because no trigger for FW INT!\n"); 100 + pr_err("Write H2C fail because no trigger for FW INT!\n"); 102 101 break; 103 102 } 104 103 ··· 120 121 box_extreg = REG_HMEBOX_EXT_3; 121 122 break; 122 123 default: 123 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 124 - "switch case %#x not processed\n", boxnum); 124 + pr_err("switch case %#x not processed\n", 125 + boxnum); 125 126 break; 126 127 } 127 128 ··· 193 194 } 194 195 break; 195 196 default: 196 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 197 - "switch case %#x not processed\n", cmd_len); 197 + pr_err("switch case %#x not processed\n", 198 + cmd_len); 198 199 break; 199 200 } 200 201 ··· 223 224 u32 tmp_cmdbuf[2]; 224 225 225 226 if (!rtlhal->fw_ready) { 226 - RT_ASSERT(false, 227 - "return H2C cmd because of Fw download fail!!!\n"); 227 + WARN_ONCE(true, 228 + "rtl8723be: error H2C cmd because of Fw download fail!!!\n"); 228 229 return; 229 230 } 230 231
+7 -11
drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c
··· 747 747 break; 748 748 749 749 if (count > POLLING_LLT_THRESHOLD) { 750 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 751 - "Failed to polling write LLT done at address %d!\n", 752 - address); 750 + pr_err("Failed to polling write LLT done at address %d!\n", 751 + address); 753 752 status = false; 754 753 break; 755 754 } ··· 1382 1383 } 1383 1384 rtstatus = _rtl8723be_init_mac(hw); 1384 1385 if (!rtstatus) { 1385 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); 1386 + pr_err("Init MAC failed\n"); 1386 1387 err = 1; 1387 1388 goto exit; 1388 1389 } ··· 1531 1532 "Set Network type to AP!\n"); 1532 1533 break; 1533 1534 default: 1534 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1535 - "Network type %d not support!\n", type); 1535 + pr_err("Network type %d not support!\n", type); 1536 1536 return 1; 1537 1537 } 1538 1538 ··· 1629 1631 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); 1630 1632 break; 1631 1633 default: 1632 - RT_ASSERT(false, "invalid aci: %d !\n", aci); 1634 + WARN_ONCE(true, "rtl8723be: invalid aci: %d !\n", aci); 1633 1635 break; 1634 1636 } 1635 1637 } ··· 2245 2247 rtlefuse->autoload_failflag = false; 2246 2248 _rtl8723be_read_adapter_info(hw, false); 2247 2249 } else { 2248 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); 2250 + pr_err("Autoload ERR!!\n"); 2249 2251 } 2250 2252 _rtl8723be_hal_customized_behavior(hw); 2251 2253 } ··· 2582 2584 entry_id = rtl_cam_get_free_entry(hw, 2583 2585 p_macaddr); 2584 2586 if (entry_id >= TOTAL_CAM_ENTRY) { 2585 - RT_TRACE(rtlpriv, COMP_SEC, 2586 - DBG_EMERG, 2587 - "Can not find free hw security cam entry\n"); 2587 + pr_err("Can not find free hw security cam entry\n"); 2588 2588 return; 2589 2589 } 2590 2590 } else {
+4 -4
drivers/net/wireless/realtek/rtlwifi/rtl8723be/led.c
··· 57 57 rtl_write_byte(rtlpriv, REG_LEDCFG1, ledcfg & 0x10); 58 58 break; 59 59 default: 60 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 61 - "switch case %#x not processed\n", pled->ledpin); 60 + pr_err("switch case %#x not processed\n", 61 + pled->ledpin); 62 62 break; 63 63 } 64 64 pled->ledon = true; ··· 99 99 100 100 break; 101 101 default: 102 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 103 - "switch case %#x not processed\n", pled->ledpin); 102 + pr_err("switch case %#x not processed\n", 103 + pled->ledpin); 104 104 break; 105 105 } 106 106 pled->ledon = false;
+16 -17
drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
··· 467 467 rtstatus = _rtl8723be_phy_config_bb_with_headerfile(hw, 468 468 BASEBAND_CONFIG_PHY_REG); 469 469 if (!rtstatus) { 470 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n"); 470 + pr_err("Write BB Reg Fail!!\n"); 471 471 return false; 472 472 } 473 473 _rtl8723be_phy_init_tx_power_by_rate(hw); ··· 478 478 } 479 479 phy_txpower_by_rate_config(hw); 480 480 if (!rtstatus) { 481 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n"); 481 + pr_err("BB_PG Reg Fail!!\n"); 482 482 return false; 483 483 } 484 484 rtstatus = _rtl8723be_phy_config_bb_with_headerfile(hw, 485 485 BASEBAND_CONFIG_AGC_TAB); 486 486 if (!rtstatus) { 487 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n"); 487 + pr_err("AGC Table Fail\n"); 488 488 return false; 489 489 } 490 490 rtlphy->cck_high_power = (bool)(rtl_get_bbreg(hw, ··· 939 939 break; 940 940 941 941 default: 942 - RT_ASSERT(true, "Rate_Section is Illegal\n"); 942 + WARN_ONCE(true, "rtl8723be: Rate_Section is Illegal\n"); 943 943 break; 944 944 } 945 945 ··· 1004 1004 shift = 24; 1005 1005 break; 1006 1006 default: 1007 - RT_ASSERT(true, "Rate_Section is Illegal\n"); 1007 + WARN_ONCE(true, "rtl8723be: Rate_Section is Illegal\n"); 1008 1008 break; 1009 1009 } 1010 1010 tx_pwr_diff = (u8)(rtlphy->tx_power_by_rate_offset[band][rfpath][tx_num] ··· 1249 1249 (u8 *)&iotype); 1250 1250 break; 1251 1251 default: 1252 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1253 - "Unknown Scan Backup operation.\n"); 1252 + pr_err("Unknown Scan Backup operation.\n"); 1254 1253 break; 1255 1254 } 1256 1255 } ··· 1290 1291 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc); 1291 1292 break; 1292 1293 default: 1293 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1294 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 1294 + pr_err("unknown bandwidth: %#X\n", 1295 + rtlphy->current_chan_bw); 1295 1296 break; 1296 1297 } 1297 1298 ··· 1315 1316 HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); 1316 1317 break; 1317 1318 default: 1318 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1319 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 1319 + pr_err("unknown bandwidth: %#X\n", 1320 + rtlphy->current_chan_bw); 1320 1321 break; 1321 1322 } 1322 1323 rtl8723be_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); ··· 1386 1387 return 0; 1387 1388 if (rtlphy->set_bwmode_inprogress) 1388 1389 return 0; 1389 - RT_ASSERT((rtlphy->current_channel <= 14), 1390 - "WIRELESS_MODE_G but channel>14"); 1390 + WARN_ONCE((rtlphy->current_channel > 14), 1391 + "rtl8723be: WIRELESS_MODE_G but channel>14"); 1391 1392 rtlphy->sw_chnl_inprogress = true; 1392 1393 rtlphy->sw_chnl_stage = 0; 1393 1394 rtlphy->sw_chnl_step = 0; ··· 1437 1438 1438 1439 rfdependcmdcnt = 0; 1439 1440 1440 - RT_ASSERT((channel >= 1 && channel <= 14), 1441 - "illegal channel for Zebra: %d\n", channel); 1441 + WARN_ONCE((channel < 1 || channel > 14), 1442 + "rtl8723be: illegal channel for Zebra: %d\n", channel); 1442 1443 1443 1444 rtl8723_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++, 1444 1445 MAX_RFDEPENDCMD_CNT, ··· 1461 1462 currentcmd = &postcommoncmd[*step]; 1462 1463 break; 1463 1464 default: 1464 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1465 - "Invalid 'stage' = %d, Check it!\n", *stage); 1465 + pr_err("Invalid 'stage' = %d, Check it!\n", 1466 + *stage); 1466 1467 return true; 1467 1468 } 1468 1469
+1 -2
drivers/net/wireless/realtek/rtlwifi/rtl8723be/rf.c
··· 51 51 rtlphy->rfreg_chnlval[0]); 52 52 break; 53 53 default: 54 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 55 - "unknown bandwidth: %#X\n", bandwidth); 54 + pr_err("unknown bandwidth: %#X\n", bandwidth); 56 55 break; 57 56 } 58 57 }
+3 -5
drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c
··· 179 179 /* for firmware buf */ 180 180 rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); 181 181 if (!rtlpriv->rtlhal.pfirmware) { 182 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 183 - "Can't alloc buffer for fw.\n"); 182 + pr_err("Can't alloc buffer for fw.\n"); 184 183 return 1; 185 184 } 186 185 ··· 189 190 rtlpriv->io.dev, GFP_KERNEL, hw, 190 191 rtl_fw_cb); 191 192 if (err) { 192 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 193 - "Failed to request firmware!\n"); 193 + pr_err("Failed to request firmware!\n"); 194 194 return 1; 195 195 } 196 196 return 0; ··· 271 273 .fwctrl_lps = true, 272 274 .msi_support = false, 273 275 .disable_watchdog = false, 274 - .debug = DBG_EMERG, 276 + .debug = 0, 275 277 .ant_sel = 0, 276 278 }; 277 279
+7 -7
drivers/net/wireless/realtek/rtlwifi/rtl8723be/trx.c
··· 666 666 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val); 667 667 break; 668 668 default: 669 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 670 - desc_name); 669 + WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not processed\n", 670 + desc_name); 671 671 break; 672 672 } 673 673 } else { ··· 685 685 SET_RX_DESC_EOR(pdesc, 1); 686 686 break; 687 687 default: 688 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 689 - desc_name); 688 + WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not process\n", 689 + desc_name); 690 690 break; 691 691 } 692 692 } ··· 705 705 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc); 706 706 break; 707 707 default: 708 - RT_ASSERT(false, "ERR txdesc :%d not process\n", 709 - desc_name); 708 + WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not process\n", 709 + desc_name); 710 710 break; 711 711 } 712 712 } else { ··· 721 721 ret = GET_RX_DESC_BUFF_ADDR(pdesc); 722 722 break; 723 723 default: 724 - RT_ASSERT(false, "ERR rxdesc :%d not process\n", 724 + WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not processed\n", 725 725 desc_name); 726 726 break; 727 727 }
+8 -18
drivers/net/wireless/realtek/rtlwifi/rtl8723com/fw_common.c
··· 129 129 remain_size = size % FW_8192C_PAGE_SIZE; 130 130 131 131 if (page_nums > max_page) { 132 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 133 - "Page numbers should not greater than %d\n", max_page); 132 + pr_err("Page numbers should not greater than %d\n", 133 + max_page); 134 134 } 135 135 for (page = 0; page < page_nums; page++) { 136 136 offset = page * FW_8192C_PAGE_SIZE; ··· 209 209 (!(value32 & FWDL_CHKSUM_RPT))); 210 210 211 211 if (counter >= max_count) { 212 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 213 - "chksum report fail ! REG_MCUFWDL:0x%08x .\n", 214 - value32); 212 + pr_err("chksum report fail ! REG_MCUFWDL:0x%08x .\n", 213 + value32); 215 214 goto exit; 216 215 } 217 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, 218 - "Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32); 219 - 220 216 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL) | MCUFWDL_RDY; 221 217 value32 &= ~WINTINI_RDY; 222 218 rtl_write_dword(rtlpriv, REG_MCUFWDL, value32); ··· 235 239 236 240 } while (counter++ < max_count); 237 241 238 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 239 - "Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", 240 - value32); 242 + pr_err("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", 243 + value32); 241 244 242 245 exit: 243 246 return err; ··· 288 293 rtl8723_enable_fw_download(hw, false); 289 294 290 295 err = rtl8723_fw_free_to_go(hw, is_8723be, max_count); 291 - if (err) { 292 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 293 - "Firmware is not ready to run!\n"); 294 - } else { 295 - RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, 296 - "Firmware is ready to run!\n"); 297 - } 296 + if (err) 297 + pr_err("Firmware is not ready to run!\n"); 298 298 return 0; 299 299 } 300 300 EXPORT_SYMBOL_GPL(rtl8723_download_fw);
+3 -3
drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c
··· 99 99 offset &= 0xff; 100 100 newoffset = offset; 101 101 if (RT_CANNOT_IO(hw)) { 102 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "return all one\n"); 102 + pr_err("return all one\n"); 103 103 return 0xFFFFFFFF; 104 104 } 105 105 tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD); ··· 147 147 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; 148 148 149 149 if (RT_CANNOT_IO(hw)) { 150 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "stop\n"); 150 + pr_err("stop\n"); 151 151 return; 152 152 } 153 153 offset &= 0xff; ··· 283 283 struct swchnlcmd *pcmd; 284 284 285 285 if (cmdtable == NULL) { 286 - RT_ASSERT(false, "cmdtable cannot be NULL.\n"); 286 + WARN_ONCE(true, "rtl8723-common: cmdtable cannot be NULL.\n"); 287 287 return false; 288 288 } 289 289
+1 -2
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c
··· 604 604 if ((mac->link_state < MAC80211_LINKED) && 605 605 (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) { 606 606 rtl_dm_dig->min_undec_pwdb_for_dm = 0; 607 - RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, 608 - "Not connected to any\n"); 607 + pr_debug("rtl8821ae: Not connected to any AP\n"); 609 608 } 610 609 if (mac->link_state >= MAC80211_LINKED) { 611 610 if (mac->opmode == NL80211_IFTYPE_AP ||
+8 -20
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.c
··· 124 124 pagenums = size / FW_8821AE_PAGE_SIZE; 125 125 remainsize = size % FW_8821AE_PAGE_SIZE; 126 126 127 - if (pagenums > 8) { 128 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 129 - "Page numbers should not greater then 8\n"); 130 - } 127 + if (pagenums > 8) 128 + pr_err("Page numbers should not greater then 8\n"); 131 129 132 130 for (page = 0; page < pagenums; page++) { 133 131 offset = page * FW_8821AE_PAGE_SIZE; ··· 159 161 value32); 160 162 goto exit; 161 163 } 162 - 163 - RT_TRACE(rtlpriv, COMP_FW, DBG_EMERG, 164 - "Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32); 165 - 166 164 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL); 167 165 value32 |= MCUFWDL_RDY; 168 166 value32 &= ~WINTINI_RDY; ··· 169 175 counter = 0; 170 176 do { 171 177 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL); 172 - if (value32 & WINTINI_RDY) { 173 - RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, 174 - "Polling FW ready success!! REG_MCUFWDL:0x%08x .\n", 175 - value32); 176 - err = 0; 177 - goto exit; 178 - } 178 + if (value32 & WINTINI_RDY) 179 + return 0; 179 180 180 181 udelay(FW_8821AE_POLLING_DELAY); 181 182 } while (counter++ < FW_8821AE_POLLING_TIMEOUT_COUNT); 182 183 183 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 184 - "Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", 185 - value32); 184 + pr_err("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", 185 + value32); 186 186 187 187 exit: 188 188 return err; ··· 498 510 u32 tmp_cmdbuf[2]; 499 511 500 512 if (!rtlhal->fw_ready) { 501 - RT_ASSERT(false, 502 - "return H2C cmd because of Fw download fail!!!\n"); 513 + WARN_ONCE(true, 514 + "rtl8821ae: error H2C cmd because of Fw download fail!!!\n"); 503 515 return; 504 516 } 505 517
+15 -18
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c
··· 822 822 break; 823 823 824 824 if (count > POLLING_LLT_THRESHOLD) { 825 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 826 - "Failed to polling write LLT done at address %d!\n", 827 - address); 825 + pr_err("Failed to polling write LLT done at address %d!\n", 826 + address); 828 827 status = false; 829 828 break; 830 829 } ··· 1127 1128 } 1128 1129 if (0 == tmp) { 1129 1130 read_addr = REG_DBI_RDATA + addr % 4; 1130 - ret = rtl_read_word(rtlpriv, read_addr); 1131 + ret = rtl_read_byte(rtlpriv, read_addr); 1131 1132 } 1132 1133 return ret; 1133 1134 } ··· 1926 1927 1927 1928 rtstatus = _rtl8821ae_init_mac(hw); 1928 1929 if (rtstatus != true) { 1929 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); 1930 + pr_err("Init MAC failed\n"); 1930 1931 err = 1; 1931 1932 return err; 1932 1933 } ··· 2173 2174 "Set Network type to AP!\n"); 2174 2175 break; 2175 2176 default: 2176 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2177 - "Network type %d not support!\n", type); 2177 + pr_err("Network type %d not support!\n", type); 2178 2178 return 1; 2179 2179 } 2180 2180 ··· 2247 2249 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); 2248 2250 break; 2249 2251 default: 2250 - RT_ASSERT(false, "invalid aci: %d !\n", aci); 2252 + WARN_ONCE(true, "rtl8821ae: invalid aci: %d !\n", aci); 2251 2253 break; 2252 2254 } 2253 2255 } ··· 2599 2601 group = 12; 2600 2602 else if (173 <= chnl && chnl <= 177) 2601 2603 group = 13; 2602 - else 2603 - /*RT_TRACE(rtlpriv, COMP_EFUSE,DBG_LOUD, 2604 - "5G, Channel %d in Group not found\n",chnl);*/ 2605 - RT_ASSERT(!COMP_EFUSE, 2606 - "5G, Channel %d in Group not found\n", chnl); 2604 + else 2605 + WARN_ONCE(true, 2606 + "rtl8821ae: 5G, Channel %d in Group not found\n", 2607 + chnl); 2607 2608 } 2608 2609 return group; 2609 2610 } ··· 3273 3276 rtlefuse->autoload_failflag = false; 3274 3277 _rtl8821ae_read_adapter_info(hw, false); 3275 3278 } else { 3276 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); 3279 + pr_err("Autoload ERR!!\n"); 3277 3280 } 3278 3281 /*hal_ReadRFType_8812A()*/ 3279 3282 /* _rtl8821ae_hal_customized_behavior(hw); */ ··· 3948 3951 if (mac->opmode == NL80211_IFTYPE_AP) { 3949 3952 entry_id = rtl_cam_get_free_entry(hw, p_macaddr); 3950 3953 if (entry_id >= TOTAL_CAM_ENTRY) { 3951 - RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG, 3952 - "Can not find free hwsecurity cam entry\n"); 3954 + pr_err("an not find free hwsecurity cam entry\n"); 3953 3955 return; 3954 3956 } 3955 3957 } else { ··· 4131 4135 count++; 4132 4136 } while (tmp && count < 100); 4133 4137 4134 - RT_ASSERT((count < 100), 4135 - "Write wake up frame mask FAIL %d value!\n", tmp); 4138 + WARN_ONCE((count >= 100), 4139 + "rtl8821ae: Write wake up frame mask FAIL %d value!\n", 4140 + tmp); 4136 4141 } 4137 4142 /* Disable Rx packet buffer access. */ 4138 4143 rtl_write_byte(rtlpriv, REG_PKT_BUFF_ACCESS_CTRL,
+23 -31
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c
··· 215 215 static u32 _rtl8821ae_phy_rf_serial_read(struct ieee80211_hw *hw, 216 216 enum radio_path rfpath, u32 offset) 217 217 { 218 - struct rtl_priv *rtlpriv = rtl_priv(hw); 219 218 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 220 219 bool is_pi_mode = false; 221 220 u32 retvalue = 0; ··· 222 223 /* 2009/06/17 MH We can not execute IO for power 223 224 save or other accident mode.*/ 224 225 if (RT_CANNOT_IO(hw)) { 225 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "return all one\n"); 226 + pr_err("return all one\n"); 226 227 return 0xFFFFFFFF; 227 228 } 228 229 /* <20120809, Kordan> CCA OFF(when entering), ··· 283 284 u32 newoffset; 284 285 285 286 if (RT_CANNOT_IO(hw)) { 286 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "stop\n"); 287 + pr_err("stop\n"); 287 288 return; 288 289 } 289 290 offset &= 0xff; ··· 1664 1665 rtstatus = _rtl8821ae_phy_config_bb_with_headerfile(hw, 1665 1666 BASEBAND_CONFIG_PHY_REG); 1666 1667 if (rtstatus != true) { 1667 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n"); 1668 + pr_err("Write BB Reg Fail!!\n"); 1668 1669 return false; 1669 1670 } 1670 1671 _rtl8821ae_phy_init_tx_power_by_rate(hw); ··· 1673 1674 BASEBAND_CONFIG_PHY_REG); 1674 1675 } 1675 1676 if (rtstatus != true) { 1676 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n"); 1677 + pr_err("BB_PG Reg Fail!!\n"); 1677 1678 return false; 1678 1679 } 1679 1680 ··· 1687 1688 BASEBAND_CONFIG_AGC_TAB); 1688 1689 1689 1690 if (rtstatus != true) { 1690 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n"); 1691 + pr_err("AGC Table Fail\n"); 1691 1692 return false; 1692 1693 } 1693 1694 rtlphy->cck_high_power = (bool)(rtl_get_bbreg(hw, ··· 1869 1870 else if (regaddr >= 0xE20 && regaddr <= 0xE4C) 1870 1871 index = (u8)((regaddr - 0xE20) / 4); 1871 1872 else 1872 - RT_ASSERT(!COMP_INIT, 1873 - "Invalid RegAddr 0x%x\n", regaddr); 1873 + WARN_ONCE(true, 1874 + "rtl8821ae: Invalid RegAddr 0x%x\n", regaddr); 1874 1875 return index; 1875 1876 } 1876 1877 ··· 2063 2064 break; 2064 2065 case RF90_PATH_C: 2065 2066 case RF90_PATH_D: 2066 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2067 - "switch case %#x not processed\n", rfpath); 2067 + pr_err("switch case %#x not processed\n", rfpath); 2068 2068 break; 2069 2069 } 2070 2070 return true; ··· 2130 2132 case RF90_PATH_B: 2131 2133 case RF90_PATH_C: 2132 2134 case RF90_PATH_D: 2133 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 2134 - "switch case %#x not processed\n", rfpath); 2135 + pr_err("switch case %#x not processed\n", rfpath); 2135 2136 break; 2136 2137 } 2137 2138 return true; ··· 2319 2322 rate_section = 11; 2320 2323 break; 2321 2324 default: 2322 - RT_ASSERT(true, "Rate_Section is Illegal\n"); 2325 + WARN_ONCE(true, "rtl8821ae: Rate_Section is Illegal\n"); 2323 2326 break; 2324 2327 } 2325 2328 ··· 2585 2588 shift = 24; 2586 2589 break; 2587 2590 default: 2588 - RT_ASSERT(true, "Rate_Section is Illegal\n"); 2591 + WARN_ONCE(true, "rtl8821ae: Rate_Section is Illegal\n"); 2589 2592 break; 2590 2593 } 2591 2594 ··· 3333 3336 (u8 *)&iotype); 3334 3337 break; 3335 3338 default: 3336 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 3337 - "Unknown Scan Backup operation.\n"); 3339 + pr_err("Unknown Scan Backup operation.\n"); 3338 3340 break; 3339 3341 } 3340 3342 } ··· 3374 3378 else if (mac->cur_80_prime_sc == PRIME_CHNL_OFFSET_UPPER) 3375 3379 sc_set_40 = VHT_DATA_SC_40_UPPER_OF_80MHZ; 3376 3380 else 3377 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 3378 - "SCMapping: Not Correct Primary40MHz Setting\n"); 3381 + pr_err("SCMapping: Not Correct Primary40MHz Setting\n"); 3379 3382 3380 3383 if ((mac->cur_40_prime_sc == PRIME_CHNL_OFFSET_LOWER) && 3381 3384 (mac->cur_80_prime_sc == HAL_PRIME_CHNL_OFFSET_LOWER)) ··· 3389 3394 (mac->cur_80_prime_sc == HAL_PRIME_CHNL_OFFSET_UPPER)) 3390 3395 sc_set_20 = VHT_DATA_SC_20_UPPERST_OF_80MHZ; 3391 3396 else 3392 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 3393 - "SCMapping: Not Correct Primary40MHz Setting\n"); 3397 + pr_err("SCMapping: Not Correct Primary40MHz Setting\n"); 3394 3398 } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) { 3395 3399 if (mac->cur_40_prime_sc == PRIME_CHNL_OFFSET_UPPER) 3396 3400 sc_set_20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; 3397 3401 else if (mac->cur_40_prime_sc == PRIME_CHNL_OFFSET_LOWER) 3398 3402 sc_set_20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; 3399 3403 else 3400 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 3401 - "SCMapping: Not Correct Primary40MHz Setting\n"); 3404 + pr_err("SCMapping: Not Correct Primary40MHz Setting\n"); 3402 3405 } 3403 3406 return (sc_set_40 << 4) | sc_set_20; 3404 3407 } ··· 3472 3479 3473 3480 break; 3474 3481 default: 3475 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 3476 - "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); 3482 + pr_err("unknown bandwidth: %#X\n", 3483 + rtlphy->current_chan_bw); 3477 3484 break; 3478 3485 } 3479 3486 ··· 4653 4660 postprocessing = true; 4654 4661 break; 4655 4662 default: 4656 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 4657 - "switch case %#x not processed\n", iotype); 4663 + pr_err("switch case %#x not processed\n", 4664 + iotype); 4658 4665 break; 4659 4666 } 4660 4667 } while (false); ··· 4697 4704 case IO_CMD_PAUSE_BAND1_DM_BY_SCAN: 4698 4705 break; 4699 4706 default: 4700 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 4701 - "switch case %#x not processed\n", 4702 - rtlphy->current_io_type); 4707 + pr_err("switch case %#x not processed\n", 4708 + rtlphy->current_io_type); 4703 4709 break; 4704 4710 } 4705 4711 rtlphy->set_io_inprogress = false; ··· 4803 4811 } 4804 4812 break; 4805 4813 default: 4806 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 4807 - "switch case %#x not processed\n", rfpwr_state); 4814 + pr_err("switch case %#x not processed\n", 4815 + rfpwr_state); 4808 4816 bresult = false; 4809 4817 break; 4810 4818 }
+1 -4
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/rf.c
··· 34 34 35 35 void rtl8821ae_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth) 36 36 { 37 - struct rtl_priv *rtlpriv = rtl_priv(hw); 38 - 39 37 switch (bandwidth) { 40 38 case HT_CHANNEL_WIDTH_20: 41 39 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, BIT(11)|BIT(10), 3); ··· 48 50 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, BIT(11)|BIT(10), 0); 49 51 break; 50 52 default: 51 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 52 - "unknown bandwidth: %#X\n", bandwidth); 53 + pr_err("unknown bandwidth: %#X\n", bandwidth); 53 54 break; 54 55 } 55 56 }
+5 -9
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/sw.c
··· 192 192 /* for firmware buf */ 193 193 rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); 194 194 if (!rtlpriv->rtlhal.pfirmware) { 195 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 196 - "Can't alloc buffer for fw.\n"); 195 + pr_err("Can't alloc buffer for fw.\n"); 197 196 return 1; 198 197 } 199 198 rtlpriv->rtlhal.wowlan_firmware = vzalloc(0x8000); 200 199 if (!rtlpriv->rtlhal.wowlan_firmware) { 201 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 202 - "Can't alloc buffer for wowlan fw.\n"); 200 + pr_err("Can't alloc buffer for wowlan fw.\n"); 203 201 return 1; 204 202 } 205 203 ··· 216 218 rtlpriv->io.dev, GFP_KERNEL, hw, 217 219 rtl_fw_cb); 218 220 if (err) { 219 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 220 - "Failed to request normal firmware!\n"); 221 + pr_err("Failed to request normal firmware!\n"); 221 222 return 1; 222 223 } 223 224 /*load wowlan firmware*/ ··· 226 229 rtlpriv->io.dev, GFP_KERNEL, hw, 227 230 rtl_wowlan_fw_cb); 228 231 if (err) { 229 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 230 - "Failed to request wowlan firmware!\n"); 232 + pr_err("Failed to request wowlan firmware!\n"); 231 233 return 1; 232 234 } 233 235 return 0; ··· 309 313 .fwctrl_lps = true, 310 314 .msi_support = true, 311 315 .int_clear = true, 312 - .debug = DBG_EMERG, 316 + .debug = 0, 313 317 .disable_watchdog = 0, 314 318 }; 315 319
+12 -8
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/trx.c
··· 904 904 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val); 905 905 break; 906 906 default: 907 - RT_ASSERT(false, 908 - "ERR txdesc :%d not process\n", desc_name); 907 + WARN_ONCE(true, 908 + "rtl8821ae: ERR txdesc :%d not processed\n", 909 + desc_name); 909 910 break; 910 911 } 911 912 } else { ··· 924 923 SET_RX_DESC_EOR(pdesc, 1); 925 924 break; 926 925 default: 927 - RT_ASSERT(false, 928 - "ERR rxdesc :%d not process\n", desc_name); 926 + WARN_ONCE(true, 927 + "rtl8821ae: ERR rxdesc :%d not processed\n", 928 + desc_name); 929 929 break; 930 930 } 931 931 } ··· 945 943 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc); 946 944 break; 947 945 default: 948 - RT_ASSERT(false, 949 - "ERR txdesc :%d not process\n", desc_name); 946 + WARN_ONCE(true, 947 + "rtl8821ae: ERR txdesc :%d not processed\n", 948 + desc_name); 950 949 break; 951 950 } 952 951 } else { ··· 962 959 ret = GET_RX_DESC_BUFF_ADDR(pdesc); 963 960 break; 964 961 default: 965 - RT_ASSERT(false, 966 - "ERR rxdesc :%d not process\n", desc_name); 962 + WARN_ONCE(true, 963 + "rtl8821ae: ERR rxdesc :%d not processed\n", 964 + desc_name); 967 965 break; 968 966 } 969 967 }
+15 -33
drivers/net/wireless/realtek/rtlwifi/usb.c
··· 421 421 static int _rtl_prep_rx_urb(struct ieee80211_hw *hw, struct rtl_usb *rtlusb, 422 422 struct urb *urb, gfp_t gfp_mask) 423 423 { 424 - struct rtl_priv *rtlpriv = rtl_priv(hw); 425 424 void *buf; 426 425 427 426 buf = usb_alloc_coherent(rtlusb->udev, rtlusb->rx_max_size, gfp_mask, 428 427 &urb->transfer_dma); 429 428 if (!buf) { 430 - RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG, 431 - "Failed to usb_alloc_coherent!!\n"); 429 + pr_err("Failed to usb_alloc_coherent!!\n"); 432 430 return -ENOMEM; 433 431 } 434 432 ··· 611 613 static void _rtl_rx_completed(struct urb *_urb) 612 614 { 613 615 struct rtl_usb *rtlusb = (struct rtl_usb *)_urb->context; 614 - struct ieee80211_hw *hw = usb_get_intfdata(rtlusb->intf); 615 - struct rtl_priv *rtlpriv = rtl_priv(hw); 616 616 int err = 0; 617 617 618 618 if (unlikely(IS_USB_STOP(rtlusb))) ··· 624 628 struct ieee80211_hdr *hdr; 625 629 626 630 if (size < RTL_RX_DESC_SIZE + sizeof(struct ieee80211_hdr)) { 627 - RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG, 628 - "Too short packet from bulk IN! (len: %d)\n", 629 - size); 631 + pr_err("Too short packet from bulk IN! (len: %d)\n", 632 + size); 630 633 goto resubmit; 631 634 } 632 635 633 636 qlen = skb_queue_len(&rtlusb->rx_queue); 634 637 if (qlen >= __RX_SKB_MAX_QUEUED) { 635 - RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG, 636 - "Pending RX skbuff queue full! (qlen: %d)\n", 637 - qlen); 638 + pr_err("Pending RX skbuff queue full! (qlen: %d)\n", 639 + qlen); 638 640 goto resubmit; 639 641 } 640 642 ··· 641 647 642 648 skb = dev_alloc_skb(size + __RADIO_TAP_SIZE_RSV + padding); 643 649 if (!skb) { 644 - RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG, 645 - "Can't allocate skb for bulk IN!\n"); 650 + pr_err("Can't allocate skb for bulk IN!\n"); 646 651 goto resubmit; 647 652 } 648 653 ··· 718 725 struct urb *urb; 719 726 int err; 720 727 int i; 721 - struct rtl_priv *rtlpriv = rtl_priv(hw); 722 728 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw)); 723 729 724 730 WARN_ON(0 == rtlusb->rx_urb_num); ··· 732 740 733 741 err = _rtl_prep_rx_urb(hw, rtlusb, urb, GFP_KERNEL); 734 742 if (err < 0) { 735 - RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG, 736 - "Failed to prep_rx_urb!!\n"); 743 + pr_err("Failed to prep_rx_urb!!\n"); 737 744 usb_free_urb(urb); 738 745 goto err_out; 739 746 } ··· 830 839 static void _rtl_submit_tx_urb(struct ieee80211_hw *hw, struct urb *_urb) 831 840 { 832 841 int err; 833 - struct rtl_priv *rtlpriv = rtl_priv(hw); 834 842 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw)); 835 843 836 844 usb_anchor_urb(_urb, &rtlusb->tx_submitted); ··· 837 847 if (err < 0) { 838 848 struct sk_buff *skb; 839 849 840 - RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG, 841 - "Failed to submit urb\n"); 850 + pr_err("Failed to submit urb\n"); 842 851 usb_unanchor_urb(_urb); 843 852 skb = (struct sk_buff *)_urb->context; 844 853 kfree_skb(skb); ··· 848 859 static int _usb_tx_post(struct ieee80211_hw *hw, struct urb *urb, 849 860 struct sk_buff *skb) 850 861 { 851 - struct rtl_priv *rtlpriv = rtl_priv(hw); 852 862 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw)); 853 863 struct ieee80211_tx_info *txinfo; 854 864 ··· 858 870 txinfo->flags |= IEEE80211_TX_STAT_ACK; 859 871 860 872 if (urb->status) { 861 - RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG, 862 - "Urb has error status 0x%X\n", urb->status); 873 + pr_err("Urb has error status 0x%X\n", urb->status); 863 874 goto out; 864 875 } 865 876 /* TODO: statistics */ ··· 906 919 static void _rtl_usb_transmit(struct ieee80211_hw *hw, struct sk_buff *skb, 907 920 enum rtl_txq qnum) 908 921 { 909 - struct rtl_priv *rtlpriv = rtl_priv(hw); 910 922 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw)); 911 923 u32 ep_num; 912 924 struct urb *_urb = NULL; ··· 913 927 914 928 WARN_ON(NULL == rtlusb->usb_tx_aggregate_hdl); 915 929 if (unlikely(IS_USB_STOP(rtlusb))) { 916 - RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG, 917 - "USB device is stopping...\n"); 930 + pr_err("USB device is stopping...\n"); 918 931 kfree_skb(skb); 919 932 return; 920 933 } ··· 921 936 _skb = skb; 922 937 _urb = _rtl_usb_tx_urb_setup(hw, _skb, ep_num); 923 938 if (unlikely(!_urb)) { 924 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 925 - "Can't allocate urb. Drop skb!\n"); 939 + pr_err("Can't allocate urb. Drop skb!\n"); 926 940 kfree_skb(skb); 927 941 return; 928 942 } ··· 1043 1059 hw = ieee80211_alloc_hw(sizeof(struct rtl_priv) + 1044 1060 sizeof(struct rtl_usb_priv), &rtl_ops); 1045 1061 if (!hw) { 1046 - RT_ASSERT(false, "ieee80211 alloc failed\n"); 1062 + WARN_ONCE(true, "rtl_usb: ieee80211 alloc failed\n"); 1047 1063 return -ENOMEM; 1048 1064 } 1049 1065 rtlpriv = hw->priv; ··· 1086 1102 /* Init mac80211 sw */ 1087 1103 err = rtl_init_core(hw); 1088 1104 if (err) { 1089 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1090 - "Can't allocate sw for mac80211\n"); 1105 + pr_err("Can't allocate sw for mac80211\n"); 1091 1106 goto error_out; 1092 1107 } 1093 1108 if (rtlpriv->cfg->ops->init_sw_vars(hw)) { 1094 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n"); 1109 + pr_err("Can't init_sw_vars\n"); 1095 1110 goto error_out; 1096 1111 } 1097 1112 rtlpriv->cfg->ops->init_sw_leds(hw); 1098 1113 1099 1114 err = ieee80211_register_hw(hw); 1100 1115 if (err) { 1101 - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1102 - "Can't register mac80211 hw.\n"); 1116 + pr_err("Can't register mac80211 hw.\n"); 1103 1117 err = -ENODEV; 1104 1118 goto error_out; 1105 1119 }
+1 -1
drivers/net/wireless/ti/wlcore/debugfs.c
··· 281 281 } 282 282 283 283 if (value < 1 || value > 65535) { 284 - wl1271_warning("dyanmic_ps_timeout is not in valid range"); 284 + wl1271_warning("dynamic_ps_timeout is not in valid range"); 285 285 return -ERANGE; 286 286 } 287 287