tjh.dev
+1
-1
arch/mips/mti-malta/malta-pci.c
+1
-1
arch/mips/mti-malta/malta-pci.c
+6
-6
arch/mips/pci/fixup-fuloong2e.c
+6
-6
arch/mips/pci/fixup-fuloong2e.c
···
48
48
return 0;
49
49
}
50
50
51
-
static void __init loongson2e_nec_fixup(struct pci_dev *pdev)
51
+
static void __devinit loongson2e_nec_fixup(struct pci_dev *pdev)
52
52
{
53
53
unsigned int val;
54
54
···
60
60
pci_write_config_dword(pdev, 0xe4, 1 << 5);
61
61
}
62
62
63
-
static void __init loongson2e_686b_func0_fixup(struct pci_dev *pdev)
63
+
static void __devinit loongson2e_686b_func0_fixup(struct pci_dev *pdev)
64
64
{
65
65
unsigned char c;
66
66
···
135
135
printk(KERN_INFO"via686b fix: ISA bridge done\n");
136
136
}
137
137
138
-
static void __init loongson2e_686b_func1_fixup(struct pci_dev *pdev)
138
+
static void __devinit loongson2e_686b_func1_fixup(struct pci_dev *pdev)
139
139
{
140
140
printk(KERN_INFO"via686b fix: IDE\n");
141
141
···
168
168
printk(KERN_INFO"via686b fix: IDE done\n");
169
169
}
170
170
171
-
static void __init loongson2e_686b_func2_fixup(struct pci_dev *pdev)
171
+
static void __devinit loongson2e_686b_func2_fixup(struct pci_dev *pdev)
172
172
{
173
173
/* irq routing */
174
174
pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10);
175
175
}
176
176
177
-
static void __init loongson2e_686b_func3_fixup(struct pci_dev *pdev)
177
+
static void __devinit loongson2e_686b_func3_fixup(struct pci_dev *pdev)
178
178
{
179
179
/* irq routing */
180
180
pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11);
181
181
}
182
182
183
-
static void __init loongson2e_686b_func5_fixup(struct pci_dev *pdev)
183
+
static void __devinit loongson2e_686b_func5_fixup(struct pci_dev *pdev)
184
184
{
185
185
unsigned int val;
186
186
unsigned char c;
+6
-6
arch/mips/pci/fixup-lemote2f.c
+6
-6
arch/mips/pci/fixup-lemote2f.c
···
96
96
}
97
97
98
98
/* CS5536 SPEC. fixup */
99
-
static void __init loongson_cs5536_isa_fixup(struct pci_dev *pdev)
99
+
static void __devinit loongson_cs5536_isa_fixup(struct pci_dev *pdev)
100
100
{
101
101
/* the uart1 and uart2 interrupt in PIC is enabled as default */
102
102
pci_write_config_dword(pdev, PCI_UART1_INT_REG, 1);
103
103
pci_write_config_dword(pdev, PCI_UART2_INT_REG, 1);
104
104
}
105
105
106
-
static void __init loongson_cs5536_ide_fixup(struct pci_dev *pdev)
106
+
static void __devinit loongson_cs5536_ide_fixup(struct pci_dev *pdev)
107
107
{
108
108
/* setting the mutex pin as IDE function */
109
109
pci_write_config_dword(pdev, PCI_IDE_CFG_REG,
110
110
CS5536_IDE_FLASH_SIGNATURE);
111
111
}
112
112
113
-
static void __init loongson_cs5536_acc_fixup(struct pci_dev *pdev)
113
+
static void __devinit loongson_cs5536_acc_fixup(struct pci_dev *pdev)
114
114
{
115
115
/* enable the AUDIO interrupt in PIC */
116
116
pci_write_config_dword(pdev, PCI_ACC_INT_REG, 1);
···
118
118
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0);
119
119
}
120
120
121
-
static void __init loongson_cs5536_ohci_fixup(struct pci_dev *pdev)
121
+
static void __devinit loongson_cs5536_ohci_fixup(struct pci_dev *pdev)
122
122
{
123
123
/* enable the OHCI interrupt in PIC */
124
124
/* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */
125
125
pci_write_config_dword(pdev, PCI_OHCI_INT_REG, 1);
126
126
}
127
127
128
-
static void __init loongson_cs5536_ehci_fixup(struct pci_dev *pdev)
128
+
static void __devinit loongson_cs5536_ehci_fixup(struct pci_dev *pdev)
129
129
{
130
130
u32 hi, lo;
131
131
···
137
137
pci_write_config_dword(pdev, PCI_EHCI_FLADJ_REG, 0x2000);
138
138
}
139
139
140
-
static void __init loongson_nec_fixup(struct pci_dev *pdev)
140
+
static void __devinit loongson_nec_fixup(struct pci_dev *pdev)
141
141
{
142
142
unsigned int val;
143
143
+3
-3
arch/mips/pci/fixup-malta.c
+3
-3
arch/mips/pci/fixup-malta.c
···
49
49
return 0;
50
50
}
51
51
52
-
static void __init malta_piix_func0_fixup(struct pci_dev *pdev)
52
+
static void __devinit malta_piix_func0_fixup(struct pci_dev *pdev)
53
53
{
54
54
unsigned char reg_val;
55
-
static int piixirqmap[16] __initdata = { /* PIIX PIRQC[A:D] irq mappings */
55
+
static int piixirqmap[16] __devinitdata = { /* PIIX PIRQC[A:D] irq mappings */
56
56
0, 0, 0, 3,
57
57
4, 5, 6, 7,
58
58
0, 9, 10, 11,
···
83
83
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
84
84
malta_piix_func0_fixup);
85
85
86
-
static void __init malta_piix_func1_fixup(struct pci_dev *pdev)
86
+
static void __devinit malta_piix_func1_fixup(struct pci_dev *pdev)
87
87
{
88
88
unsigned char reg_val;
89
89
+3
-3
arch/mips/pci/fixup-sb1250.c
+3
-3
arch/mips/pci/fixup-sb1250.c
···
15
15
* Set the BCM1250, etc. PCI host bridge's TRDY timeout
16
16
* to the finite max.
17
17
*/
18
-
static void __init quirk_sb1250_pci(struct pci_dev *dev)
18
+
static void __devinit quirk_sb1250_pci(struct pci_dev *dev)
19
19
{
20
20
pci_write_config_byte(dev, 0x40, 0xff);
21
21
}
···
25
25
/*
26
26
* The BCM1250, etc. PCI/HT bridge reports as a host bridge.
27
27
*/
28
-
static void __init quirk_sb1250_ht(struct pci_dev *dev)
28
+
static void __devinit quirk_sb1250_ht(struct pci_dev *dev)
29
29
{
30
30
dev->class = PCI_CLASS_BRIDGE_PCI << 8;
31
31
}
···
35
35
/*
36
36
* Set the SP1011 HT/PCI bridge's TRDY timeout to the finite max.
37
37
*/
38
-
static void __init quirk_sp1011(struct pci_dev *dev)
38
+
static void __devinit quirk_sp1011(struct pci_dev *dev)
39
39
{
40
40
pci_write_config_byte(dev, 0x64, 0xff);
41
41
}
+1
-1
arch/mips/pci/ops-tx4927.c
+1
-1
arch/mips/pci/ops-tx4927.c
···
495
495
}
496
496
497
497
#ifdef CONFIG_TOSHIBA_FPCIB0
498
-
static void __init tx4927_quirk_slc90e66_bridge(struct pci_dev *dev)
498
+
static void __devinit tx4927_quirk_slc90e66_bridge(struct pci_dev *dev)
499
499
{
500
500
struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(dev->bus);
501
501
+1
-1
arch/mips/pci/pci-ip27.c
+1
-1
arch/mips/pci/pci-ip27.c