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dt-bindings: misc: tmr-inject: Add device-tree binding for TMR Inject

The Triple Modular Redundancy(TMR) Inject core provides functional fault
injection by changing selected MicroBlaze instructions, which provides the
possibility to verify that the TMR subsystem error detection and fault
recovery logic is working properly.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221125054113.122833-4-appana.durga.kedareswara.rao@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Appana Durga Kedareswara rao and committed by
Greg Kroah-Hartman
85958472 f5ec7f54

+47
+47
Documentation/devicetree/bindings/misc/xlnx,tmr-inject.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/misc/xlnx,tmr-inject.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Xilinx Triple Modular Redundancy(TMR) Inject IP 8 + 9 + maintainers: 10 + - Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com> 11 + 12 + description: | 13 + The Triple Modular Redundancy(TMR) Inject core provides functional fault 14 + injection by changing selected MicroBlaze instructions, which provides the 15 + possibility to verify that the TMR subsystem error detection and fault 16 + recovery logic is working properly. 17 + 18 + properties: 19 + compatible: 20 + enum: 21 + - xlnx,tmr-inject-1.0 22 + 23 + reg: 24 + maxItems: 1 25 + 26 + xlnx,magic: 27 + minimum: 0 28 + maximum: 255 29 + description: | 30 + Magic number, When configured it allows the controller to perform 31 + recovery. 32 + $ref: /schemas/types.yaml#/definitions/uint32 33 + 34 + required: 35 + - compatible 36 + - reg 37 + - xlnx,magic 38 + 39 + additionalProperties: false 40 + 41 + examples: 42 + - | 43 + fault-inject@44a30000 { 44 + compatible = "xlnx,tmr-inject-1.0"; 45 + reg = <0x44a10000 0x10000>; 46 + xlnx,magic = <0x46>; 47 + };