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MN10300: Fix misaligned index-register addressing handling

Fix misalignment handling for an address calculated from the sum of two
registers.

Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by David Howells and committed by Linus Torvalds 852c15b7 6d615c78

+4 -4
unified split
+4 -4
arch/mn10300/mm/misalignment.c
··· 570 address += *postinc; 571 break; 572 case DM1: 573 - postinc = &registers[Dreg_index[opcode >> 2 & 0x0c]]; 574 address += *postinc; 575 break; 576 case DM2: 577 - postinc = &registers[Dreg_index[opcode >> 4 & 0x30]]; 578 address += *postinc; 579 break; 580 case AM0: ··· 582 address += *postinc; 583 break; 584 case AM1: 585 - postinc = &registers[Areg_index[opcode >> 2 & 0x0c]]; 586 address += *postinc; 587 break; 588 case AM2: 589 - postinc = &registers[Areg_index[opcode >> 4 & 0x30]]; 590 address += *postinc; 591 break; 592 case RM0:
··· 570 address += *postinc; 571 break; 572 case DM1: 573 + postinc = &registers[Dreg_index[opcode >> 2 & 0x03]]; 574 address += *postinc; 575 break; 576 case DM2: 577 + postinc = &registers[Dreg_index[opcode >> 4 & 0x03]]; 578 address += *postinc; 579 break; 580 case AM0: ··· 582 address += *postinc; 583 break; 584 case AM1: 585 + postinc = &registers[Areg_index[opcode >> 2 & 0x03]]; 586 address += *postinc; 587 break; 588 case AM2: 589 + postinc = &registers[Areg_index[opcode >> 4 & 0x03]]; 590 address += *postinc; 591 break; 592 case RM0: