···11+Alphascale Clock Controller22+33+The ACC (Alphascale Clock Controller) is responsible of choising proper44+clock source, setting deviders and clock gates.55+66+Required properties for the ACC node:77+ - compatible: must be "alphascale,asm9260-clock-controller"88+ - reg: must contain the ACC register base and size99+ - #clock-cells : shall be set to 1.1010+1111+Simple one-cell clock specifier format is used, where the only cell is used1212+as an index of the clock inside the provider.1313+It is encouraged to use dt-binding for clock index definitions. SoC specific1414+dt-binding should be included to the device tree descriptor. For example1515+Alphascale ASM9260:1616+#include <dt-bindings/clock/alphascale,asm9260.h>1717+1818+This binding contains two types of clock providers:1919+ _AHB_ - AHB gate;2020+ _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider.2121+All clock specific details can be found in the SoC documentation.2222+CLKID_AHB_ROM 02323+CLKID_AHB_RAM 12424+CLKID_AHB_GPIO 22525+CLKID_AHB_MAC 32626+CLKID_AHB_EMI 42727+CLKID_AHB_USB0 52828+CLKID_AHB_USB1 62929+CLKID_AHB_DMA0 73030+CLKID_AHB_DMA1 83131+CLKID_AHB_UART0 93232+CLKID_AHB_UART1 103333+CLKID_AHB_UART2 113434+CLKID_AHB_UART3 123535+CLKID_AHB_UART4 133636+CLKID_AHB_UART5 143737+CLKID_AHB_UART6 153838+CLKID_AHB_UART7 163939+CLKID_AHB_UART8 174040+CLKID_AHB_UART9 184141+CLKID_AHB_I2S0 194242+CLKID_AHB_I2C0 204343+CLKID_AHB_I2C1 214444+CLKID_AHB_SSP0 224545+CLKID_AHB_IOCONFIG 234646+CLKID_AHB_WDT 244747+CLKID_AHB_CAN0 254848+CLKID_AHB_CAN1 264949+CLKID_AHB_MPWM 275050+CLKID_AHB_SPI0 285151+CLKID_AHB_SPI1 295252+CLKID_AHB_QEI 305353+CLKID_AHB_QUADSPI0 315454+CLKID_AHB_CAMIF 325555+CLKID_AHB_LCDIF 335656+CLKID_AHB_TIMER0 345757+CLKID_AHB_TIMER1 355858+CLKID_AHB_TIMER2 365959+CLKID_AHB_TIMER3 376060+CLKID_AHB_IRQ 386161+CLKID_AHB_RTC 396262+CLKID_AHB_NAND 406363+CLKID_AHB_ADC0 416464+CLKID_AHB_LED 426565+CLKID_AHB_DAC0 436666+CLKID_AHB_LCD 446767+CLKID_AHB_I2S1 456868+CLKID_AHB_MAC1 466969+7070+CLKID_SYS_CPU 477171+CLKID_SYS_AHB 487272+CLKID_SYS_I2S0M 497373+CLKID_SYS_I2S0S 507474+CLKID_SYS_I2S1M 517575+CLKID_SYS_I2S1S 527676+CLKID_SYS_UART0 537777+CLKID_SYS_UART1 547878+CLKID_SYS_UART2 557979+CLKID_SYS_UART3 568080+CLKID_SYS_UART4 568181+CLKID_SYS_UART5 578282+CLKID_SYS_UART6 588383+CLKID_SYS_UART7 598484+CLKID_SYS_UART8 608585+CLKID_SYS_UART9 618686+CLKID_SYS_SPI0 628787+CLKID_SYS_SPI1 638888+CLKID_SYS_QUADSPI 648989+CLKID_SYS_SSP0 659090+CLKID_SYS_NAND 669191+CLKID_SYS_TRACE 679292+CLKID_SYS_CAMM 689393+CLKID_SYS_WDT 699494+CLKID_SYS_CLKOUT 709595+CLKID_SYS_MAC 719696+CLKID_SYS_LCD 729797+CLKID_SYS_ADCANA 739898+9999+Example of clock consumer with _SYS_ and _AHB_ sinks.100100+uart4: serial@80010000 {101101+ compatible = "alphascale,asm9260-uart";102102+ reg = <0x80010000 0x4000>;103103+ clocks = <&acc CLKID_SYS_UART4>, <&acc CLKID_AHB_UART4>;104104+ interrupts = <19>;105105+ status = "disabled";106106+};107107+108108+Clock consumer with only one, _AHB_ sink.109109+timer0: timer@80088000 {110110+ compatible = "alphascale,asm9260-timer";111111+ reg = <0x80088000 0x4000>;112112+ clocks = <&acc CLKID_AHB_TIMER0>;113113+ interrupts = <29>;114114+};115115+