sdhci: support JMicron JMB38x chips

The JMicron JMB38x chip doesn't support transfers that aren't 32-bit
aligned (both size and start address). It also doesn't like switching
between PIO and DMA mode, so it needs to be reset after each request.

Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

+19 -1
+18 -1
drivers/mmc/host/sdhci.c
··· 7 7 * it under the terms of the GNU General Public License as published by 8 8 * the Free Software Foundation; either version 2 of the License, or (at 9 9 * your option) any later version. 10 + * 11 + * Thanks to the following companies for their support: 12 + * 13 + * - JMicron (hardware and technical support) 10 14 */ 11 15 12 16 #include <linux/delay.h> ··· 51 47 #define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<6) 52 48 /* Controller can only DMA chunk sizes that are a multiple of 32 bits */ 53 49 #define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7) 50 + /* Controller needs to be reset after each request to stay stable */ 51 + #define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<8) 54 52 55 53 static const struct pci_device_id pci_ids[] __devinitdata = { 56 54 { ··· 115 109 .subdevice = PCI_ANY_ID, 116 110 .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE | 117 111 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS, 112 + }, 113 + 114 + { 115 + .vendor = PCI_VENDOR_ID_JMICRON, 116 + .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD, 117 + .subvendor = PCI_ANY_ID, 118 + .subdevice = PCI_ANY_ID, 119 + .driver_data = SDHCI_QUIRK_32BIT_DMA_ADDR | 120 + SDHCI_QUIRK_32BIT_DMA_SIZE | 121 + SDHCI_QUIRK_RESET_AFTER_REQUEST, 118 122 }, 119 123 120 124 { /* Generic SD host controller */ ··· 938 922 */ 939 923 if (mrq->cmd->error || 940 924 (mrq->data && (mrq->data->error || 941 - (mrq->data->stop && mrq->data->stop->error)))) { 925 + (mrq->data->stop && mrq->data->stop->error))) || 926 + (host->chip->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)) { 942 927 943 928 /* Some controllers need this kick or reset won't work here */ 944 929 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
+1
include/linux/pci_ids.h
··· 2148 2148 #define PCI_DEVICE_ID_JMICRON_JMB365 0x2365 2149 2149 #define PCI_DEVICE_ID_JMICRON_JMB366 0x2366 2150 2150 #define PCI_DEVICE_ID_JMICRON_JMB368 0x2368 2151 + #define PCI_DEVICE_ID_JMICRON_JMB38X_SD 0x2381 2151 2152 2152 2153 #define PCI_VENDOR_ID_KORENIX 0x1982 2153 2154 #define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600