Merge tag 'imx-dt-3.7-2' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt

From Shawn Guo:
This is the second round of imx-dt patches for 3.7. It's based on
and imx-dt-3.7 and imx-clk-dt-lookup which have already been pulled.

* tag 'imx-dt-3.7-2' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: use pll2_pfd2_396m as the enfc_sel's parent
ARM: dts: imx6q-sabrelite: add usbotg pinctrl support
ARM: dts: imx6q-sabrelite: add usbmisc device

arch/arm/boot/dts/imx6q-sabrelite.dts

···
 		aips-bus@02100000 { /* AIPS2 */
 			usb@02184000 { /* USB OTG */
 				vbus-supply = <&reg_usb_otg_vbus>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_usbotg_1>;
+				disable-over-current;
 				status = "okay";
 			};
 

arch/arm/boot/dts/imx6q.dtsi

···
 					};
 				};
 
+				usbotg {
+					pinctrl_usbotg_1: usbotggrp-1 {
+						fsl,pins = <
+							1592 0x17059	/* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */
+						>;
+					};
+				};
+
 				usdhc2 {
 					pinctrl_usdhc2_1: usdhc2grp-1 {
 						fsl,pins = <
···
 				interrupts = <0 43 0x04>;
 				clocks = <&clks 162>;
 				fsl,usbphy = <&usbphy1>;
+				fsl,usbmisc = <&usbmisc 0>;
 				status = "disabled";
 			};
 
···
 				interrupts = <0 40 0x04>;
 				clocks = <&clks 162>;
 				fsl,usbphy = <&usbphy2>;
+				fsl,usbmisc = <&usbmisc 1>;
 				status = "disabled";
 			};
 
···
 				reg = <0x02184400 0x200>;
 				interrupts = <0 41 0x04>;
 				clocks = <&clks 162>;
+				fsl,usbmisc = <&usbmisc 2>;
 				status = "disabled";
 			};
 
···
 				reg = <0x02184600 0x200>;
 				interrupts = <0 42 0x04>;
 				clocks = <&clks 162>;
+				fsl,usbmisc = <&usbmisc 3>;
 				status = "disabled";
+			};
+
+			usbmisc: usbmisc@02184800 {
+				#index-cells = <1>;
+				compatible = "fsl,imx6q-usbmisc";
+				reg = <0x02184800 0x200>;
+				clocks = <&clks 162>;
 			};
 
 			ethernet@02188000 {

arch/arm/mach-imx/clk-imx6q.c

···
 	clk_register_clkdev(clk[ahb], "ahb", NULL);
 	clk_register_clkdev(clk[cko1], "cko1", NULL);
 
+	/*
+	 * The gpmi needs 100MHz frequency in the EDO/Sync mode,
+	 * We can not get the 100MHz from the pll2_pfd0_352m.
+	 * So choose pll2_pfd2_396m as enfc_sel's parent.
+	 */
+	clk_set_parent(clk[enfc_sel], clk[pll2_pfd2_396m]);
+
 	for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
 		clk_prepare_enable(clk[clks_init_on[i]]);