Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc

With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to
their proper location and enable probing using ti-sysc.

In general the first child device address range starts at range 0
from the ti-sysc interconnect target so the move involves adjusting
the child device reg properties for that.

And we cannot yet move mmu_dsp until we have a proper reset controller
driver for rstctrl registers.

In case of any regressions, problem devices can be reverted to probe
with legacy platform data as needed by moving them back and removing
the related interconnect target module node.

Signed-off-by: Tony Lindgren <tony@atomide.com>

+643 -785
+636 -9
arch/arm/boot/dts/omap4-l4.dtsi
··· 55 55 #address-cells = <1>; 56 56 #size-cells = <1>; 57 57 ranges = <0x0 0x2000 0x1000>; 58 + 59 + omap4_scm_core: scm@0 { 60 + compatible = "ti,omap4-scm-core", "simple-bus"; 61 + reg = <0x0 0x1000>; 62 + #address-cells = <1>; 63 + #size-cells = <1>; 64 + ranges = <0 0 0x1000>; 65 + 66 + scm_conf: scm_conf@0 { 67 + compatible = "syscon"; 68 + reg = <0x0 0x800>; 69 + #address-cells = <1>; 70 + #size-cells = <1>; 71 + }; 72 + 73 + omap_control_usb2phy: control-phy@300 { 74 + compatible = "ti,control-phy-usb2"; 75 + reg = <0x300 0x4>; 76 + reg-names = "power"; 77 + }; 78 + 79 + omap_control_usbotg: control-phy@33c { 80 + compatible = "ti,control-phy-otghs"; 81 + reg = <0x33c 0x4>; 82 + reg-names = "otghs_control"; 83 + }; 84 + }; 58 85 }; 59 86 60 87 target-module@4000 { /* 0x4a004000, ap 5 02.0 */ 61 - compatible = "ti,sysc"; 62 - status = "disabled"; 88 + compatible = "ti,sysc-omap4", "ti,sysc"; 89 + reg = <0x4000 0x4>; 90 + reg-names = "rev"; 63 91 #address-cells = <1>; 64 92 #size-cells = <1>; 65 93 ranges = <0x0 0x4000 0x1000>; 94 + 95 + cm1: cm1@0 { 96 + compatible = "ti,omap4-cm1", "simple-bus"; 97 + reg = <0x0 0x2000>; 98 + #address-cells = <1>; 99 + #size-cells = <1>; 100 + ranges = <0 0 0x2000>; 101 + 102 + cm1_clocks: clocks { 103 + #address-cells = <1>; 104 + #size-cells = <0>; 105 + }; 106 + 107 + cm1_clockdomains: clockdomains { 108 + }; 109 + }; 66 110 }; 67 111 68 112 target-module@8000 { /* 0x4a008000, ap 23 32.0 */ 69 - compatible = "ti,sysc"; 70 - status = "disabled"; 113 + compatible = "ti,sysc-omap4", "ti,sysc"; 114 + reg = <0x8000 0x4>; 115 + reg-names = "rev"; 71 116 #address-cells = <1>; 72 117 #size-cells = <1>; 73 118 ranges = <0x0 0x8000 0x2000>; 119 + 120 + cm2: cm2@0 { 121 + compatible = "ti,omap4-cm2", "simple-bus"; 122 + reg = <0x0 0x2000>; 123 + #address-cells = <1>; 124 + #size-cells = <1>; 125 + ranges = <0 0 0x2000>; 126 + 127 + cm2_clocks: clocks { 128 + #address-cells = <1>; 129 + #size-cells = <0>; 130 + }; 131 + 132 + cm2_clockdomains: clockdomains { 133 + }; 134 + }; 74 135 }; 75 136 76 137 target-module@56000 { /* 0x4a056000, ap 7 0a.0 */ ··· 158 97 #address-cells = <1>; 159 98 #size-cells = <1>; 160 99 ranges = <0x0 0x56000 0x1000>; 100 + 101 + sdma: dma-controller@0 { 102 + compatible = "ti,omap4430-sdma"; 103 + reg = <0x0 0x1000>; 104 + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 105 + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 106 + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 107 + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 108 + #dma-cells = <1>; 109 + dma-channels = <32>; 110 + dma-requests = <127>; 111 + }; 161 112 }; 162 113 163 114 target-module@58000 { /* 0x4a058000, ap 10 0e.0 */ ··· 197 124 #address-cells = <1>; 198 125 #size-cells = <1>; 199 126 ranges = <0x0 0x58000 0x4000>; 127 + 128 + hsi: hsi@0 { 129 + compatible = "ti,omap4-hsi"; 130 + reg = <0x0 0x4000>, 131 + <0x4a05c000 0x1000>; 132 + reg-names = "sys", "gdd"; 133 + 134 + clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>; 135 + clock-names = "hsi_fck"; 136 + 137 + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 138 + interrupt-names = "gdd_mpu"; 139 + 140 + #address-cells = <1>; 141 + #size-cells = <1>; 142 + ranges = <0 0 0x4000>; 143 + 144 + hsi_port1: hsi-port@2000 { 145 + compatible = "ti,omap4-hsi-port"; 146 + reg = <0x2000 0x800>, 147 + <0x2800 0x800>; 148 + reg-names = "tx", "rx"; 149 + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 150 + }; 151 + 152 + hsi_port2: hsi-port@3000 { 153 + compatible = "ti,omap4-hsi-port"; 154 + reg = <0x3000 0x800>, 155 + <0x3800 0x800>; 156 + reg-names = "tx", "rx"; 157 + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 158 + }; 159 + }; 200 160 }; 201 161 202 162 target-module@5e000 { /* 0x4a05e000, ap 80 68.0 */ ··· 260 154 #address-cells = <1>; 261 155 #size-cells = <1>; 262 156 ranges = <0x0 0x62000 0x1000>; 157 + 158 + usbhstll: usbhstll@0 { 159 + compatible = "ti,usbhs-tll"; 160 + reg = <0x0 0x1000>; 161 + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 162 + }; 263 163 }; 264 164 265 165 target-module@64000 { /* 0x4a064000, ap 86 1e.0 */ ··· 290 178 #address-cells = <1>; 291 179 #size-cells = <1>; 292 180 ranges = <0x0 0x64000 0x1000>; 181 + 182 + usbhshost: usbhshost@0 { 183 + compatible = "ti,usbhs-host"; 184 + reg = <0x0 0x800>; 185 + #address-cells = <1>; 186 + #size-cells = <1>; 187 + ranges = <0 0 0x1000>; 188 + clocks = <&init_60m_fclk>, 189 + <&xclk60mhsp1_ck>, 190 + <&xclk60mhsp2_ck>; 191 + clock-names = "refclk_60m_int", 192 + "refclk_60m_ext_p1", 193 + "refclk_60m_ext_p2"; 194 + 195 + usbhsohci: ohci@800 { 196 + compatible = "ti,ohci-omap3"; 197 + reg = <0x800 0x400>; 198 + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 199 + remote-wakeup-connected; 200 + }; 201 + 202 + usbhsehci: ehci@c00 { 203 + compatible = "ti,ehci-omap"; 204 + reg = <0xc00 0x400>; 205 + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 206 + }; 207 + }; 293 208 }; 294 209 295 210 target-module@66000 { /* 0x4a066000, ap 25 26.0 */ ··· 338 199 #address-cells = <1>; 339 200 #size-cells = <1>; 340 201 ranges = <0x0 0x66000 0x1000>; 202 + 203 + /* mmu_dsp cannot be moved before reset driver */ 204 + status = "disabled"; 341 205 }; 342 206 }; 343 207 ··· 403 261 #address-cells = <1>; 404 262 #size-cells = <1>; 405 263 ranges = <0x0 0x2b000 0x1000>; 264 + 265 + usb_otg_hs: usb_otg_hs@0 { 266 + compatible = "ti,omap4-musb"; 267 + reg = <0x0 0x7ff>; 268 + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 269 + interrupt-names = "mc", "dma"; 270 + usb-phy = <&usb2_phy>; 271 + phys = <&usb2_phy>; 272 + phy-names = "usb2-phy"; 273 + multipoint = <1>; 274 + num-eps = <16>; 275 + ram-bits = <12>; 276 + ctrl-module = <&omap_control_usbotg>; 277 + }; 406 278 }; 407 279 408 280 target-module@2d000 { /* 0x4a0ad000, ap 88 0c.0 */ ··· 438 282 #address-cells = <1>; 439 283 #size-cells = <1>; 440 284 ranges = <0x0 0x2d000 0x1000>; 285 + 286 + ocp2scp@0 { 287 + compatible = "ti,omap-ocp2scp"; 288 + reg = <0x0 0x1f>; 289 + #address-cells = <1>; 290 + #size-cells = <1>; 291 + ranges = <0 0 0x1000>; 292 + usb2_phy: usb2phy@80 { 293 + compatible = "ti,omap-usb2"; 294 + reg = <0x80 0x58>; 295 + ctrl-module = <&omap_control_usb2phy>; 296 + clocks = <&usb_phy_cm_clk32k>; 297 + clock-names = "wkupclk"; 298 + #phy-cells = <0>; 299 + }; 300 + }; 441 301 }; 442 302 443 303 target-module@36000 { /* 0x4a0b6000, ap 69 60.0 */ ··· 488 316 #address-cells = <1>; 489 317 #size-cells = <1>; 490 318 ranges = <0x0 0x59000 0x1000>; 319 + 320 + smartreflex_mpu: smartreflex@0 { 321 + compatible = "ti,omap4-smartreflex-mpu"; 322 + reg = <0x0 0x80>; 323 + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; 324 + }; 491 325 }; 492 326 493 327 target-module@5b000 { /* 0x4a0db000, ap 15 08.0 */ ··· 512 334 #address-cells = <1>; 513 335 #size-cells = <1>; 514 336 ranges = <0x0 0x5b000 0x1000>; 337 + 338 + smartreflex_iva: smartreflex@0 { 339 + compatible = "ti,omap4-smartreflex-iva"; 340 + reg = <0x0 0x80>; 341 + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 342 + }; 515 343 }; 516 344 517 345 target-module@5d000 { /* 0x4a0dd000, ap 17 22.0 */ ··· 536 352 #address-cells = <1>; 537 353 #size-cells = <1>; 538 354 ranges = <0x0 0x5d000 0x1000>; 355 + 356 + smartreflex_core: smartreflex@0 { 357 + compatible = "ti,omap4-smartreflex-core"; 358 + reg = <0x0 0x80>; 359 + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 360 + }; 539 361 }; 540 362 541 363 target-module@60000 { /* 0x4a0e0000, ap 19 1c.0 */ ··· 568 378 #address-cells = <1>; 569 379 #size-cells = <1>; 570 380 ranges = <0x0 0x74000 0x1000>; 381 + 382 + mailbox: mailbox@0 { 383 + compatible = "ti,omap4-mailbox"; 384 + reg = <0x0 0x200>; 385 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 386 + #mbox-cells = <1>; 387 + ti,mbox-num-users = <3>; 388 + ti,mbox-num-fifos = <8>; 389 + mbox_ipu: mbox_ipu { 390 + ti,mbox-tx = <0 0 0>; 391 + ti,mbox-rx = <1 0 0>; 392 + }; 393 + mbox_dsp: mbox_dsp { 394 + ti,mbox-tx = <3 0 0>; 395 + ti,mbox-rx = <2 0 0>; 396 + }; 397 + }; 571 398 }; 572 399 573 400 target-module@76000 { /* 0x4a0f6000, ap 29 3a.0 */ ··· 608 401 #address-cells = <1>; 609 402 #size-cells = <1>; 610 403 ranges = <0x0 0x76000 0x1000>; 404 + 405 + hwspinlock: spinlock@0 { 406 + compatible = "ti,omap4-hwspinlock"; 407 + reg = <0x0 0x1000>; 408 + #hwlock-cells = <1>; 409 + }; 611 410 }; 612 411 }; 613 412 ··· 644 431 #address-cells = <1>; 645 432 #size-cells = <1>; 646 433 ranges = <0x0 0x0 0x1000>; 434 + 435 + omap4_pmx_core: pinmux@40 { 436 + compatible = "ti,omap4-padconf", 437 + "pinctrl-single"; 438 + reg = <0x40 0x0196>; 439 + #address-cells = <1>; 440 + #size-cells = <0>; 441 + #pinctrl-cells = <1>; 442 + #interrupt-cells = <1>; 443 + interrupt-controller; 444 + pinctrl-single,register-width = <16>; 445 + pinctrl-single,function-mask = <0x7fff>; 446 + }; 447 + 448 + omap4_padconf_global: omap4_padconf_global@5a0 { 449 + compatible = "syscon", 450 + "simple-bus"; 451 + reg = <0x5a0 0x170>; 452 + #address-cells = <1>; 453 + #size-cells = <1>; 454 + ranges = <0 0x5a0 0x170>; 455 + 456 + pbias_regulator: pbias_regulator@60 { 457 + compatible = "ti,pbias-omap4", "ti,pbias-omap"; 458 + reg = <0x60 0x4>; 459 + syscon = <&omap4_padconf_global>; 460 + pbias_mmc_reg: pbias_mmc_omap4 { 461 + regulator-name = "pbias_mmc_omap4"; 462 + regulator-min-microvolt = <1800000>; 463 + regulator-max-microvolt = <3000000>; 464 + }; 465 + }; 466 + }; 647 467 }; 648 468 649 469 target-module@2000 { /* 0x4a102000, ap 61 3c.0 */ ··· 715 469 #address-cells = <1>; 716 470 #size-cells = <1>; 717 471 ranges = <0x0 0xa000 0x1000>; 472 + 473 + /* No child device binding or driver in mainline */ 718 474 }; 719 475 }; 720 476 ··· 965 717 #address-cells = <1>; 966 718 #size-cells = <1>; 967 719 ranges = <0x0 0x4000 0x1000>; 720 + 721 + counter32k: counter@0 { 722 + compatible = "ti,omap-counter32k"; 723 + reg = <0x0 0x20>; 724 + }; 968 725 }; 969 726 970 727 target-module@6000 { /* 0x4a306000, ap 3 08.0 */ 971 - compatible = "ti,sysc"; 972 - status = "disabled"; 728 + compatible = "ti,sysc-omap4", "ti,sysc"; 729 + reg = <0x6000 0x4>; 730 + reg-names = "rev"; 973 731 #address-cells = <1>; 974 732 #size-cells = <1>; 975 733 ranges = <0x0 0x6000 0x2000>; 734 + 735 + prm: prm@0 { 736 + compatible = "ti,omap4-prm"; 737 + reg = <0x0 0x2000>; 738 + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 739 + #address-cells = <1>; 740 + #size-cells = <1>; 741 + ranges = <0 0 0x2000>; 742 + 743 + prm_clocks: clocks { 744 + #address-cells = <1>; 745 + #size-cells = <0>; 746 + }; 747 + 748 + prm_clockdomains: clockdomains { 749 + }; 750 + }; 976 751 }; 977 752 978 753 target-module@a000 { /* 0x4a30a000, ap 15 34.0 */ 979 - compatible = "ti,sysc"; 980 - status = "disabled"; 754 + compatible = "ti,sysc-omap4", "ti,sysc"; 755 + reg = <0xa000 0x4>; 756 + reg-names = "rev"; 981 757 #address-cells = <1>; 982 758 #size-cells = <1>; 983 759 ranges = <0x0 0xa000 0x1000>; 760 + 761 + scrm: scrm@0 { 762 + compatible = "ti,omap4-scrm"; 763 + reg = <0x0 0x2000>; 764 + 765 + scrm_clocks: clocks { 766 + #address-cells = <1>; 767 + #size-cells = <0>; 768 + }; 769 + 770 + scrm_clockdomains: clockdomains { 771 + }; 772 + }; 984 773 }; 985 774 986 775 target-module@c000 { /* 0x4a30c000, ap 19 2c.0 */ ··· 1034 749 #address-cells = <1>; 1035 750 #size-cells = <1>; 1036 751 ranges = <0x0 0xc000 0x1000>; 752 + 753 + omap4_scm_wkup: scm@c000 { 754 + compatible = "ti,omap4-scm-wkup"; 755 + reg = <0xc000 0x1000>; 756 + }; 1037 757 }; 1038 758 }; 1039 759 ··· 1057 767 <0x0000e000 0x0001e000 0x001000>, /* ap 21 */ 1058 768 <0x0000f000 0x0001f000 0x001000>; /* ap 22 */ 1059 769 1060 - target-module@0 { /* 0x4a310000, ap 5 14.0 */ 770 + gpio1_target: target-module@0 { /* 0x4a310000, ap 5 14.0 */ 1061 771 compatible = "ti,sysc-omap2", "ti,sysc"; 1062 772 ti,hwmods = "gpio1"; 1063 773 reg = <0x0 0x4>, ··· 1079 789 #address-cells = <1>; 1080 790 #size-cells = <1>; 1081 791 ranges = <0x0 0x0 0x1000>; 792 + 793 + gpio1: gpio@0 { 794 + compatible = "ti,omap4-gpio"; 795 + reg = <0x0 0x200>; 796 + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 797 + ti,gpio-always-on; 798 + gpio-controller; 799 + #gpio-cells = <2>; 800 + interrupt-controller; 801 + #interrupt-cells = <2>; 802 + }; 1082 803 }; 1083 804 1084 805 target-module@4000 { /* 0x4a314000, ap 7 18.0 */ ··· 1112 811 #address-cells = <1>; 1113 812 #size-cells = <1>; 1114 813 ranges = <0x0 0x4000 0x1000>; 814 + 815 + wdt2: wdt@0 { 816 + compatible = "ti,omap4-wdt", "ti,omap3-wdt"; 817 + reg = <0x0 0x80>; 818 + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 819 + }; 1115 820 }; 1116 821 1117 822 target-module@8000 { /* 0x4a318000, ap 9 1c.0 */ ··· 1142 835 #address-cells = <1>; 1143 836 #size-cells = <1>; 1144 837 ranges = <0x0 0x8000 0x1000>; 838 + 839 + timer1: timer@0 { 840 + compatible = "ti,omap3430-timer"; 841 + reg = <0x0 0x80>; 842 + clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>; 843 + clock-names = "fck"; 844 + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 845 + ti,timer-alwon; 846 + }; 1145 847 }; 1146 848 1147 849 target-module@c000 { /* 0x4a31c000, ap 11 20.0 */ ··· 1175 859 #address-cells = <1>; 1176 860 #size-cells = <1>; 1177 861 ranges = <0x0 0xc000 0x1000>; 862 + 863 + keypad: keypad@0 { 864 + compatible = "ti,omap4-keypad"; 865 + reg = <0x0 0x80>; 866 + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 867 + reg-names = "mpu"; 868 + }; 1178 869 }; 1179 870 1180 871 target-module@e000 { /* 0x4a31e000, ap 21 30.0 */ ··· 1198 875 #address-cells = <1>; 1199 876 #size-cells = <1>; 1200 877 ranges = <0x0 0xe000 0x1000>; 878 + 879 + omap4_pmx_wkup: pinmux@40 { 880 + compatible = "ti,omap4-padconf", 881 + "pinctrl-single"; 882 + reg = <0x40 0x0038>; 883 + #address-cells = <1>; 884 + #size-cells = <0>; 885 + #pinctrl-cells = <1>; 886 + #interrupt-cells = <1>; 887 + interrupt-controller; 888 + pinctrl-single,register-width = <16>; 889 + pinctrl-single,function-mask = <0x7fff>; 890 + }; 1201 891 }; 1202 892 }; 1203 893 ··· 1390 1054 #address-cells = <1>; 1391 1055 #size-cells = <1>; 1392 1056 ranges = <0x0 0x20000 0x1000>; 1057 + 1058 + uart3: serial@0 { 1059 + compatible = "ti,omap4-uart"; 1060 + reg = <0x0 0x100>; 1061 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 1062 + clock-frequency = <48000000>; 1063 + }; 1393 1064 }; 1394 1065 1395 1066 target-module@32000 { /* 0x48032000, ap 5 02.0 */ ··· 1421 1078 #address-cells = <1>; 1422 1079 #size-cells = <1>; 1423 1080 ranges = <0x0 0x32000 0x1000>; 1081 + 1082 + timer2: timer@0 { 1083 + compatible = "ti,omap3430-timer"; 1084 + reg = <0x0 0x80>; 1085 + clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>; 1086 + clock-names = "fck"; 1087 + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 1088 + }; 1424 1089 }; 1425 1090 1426 1091 target-module@34000 { /* 0x48034000, ap 7 04.0 */ ··· 1449 1098 #address-cells = <1>; 1450 1099 #size-cells = <1>; 1451 1100 ranges = <0x0 0x34000 0x1000>; 1101 + 1102 + timer3: timer@0 { 1103 + compatible = "ti,omap4430-timer"; 1104 + reg = <0x0 0x80>; 1105 + clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>; 1106 + clock-names = "fck"; 1107 + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 1108 + }; 1452 1109 }; 1453 1110 1454 1111 target-module@36000 { /* 0x48036000, ap 9 0e.0 */ ··· 1477 1118 #address-cells = <1>; 1478 1119 #size-cells = <1>; 1479 1120 ranges = <0x0 0x36000 0x1000>; 1121 + 1122 + timer4: timer@0 { 1123 + compatible = "ti,omap4430-timer"; 1124 + reg = <0x0 0x80>; 1125 + clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>; 1126 + clock-names = "fck"; 1127 + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 1128 + }; 1480 1129 }; 1481 1130 1482 1131 target-module@3e000 { /* 0x4803e000, ap 11 08.0 */ ··· 1505 1138 #address-cells = <1>; 1506 1139 #size-cells = <1>; 1507 1140 ranges = <0x0 0x3e000 0x1000>; 1141 + 1142 + timer9: timer@0 { 1143 + compatible = "ti,omap4430-timer"; 1144 + reg = <0x0 0x80>; 1145 + clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>; 1146 + clock-names = "fck"; 1147 + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 1148 + ti,timer-pwm; 1149 + }; 1508 1150 }; 1509 1151 1510 1152 target-module@40000 { /* 0x48040000, ap 13 0a.0 */ ··· 1546 1170 #address-cells = <1>; 1547 1171 #size-cells = <1>; 1548 1172 ranges = <0x0 0x55000 0x1000>; 1173 + 1174 + gpio2: gpio@0 { 1175 + compatible = "ti,omap4-gpio"; 1176 + reg = <0x0 0x200>; 1177 + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1178 + gpio-controller; 1179 + #gpio-cells = <2>; 1180 + interrupt-controller; 1181 + #interrupt-cells = <2>; 1182 + }; 1549 1183 }; 1550 1184 1551 1185 target-module@57000 { /* 0x48057000, ap 17 16.0 */ ··· 1580 1194 #address-cells = <1>; 1581 1195 #size-cells = <1>; 1582 1196 ranges = <0x0 0x57000 0x1000>; 1197 + 1198 + gpio3: gpio@0 { 1199 + compatible = "ti,omap4-gpio"; 1200 + reg = <0x0 0x200>; 1201 + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1202 + gpio-controller; 1203 + #gpio-cells = <2>; 1204 + interrupt-controller; 1205 + #interrupt-cells = <2>; 1206 + }; 1583 1207 }; 1584 1208 1585 1209 target-module@59000 { /* 0x48059000, ap 19 10.0 */ ··· 1614 1218 #address-cells = <1>; 1615 1219 #size-cells = <1>; 1616 1220 ranges = <0x0 0x59000 0x1000>; 1221 + 1222 + gpio4: gpio@0 { 1223 + compatible = "ti,omap4-gpio"; 1224 + reg = <0x0 0x200>; 1225 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 1226 + gpio-controller; 1227 + #gpio-cells = <2>; 1228 + interrupt-controller; 1229 + #interrupt-cells = <2>; 1230 + }; 1617 1231 }; 1618 1232 1619 1233 target-module@5b000 { /* 0x4805b000, ap 21 12.0 */ ··· 1648 1242 #address-cells = <1>; 1649 1243 #size-cells = <1>; 1650 1244 ranges = <0x0 0x5b000 0x1000>; 1245 + 1246 + gpio5: gpio@0 { 1247 + compatible = "ti,omap4-gpio"; 1248 + reg = <0x0 0x200>; 1249 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 1250 + gpio-controller; 1251 + #gpio-cells = <2>; 1252 + interrupt-controller; 1253 + #interrupt-cells = <2>; 1254 + }; 1651 1255 }; 1652 1256 1653 1257 target-module@5d000 { /* 0x4805d000, ap 23 14.0 */ ··· 1682 1266 #address-cells = <1>; 1683 1267 #size-cells = <1>; 1684 1268 ranges = <0x0 0x5d000 0x1000>; 1269 + 1270 + gpio6: gpio@0 { 1271 + compatible = "ti,omap4-gpio"; 1272 + reg = <0x0 0x200>; 1273 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 1274 + gpio-controller; 1275 + #gpio-cells = <2>; 1276 + interrupt-controller; 1277 + #interrupt-cells = <2>; 1278 + }; 1685 1279 }; 1686 1280 1687 1281 target-module@60000 { /* 0x48060000, ap 25 1e.0 */ ··· 1716 1290 #address-cells = <1>; 1717 1291 #size-cells = <1>; 1718 1292 ranges = <0x0 0x60000 0x1000>; 1293 + 1294 + i2c3: i2c@0 { 1295 + compatible = "ti,omap4-i2c"; 1296 + reg = <0x0 0x100>; 1297 + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 1298 + #address-cells = <1>; 1299 + #size-cells = <0>; 1300 + }; 1719 1301 }; 1720 1302 1721 1303 target-module@6a000 { /* 0x4806a000, ap 26 18.0 */ ··· 1747 1313 #address-cells = <1>; 1748 1314 #size-cells = <1>; 1749 1315 ranges = <0x0 0x6a000 0x1000>; 1316 + 1317 + uart1: serial@0 { 1318 + compatible = "ti,omap4-uart"; 1319 + reg = <0x0 0x100>; 1320 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 1321 + clock-frequency = <48000000>; 1322 + }; 1750 1323 }; 1751 1324 1752 1325 target-module@6c000 { /* 0x4806c000, ap 28 20.0 */ ··· 1777 1336 #address-cells = <1>; 1778 1337 #size-cells = <1>; 1779 1338 ranges = <0x0 0x6c000 0x1000>; 1339 + 1340 + uart2: serial@0 { 1341 + compatible = "ti,omap4-uart"; 1342 + reg = <0x0 0x100>; 1343 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 1344 + clock-frequency = <48000000>; 1345 + }; 1780 1346 }; 1781 1347 1782 1348 target-module@6e000 { /* 0x4806e000, ap 30 1c.1 */ ··· 1807 1359 #address-cells = <1>; 1808 1360 #size-cells = <1>; 1809 1361 ranges = <0x0 0x6e000 0x1000>; 1362 + 1363 + uart4: serial@0 { 1364 + compatible = "ti,omap4-uart"; 1365 + reg = <0x0 0x100>; 1366 + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 1367 + clock-frequency = <48000000>; 1368 + }; 1810 1369 }; 1811 1370 1812 1371 target-module@70000 { /* 0x48070000, ap 32 28.0 */ ··· 1838 1383 #address-cells = <1>; 1839 1384 #size-cells = <1>; 1840 1385 ranges = <0x0 0x70000 0x1000>; 1386 + 1387 + i2c1: i2c@0 { 1388 + compatible = "ti,omap4-i2c"; 1389 + reg = <0x0 0x100>; 1390 + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 1391 + #address-cells = <1>; 1392 + #size-cells = <0>; 1393 + }; 1841 1394 }; 1842 1395 1843 1396 target-module@72000 { /* 0x48072000, ap 34 30.0 */ ··· 1870 1407 #address-cells = <1>; 1871 1408 #size-cells = <1>; 1872 1409 ranges = <0x0 0x72000 0x1000>; 1410 + 1411 + i2c2: i2c@0 { 1412 + compatible = "ti,omap4-i2c"; 1413 + reg = <0x0 0x100>; 1414 + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 1415 + #address-cells = <1>; 1416 + #size-cells = <0>; 1417 + }; 1873 1418 }; 1874 1419 1875 1420 target-module@76000 { /* 0x48076000, ap 39 38.0 */ ··· 1897 1426 #address-cells = <1>; 1898 1427 #size-cells = <1>; 1899 1428 ranges = <0x0 0x76000 0x1000>; 1429 + 1430 + /* No child device binding or driver in mainline */ 1900 1431 }; 1901 1432 1902 1433 target-module@78000 { /* 0x48078000, ap 41 1a.0 */ ··· 1921 1448 #address-cells = <1>; 1922 1449 #size-cells = <1>; 1923 1450 ranges = <0x0 0x78000 0x1000>; 1451 + 1452 + elm: elm@0 { 1453 + compatible = "ti,am3352-elm"; 1454 + reg = <0x0 0x2000>; 1455 + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 1456 + status = "disabled"; 1457 + }; 1924 1458 }; 1925 1459 1926 1460 target-module@86000 { /* 0x48086000, ap 43 24.0 */ ··· 1952 1472 #address-cells = <1>; 1953 1473 #size-cells = <1>; 1954 1474 ranges = <0x0 0x86000 0x1000>; 1475 + 1476 + timer10: timer@0 { 1477 + compatible = "ti,omap3430-timer"; 1478 + reg = <0x0 0x80>; 1479 + clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>; 1480 + clock-names = "fck"; 1481 + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 1482 + ti,timer-pwm; 1483 + }; 1955 1484 }; 1956 1485 1957 1486 target-module@88000 { /* 0x48088000, ap 45 2e.0 */ ··· 1981 1492 #address-cells = <1>; 1982 1493 #size-cells = <1>; 1983 1494 ranges = <0x0 0x88000 0x1000>; 1495 + 1496 + timer11: timer@0 { 1497 + compatible = "ti,omap4430-timer"; 1498 + reg = <0x0 0x80>; 1499 + clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>; 1500 + clock-names = "fck"; 1501 + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 1502 + ti,timer-pwm; 1503 + }; 1984 1504 }; 1985 1505 1986 1506 target-module@90000 { /* 0x48090000, ap 57 2a.0 */ ··· 2017 1519 #address-cells = <1>; 2018 1520 #size-cells = <1>; 2019 1521 ranges = <0x0 0x96000 0x1000>; 1522 + 1523 + mcbsp4: mcbsp@0 { 1524 + compatible = "ti,omap4-mcbsp"; 1525 + reg = <0x0 0xff>; /* L4 Interconnect */ 1526 + reg-names = "mpu"; 1527 + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1528 + interrupt-names = "common"; 1529 + ti,buffer-size = <128>; 1530 + dmas = <&sdma 31>, 1531 + <&sdma 32>; 1532 + dma-names = "tx", "rx"; 1533 + status = "disabled"; 1534 + }; 2020 1535 }; 2021 1536 2022 1537 target-module@98000 { /* 0x48098000, ap 49 22.0 */ ··· 2050 1539 #address-cells = <1>; 2051 1540 #size-cells = <1>; 2052 1541 ranges = <0x0 0x98000 0x1000>; 1542 + 1543 + mcspi1: spi@0 { 1544 + compatible = "ti,omap4-mcspi"; 1545 + reg = <0x0 0x200>; 1546 + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 1547 + #address-cells = <1>; 1548 + #size-cells = <0>; 1549 + ti,spi-num-cs = <4>; 1550 + dmas = <&sdma 35>, 1551 + <&sdma 36>, 1552 + <&sdma 37>, 1553 + <&sdma 38>, 1554 + <&sdma 39>, 1555 + <&sdma 40>, 1556 + <&sdma 41>, 1557 + <&sdma 42>; 1558 + dma-names = "tx0", "rx0", "tx1", "rx1", 1559 + "tx2", "rx2", "tx3", "rx3"; 1560 + }; 2053 1561 }; 2054 1562 2055 1563 target-module@9a000 { /* 0x4809a000, ap 51 2c.0 */ ··· 2089 1559 #address-cells = <1>; 2090 1560 #size-cells = <1>; 2091 1561 ranges = <0x0 0x9a000 0x1000>; 1562 + 1563 + mcspi2: spi@0 { 1564 + compatible = "ti,omap4-mcspi"; 1565 + reg = <0x0 0x200>; 1566 + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 1567 + #address-cells = <1>; 1568 + #size-cells = <0>; 1569 + ti,spi-num-cs = <2>; 1570 + dmas = <&sdma 43>, 1571 + <&sdma 44>, 1572 + <&sdma 45>, 1573 + <&sdma 46>; 1574 + dma-names = "tx0", "rx0", "tx1", "rx1"; 1575 + }; 2092 1576 }; 2093 1577 2094 1578 target-module@9c000 { /* 0x4809c000, ap 53 36.0 */ ··· 2127 1583 #address-cells = <1>; 2128 1584 #size-cells = <1>; 2129 1585 ranges = <0x0 0x9c000 0x1000>; 1586 + 1587 + mmc1: mmc@0 { 1588 + compatible = "ti,omap4-hsmmc"; 1589 + reg = <0x0 0x400>; 1590 + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 1591 + ti,dual-volt; 1592 + ti,needs-special-reset; 1593 + dmas = <&sdma 61>, <&sdma 62>; 1594 + dma-names = "tx", "rx"; 1595 + pbias-supply = <&pbias_mmc_reg>; 1596 + }; 2130 1597 }; 2131 1598 2132 1599 target-module@9e000 { /* 0x4809e000, ap 55 48.0 */ ··· 2195 1640 #address-cells = <1>; 2196 1641 #size-cells = <1>; 2197 1642 ranges = <0x0 0xad000 0x1000>; 1643 + 1644 + mmc3: mmc@0 { 1645 + compatible = "ti,omap4-hsmmc"; 1646 + reg = <0x0 0x400>; 1647 + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 1648 + ti,needs-special-reset; 1649 + dmas = <&sdma 77>, <&sdma 78>; 1650 + dma-names = "tx", "rx"; 1651 + }; 2198 1652 }; 2199 1653 2200 1654 target-module@b0000 { /* 0x480b0000, ap 47 40.0 */ ··· 2231 1667 #address-cells = <1>; 2232 1668 #size-cells = <1>; 2233 1669 ranges = <0x0 0xb2000 0x1000>; 1670 + 1671 + hdqw1w: 1w@0 { 1672 + compatible = "ti,omap3-1w"; 1673 + reg = <0x0 0x1000>; 1674 + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 1675 + }; 2234 1676 }; 2235 1677 2236 1678 target-module@b4000 { /* 0x480b4000, ap 67 46.0 */ ··· 2261 1691 #address-cells = <1>; 2262 1692 #size-cells = <1>; 2263 1693 ranges = <0x0 0xb4000 0x1000>; 1694 + 1695 + mmc2: mmc@0 { 1696 + compatible = "ti,omap4-hsmmc"; 1697 + reg = <0x0 0x400>; 1698 + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 1699 + ti,needs-special-reset; 1700 + dmas = <&sdma 47>, <&sdma 48>; 1701 + dma-names = "tx", "rx"; 1702 + }; 2264 1703 }; 2265 1704 2266 1705 target-module@b8000 { /* 0x480b8000, ap 69 58.0 */ ··· 2290 1711 #address-cells = <1>; 2291 1712 #size-cells = <1>; 2292 1713 ranges = <0x0 0xb8000 0x1000>; 1714 + 1715 + mcspi3: spi@0 { 1716 + compatible = "ti,omap4-mcspi"; 1717 + reg = <0x0 0x200>; 1718 + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 1719 + #address-cells = <1>; 1720 + #size-cells = <0>; 1721 + ti,spi-num-cs = <2>; 1722 + dmas = <&sdma 15>, <&sdma 16>; 1723 + dma-names = "tx0", "rx0"; 1724 + }; 2293 1725 }; 2294 1726 2295 1727 target-module@ba000 { /* 0x480ba000, ap 71 32.0 */ ··· 2321 1731 #address-cells = <1>; 2322 1732 #size-cells = <1>; 2323 1733 ranges = <0x0 0xba000 0x1000>; 1734 + 1735 + mcspi4: spi@0 { 1736 + compatible = "ti,omap4-mcspi"; 1737 + reg = <0x0 0x200>; 1738 + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 1739 + #address-cells = <1>; 1740 + #size-cells = <0>; 1741 + ti,spi-num-cs = <1>; 1742 + dmas = <&sdma 70>, <&sdma 71>; 1743 + dma-names = "tx0", "rx0"; 1744 + }; 2324 1745 }; 2325 1746 2326 1747 target-module@d1000 { /* 0x480d1000, ap 73 44.0 */ ··· 2356 1755 #address-cells = <1>; 2357 1756 #size-cells = <1>; 2358 1757 ranges = <0x0 0xd1000 0x1000>; 1758 + 1759 + mmc4: mmc@0 { 1760 + compatible = "ti,omap4-hsmmc"; 1761 + reg = <0x0 0x400>; 1762 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 1763 + ti,needs-special-reset; 1764 + dmas = <&sdma 57>, <&sdma 58>; 1765 + dma-names = "tx", "rx"; 1766 + }; 2359 1767 }; 2360 1768 2361 1769 target-module@d5000 { /* 0x480d5000, ap 75 4e.0 */ ··· 2389 1779 #address-cells = <1>; 2390 1780 #size-cells = <1>; 2391 1781 ranges = <0x0 0xd5000 0x1000>; 1782 + 1783 + mmc5: mmc@0 { 1784 + compatible = "ti,omap4-hsmmc"; 1785 + reg = <0x0 0x400>; 1786 + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 1787 + ti,needs-special-reset; 1788 + dmas = <&sdma 59>, <&sdma 60>; 1789 + dma-names = "tx", "rx"; 1790 + }; 2392 1791 }; 2393 1792 }; 2394 1793 ··· 2430 1811 #address-cells = <1>; 2431 1812 #size-cells = <1>; 2432 1813 ranges = <0x0 0x150000 0x1000>; 1814 + 1815 + i2c4: i2c@0 { 1816 + compatible = "ti,omap4-i2c"; 1817 + reg = <0x0 0x100>; 1818 + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 1819 + #address-cells = <1>; 1820 + #size-cells = <0>; 1821 + }; 2433 1822 }; 2434 1823 }; 2435 1824 };
+1 -1
arch/arm/boot/dts/omap4-panda-es.dts
··· 68 68 }; 69 69 }; 70 70 71 - &gpio1 { 71 + &gpio1_target { 72 72 ti,no-reset-on-init; 73 73 };
+6 -775
arch/arm/boot/dts/omap4.dtsi
··· 139 139 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 140 140 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 141 141 142 - l4_cfg: l4@4a000000 { 143 - compatible = "ti,omap4-l4-cfg", "simple-bus"; 144 - #address-cells = <1>; 145 - #size-cells = <1>; 146 - ranges = <0 0x4a000000 0x1000000>; 142 + l4_wkup: interconnect@4a300000 { 143 + }; 147 144 148 - cm1: cm1@4000 { 149 - compatible = "ti,omap4-cm1", "simple-bus"; 150 - reg = <0x4000 0x2000>; 151 - #address-cells = <1>; 152 - #size-cells = <1>; 153 - ranges = <0 0x4000 0x2000>; 145 + l4_cfg: interconnect@4a000000 { 146 + }; 154 147 155 - cm1_clocks: clocks { 156 - #address-cells = <1>; 157 - #size-cells = <0>; 158 - }; 159 - 160 - cm1_clockdomains: clockdomains { 161 - }; 162 - }; 163 - 164 - cm2: cm2@8000 { 165 - compatible = "ti,omap4-cm2", "simple-bus"; 166 - reg = <0x8000 0x2000>; 167 - #address-cells = <1>; 168 - #size-cells = <1>; 169 - ranges = <0 0x8000 0x2000>; 170 - 171 - cm2_clocks: clocks { 172 - #address-cells = <1>; 173 - #size-cells = <0>; 174 - }; 175 - 176 - cm2_clockdomains: clockdomains { 177 - }; 178 - }; 179 - 180 - omap4_scm_core: scm@2000 { 181 - compatible = "ti,omap4-scm-core", "simple-bus"; 182 - reg = <0x2000 0x1000>; 183 - #address-cells = <1>; 184 - #size-cells = <1>; 185 - ranges = <0 0x2000 0x1000>; 186 - ti,hwmods = "ctrl_module_core"; 187 - 188 - scm_conf: scm_conf@0 { 189 - compatible = "syscon"; 190 - reg = <0x0 0x800>; 191 - #address-cells = <1>; 192 - #size-cells = <1>; 193 - }; 194 - }; 195 - 196 - omap4_padconf_core: scm@100000 { 197 - compatible = "ti,omap4-scm-padconf-core", 198 - "simple-bus"; 199 - reg = <0x100000 0x1000>; 200 - #address-cells = <1>; 201 - #size-cells = <1>; 202 - ranges = <0 0x100000 0x1000>; 203 - ti,hwmods = "ctrl_module_pad_core"; 204 - 205 - omap4_pmx_core: pinmux@40 { 206 - compatible = "ti,omap4-padconf", 207 - "pinctrl-single"; 208 - reg = <0x40 0x0196>; 209 - #address-cells = <1>; 210 - #size-cells = <0>; 211 - #pinctrl-cells = <1>; 212 - #interrupt-cells = <1>; 213 - interrupt-controller; 214 - pinctrl-single,register-width = <16>; 215 - pinctrl-single,function-mask = <0x7fff>; 216 - }; 217 - 218 - omap4_padconf_global: omap4_padconf_global@5a0 { 219 - compatible = "syscon", 220 - "simple-bus"; 221 - reg = <0x5a0 0x170>; 222 - #address-cells = <1>; 223 - #size-cells = <1>; 224 - ranges = <0 0x5a0 0x170>; 225 - 226 - pbias_regulator: pbias_regulator@60 { 227 - compatible = "ti,pbias-omap4", "ti,pbias-omap"; 228 - reg = <0x60 0x4>; 229 - syscon = <&omap4_padconf_global>; 230 - pbias_mmc_reg: pbias_mmc_omap4 { 231 - regulator-name = "pbias_mmc_omap4"; 232 - regulator-min-microvolt = <1800000>; 233 - regulator-max-microvolt = <3000000>; 234 - }; 235 - }; 236 - }; 237 - }; 238 - 239 - l4_wkup: l4@300000 { 240 - compatible = "ti,omap4-l4-wkup", "simple-bus"; 241 - #address-cells = <1>; 242 - #size-cells = <1>; 243 - ranges = <0 0x300000 0x40000>; 244 - 245 - counter32k: counter@4000 { 246 - compatible = "ti,omap-counter32k"; 247 - reg = <0x4000 0x20>; 248 - ti,hwmods = "counter_32k"; 249 - }; 250 - 251 - prm: prm@6000 { 252 - compatible = "ti,omap4-prm"; 253 - reg = <0x6000 0x2000>; 254 - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 255 - #address-cells = <1>; 256 - #size-cells = <1>; 257 - ranges = <0 0x6000 0x2000>; 258 - 259 - prm_clocks: clocks { 260 - #address-cells = <1>; 261 - #size-cells = <0>; 262 - }; 263 - 264 - prm_clockdomains: clockdomains { 265 - }; 266 - }; 267 - 268 - scrm: scrm@a000 { 269 - compatible = "ti,omap4-scrm"; 270 - reg = <0xa000 0x2000>; 271 - 272 - scrm_clocks: clocks { 273 - #address-cells = <1>; 274 - #size-cells = <0>; 275 - }; 276 - 277 - scrm_clockdomains: clockdomains { 278 - }; 279 - }; 280 - 281 - omap4_scm_wkup: scm@c000 { 282 - compatible = "ti,omap4-scm-wkup"; 283 - reg = <0xc000 0x1000>; 284 - ti,hwmods = "ctrl_module_wkup"; 285 - }; 286 - 287 - omap4_padconf_wkup: padconf@1e000 { 288 - compatible = "ti,omap4-scm-padconf-wkup", 289 - "simple-bus"; 290 - reg = <0x1e000 0x1000>; 291 - #address-cells = <1>; 292 - #size-cells = <1>; 293 - ranges = <0 0x1e000 0x1000>; 294 - ti,hwmods = "ctrl_module_pad_wkup"; 295 - 296 - omap4_pmx_wkup: pinmux@40 { 297 - compatible = "ti,omap4-padconf", 298 - "pinctrl-single"; 299 - reg = <0x40 0x0038>; 300 - #address-cells = <1>; 301 - #size-cells = <0>; 302 - #pinctrl-cells = <1>; 303 - #interrupt-cells = <1>; 304 - interrupt-controller; 305 - pinctrl-single,register-width = <16>; 306 - pinctrl-single,function-mask = <0x7fff>; 307 - }; 308 - }; 309 - }; 148 + l4_per: interconnect@48000000 { 310 149 }; 311 150 312 151 ocmcram: ocmcram@40304000 { 313 152 compatible = "mmio-sram"; 314 153 reg = <0x40304000 0xa000>; /* 40k */ 315 - }; 316 - 317 - sdma: dma-controller@4a056000 { 318 - compatible = "ti,omap4430-sdma"; 319 - reg = <0x4a056000 0x1000>; 320 - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 321 - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 322 - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 323 - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 324 - #dma-cells = <1>; 325 - dma-channels = <32>; 326 - dma-requests = <127>; 327 - ti,hwmods = "dma_system"; 328 - }; 329 - 330 - gpio1: gpio@4a310000 { 331 - compatible = "ti,omap4-gpio"; 332 - reg = <0x4a310000 0x200>; 333 - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 334 - ti,hwmods = "gpio1"; 335 - ti,gpio-always-on; 336 - gpio-controller; 337 - #gpio-cells = <2>; 338 - interrupt-controller; 339 - #interrupt-cells = <2>; 340 - }; 341 - 342 - gpio2: gpio@48055000 { 343 - compatible = "ti,omap4-gpio"; 344 - reg = <0x48055000 0x200>; 345 - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 346 - ti,hwmods = "gpio2"; 347 - gpio-controller; 348 - #gpio-cells = <2>; 349 - interrupt-controller; 350 - #interrupt-cells = <2>; 351 - }; 352 - 353 - gpio3: gpio@48057000 { 354 - compatible = "ti,omap4-gpio"; 355 - reg = <0x48057000 0x200>; 356 - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 357 - ti,hwmods = "gpio3"; 358 - gpio-controller; 359 - #gpio-cells = <2>; 360 - interrupt-controller; 361 - #interrupt-cells = <2>; 362 - }; 363 - 364 - gpio4: gpio@48059000 { 365 - compatible = "ti,omap4-gpio"; 366 - reg = <0x48059000 0x200>; 367 - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 368 - ti,hwmods = "gpio4"; 369 - gpio-controller; 370 - #gpio-cells = <2>; 371 - interrupt-controller; 372 - #interrupt-cells = <2>; 373 - }; 374 - 375 - gpio5: gpio@4805b000 { 376 - compatible = "ti,omap4-gpio"; 377 - reg = <0x4805b000 0x200>; 378 - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 379 - ti,hwmods = "gpio5"; 380 - gpio-controller; 381 - #gpio-cells = <2>; 382 - interrupt-controller; 383 - #interrupt-cells = <2>; 384 - }; 385 - 386 - gpio6: gpio@4805d000 { 387 - compatible = "ti,omap4-gpio"; 388 - reg = <0x4805d000 0x200>; 389 - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 390 - ti,hwmods = "gpio6"; 391 - gpio-controller; 392 - #gpio-cells = <2>; 393 - interrupt-controller; 394 - #interrupt-cells = <2>; 395 - }; 396 - 397 - target-module@48076000 { 398 - compatible = "ti,sysc-omap4", "ti,sysc"; 399 - ti,hwmods = "slimbus2"; 400 - reg = <0x48076000 0x4>, 401 - <0x48076010 0x4>; 402 - reg-names = "rev", "sysc"; 403 - ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 404 - ti,sysc-sidle = <SYSC_IDLE_FORCE>, 405 - <SYSC_IDLE_NO>, 406 - <SYSC_IDLE_SMART>, 407 - <SYSC_IDLE_SMART_WKUP>; 408 - clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>; 409 - clock-names = "fck"; 410 - #address-cells = <1>; 411 - #size-cells = <1>; 412 - ranges = <0 0x48076000 0x001000>; 413 - 414 - /* No child device binding or driver in mainline */ 415 - }; 416 - 417 - elm: elm@48078000 { 418 - compatible = "ti,am3352-elm"; 419 - reg = <0x48078000 0x2000>; 420 - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 421 - ti,hwmods = "elm"; 422 - status = "disabled"; 423 154 }; 424 155 425 156 gpmc: gpmc@50000000 { ··· 171 440 #interrupt-cells = <2>; 172 441 gpio-controller; 173 442 #gpio-cells = <2>; 174 - }; 175 - 176 - uart1: serial@4806a000 { 177 - compatible = "ti,omap4-uart"; 178 - reg = <0x4806a000 0x100>; 179 - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 180 - ti,hwmods = "uart1"; 181 - clock-frequency = <48000000>; 182 - }; 183 - 184 - uart2: serial@4806c000 { 185 - compatible = "ti,omap4-uart"; 186 - reg = <0x4806c000 0x100>; 187 - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 188 - ti,hwmods = "uart2"; 189 - clock-frequency = <48000000>; 190 - }; 191 - 192 - uart3: serial@48020000 { 193 - compatible = "ti,omap4-uart"; 194 - reg = <0x48020000 0x100>; 195 - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 196 - ti,hwmods = "uart3"; 197 - clock-frequency = <48000000>; 198 - }; 199 - 200 - uart4: serial@4806e000 { 201 - compatible = "ti,omap4-uart"; 202 - reg = <0x4806e000 0x100>; 203 - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 204 - ti,hwmods = "uart4"; 205 - clock-frequency = <48000000>; 206 - }; 207 - 208 - target-module@4a0db000 { 209 - compatible = "ti,sysc-omap4-sr", "ti,sysc"; 210 - ti,hwmods = "smartreflex_iva"; 211 - reg = <0x4a0db038 0x4>; 212 - reg-names = "sysc"; 213 - ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>; 214 - ti,sysc-sidle = <SYSC_IDLE_FORCE>, 215 - <SYSC_IDLE_NO>, 216 - <SYSC_IDLE_SMART>, 217 - <SYSC_IDLE_SMART_WKUP>; 218 - clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>; 219 - clock-names = "fck"; 220 - #address-cells = <1>; 221 - #size-cells = <1>; 222 - ranges = <0 0x4a0db000 0x001000>; 223 - 224 - smartreflex_iva: smartreflex@0 { 225 - compatible = "ti,omap4-smartreflex-iva"; 226 - reg = <0 0x80>; 227 - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 228 - }; 229 - }; 230 - 231 - target-module@4a0dd000 { 232 - compatible = "ti,sysc-omap4-sr", "ti,sysc"; 233 - ti,hwmods = "smartreflex_core"; 234 - reg = <0x4a0dd038 0x4>; 235 - reg-names = "sysc"; 236 - ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>; 237 - ti,sysc-sidle = <SYSC_IDLE_FORCE>, 238 - <SYSC_IDLE_NO>, 239 - <SYSC_IDLE_SMART>, 240 - <SYSC_IDLE_SMART_WKUP>; 241 - clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>; 242 - clock-names = "fck"; 243 - #address-cells = <1>; 244 - #size-cells = <1>; 245 - ranges = <0 0x4a0dd000 0x001000>; 246 - 247 - smartreflex_core: smartreflex@0 { 248 - compatible = "ti,omap4-smartreflex-core"; 249 - reg = <0 0x80>; 250 - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 251 - }; 252 - }; 253 - 254 - target-module@4a0d9000 { 255 - compatible = "ti,sysc-omap4-sr", "ti,sysc"; 256 - ti,hwmods = "smartreflex_mpu"; 257 - reg = <0x4a0d9038 0x4>; 258 - reg-names = "sysc"; 259 - ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>; 260 - ti,sysc-sidle = <SYSC_IDLE_FORCE>, 261 - <SYSC_IDLE_NO>, 262 - <SYSC_IDLE_SMART>, 263 - <SYSC_IDLE_SMART_WKUP>; 264 - clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>; 265 - clock-names = "fck"; 266 - #address-cells = <1>; 267 - #size-cells = <1>; 268 - ranges = <0 0x4a0d9000 0x001000>; 269 - 270 - smartreflex_mpu: smartreflex@0 { 271 - compatible = "ti,omap4-smartreflex-mpu"; 272 - reg = <0 0x80>; 273 - interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; 274 - }; 275 - }; 276 - 277 - hwspinlock: spinlock@4a0f6000 { 278 - compatible = "ti,omap4-hwspinlock"; 279 - reg = <0x4a0f6000 0x1000>; 280 - ti,hwmods = "spinlock"; 281 - #hwlock-cells = <1>; 282 - }; 283 - 284 - i2c1: i2c@48070000 { 285 - compatible = "ti,omap4-i2c"; 286 - reg = <0x48070000 0x100>; 287 - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 288 - #address-cells = <1>; 289 - #size-cells = <0>; 290 - ti,hwmods = "i2c1"; 291 - }; 292 - 293 - i2c2: i2c@48072000 { 294 - compatible = "ti,omap4-i2c"; 295 - reg = <0x48072000 0x100>; 296 - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 297 - #address-cells = <1>; 298 - #size-cells = <0>; 299 - ti,hwmods = "i2c2"; 300 - }; 301 - 302 - i2c3: i2c@48060000 { 303 - compatible = "ti,omap4-i2c"; 304 - reg = <0x48060000 0x100>; 305 - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 306 - #address-cells = <1>; 307 - #size-cells = <0>; 308 - ti,hwmods = "i2c3"; 309 - }; 310 - 311 - i2c4: i2c@48350000 { 312 - compatible = "ti,omap4-i2c"; 313 - reg = <0x48350000 0x100>; 314 - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 315 - #address-cells = <1>; 316 - #size-cells = <0>; 317 - ti,hwmods = "i2c4"; 318 - }; 319 - 320 - mcspi1: spi@48098000 { 321 - compatible = "ti,omap4-mcspi"; 322 - reg = <0x48098000 0x200>; 323 - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 324 - #address-cells = <1>; 325 - #size-cells = <0>; 326 - ti,hwmods = "mcspi1"; 327 - ti,spi-num-cs = <4>; 328 - dmas = <&sdma 35>, 329 - <&sdma 36>, 330 - <&sdma 37>, 331 - <&sdma 38>, 332 - <&sdma 39>, 333 - <&sdma 40>, 334 - <&sdma 41>, 335 - <&sdma 42>; 336 - dma-names = "tx0", "rx0", "tx1", "rx1", 337 - "tx2", "rx2", "tx3", "rx3"; 338 - }; 339 - 340 - mcspi2: spi@4809a000 { 341 - compatible = "ti,omap4-mcspi"; 342 - reg = <0x4809a000 0x200>; 343 - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 344 - #address-cells = <1>; 345 - #size-cells = <0>; 346 - ti,hwmods = "mcspi2"; 347 - ti,spi-num-cs = <2>; 348 - dmas = <&sdma 43>, 349 - <&sdma 44>, 350 - <&sdma 45>, 351 - <&sdma 46>; 352 - dma-names = "tx0", "rx0", "tx1", "rx1"; 353 - }; 354 - 355 - hdqw1w: 1w@480b2000 { 356 - compatible = "ti,omap3-1w"; 357 - reg = <0x480b2000 0x1000>; 358 - interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 359 - ti,hwmods = "hdq1w"; 360 - }; 361 - 362 - mcspi3: spi@480b8000 { 363 - compatible = "ti,omap4-mcspi"; 364 - reg = <0x480b8000 0x200>; 365 - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 366 - #address-cells = <1>; 367 - #size-cells = <0>; 368 - ti,hwmods = "mcspi3"; 369 - ti,spi-num-cs = <2>; 370 - dmas = <&sdma 15>, <&sdma 16>; 371 - dma-names = "tx0", "rx0"; 372 - }; 373 - 374 - mcspi4: spi@480ba000 { 375 - compatible = "ti,omap4-mcspi"; 376 - reg = <0x480ba000 0x200>; 377 - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 378 - #address-cells = <1>; 379 - #size-cells = <0>; 380 - ti,hwmods = "mcspi4"; 381 - ti,spi-num-cs = <1>; 382 - dmas = <&sdma 70>, <&sdma 71>; 383 - dma-names = "tx0", "rx0"; 384 - }; 385 - 386 - mmc1: mmc@4809c000 { 387 - compatible = "ti,omap4-hsmmc"; 388 - reg = <0x4809c000 0x400>; 389 - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 390 - ti,hwmods = "mmc1"; 391 - ti,dual-volt; 392 - ti,needs-special-reset; 393 - dmas = <&sdma 61>, <&sdma 62>; 394 - dma-names = "tx", "rx"; 395 - pbias-supply = <&pbias_mmc_reg>; 396 - }; 397 - 398 - mmc2: mmc@480b4000 { 399 - compatible = "ti,omap4-hsmmc"; 400 - reg = <0x480b4000 0x400>; 401 - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 402 - ti,hwmods = "mmc2"; 403 - ti,needs-special-reset; 404 - dmas = <&sdma 47>, <&sdma 48>; 405 - dma-names = "tx", "rx"; 406 - }; 407 - 408 - mmc3: mmc@480ad000 { 409 - compatible = "ti,omap4-hsmmc"; 410 - reg = <0x480ad000 0x400>; 411 - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 412 - ti,hwmods = "mmc3"; 413 - ti,needs-special-reset; 414 - dmas = <&sdma 77>, <&sdma 78>; 415 - dma-names = "tx", "rx"; 416 - }; 417 - 418 - mmc4: mmc@480d1000 { 419 - compatible = "ti,omap4-hsmmc"; 420 - reg = <0x480d1000 0x400>; 421 - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 422 - ti,hwmods = "mmc4"; 423 - ti,needs-special-reset; 424 - dmas = <&sdma 57>, <&sdma 58>; 425 - dma-names = "tx", "rx"; 426 - }; 427 - 428 - mmc5: mmc@480d5000 { 429 - compatible = "ti,omap4-hsmmc"; 430 - reg = <0x480d5000 0x400>; 431 - interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 432 - ti,hwmods = "mmc5"; 433 - ti,needs-special-reset; 434 - dmas = <&sdma 59>, <&sdma 60>; 435 - dma-names = "tx", "rx"; 436 - }; 437 - 438 - hsi: hsi@4a058000 { 439 - compatible = "ti,omap4-hsi"; 440 - reg = <0x4a058000 0x4000>, 441 - <0x4a05c000 0x1000>; 442 - reg-names = "sys", "gdd"; 443 - ti,hwmods = "hsi"; 444 - 445 - clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>; 446 - clock-names = "hsi_fck"; 447 - 448 - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 449 - interrupt-names = "gdd_mpu"; 450 - 451 - #address-cells = <1>; 452 - #size-cells = <1>; 453 - ranges = <0 0x4a058000 0x4000>; 454 - 455 - hsi_port1: hsi-port@2000 { 456 - compatible = "ti,omap4-hsi-port"; 457 - reg = <0x2000 0x800>, 458 - <0x2800 0x800>; 459 - reg-names = "tx", "rx"; 460 - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 461 - }; 462 - 463 - hsi_port2: hsi-port@3000 { 464 - compatible = "ti,omap4-hsi-port"; 465 - reg = <0x3000 0x800>, 466 - <0x3800 0x800>; 467 - reg-names = "tx", "rx"; 468 - interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 469 - }; 470 443 }; 471 444 472 445 mmu_dsp: mmu@4a066000 { ··· 214 779 #iommu-cells = <0>; 215 780 ti,iommu-bus-err-back; 216 781 }; 217 - 218 - wdt2: wdt@4a314000 { 219 - compatible = "ti,omap4-wdt", "ti,omap3-wdt"; 220 - reg = <0x4a314000 0x80>; 221 - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 222 - ti,hwmods = "wd_timer2"; 223 - }; 224 - 225 782 target-module@40130000 { 226 783 compatible = "ti,sysc-omap2", "ti,sysc"; 227 784 ti,hwmods = "wd_timer3"; ··· 386 959 */ 387 960 }; 388 961 389 - mcbsp4: mcbsp@48096000 { 390 - compatible = "ti,omap4-mcbsp"; 391 - reg = <0x48096000 0xff>; /* L4 Interconnect */ 392 - reg-names = "mpu"; 393 - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 394 - interrupt-names = "common"; 395 - ti,buffer-size = <128>; 396 - ti,hwmods = "mcbsp4"; 397 - dmas = <&sdma 31>, 398 - <&sdma 32>; 399 - dma-names = "tx", "rx"; 400 - status = "disabled"; 401 - }; 402 - 403 - keypad: keypad@4a31c000 { 404 - compatible = "ti,omap4-keypad"; 405 - reg = <0x4a31c000 0x80>; 406 - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 407 - reg-names = "mpu"; 408 - ti,hwmods = "kbd"; 409 - }; 410 - 411 962 dmm@4e000000 { 412 963 compatible = "ti,omap4-dmm"; 413 964 reg = <0x4e000000 0x800>; ··· 415 1010 hw-caps-read-idle-ctrl; 416 1011 hw-caps-ll-interface; 417 1012 hw-caps-temp-alert; 418 - }; 419 - 420 - ocp2scp@4a0ad000 { 421 - compatible = "ti,omap-ocp2scp"; 422 - reg = <0x4a0ad000 0x1f>; 423 - #address-cells = <1>; 424 - #size-cells = <1>; 425 - ranges; 426 - ti,hwmods = "ocp2scp_usb_phy"; 427 - usb2_phy: usb2phy@4a0ad080 { 428 - compatible = "ti,omap-usb2"; 429 - reg = <0x4a0ad080 0x58>; 430 - ctrl-module = <&omap_control_usb2phy>; 431 - clocks = <&usb_phy_cm_clk32k>; 432 - clock-names = "wkupclk"; 433 - #phy-cells = <0>; 434 - }; 435 - }; 436 - 437 - mailbox: mailbox@4a0f4000 { 438 - compatible = "ti,omap4-mailbox"; 439 - reg = <0x4a0f4000 0x200>; 440 - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 441 - ti,hwmods = "mailbox"; 442 - #mbox-cells = <1>; 443 - ti,mbox-num-users = <3>; 444 - ti,mbox-num-fifos = <8>; 445 - mbox_ipu: mbox_ipu { 446 - ti,mbox-tx = <0 0 0>; 447 - ti,mbox-rx = <1 0 0>; 448 - }; 449 - mbox_dsp: mbox_dsp { 450 - ti,mbox-tx = <3 0 0>; 451 - ti,mbox-rx = <2 0 0>; 452 - }; 453 - }; 454 - 455 - target-module@4a10a000 { 456 - compatible = "ti,sysc-omap4", "ti,sysc"; 457 - ti,hwmods = "fdif"; 458 - reg = <0x4a10a000 0x4>, 459 - <0x4a10a010 0x4>; 460 - reg-names = "rev", "sysc"; 461 - ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 462 - ti,sysc-midle = <SYSC_IDLE_FORCE>, 463 - <SYSC_IDLE_NO>, 464 - <SYSC_IDLE_SMART>; 465 - ti,sysc-sidle = <SYSC_IDLE_FORCE>, 466 - <SYSC_IDLE_NO>, 467 - <SYSC_IDLE_SMART>; 468 - ti,sysc-delay-us = <2>; 469 - clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>; 470 - clock-names = "fck"; 471 - #address-cells = <1>; 472 - #size-cells = <1>; 473 - ranges = <0 0x4a10a000 0x1000>; 474 - 475 - /* No child device binding or driver in mainline */ 476 - }; 477 - 478 - timer1: timer@4a318000 { 479 - compatible = "ti,omap3430-timer"; 480 - reg = <0x4a318000 0x80>; 481 - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 482 - ti,hwmods = "timer1"; 483 - ti,timer-alwon; 484 - clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>; 485 - clock-names = "fck"; 486 - }; 487 - 488 - timer2: timer@48032000 { 489 - compatible = "ti,omap3430-timer"; 490 - reg = <0x48032000 0x80>; 491 - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 492 - ti,hwmods = "timer2"; 493 - }; 494 - 495 - timer3: timer@48034000 { 496 - compatible = "ti,omap4430-timer"; 497 - reg = <0x48034000 0x80>; 498 - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 499 - ti,hwmods = "timer3"; 500 - }; 501 - 502 - timer4: timer@48036000 { 503 - compatible = "ti,omap4430-timer"; 504 - reg = <0x48036000 0x80>; 505 - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 506 - ti,hwmods = "timer4"; 507 1013 }; 508 1014 509 1015 timer5: timer@40138000 { ··· 452 1136 ti,hwmods = "timer8"; 453 1137 ti,timer-pwm; 454 1138 ti,timer-dsp; 455 - }; 456 - 457 - timer9: timer@4803e000 { 458 - compatible = "ti,omap4430-timer"; 459 - reg = <0x4803e000 0x80>; 460 - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 461 - ti,hwmods = "timer9"; 462 - ti,timer-pwm; 463 - }; 464 - 465 - timer10: timer@48086000 { 466 - compatible = "ti,omap3430-timer"; 467 - reg = <0x48086000 0x80>; 468 - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 469 - ti,hwmods = "timer10"; 470 - ti,timer-pwm; 471 - }; 472 - 473 - timer11: timer@48088000 { 474 - compatible = "ti,omap4430-timer"; 475 - reg = <0x48088000 0x80>; 476 - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 477 - ti,hwmods = "timer11"; 478 - ti,timer-pwm; 479 - }; 480 - 481 - usbhstll: usbhstll@4a062000 { 482 - compatible = "ti,usbhs-tll"; 483 - reg = <0x4a062000 0x1000>; 484 - interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 485 - ti,hwmods = "usb_tll_hs"; 486 - }; 487 - 488 - usbhshost: usbhshost@4a064000 { 489 - compatible = "ti,usbhs-host"; 490 - reg = <0x4a064000 0x800>; 491 - ti,hwmods = "usb_host_hs"; 492 - #address-cells = <1>; 493 - #size-cells = <1>; 494 - ranges; 495 - clocks = <&init_60m_fclk>, 496 - <&xclk60mhsp1_ck>, 497 - <&xclk60mhsp2_ck>; 498 - clock-names = "refclk_60m_int", 499 - "refclk_60m_ext_p1", 500 - "refclk_60m_ext_p2"; 501 - 502 - usbhsohci: ohci@4a064800 { 503 - compatible = "ti,ohci-omap3"; 504 - reg = <0x4a064800 0x400>; 505 - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 506 - remote-wakeup-connected; 507 - }; 508 - 509 - usbhsehci: ehci@4a064c00 { 510 - compatible = "ti,ehci-omap"; 511 - reg = <0x4a064c00 0x400>; 512 - interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 513 - }; 514 - }; 515 - 516 - omap_control_usb2phy: control-phy@4a002300 { 517 - compatible = "ti,control-phy-usb2"; 518 - reg = <0x4a002300 0x4>; 519 - reg-names = "power"; 520 - }; 521 - 522 - omap_control_usbotg: control-phy@4a00233c { 523 - compatible = "ti,control-phy-otghs"; 524 - reg = <0x4a00233c 0x4>; 525 - reg-names = "otghs_control"; 526 - }; 527 - 528 - usb_otg_hs: usb_otg_hs@4a0ab000 { 529 - compatible = "ti,omap4-musb"; 530 - reg = <0x4a0ab000 0x7ff>; 531 - interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 532 - interrupt-names = "mc", "dma"; 533 - ti,hwmods = "usb_otg_hs"; 534 - usb-phy = <&usb2_phy>; 535 - phys = <&usb2_phy>; 536 - phy-names = "usb2-phy"; 537 - multipoint = <1>; 538 - num-eps = <16>; 539 - ram-bits = <12>; 540 - ctrl-module = <&omap_control_usbotg>; 541 1139 }; 542 1140 543 1141 aes1: aes@4b501000 { ··· 628 1398 }; 629 1399 }; 630 1400 1401 + #include "omap4-l4.dtsi" 631 1402 #include "omap44xx-clocks.dtsi"