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dt-bindings: usb: cdns-imx8qm: add imx8qm cdns3 glue layer
NXP imx8qm integrates 1 cdns3 IP. This is glue layer device bindings.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230517152545.3404508-2-Frank.Li@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
authored by
Frank Li
and committed by
Greg Kroah-Hartman
8486eb80
7a053bf2
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Documentation/devicetree/bindings/usb/fsl,imx8qm-cdns3.yaml
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Documentation/devicetree/bindings/usb/fsl,imx8qm-cdns3.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (c) 2020 NXP
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/usb/fsl,imx8qm-cdns3.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP iMX8QM Soc USB Controller
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qm-usb3
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reg:
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items:
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- description: Register set for iMX USB3 Platform Control
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"#address-cells":
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enum: [ 1, 2 ]
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"#size-cells":
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enum: [ 1, 2 ]
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ranges: true
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clocks:
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items:
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- description: Standby clock. Used during ultra low power states.
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- description: USB bus clock for usb3 controller.
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- description: AXI clock for AXI interface.
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- description: ipg clock for register access.
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- description: Core clock for usb3 controller.
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clock-names:
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items:
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- const: lpm
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- const: bus
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- const: aclk
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- const: ipg
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- const: core
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power-domains:
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maxItems: 1
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# Required child node:
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patternProperties:
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"^usb@[0-9a-f]+$":
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$ref: cdns,usb3.yaml#
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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- ranges
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- clocks
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- clock-names
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- power-domains
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8-lpcg.h>
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#include <dt-bindings/firmware/imx/rsrc.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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usb@5b110000 {
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compatible = "fsl,imx8qm-usb3";
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reg = <0x5b110000 0x10000>;
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ranges;
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clocks = <&usb3_lpcg IMX_LPCG_CLK_1>,
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<&usb3_lpcg IMX_LPCG_CLK_0>,
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<&usb3_lpcg IMX_LPCG_CLK_7>,
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<&usb3_lpcg IMX_LPCG_CLK_4>,
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<&usb3_lpcg IMX_LPCG_CLK_5>;
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clock-names = "lpm", "bus", "aclk", "ipg", "core";
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assigned-clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>;
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assigned-clock-rates = <250000000>;
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power-domains = <&pd IMX_SC_R_USB_2>;
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#address-cells = <1>;
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#size-cells = <1>;
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usb@5b120000 {
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compatible = "cdns,usb3";
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reg = <0x5b120000 0x10000>, /* memory area for OTG/DRD registers */
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<0x5b130000 0x10000>, /* memory area for HOST registers */
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<0x5b140000 0x10000>; /* memory area for DEVICE registers */
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reg-names = "otg", "xhci", "dev";
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host", "peripheral", "otg", "wakeup";
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phys = <&usb3_phy>;
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phy-names = "cdns3,usb3-phy";
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};
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};