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dt-bindings: i2c: tegra-bpmp: Convert to json-schema

Convert the NVIDIA Tegra186 (and later) BPMP I2C bindings from the
free-form text format to json-schema.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20211208143306.534700-1-thierry.reding@gmail.com
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Thierry Reding and committed by
Rob Herring
84184107 de3f6daa

+45 -42
-42
Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
··· 1 - NVIDIA Tegra186 BPMP I2C controller 2 - 3 - In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW 4 - devices, such as the I2C controller for the power management I2C bus. Software 5 - running on other CPUs must perform IPC to the BPMP in order to execute 6 - transactions on that I2C bus. This binding describes an I2C bus that is 7 - accessed in such a fashion. 8 - 9 - The BPMP I2C node must be located directly inside the main BPMP node. See 10 - ../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding. 11 - 12 - This node represents an I2C controller. See ../i2c/i2c.txt for details of the 13 - core I2C binding. 14 - 15 - Required properties: 16 - - compatible: 17 - Array of strings. 18 - One of: 19 - - "nvidia,tegra186-bpmp-i2c". 20 - - #address-cells: Address cells for I2C device address. 21 - Single-cell integer. 22 - Must be <1>. 23 - - #size-cells: 24 - Single-cell integer. 25 - Must be <0>. 26 - - nvidia,bpmp-bus-id: 27 - Single-cell integer. 28 - Indicates the I2C bus number this DT node represent, as defined by the 29 - BPMP firmware. 30 - 31 - Example: 32 - 33 - bpmp { 34 - ... 35 - 36 - i2c { 37 - compatible = "nvidia,tegra186-bpmp-i2c"; 38 - #address-cells = <1>; 39 - #size-cells = <0>; 40 - nvidia,bpmp-bus-id = <5>; 41 - }; 42 - };
+45
Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: NVIDIA Tegra186 (and later) BPMP I2C controller 8 + 9 + maintainers: 10 + - Thierry Reding <thierry.reding@gmail.com> 11 + - Jon Hunter <jonathanh@nvidia.com> 12 + 13 + description: | 14 + In Tegra186 and later, the BPMP (Boot and Power Management Processor) 15 + owns certain HW devices, such as the I2C controller for the power 16 + management I2C bus. Software running on other CPUs must perform IPC to 17 + the BPMP in order to execute transactions on that I2C bus. This 18 + binding describes an I2C bus that is accessed in such a fashion. 19 + 20 + The BPMP I2C node must be located directly inside the main BPMP node. 21 + See ../firmware/nvidia,tegra186-bpmp.yaml for details of the BPMP 22 + binding. 23 + 24 + This node represents an I2C controller. See ../i2c/i2c.txt for details 25 + of the core I2C binding. 26 + 27 + properties: 28 + compatible: 29 + const: nvidia,tegra186-bpmp-i2c 30 + 31 + nvidia,bpmp-bus-id: 32 + $ref: /schemas/types.yaml#/definitions/uint32 33 + description: Indicates the I2C bus number this DT node represents, 34 + as defined by the BPMP firmware. 35 + 36 + allOf: 37 + - $ref: /schemas/i2c/i2c-controller.yaml 38 + 39 + unevaluatedProperties: false 40 + 41 + required: 42 + - compatible 43 + - "#address-cells" 44 + - "#size-cells" 45 + - nvidia,bpmp-bus-id