tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
[ARM] 4432/5: davinci: pin mux support
Support pin multiplexing configurations driver for TI DaVinci SoC
Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com>
Acked-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
authored by
Vladimir Barinov
and committed by
Russell King
83f53220
3d9edf09
+154
-31
+1
-1
arch/arm/mach-davinci/Makefile
+1
-1
arch/arm/mach-davinci/Makefile
+41
arch/arm/mach-davinci/mux.c
+41
arch/arm/mach-davinci/mux.c
···
1
+
/*
2
+
* DaVinci pin multiplexing configurations
3
+
*
4
+
* Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5
+
*
6
+
* 2007 (c) MontaVista Software, Inc. This file is licensed under
7
+
* the terms of the GNU General Public License version 2. This program
8
+
* is licensed "as is" without any warranty of any kind, whether express
9
+
* or implied.
10
+
*/
11
+
#include <linux/io.h>
12
+
#include <linux/spinlock.h>
13
+
14
+
#include <asm/hardware.h>
15
+
16
+
#include <asm/arch/mux.h>
17
+
18
+
/* System control register offsets */
19
+
#define PINMUX0 0x00
20
+
#define PINMUX1 0x04
21
+
22
+
static DEFINE_SPINLOCK(mux_lock);
23
+
24
+
void davinci_mux_peripheral(unsigned int mux, unsigned int enable)
25
+
{
26
+
u32 pinmux, muxreg = PINMUX0;
27
+
28
+
if (mux >= DAVINCI_MUX_LEVEL2) {
29
+
muxreg = PINMUX1;
30
+
mux -= DAVINCI_MUX_LEVEL2;
31
+
}
32
+
33
+
spin_lock(&mux_lock);
34
+
pinmux = davinci_readl(DAVINCI_SYSTEM_MODULE_BASE + muxreg);
35
+
if (enable)
36
+
pinmux |= (1 << mux);
37
+
else
38
+
pinmux &= ~(1 << mux);
39
+
davinci_writel(pinmux, DAVINCI_SYSTEM_MODULE_BASE + muxreg);
40
+
spin_unlock(&mux_lock);
41
+
}
+57
-30
arch/arm/mach-davinci/psc.c
+57
-30
arch/arm/mach-davinci/psc.c
···
25
25
#include <asm/io.h>
26
26
#include <asm/hardware.h>
27
27
#include <asm/arch/psc.h>
28
+
#include <asm/arch/mux.h>
28
29
29
-
#define PTCMD __REG(0x01C41120)
30
-
#define PDSTAT __REG(0x01C41200)
31
-
#define PDCTL1 __REG(0x01C41304)
32
-
#define EPCPR __REG(0x01C41070)
33
-
#define PTSTAT __REG(0x01C41128)
30
+
/* PSC register offsets */
31
+
#define EPCPR 0x070
32
+
#define PTCMD 0x120
33
+
#define PTSTAT 0x128
34
+
#define PDSTAT 0x200
35
+
#define PDCTL1 0x304
36
+
#define MDSTAT 0x800
37
+
#define MDCTL 0xA00
34
38
35
-
#define MDSTAT IO_ADDRESS(0x01C41800)
36
-
#define MDCTL IO_ADDRESS(0x01C41A00)
37
-
38
-
#define PINMUX0 __REG(0x01c40000)
39
-
#define PINMUX1 __REG(0x01c40004)
40
-
#define VDD3P3V_PWDN __REG(0x01C40048)
39
+
/* System control register offsets */
40
+
#define VDD3P3V_PWDN 0x48
41
41
42
42
static void davinci_psc_mux(unsigned int id)
43
43
{
44
44
switch (id) {
45
45
case DAVINCI_LPSC_ATA:
46
-
PINMUX0 |= (1 << 17) | (1 << 16);
46
+
davinci_mux_peripheral(DAVINCI_MUX_HDIREN, 1);
47
+
davinci_mux_peripheral(DAVINCI_MUX_ATAEN, 1);
47
48
break;
48
49
case DAVINCI_LPSC_MMC_SD:
49
50
/* VDD power manupulations are done in U-Boot for CPMAC
50
51
* so applies to MMC as well
51
52
*/
52
53
/*Set up the pull regiter for MMC */
53
-
VDD3P3V_PWDN = 0x0;
54
-
PINMUX1 &= (~(1 << 9));
54
+
davinci_writel(0, DAVINCI_SYSTEM_MODULE_BASE + VDD3P3V_PWDN);
55
+
davinci_mux_peripheral(DAVINCI_MUX_MSTK, 0);
55
56
break;
56
57
case DAVINCI_LPSC_I2C:
57
-
PINMUX1 |= (1 << 7);
58
+
davinci_mux_peripheral(DAVINCI_MUX_I2C, 1);
58
59
break;
59
60
case DAVINCI_LPSC_McBSP:
60
-
PINMUX1 |= (1 << 10);
61
+
davinci_mux_peripheral(DAVINCI_MUX_ASP, 1);
61
62
break;
62
63
default:
63
64
break;
···
68
67
/* Enable or disable a PSC domain */
69
68
void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
70
69
{
71
-
volatile unsigned int *mdstat = (unsigned int *)((int)MDSTAT + 4 * id);
72
-
volatile unsigned int *mdctl = (unsigned int *)((int)MDCTL + 4 * id);
70
+
u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl, mdstat_mask;
73
71
74
72
if (id < 0)
75
73
return;
76
74
75
+
mdctl = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id);
77
76
if (enable)
78
-
*mdctl |= 0x00000003; /* Enable Module */
77
+
mdctl |= 0x00000003; /* Enable Module */
79
78
else
80
-
*mdctl &= 0xFFFFFFF2; /* Disable Module */
79
+
mdctl &= 0xFFFFFFF2; /* Disable Module */
80
+
davinci_writel(mdctl, DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id);
81
81
82
-
if ((PDSTAT & 0x00000001) == 0) {
83
-
PDCTL1 |= 0x1;
84
-
PTCMD = (1 << domain);
85
-
while ((((EPCPR >> domain) & 1) == 0));
82
+
pdstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + PDSTAT);
83
+
if ((pdstat & 0x00000001) == 0) {
84
+
pdctl1 = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1);
85
+
pdctl1 |= 0x1;
86
+
davinci_writel(pdctl1, DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1);
86
87
87
-
PDCTL1 |= 0x100;
88
-
while (!(((PTSTAT >> domain) & 1) == 0));
88
+
ptcmd = 1 << domain;
89
+
davinci_writel(ptcmd, DAVINCI_PWR_SLEEP_CNTRL_BASE + PTCMD);
90
+
91
+
do {
92
+
epcpr = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE +
93
+
EPCPR);
94
+
} while ((((epcpr >> domain) & 1) == 0));
95
+
96
+
pdctl1 = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1);
97
+
pdctl1 |= 0x100;
98
+
davinci_writel(pdctl1, DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1);
99
+
100
+
do {
101
+
ptstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE +
102
+
PTSTAT);
103
+
} while (!(((ptstat >> domain) & 1) == 0));
89
104
} else {
90
-
PTCMD = (1 << domain);
91
-
while (!(((PTSTAT >> domain) & 1) == 0));
105
+
ptcmd = 1 << domain;
106
+
davinci_writel(ptcmd, DAVINCI_PWR_SLEEP_CNTRL_BASE + PTCMD);
107
+
108
+
do {
109
+
ptstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE +
110
+
PTSTAT);
111
+
} while (!(((ptstat >> domain) & 1) == 0));
92
112
}
93
113
94
114
if (enable)
95
-
while (!((*mdstat & 0x0000001F) == 0x3));
115
+
mdstat_mask = 0x3;
96
116
else
97
-
while (!((*mdstat & 0x0000001F) == 0x2));
117
+
mdstat_mask = 0x2;
118
+
119
+
do {
120
+
mdstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE +
121
+
MDSTAT + 4 * id);
122
+
} while (!((mdstat & 0x0000001F) == mdstat_mask));
98
123
99
124
if (enable)
100
125
davinci_psc_mux(id);
+55
include/asm-arm/arch-davinci/mux.h
+55
include/asm-arm/arch-davinci/mux.h
···
1
+
/*
2
+
* DaVinci pin multiplexing defines
3
+
*
4
+
* Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5
+
*
6
+
* 2007 (c) MontaVista Software, Inc. This file is licensed under
7
+
* the terms of the GNU General Public License version 2. This program
8
+
* is licensed "as is" without any warranty of any kind, whether express
9
+
* or implied.
10
+
*/
11
+
#ifndef __ASM_ARCH_MUX_H
12
+
#define __ASM_ARCH_MUX_H
13
+
14
+
#define DAVINCI_MUX_AEAW0 0
15
+
#define DAVINCI_MUX_AEAW1 1
16
+
#define DAVINCI_MUX_AEAW2 2
17
+
#define DAVINCI_MUX_AEAW3 3
18
+
#define DAVINCI_MUX_AEAW4 4
19
+
#define DAVINCI_MUX_AECS4 10
20
+
#define DAVINCI_MUX_AECS5 11
21
+
#define DAVINCI_MUX_VLYNQWD0 12
22
+
#define DAVINCI_MUX_VLYNQWD1 13
23
+
#define DAVINCI_MUX_VLSCREN 14
24
+
#define DAVINCI_MUX_VLYNQEN 15
25
+
#define DAVINCI_MUX_HDIREN 16
26
+
#define DAVINCI_MUX_ATAEN 17
27
+
#define DAVINCI_MUX_RGB666 22
28
+
#define DAVINCI_MUX_RGB888 23
29
+
#define DAVINCI_MUX_LOEEN 24
30
+
#define DAVINCI_MUX_LFLDEN 25
31
+
#define DAVINCI_MUX_CWEN 26
32
+
#define DAVINCI_MUX_CFLDEN 27
33
+
#define DAVINCI_MUX_HPIEN 29
34
+
#define DAVINCI_MUX_1394EN 30
35
+
#define DAVINCI_MUX_EMACEN 31
36
+
37
+
#define DAVINCI_MUX_LEVEL2 32
38
+
#define DAVINCI_MUX_UART0 (DAVINCI_MUX_LEVEL2 + 0)
39
+
#define DAVINCI_MUX_UART1 (DAVINCI_MUX_LEVEL2 + 1)
40
+
#define DAVINCI_MUX_UART2 (DAVINCI_MUX_LEVEL2 + 2)
41
+
#define DAVINCI_MUX_U2FLO (DAVINCI_MUX_LEVEL2 + 3)
42
+
#define DAVINCI_MUX_PWM0 (DAVINCI_MUX_LEVEL2 + 4)
43
+
#define DAVINCI_MUX_PWM1 (DAVINCI_MUX_LEVEL2 + 5)
44
+
#define DAVINCI_MUX_PWM2 (DAVINCI_MUX_LEVEL2 + 6)
45
+
#define DAVINCI_MUX_I2C (DAVINCI_MUX_LEVEL2 + 7)
46
+
#define DAVINCI_MUX_SPI (DAVINCI_MUX_LEVEL2 + 8)
47
+
#define DAVINCI_MUX_MSTK (DAVINCI_MUX_LEVEL2 + 9)
48
+
#define DAVINCI_MUX_ASP (DAVINCI_MUX_LEVEL2 + 10)
49
+
#define DAVINCI_MUX_CLK0 (DAVINCI_MUX_LEVEL2 + 16)
50
+
#define DAVINCI_MUX_CLK1 (DAVINCI_MUX_LEVEL2 + 17)
51
+
#define DAVINCI_MUX_TIMIN (DAVINCI_MUX_LEVEL2 + 18)
52
+
53
+
extern void davinci_mux_peripheral(unsigned int mux, unsigned int enable);
54
+
55
+
#endif /* __ASM_ARCH_MUX_H */