Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'v5.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

New peripherals supported on rk356x: sfc, usb3, sata and
the video-decoder on rk3328.
RK3399 received some improvements and nodes for the memory controller.
Additional peripherals for PineNote, Gru and BananaPi-R2-Pro.
New boards are the Firefly Station M2, Pine64 SoQuartz SOM and
Quartz64 model B as well as the Radxa Rock3 model A.

* tag 'v5.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (32 commits)
arm64: dts: rockchip: enable otg/drd operation of usb_host0_xhci in rk356x
arm64: dts: rockchip: rename HDMI ref clock to 'ref' on rk3399
arm64: dts: rockchip: add dts for Firefly Station M2 rk3566
arm64: dts: rockchip: add SoQuartz CM4IO dts
arm64: dts: rockchip: add Pine64 Quartz64-B device tree
dt-bindings: arm: rockchip: Add Firefly Station M2
dt-bindings: arm: rockchip: Add Pine64 SoQuartz SoM
dt-bindings: arm: rockchip: Add Pine64 Quartz64 Model B
arm64: dts: rockchip: enable usb hub on the radxa rock3 model a
arm64: dts: rockchip: add usb3 support to the radxa rock3 model a
arm64: dts: rockchip: add rk356x sfc support
arm64: dts: rockchip: Add USB and TCPC to rk3566-pinenote
arm64: dts: rockchip: Add accelerometer to rk3566-pinenote
arm64: dts: rockchip: add an input enable pinconf to rk3399
arm64: dts: rockchip: Add vdec support for RK3328
arm64: dts: rockchip: Rename vdec_mmu node for RK3328
arm64: dts: rockchip: Enable dmc and dfi nodes on gru
arm64: dts: rockchip: Add dfi and dmc nodes to rk3399
arm64: dts: rockchip: add clocks property to cru nodes rk3399
arm64: dts: rockchip: use generic node name for pmucru on rk3399
...

Link: https://lore.kernel.org/r/7748558.DvuYhMxLoT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+3096 -18
+21 -2
Documentation/devicetree/bindings/arm/rockchip.yaml
··· 133 133 - firefly,roc-rk3399-pc-plus 134 134 - const: rockchip,rk3399 135 135 136 + - description: Firefly Station M2 137 + items: 138 + - const: firefly,rk3566-roc-pc 139 + - const: rockchip,rk3566 140 + 136 141 - description: FriendlyElec NanoPi R2S 137 142 items: 138 143 - const: friendlyarm,nanopi-r2s ··· 507 502 - const: pine64,rockpro64 508 503 - const: rockchip,rk3399 509 504 510 - - description: Pine64 Quartz64 Model A 505 + - description: Pine64 Quartz64 Model A/B 511 506 items: 512 - - const: pine64,quartz64-a 507 + - enum: 508 + - pine64,quartz64-a 509 + - pine64,quartz64-b 510 + - const: rockchip,rk3566 511 + 512 + - description: Pine64 SoQuartz SoM 513 + items: 514 + - enum: 515 + - pine64,soquartz-cm4io 516 + - const: pine64,soquartz 513 517 - const: rockchip,rk3566 514 518 515 519 - description: Radxa Rock ··· 558 544 items: 559 545 - const: radxa,rock2-square 560 546 - const: rockchip,rk3288 547 + 548 + - description: Radxa ROCK3 Model A 549 + items: 550 + - const: radxa,rock3a 551 + - const: rockchip,rk3568 561 552 562 553 - description: Rikomagic MK808 v1 563 554 items:
+5 -1
arch/arm64/boot/dts/rockchip/Makefile
··· 59 59 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb 60 60 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb 61 61 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb 62 - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb 62 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb 63 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb 64 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb 63 65 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb 66 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb 67 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
+20 -2
arch/arm64/boot/dts/rockchip/rk3328.dtsi
··· 306 306 }; 307 307 power-domain@RK3328_PD_VIDEO { 308 308 reg = <RK3328_PD_VIDEO>; 309 + clocks = <&cru ACLK_RKVDEC>, 310 + <&cru HCLK_RKVDEC>, 311 + <&cru SCLK_VDEC_CABAC>, 312 + <&cru SCLK_VDEC_CORE>; 309 313 #power-domain-cells = <0>; 310 314 }; 311 315 power-domain@RK3328_PD_VPU { ··· 664 660 power-domains = <&power RK3328_PD_VPU>; 665 661 }; 666 662 667 - rkvdec_mmu: iommu@ff360480 { 663 + vdec: video-codec@ff360000 { 664 + compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec"; 665 + reg = <0x0 0xff360000 0x0 0x400>; 666 + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 667 + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, 668 + <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>; 669 + clock-names = "axi", "ahb", "cabac", "core"; 670 + assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>, 671 + <&cru SCLK_VDEC_CORE>; 672 + assigned-clock-rates = <400000000>, <400000000>, <300000000>; 673 + iommus = <&vdec_mmu>; 674 + power-domains = <&power RK3328_PD_VIDEO>; 675 + }; 676 + 677 + vdec_mmu: iommu@ff360480 { 668 678 compatible = "rockchip,iommu"; 669 679 reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>; 670 680 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 671 681 clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; 672 682 clock-names = "aclk", "iface"; 673 683 #iommu-cells = <0>; 674 - status = "disabled"; 684 + power-domains = <&power RK3328_PD_VIDEO>; 675 685 }; 676 686 677 687 vop: vop@ff370000 {
+2 -1
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
··· 5 5 6 6 /dts-v1/; 7 7 #include <dt-bindings/input/linux-event-codes.h> 8 + #include <dt-bindings/interrupt-controller/irq.h> 8 9 #include <dt-bindings/pwm/pwm.h> 9 10 #include <dt-bindings/usb/pd.h> 10 11 #include "rk3399.dtsi" ··· 787 786 reg = <1>; 788 787 compatible = "brcm,bcm4329-fmac"; 789 788 interrupt-parent = <&gpio0>; 790 - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 789 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; 791 790 interrupt-names = "host-wake"; 792 791 brcm,drive-strength = <5>; 793 792 pinctrl-names = "default";
+7
arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
··· 234 234 extcon = <&usbc_extcon0>, <&usbc_extcon1>; 235 235 }; 236 236 237 + &dmc { 238 + center-supply = <&ppvar_centerlogic>; 239 + rockchip,pd-idle-dis-freq-hz = <800000000>; 240 + rockchip,sr-idle-dis-freq-hz = <800000000>; 241 + rockchip,sr-mc-gate-idle-dis-freq-hz = <800000000>; 242 + }; 243 + 237 244 &edp { 238 245 status = "okay"; 239 246
+12
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
··· 391 391 <400000000>; 392 392 }; 393 393 394 + /* The center supply is fixed to .9V on scarlet */ 395 + &dmc { 396 + center-supply = <&pp900_s0>; 397 + }; 398 + 399 + /* We don't need .925 V for 928 MHz on scarlet */ 400 + &dmc_opp_table { 401 + opp03 { 402 + opp-microvolt = <900000>; 403 + }; 404 + }; 405 + 394 406 &gpio0 { 395 407 gpio-line-names = /* GPIO0 A 0-7 */ 396 408 "CLK_32K_AP",
+28
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
··· 373 373 <200000000>; 374 374 }; 375 375 376 + &dfi { 377 + status = "okay"; 378 + }; 379 + 380 + &dmc { 381 + status = "okay"; 382 + 383 + rockchip,pd-idle-ns = <160>; 384 + rockchip,sr-idle-ns = <10240>; 385 + rockchip,sr-mc-gate-idle-ns = <40960>; 386 + rockchip,srpd-lite-idle-ns = <61440>; 387 + rockchip,standby-idle-ns = <81920>; 388 + 389 + rockchip,ddr3_odt_dis_freq = <666000000>; 390 + rockchip,lpddr3_odt_dis_freq = <666000000>; 391 + rockchip,lpddr4_odt_dis_freq = <666000000>; 392 + 393 + rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>; 394 + rockchip,srpd-lite-idle-dis-freq-hz = <0>; 395 + rockchip,standby-idle-dis-freq-hz = <928000000>; 396 + }; 397 + 398 + &dmc_opp_table { 399 + opp03 { 400 + opp-suspend; 401 + }; 402 + }; 403 + 376 404 &emmc_phy { 377 405 status = "okay"; 378 406 };
+2 -1
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
··· 2 2 /dts-v1/; 3 3 #include <dt-bindings/pwm/pwm.h> 4 4 #include <dt-bindings/input/input.h> 5 + #include <dt-bindings/interrupt-controller/irq.h> 5 6 #include "rk3399.dtsi" 6 7 #include "rk3399-opp.dtsi" 7 8 ··· 630 629 compatible = "brcm,bcm4329-fmac"; 631 630 reg = <1>; 632 631 interrupt-parent = <&gpio0>; 633 - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 632 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; 634 633 interrupt-names = "host-wake"; 635 634 pinctrl-names = "default"; 636 635 pinctrl-0 = <&wifi_host_wake_l>;
+2 -1
arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
··· 6 6 7 7 /dts-v1/; 8 8 #include <dt-bindings/input/linux-event-codes.h> 9 + #include <dt-bindings/interrupt-controller/irq.h> 9 10 #include <dt-bindings/pwm/pwm.h> 10 11 #include "rk3399.dtsi" 11 12 #include "rk3399-opp.dtsi" ··· 683 682 reg = <1>; 684 683 compatible = "brcm,bcm4329-fmac"; 685 684 interrupt-parent = <&gpio0>; 686 - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 685 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; 687 686 interrupt-names = "host-wake"; 688 687 brcm,drive-strength = <5>; 689 688 pinctrl-names = "default";
+2 -1
arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
··· 5 5 6 6 /dts-v1/; 7 7 #include <dt-bindings/input/linux-event-codes.h> 8 + #include <dt-bindings/interrupt-controller/irq.h> 8 9 #include <dt-bindings/pwm/pwm.h> 9 10 #include "rk3399.dtsi" 10 11 #include "rk3399-opp.dtsi" ··· 510 509 compatible = "brcm,bcm4329-fmac"; 511 510 reg = <1>; 512 511 interrupt-parent = <&gpio0>; 513 - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 512 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; 514 513 interrupt-names = "host-wake"; 515 514 pinctrl-names = "default"; 516 515 pinctrl-0 = <&wifi_host_wake_l>;
+1 -1
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
··· 267 267 interrupt-parent = <&gpio1>; 268 268 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 269 269 pinctrl-names = "default"; 270 - pinctrl-0 = <&pmic_int_l>; 270 + pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>; 271 271 rockchip,system-power-controller; 272 272 wakeup-source; 273 273
+25
arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
··· 110 110 opp-microvolt = <1075000>; 111 111 }; 112 112 }; 113 + 114 + dmc_opp_table: dmc_opp_table { 115 + compatible = "operating-points-v2"; 116 + 117 + opp00 { 118 + opp-hz = /bits/ 64 <400000000>; 119 + opp-microvolt = <900000>; 120 + }; 121 + opp01 { 122 + opp-hz = /bits/ 64 <666000000>; 123 + opp-microvolt = <900000>; 124 + }; 125 + opp02 { 126 + opp-hz = /bits/ 64 <800000000>; 127 + opp-microvolt = <900000>; 128 + }; 129 + opp03 { 130 + opp-hz = /bits/ 64 <928000000>; 131 + opp-microvolt = <925000>; 132 + }; 133 + }; 113 134 }; 114 135 115 136 &cpu_l0 { ··· 155 134 156 135 &cpu_b1 { 157 136 operating-points-v2 = <&cluster1_opp>; 137 + }; 138 + 139 + &dmc { 140 + operating-points-v2 = <&dmc_opp_table>; 158 141 }; 159 142 160 143 &gpu {
+2 -1
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
··· 7 7 8 8 #include "dt-bindings/pwm/pwm.h" 9 9 #include "dt-bindings/input/input.h" 10 + #include <dt-bindings/interrupt-controller/irq.h> 10 11 #include "dt-bindings/usb/pd.h" 11 12 #include "rk3399.dtsi" 12 13 #include "rk3399-opp.dtsi" ··· 736 735 reg = <1>; 737 736 compatible = "brcm,bcm4329-fmac"; 738 737 interrupt-parent = <&gpio0>; 739 - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 738 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; 740 739 interrupt-names = "host-wake"; 741 740 pinctrl-names = "default"; 742 741 pinctrl-0 = <&wifi_host_wake_l>;
+1 -1
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
··· 23 23 compatible = "brcm,bcm4329-fmac"; 24 24 reg = <1>; 25 25 interrupt-parent = <&gpio0>; 26 - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 26 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; 27 27 interrupt-names = "host-wake"; 28 28 pinctrl-names = "default"; 29 29 pinctrl-0 = <&wifi_host_wake_l>;
+1 -1
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
··· 31 31 compatible = "brcm,bcm4329-fmac"; 32 32 reg = <1>; 33 33 interrupt-parent = <&gpio0>; 34 - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 34 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; 35 35 interrupt-names = "host-wake"; 36 36 pinctrl-names = "default"; 37 37 pinctrl-0 = <&wifi_host_wake_l>;
+2 -1
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
··· 7 7 8 8 #include "rk3399.dtsi" 9 9 #include "rk3399-opp.dtsi" 10 + #include <dt-bindings/interrupt-controller/irq.h> 10 11 11 12 / { 12 13 aliases { ··· 529 528 compatible = "brcm,bcm4329-fmac"; 530 529 reg = <1>; 531 530 interrupt-parent = <&gpio0>; 532 - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 531 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; 533 532 interrupt-names = "host-wake"; 534 533 pinctrl-names = "default"; 535 534 pinctrl-0 = <&wifi_host_wake_l>;
+42 -3
arch/arm64/boot/dts/rockchip/rk3399.dtsi
··· 178 178 ports = <&vopl_out>, <&vopb_out>; 179 179 }; 180 180 181 + dmc: memory-controller { 182 + compatible = "rockchip,rk3399-dmc"; 183 + rockchip,pmu = <&pmugrf>; 184 + devfreq-events = <&dfi>; 185 + clocks = <&cru SCLK_DDRC>; 186 + clock-names = "dmc_clk"; 187 + status = "disabled"; 188 + }; 189 + 181 190 pmu_a53 { 182 191 compatible = "arm,cortex-a53-pmu"; 183 192 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>; ··· 1304 1295 status = "disabled"; 1305 1296 }; 1306 1297 1298 + dfi: dfi@ff630000 { 1299 + reg = <0x00 0xff630000 0x00 0x4000>; 1300 + compatible = "rockchip,rk3399-dfi"; 1301 + rockchip,pmu = <&pmugrf>; 1302 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>; 1303 + clocks = <&cru PCLK_DDR_MON>; 1304 + clock-names = "pclk_ddr_mon"; 1305 + status = "disabled"; 1306 + }; 1307 + 1307 1308 vpu: video-codec@ff650000 { 1308 1309 compatible = "rockchip,rk3399-vpu"; 1309 1310 reg = <0x0 0xff650000 0x0 0x800>; ··· 1432 1413 clock-names = "apb_pclk"; 1433 1414 }; 1434 1415 1435 - pmucru: pmu-clock-controller@ff750000 { 1416 + pmucru: clock-controller@ff750000 { 1436 1417 compatible = "rockchip,rk3399-pmucru"; 1437 1418 reg = <0x0 0xff750000 0x0 0x1000>; 1419 + clocks = <&xin24m>; 1420 + clock-names = "xin24m"; 1438 1421 rockchip,grf = <&pmugrf>; 1439 1422 #clock-cells = <1>; 1440 1423 #reset-cells = <1>; ··· 1447 1426 cru: clock-controller@ff760000 { 1448 1427 compatible = "rockchip,rk3399-cru"; 1449 1428 reg = <0x0 0xff760000 0x0 0x1000>; 1429 + clocks = <&xin24m>; 1430 + clock-names = "xin24m"; 1450 1431 rockchip,grf = <&grf>; 1451 1432 #clock-cells = <1>; 1452 1433 #reset-cells = <1>; ··· 1557 1534 reg = <0xf780 0x24>; 1558 1535 clocks = <&sdhci>; 1559 1536 clock-names = "emmcclk"; 1537 + drive-impedance-ohm = <50>; 1560 1538 #phy-cells = <0>; 1561 1539 status = "disabled"; 1562 1540 }; ··· 1568 1544 clock-names = "refclk"; 1569 1545 #phy-cells = <1>; 1570 1546 resets = <&cru SRST_PCIEPHY>; 1571 - drive-impedance-ohm = <50>; 1572 1547 reset-names = "phy"; 1573 1548 status = "disabled"; 1574 1549 }; ··· 1907 1884 <&cru SCLK_HDMI_CEC>, 1908 1885 <&cru PCLK_VIO_GRF>, 1909 1886 <&cru PLL_VPLL>; 1910 - clock-names = "iahb", "isfr", "cec", "grf", "vpll"; 1887 + clock-names = "iahb", "isfr", "cec", "grf", "ref"; 1911 1888 power-domains = <&power RK3399_PD_HDCP>; 1912 1889 reg-io-width = <4>; 1913 1890 rockchip,grf = <&grf>; ··· 2209 2186 2210 2187 pcfg_output_low: pcfg-output-low { 2211 2188 output-low; 2189 + }; 2190 + 2191 + pcfg_input_enable: pcfg-input-enable { 2192 + input-enable; 2193 + }; 2194 + 2195 + pcfg_input_pull_up: pcfg-input-pull-up { 2196 + input-enable; 2197 + bias-pull-up; 2198 + drive-strength = <2>; 2199 + }; 2200 + 2201 + pcfg_input_pull_down: pcfg-input-pull-down { 2202 + input-enable; 2203 + bias-pull-down; 2204 + drive-strength = <2>; 2212 2205 }; 2213 2206 2214 2207 clock {
+80
arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi
··· 466 466 default-brightness = <0>; 467 467 }; 468 468 }; 469 + 470 + wusb3801: tcpc@60 { 471 + compatible = "willsemi,wusb3801"; 472 + reg = <0x60>; 473 + interrupt-parent = <&gpio0>; 474 + interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>; 475 + pinctrl-0 = <&tcpc_int_l>; 476 + pinctrl-names = "default"; 477 + 478 + connector { 479 + compatible = "usb-c-connector"; 480 + label = "USB-C"; 481 + vbus-supply = <&otg_switch>; 482 + power-role = "dual"; 483 + try-power-role = "sink"; 484 + data-role = "dual"; 485 + typec-power-opmode = "default"; 486 + pd-disable; 487 + 488 + ports { 489 + #address-cells = <0x1>; 490 + #size-cells = <0x0>; 491 + 492 + port@0 { 493 + reg = <0x0>; 494 + 495 + typec_hs_usb2phy0: endpoint { 496 + remote-endpoint = <&usb2phy0_typec_hs>; 497 + }; 498 + }; 499 + }; 500 + }; 501 + }; 502 + }; 503 + 504 + &i2c5 { 505 + status = "okay"; 506 + 507 + accelerometer@18 { 508 + compatible = "silan,sc7a20"; 509 + reg = <0x18>; 510 + interrupt-parent = <&gpio3>; 511 + interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 512 + pinctrl-0 = <&accelerometer_int_l>; 513 + pinctrl-names = "default"; 514 + st,drdy-int-pin = <1>; 515 + vdd-supply = <&vcc_3v3>; 516 + vddio-supply = <&vcc_3v3>; 517 + }; 469 518 }; 470 519 471 520 &i2s1_8ch { ··· 531 482 }; 532 483 533 484 &pinctrl { 485 + accelerometer { 486 + accelerometer_int_l: accelerometer-int-l { 487 + rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 488 + }; 489 + }; 490 + 534 491 audio-amplifier { 535 492 spk_amp_enable_h: spk-amp-enable-h { 536 493 rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; ··· 602 547 sdio-pwrseq { 603 548 wifi_enable_h: wifi-enable-h { 604 549 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 550 + }; 551 + }; 552 + 553 + tcpc { 554 + tcpc_int_l: tcpc-int-l { 555 + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 605 556 }; 606 557 }; 607 558 ··· 697 636 698 637 &uart2 { 699 638 status = "okay"; 639 + }; 640 + 641 + &usb_host0_xhci { 642 + dr_mode = "otg"; 643 + status = "okay"; 644 + }; 645 + 646 + &usb2phy0 { 647 + status = "okay"; 648 + }; 649 + 650 + &usb2phy0_otg { 651 + status = "okay"; 652 + 653 + port { 654 + usb2phy0_typec_hs: endpoint { 655 + remote-endpoint = <&typec_hs_usb2phy0>; 656 + }; 657 + }; 700 658 };
+37
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
··· 151 151 vin-supply = <&vcc5v0_usb>; 152 152 }; 153 153 154 + vcc5v0_usb20_otg: vcc5v0_usb20_otg { 155 + compatible = "regulator-fixed"; 156 + enable-active-high; 157 + gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; 158 + regulator-name = "vcc5v0_usb20_otg"; 159 + regulator-min-microvolt = <5000000>; 160 + regulator-max-microvolt = <5000000>; 161 + vin-supply = <&dcdc_boost>; 162 + }; 163 + 154 164 vcc3v3_sd: vcc3v3_sd { 155 165 compatible = "regulator-fixed"; 156 166 enable-active-low; ··· 195 185 regulator-max-microvolt = <3300000>; 196 186 vin-supply = <&vcc_sys>; 197 187 }; 188 + }; 189 + 190 + &combphy1 { 191 + status = "okay"; 198 192 }; 199 193 200 194 &cpu0 { ··· 683 669 }; 684 670 685 671 &usb_host1_ohci { 672 + status = "okay"; 673 + }; 674 + 675 + &usb_host0_xhci { 676 + status = "okay"; 677 + }; 678 + 679 + /* usb3 controller is muxed with sata1 */ 680 + &usb_host1_xhci { 681 + status = "okay"; 682 + }; 683 + 684 + &usb2phy0 { 685 + status = "okay"; 686 + }; 687 + 688 + &usb2phy0_host { 689 + phy-supply = <&vcc5v0_usb20_host>; 690 + status = "okay"; 691 + }; 692 + 693 + &usb2phy0_otg { 694 + phy-supply = <&vcc5v0_usb20_otg>; 686 695 status = "okay"; 687 696 }; 688 697
+615
arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + 5 + #include <dt-bindings/gpio/gpio.h> 6 + #include <dt-bindings/pinctrl/rockchip.h> 7 + #include "rk3566.dtsi" 8 + 9 + / { 10 + model = "Pine64 RK3566 Quartz64-B Board"; 11 + compatible = "pine64,quartz64-b", "rockchip,rk3566"; 12 + 13 + aliases { 14 + ethernet0 = &gmac1; 15 + mmc0 = &sdmmc0; 16 + mmc1 = &sdhci; 17 + mmc2 = &sdmmc1; 18 + }; 19 + 20 + chosen: chosen { 21 + stdout-path = "serial2:1500000n8"; 22 + }; 23 + 24 + gmac1_clkin: external-gmac1-clock { 25 + compatible = "fixed-clock"; 26 + clock-frequency = <125000000>; 27 + clock-output-names = "gmac1_clkin"; 28 + #clock-cells = <0>; 29 + }; 30 + 31 + leds { 32 + compatible = "gpio-leds"; 33 + 34 + led-user { 35 + label = "user-led"; 36 + default-state = "on"; 37 + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 38 + linux,default-trigger = "heartbeat"; 39 + pinctrl-names = "default"; 40 + pinctrl-0 = <&user_led_enable_h>; 41 + retain-state-suspended; 42 + }; 43 + }; 44 + 45 + sdio_pwrseq: sdio-pwrseq { 46 + status = "okay"; 47 + compatible = "mmc-pwrseq-simple"; 48 + clocks = <&rk809 1>; 49 + clock-names = "ext_clock"; 50 + pinctrl-names = "default"; 51 + pinctrl-0 = <&wifi_enable_h>; 52 + reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; 53 + post-power-on-delay-ms = <100>; 54 + power-off-delay-us = <5000000>; 55 + }; 56 + 57 + vcc5v0_in: vcc5v0-in-regulator { 58 + compatible = "regulator-fixed"; 59 + regulator-name = "vcc5v0_in"; 60 + regulator-always-on; 61 + regulator-boot-on; 62 + regulator-min-microvolt = <5000000>; 63 + regulator-max-microvolt = <5000000>; 64 + }; 65 + 66 + vcc5v0_sys: vcc5v0-sys-regulator { 67 + compatible = "regulator-fixed"; 68 + regulator-name = "vcc5v0_sys"; 69 + regulator-always-on; 70 + regulator-boot-on; 71 + regulator-min-microvolt = <5000000>; 72 + regulator-max-microvolt = <5000000>; 73 + vin-supply = <&vcc5v0_in>; 74 + }; 75 + 76 + vcc3v3_sys: vcc3v3-sys-regulator { 77 + compatible = "regulator-fixed"; 78 + regulator-name = "vcc3v3_sys"; 79 + regulator-min-microvolt = <3300000>; 80 + regulator-max-microvolt = <3300000>; 81 + regulator-always-on; 82 + vin-supply = <&vcc5v0_sys>; 83 + }; 84 + 85 + vcc5v0_usb30_host: vcc5v0-usb30-host-regulator { 86 + compatible = "regulator-fixed"; 87 + regulator-name = "vcc5v0_usb30_host"; 88 + enable-active-high; 89 + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 90 + pinctrl-names = "default"; 91 + pinctrl-0 = <&vcc5v0_usb30_host_en_h>; 92 + regulator-always-on; 93 + regulator-min-microvolt = <5000000>; 94 + regulator-max-microvolt = <5000000>; 95 + vin-supply = <&vcc5v0_sys>; 96 + }; 97 + 98 + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 99 + compatible = "regulator-fixed"; 100 + regulator-name = "vcc5v0_usb_otg"; 101 + enable-active-high; 102 + gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 103 + pinctrl-names = "default"; 104 + pinctrl-0 = <&vcc5v0_usb_otg_en_h>; 105 + regulator-always-on; 106 + regulator-min-microvolt = <5000000>; 107 + regulator-max-microvolt = <5000000>; 108 + vin-supply = <&vcc5v0_sys>; 109 + }; 110 + }; 111 + 112 + &combphy1 { 113 + status = "okay"; 114 + }; 115 + 116 + &cpu0 { 117 + cpu-supply = <&vdd_cpu>; 118 + }; 119 + 120 + &cpu1 { 121 + cpu-supply = <&vdd_cpu>; 122 + }; 123 + 124 + &cpu2 { 125 + cpu-supply = <&vdd_cpu>; 126 + }; 127 + 128 + &cpu3 { 129 + cpu-supply = <&vdd_cpu>; 130 + }; 131 + 132 + &gmac1 { 133 + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; 134 + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; 135 + clock_in_out = "input"; 136 + phy-mode = "rgmii-id"; 137 + phy-supply = <&vcc_3v3>; 138 + pinctrl-names = "default"; 139 + pinctrl-0 = <&gmac1m1_miim 140 + &gmac1m1_tx_bus2 141 + &gmac1m1_rx_bus2 142 + &gmac1m1_rgmii_clk 143 + &gmac1m1_clkinout 144 + &gmac1m1_rgmii_bus>; 145 + snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 146 + snps,reset-active-low; 147 + /* Reset time is 20ms, 100ms for rtl8211f, also works well here */ 148 + snps,reset-delays-us = <0 20000 100000>; 149 + tx_delay = <0x4f>; 150 + rx_delay = <0x24>; 151 + phy-handle = <&rgmii_phy1>; 152 + status = "okay"; 153 + }; 154 + 155 + &i2c0 { 156 + status = "okay"; 157 + 158 + vdd_cpu: regulator@1c { 159 + compatible = "tcs,tcs4525"; 160 + reg = <0x1c>; 161 + fcs,suspend-voltage-selector = <1>; 162 + regulator-name = "vdd_cpu"; 163 + regulator-min-microvolt = <800000>; 164 + regulator-max-microvolt = <1150000>; 165 + regulator-ramp-delay = <2300>; 166 + regulator-always-on; 167 + regulator-boot-on; 168 + vin-supply = <&vcc5v0_sys>; 169 + 170 + regulator-state-mem { 171 + regulator-off-in-suspend; 172 + }; 173 + }; 174 + 175 + rk809: pmic@20 { 176 + compatible = "rockchip,rk809"; 177 + reg = <0x20>; 178 + interrupt-parent = <&gpio0>; 179 + interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>; 180 + clock-output-names = "rk808-clkout1", "rk808-clkout2"; 181 + 182 + pinctrl-names = "default"; 183 + pinctrl-0 = <&pmic_int>; 184 + rockchip,system-power-controller; 185 + wakeup-source; 186 + #clock-cells = <1>; 187 + 188 + vcc1-supply = <&vcc3v3_sys>; 189 + vcc2-supply = <&vcc3v3_sys>; 190 + vcc3-supply = <&vcc3v3_sys>; 191 + vcc4-supply = <&vcc3v3_sys>; 192 + vcc5-supply = <&vcc3v3_sys>; 193 + vcc6-supply = <&vcc3v3_sys>; 194 + vcc7-supply = <&vcc3v3_sys>; 195 + vcc8-supply = <&vcc3v3_sys>; 196 + vcc9-supply = <&vcc3v3_sys>; 197 + 198 + regulators { 199 + vdd_log: DCDC_REG1 { 200 + regulator-name = "vdd_log"; 201 + regulator-always-on; 202 + regulator-boot-on; 203 + regulator-min-microvolt = <500000>; 204 + regulator-max-microvolt = <1350000>; 205 + regulator-init-microvolt = <900000>; 206 + regulator-ramp-delay = <6001>; 207 + 208 + regulator-state-mem { 209 + regulator-on-in-suspend; 210 + regulator-suspend-microvolt = <900000>; 211 + }; 212 + }; 213 + 214 + vdd_gpu: DCDC_REG2 { 215 + regulator-name = "vdd_gpu"; 216 + regulator-always-on; 217 + regulator-boot-on; 218 + regulator-min-microvolt = <900000>; 219 + regulator-max-microvolt = <1350000>; 220 + regulator-init-microvolt = <900000>; 221 + regulator-ramp-delay = <6001>; 222 + 223 + regulator-state-mem { 224 + regulator-off-in-suspend; 225 + regulator-suspend-microvolt = <900000>; 226 + }; 227 + }; 228 + 229 + vcc_ddr: DCDC_REG3 { 230 + regulator-name = "vcc_ddr"; 231 + regulator-always-on; 232 + regulator-boot-on; 233 + regulator-initial-mode = <0x2>; 234 + regulator-state-mem { 235 + regulator-on-in-suspend; 236 + }; 237 + }; 238 + 239 + vdd_npu: DCDC_REG4 { 240 + regulator-name = "vdd_npu"; 241 + regulator-min-microvolt = <900000>; 242 + regulator-max-microvolt = <1350000>; 243 + regulator-initial-mode = <0x2>; 244 + regulator-state-mem { 245 + regulator-off-in-suspend; 246 + }; 247 + }; 248 + 249 + vcc_1v8: DCDC_REG5 { 250 + regulator-name = "vcc_1v8"; 251 + regulator-always-on; 252 + regulator-boot-on; 253 + regulator-min-microvolt = <1800000>; 254 + regulator-max-microvolt = <1800000>; 255 + 256 + regulator-state-mem { 257 + regulator-on-in-suspend; 258 + regulator-suspend-microvolt = <1800000>; 259 + }; 260 + }; 261 + 262 + vdda0v9_image: LDO_REG1 { 263 + regulator-name = "vdda0v9_image"; 264 + regulator-always-on; 265 + regulator-boot-on; 266 + regulator-min-microvolt = <900000>; 267 + regulator-max-microvolt = <900000>; 268 + 269 + regulator-state-mem { 270 + regulator-on-in-suspend; 271 + regulator-suspend-microvolt = <900000>; 272 + }; 273 + }; 274 + 275 + vdda_0v9: LDO_REG2 { 276 + regulator-name = "vdda_0v9"; 277 + regulator-always-on; 278 + regulator-boot-on; 279 + regulator-min-microvolt = <900000>; 280 + regulator-max-microvolt = <900000>; 281 + 282 + regulator-state-mem { 283 + regulator-on-in-suspend; 284 + regulator-suspend-microvolt = <900000>; 285 + }; 286 + }; 287 + 288 + vdda0v9_pmu: LDO_REG3 { 289 + regulator-name = "vdda0v9_pmu"; 290 + regulator-always-on; 291 + regulator-boot-on; 292 + regulator-min-microvolt = <900000>; 293 + regulator-max-microvolt = <900000>; 294 + regulator-state-mem { 295 + regulator-on-in-suspend; 296 + regulator-suspend-microvolt = <900000>; 297 + }; 298 + }; 299 + 300 + vccio_acodec: LDO_REG4 { 301 + regulator-name = "vccio_acodec"; 302 + regulator-always-on; 303 + regulator-boot-on; 304 + regulator-min-microvolt = <3300000>; 305 + regulator-max-microvolt = <3300000>; 306 + 307 + regulator-state-mem { 308 + regulator-on-in-suspend; 309 + regulator-suspend-microvolt = <3300000>; 310 + 311 + }; 312 + }; 313 + 314 + vccio_sd: LDO_REG5 { 315 + regulator-name = "vccio_sd"; 316 + regulator-always-on; 317 + regulator-boot-on; 318 + regulator-min-microvolt = <1800000>; 319 + regulator-max-microvolt = <3300000>; 320 + 321 + regulator-state-mem { 322 + regulator-on-in-suspend; 323 + regulator-suspend-microvolt = <3300000>; 324 + }; 325 + }; 326 + 327 + vcc3v3_pmu: LDO_REG6 { 328 + regulator-name = "vcc3v3_pmu"; 329 + regulator-always-on; 330 + regulator-boot-on; 331 + regulator-min-microvolt = <3300000>; 332 + regulator-max-microvolt = <3300000>; 333 + 334 + regulator-state-mem { 335 + regulator-on-in-suspend; 336 + regulator-suspend-microvolt = <3300000>; 337 + }; 338 + }; 339 + 340 + vcca_1v8: LDO_REG7 { 341 + regulator-name = "vcca_1v8"; 342 + regulator-always-on; 343 + regulator-boot-on; 344 + regulator-min-microvolt = <1800000>; 345 + regulator-max-microvolt = <1800000>; 346 + 347 + regulator-state-mem { 348 + regulator-on-in-suspend; 349 + regulator-suspend-microvolt = <1800000>; 350 + }; 351 + }; 352 + 353 + vcca1v8_pmu: LDO_REG8 { 354 + regulator-name = "vcca1v8_pmu"; 355 + regulator-always-on; 356 + regulator-boot-on; 357 + regulator-min-microvolt = <1800000>; 358 + regulator-max-microvolt = <1800000>; 359 + 360 + regulator-state-mem { 361 + regulator-on-in-suspend; 362 + regulator-suspend-microvolt = <1800000>; 363 + }; 364 + }; 365 + 366 + vcca1v8_image: LDO_REG9 { 367 + regulator-name = "vcca1v8_image"; 368 + regulator-always-on; 369 + regulator-boot-on; 370 + regulator-min-microvolt = <1800000>; 371 + regulator-max-microvolt = <1800000>; 372 + 373 + regulator-state-mem { 374 + regulator-on-in-suspend; 375 + regulator-suspend-microvolt = <1800000>; 376 + }; 377 + }; 378 + 379 + vcc_3v3: SWITCH_REG1 { 380 + regulator-boot-on; 381 + regulator-name = "vcc_3v3"; 382 + }; 383 + 384 + vcc3v3_sd: SWITCH_REG2 { 385 + regulator-name = "vcc3v3_sd"; 386 + }; 387 + }; 388 + }; 389 + }; 390 + 391 + /* i2c2_m1 exposed on csi port, pulled up to vcc_3v3 */ 392 + &i2c2 { 393 + pinctrl-names = "default"; 394 + pinctrl-0 = <&i2c2m1_xfer>; 395 + status = "okay"; 396 + }; 397 + 398 + /* i2c3_m1 exposed on dsi port, pulled up to vcc_3v3 */ 399 + &i2c3 { 400 + pinctrl-names = "default"; 401 + pinctrl-0 = <&i2c3m1_xfer>; 402 + status = "okay"; 403 + }; 404 + 405 + /* 406 + * i2c4_m0 is exposed on PI40, pulled up to vcc_3v3 407 + * pin 27 - i2c4_sda_m0 408 + * pin 28 - i2c4_scl_m0 409 + */ 410 + &i2c4 { 411 + status = "okay"; 412 + }; 413 + 414 + /* 415 + * i2c5_m0 is exposed on PI40 416 + * pin 29 - i2c5_scl_m0 417 + * pin 31 - i2c5_sda_m0 418 + */ 419 + &i2c5 { 420 + status = "disabled"; 421 + }; 422 + 423 + &mdio1 { 424 + rgmii_phy1: ethernet-phy@1 { 425 + compatible = "ethernet-phy-ieee802.3-c22"; 426 + reg = <0x1>; 427 + }; 428 + }; 429 + 430 + &pinctrl { 431 + bt { 432 + bt_enable_h: bt-enable-h { 433 + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 434 + }; 435 + 436 + bt_host_wake_l: bt-host-wake-l { 437 + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>; 438 + }; 439 + 440 + bt_wake_l: bt-wake-l { 441 + rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 442 + }; 443 + }; 444 + 445 + leds { 446 + user_led_enable_h: user-led-enable-h { 447 + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 448 + }; 449 + }; 450 + 451 + pmic { 452 + pmic_int: pmic_int { 453 + rockchip,pins = 454 + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 455 + }; 456 + }; 457 + 458 + sdio-pwrseq { 459 + wifi_enable_h: wifi-enable-h { 460 + rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 461 + }; 462 + }; 463 + 464 + usb { 465 + vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h { 466 + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 467 + }; 468 + 469 + vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h { 470 + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 471 + }; 472 + }; 473 + }; 474 + 475 + &pmu_io_domains { 476 + status = "okay"; 477 + pmuio1-supply = <&vcc3v3_pmu>; 478 + pmuio2-supply = <&vcca1v8_pmu>; 479 + vccio1-supply = <&vccio_acodec>; 480 + vccio2-supply = <&vcc_1v8>; 481 + vccio3-supply = <&vccio_sd>; 482 + vccio4-supply = <&vcca1v8_pmu>; 483 + vccio5-supply = <&vcc_3v3>; 484 + vccio6-supply = <&vcc_3v3>; 485 + vccio7-supply = <&vcc_3v3>; 486 + }; 487 + 488 + &saradc { 489 + vref-supply = <&vcca_1v8>; 490 + status = "okay"; 491 + }; 492 + 493 + &sdhci { 494 + bus-width = <8>; 495 + mmc-hs200-1_8v; 496 + non-removable; 497 + vmmc-supply = <&vcc_3v3>; 498 + vqmmc-supply = <&vcc_1v8>; 499 + status = "okay"; 500 + }; 501 + 502 + &sdmmc0 { 503 + bus-width = <4>; 504 + cap-sd-highspeed; 505 + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 506 + disable-wp; 507 + pinctrl-names = "default"; 508 + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 509 + sd-uhs-sdr104; 510 + vmmc-supply = <&vcc3v3_sd>; 511 + vqmmc-supply = <&vccio_sd>; 512 + status = "okay"; 513 + }; 514 + 515 + &sdmmc1 { 516 + bus-width = <4>; 517 + cap-sd-highspeed; 518 + cap-sdio-irq; 519 + keep-power-in-suspend; 520 + mmc-pwrseq = <&sdio_pwrseq>; 521 + non-removable; 522 + pinctrl-names = "default"; 523 + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 524 + vmmc-supply = <&vcc3v3_sys>; 525 + vqmmc-supply = <&vcca1v8_pmu>; 526 + status = "okay"; 527 + }; 528 + 529 + &sfc { 530 + pinctrl-0 = <&fspi_pins>; 531 + pinctrl-names = "default"; 532 + #address-cells = <1>; 533 + #size-cells = <0>; 534 + status = "okay"; 535 + 536 + flash@0 { 537 + compatible = "jedec,spi-nor"; 538 + reg = <0>; 539 + spi-max-frequency = <24000000>; 540 + spi-rx-bus-width = <4>; 541 + spi-tx-bus-width = <1>; 542 + }; 543 + }; 544 + 545 + &tsadc { 546 + status = "okay"; 547 + }; 548 + 549 + &uart1 { 550 + pinctrl-names = "default"; 551 + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; 552 + status = "okay"; 553 + uart-has-rtscts; 554 + 555 + bluetooth { 556 + compatible = "brcm,bcm4345c5"; 557 + clocks = <&rk809 1>; 558 + clock-names = "lpo"; 559 + device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 560 + host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 561 + shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 562 + pinctrl-names = "default"; 563 + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; 564 + vbat-supply = <&vcc3v3_sys>; 565 + vddio-supply = <&vcca1v8_pmu>; 566 + }; 567 + }; 568 + 569 + /* 570 + * uart2_m0 is exposed on PI40 571 + * pin 8 - uart2_tx_m0 572 + * pin 10 - uart2_rx_m0 573 + */ 574 + &uart2 { 575 + status = "okay"; 576 + }; 577 + 578 + &usb2phy0_host { 579 + phy-supply = <&vcc5v0_usb30_host>; 580 + status = "okay"; 581 + }; 582 + 583 + &usb2phy0_otg { 584 + phy-supply = <&vcc5v0_usb_otg>; 585 + status = "okay"; 586 + }; 587 + 588 + &usb2phy1_otg { 589 + phy-supply = <&vcc5v0_usb30_host>; 590 + status = "okay"; 591 + }; 592 + 593 + &usb2phy0 { 594 + status = "okay"; 595 + }; 596 + 597 + &usb2phy1 { 598 + status = "okay"; 599 + }; 600 + 601 + &usb_host0_xhci { 602 + status = "okay"; 603 + }; 604 + 605 + &usb_host1_xhci { 606 + status = "okay"; 607 + }; 608 + 609 + &usb_host0_ehci { 610 + status = "okay"; 611 + }; 612 + 613 + &usb_host0_ohci { 614 + status = "okay"; 615 + };
+579
arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + 5 + #include <dt-bindings/gpio/gpio.h> 6 + #include <dt-bindings/pinctrl/rockchip.h> 7 + #include "rk3566.dtsi" 8 + 9 + / { 10 + model = "Firefly Station M2"; 11 + compatible = "firefly,rk3566-roc-pc", "rockchip,rk3566"; 12 + 13 + aliases { 14 + mmc0 = &sdmmc0; 15 + mmc1 = &sdhci; 16 + mmc2 = &sdmmc1; 17 + }; 18 + 19 + chosen: chosen { 20 + stdout-path = "serial2:1500000n8"; 21 + }; 22 + 23 + gmac1_clkin: external-gmac1-clock { 24 + compatible = "fixed-clock"; 25 + clock-frequency = <125000000>; 26 + clock-output-names = "gmac1_clkin"; 27 + #clock-cells = <0>; 28 + }; 29 + 30 + leds { 31 + compatible = "gpio-leds"; 32 + 33 + led-user { 34 + label = "user-led"; 35 + default-state = "on"; 36 + gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; 37 + linux,default-trigger = "heartbeat"; 38 + pinctrl-names = "default"; 39 + pinctrl-0 = <&user_led_enable_h>; 40 + retain-state-suspended; 41 + }; 42 + }; 43 + 44 + sdio_pwrseq: sdio-pwrseq { 45 + status = "okay"; 46 + compatible = "mmc-pwrseq-simple"; 47 + clocks = <&rk809 1>; 48 + clock-names = "ext_clock"; 49 + pinctrl-names = "default"; 50 + pinctrl-0 = <&wifi_enable_h>; 51 + reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; 52 + }; 53 + 54 + usb_5v: usb-5v-regulator { 55 + compatible = "regulator-fixed"; 56 + regulator-name = "usb_5v"; 57 + regulator-always-on; 58 + regulator-boot-on; 59 + regulator-min-microvolt = <5000000>; 60 + regulator-max-microvolt = <5000000>; 61 + }; 62 + 63 + vcc5v0_sys: vcc5v0-sys-regulator { 64 + compatible = "regulator-fixed"; 65 + regulator-name = "vcc5v0_sys"; 66 + regulator-always-on; 67 + regulator-boot-on; 68 + regulator-min-microvolt = <5000000>; 69 + regulator-max-microvolt = <5000000>; 70 + vin-supply = <&usb_5v>; 71 + }; 72 + 73 + vcc3v3_sys: vcc3v3-sys-regulator { 74 + compatible = "regulator-fixed"; 75 + regulator-name = "vcc3v3_sys"; 76 + regulator-min-microvolt = <3300000>; 77 + regulator-max-microvolt = <3300000>; 78 + regulator-always-on; 79 + vin-supply = <&vcc5v0_sys>; 80 + }; 81 + 82 + vcc5v0_usb30_host: vcc5v0-usb30-host-regulator { 83 + compatible = "regulator-fixed"; 84 + regulator-name = "vcc5v0_usb30_host"; 85 + enable-active-high; 86 + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 87 + pinctrl-names = "default"; 88 + pinctrl-0 = <&vcc5v0_usb30_host_en_h>; 89 + regulator-always-on; 90 + regulator-min-microvolt = <5000000>; 91 + regulator-max-microvolt = <5000000>; 92 + vin-supply = <&vcc5v0_sys>; 93 + }; 94 + 95 + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 96 + compatible = "regulator-fixed"; 97 + regulator-name = "vcc5v0_usb_otg"; 98 + enable-active-high; 99 + gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 100 + pinctrl-names = "default"; 101 + pinctrl-0 = <&vcc5v0_usb_otg_en_h>; 102 + regulator-always-on; 103 + regulator-min-microvolt = <5000000>; 104 + regulator-max-microvolt = <5000000>; 105 + vin-supply = <&vcc5v0_sys>; 106 + }; 107 + }; 108 + 109 + &combphy1 { 110 + status = "okay"; 111 + }; 112 + 113 + &cpu0 { 114 + cpu-supply = <&vdd_cpu>; 115 + }; 116 + 117 + &cpu1 { 118 + cpu-supply = <&vdd_cpu>; 119 + }; 120 + 121 + &cpu2 { 122 + cpu-supply = <&vdd_cpu>; 123 + }; 124 + 125 + &cpu3 { 126 + cpu-supply = <&vdd_cpu>; 127 + }; 128 + 129 + &gmac1 { 130 + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; 131 + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; 132 + clock_in_out = "input"; 133 + phy-mode = "rgmii-id"; 134 + phy-supply = <&vcc_3v3>; 135 + pinctrl-names = "default"; 136 + pinctrl-0 = <&gmac1m0_miim 137 + &gmac1m0_tx_bus2 138 + &gmac1m0_rx_bus2 139 + &gmac1m0_rgmii_clk 140 + &gmac1m0_clkinout 141 + &gmac1m0_rgmii_bus>; 142 + snps,reset-gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; 143 + snps,reset-active-low; 144 + /* Reset time is 20ms, 100ms for rtl8211f */ 145 + snps,reset-delays-us = <0 20000 100000>; 146 + tx_delay = <0x4f>; 147 + rx_delay = <0x24>; 148 + phy-handle = <&rgmii_phy1>; 149 + status = "okay"; 150 + }; 151 + 152 + &i2c0 { 153 + status = "okay"; 154 + 155 + vdd_cpu: regulator@1c { 156 + compatible = "tcs,tcs4525"; 157 + reg = <0x1c>; 158 + fcs,suspend-voltage-selector = <1>; 159 + regulator-name = "vdd_cpu"; 160 + regulator-min-microvolt = <800000>; 161 + regulator-max-microvolt = <1150000>; 162 + regulator-ramp-delay = <2300>; 163 + regulator-always-on; 164 + regulator-boot-on; 165 + vin-supply = <&vcc5v0_sys>; 166 + 167 + regulator-state-mem { 168 + regulator-off-in-suspend; 169 + }; 170 + }; 171 + 172 + rk809: pmic@20 { 173 + compatible = "rockchip,rk809"; 174 + reg = <0x20>; 175 + interrupt-parent = <&gpio0>; 176 + interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>; 177 + clock-output-names = "rk808-clkout1", "rk808-clkout2"; 178 + 179 + pinctrl-names = "default"; 180 + pinctrl-0 = <&pmic_int>; 181 + rockchip,system-power-controller; 182 + wakeup-source; 183 + #clock-cells = <1>; 184 + 185 + vcc1-supply = <&vcc3v3_sys>; 186 + vcc2-supply = <&vcc3v3_sys>; 187 + vcc3-supply = <&vcc3v3_sys>; 188 + vcc4-supply = <&vcc3v3_sys>; 189 + vcc5-supply = <&vcc3v3_sys>; 190 + vcc6-supply = <&vcc3v3_sys>; 191 + vcc7-supply = <&vcc3v3_sys>; 192 + vcc8-supply = <&vcc3v3_sys>; 193 + vcc9-supply = <&vcc3v3_sys>; 194 + 195 + regulators { 196 + vdd_log: DCDC_REG1 { 197 + regulator-name = "vdd_log"; 198 + regulator-always-on; 199 + regulator-boot-on; 200 + regulator-min-microvolt = <500000>; 201 + regulator-max-microvolt = <1350000>; 202 + regulator-init-microvolt = <900000>; 203 + regulator-ramp-delay = <6001>; 204 + 205 + regulator-state-mem { 206 + regulator-on-in-suspend; 207 + regulator-suspend-microvolt = <900000>; 208 + }; 209 + }; 210 + 211 + vdd_gpu: DCDC_REG2 { 212 + regulator-name = "vdd_gpu"; 213 + regulator-min-microvolt = <900000>; 214 + regulator-max-microvolt = <1350000>; 215 + regulator-init-microvolt = <900000>; 216 + regulator-ramp-delay = <6001>; 217 + 218 + regulator-state-mem { 219 + regulator-off-in-suspend; 220 + regulator-suspend-microvolt = <900000>; 221 + }; 222 + }; 223 + 224 + vcc_ddr: DCDC_REG3 { 225 + regulator-name = "vcc_ddr"; 226 + regulator-always-on; 227 + regulator-boot-on; 228 + regulator-min-microvolt = <1100000>; 229 + regulator-max-microvolt = <1100000>; 230 + regulator-initial-mode = <0x2>; 231 + regulator-state-mem { 232 + regulator-on-in-suspend; 233 + }; 234 + }; 235 + 236 + vdd_npu: DCDC_REG4 { 237 + regulator-name = "vdd_npu"; 238 + regulator-min-microvolt = <900000>; 239 + regulator-max-microvolt = <1350000>; 240 + regulator-initial-mode = <0x2>; 241 + regulator-state-mem { 242 + regulator-off-in-suspend; 243 + }; 244 + }; 245 + 246 + vcc_1v8: DCDC_REG5 { 247 + regulator-name = "vcc_1v8"; 248 + regulator-always-on; 249 + regulator-boot-on; 250 + regulator-min-microvolt = <1800000>; 251 + regulator-max-microvolt = <1800000>; 252 + 253 + regulator-state-mem { 254 + regulator-on-in-suspend; 255 + regulator-suspend-microvolt = <1800000>; 256 + }; 257 + }; 258 + 259 + vdda0v9_image: LDO_REG1 { 260 + regulator-name = "vdda0v9_image"; 261 + regulator-always-on; 262 + regulator-boot-on; 263 + regulator-min-microvolt = <900000>; 264 + regulator-max-microvolt = <900000>; 265 + 266 + regulator-state-mem { 267 + regulator-on-in-suspend; 268 + regulator-suspend-microvolt = <900000>; 269 + }; 270 + }; 271 + 272 + vdda_0v9: LDO_REG2 { 273 + regulator-name = "vdda_0v9"; 274 + regulator-always-on; 275 + regulator-boot-on; 276 + regulator-min-microvolt = <900000>; 277 + regulator-max-microvolt = <900000>; 278 + 279 + regulator-state-mem { 280 + regulator-on-in-suspend; 281 + regulator-suspend-microvolt = <900000>; 282 + }; 283 + }; 284 + 285 + vdda0v9_pmu: LDO_REG3 { 286 + regulator-name = "vdda0v9_pmu"; 287 + regulator-always-on; 288 + regulator-boot-on; 289 + regulator-min-microvolt = <900000>; 290 + regulator-max-microvolt = <900000>; 291 + regulator-state-mem { 292 + regulator-on-in-suspend; 293 + regulator-suspend-microvolt = <900000>; 294 + }; 295 + }; 296 + 297 + vccio_acodec: LDO_REG4 { 298 + regulator-name = "vccio_acodec"; 299 + regulator-always-on; 300 + regulator-boot-on; 301 + regulator-min-microvolt = <3300000>; 302 + regulator-max-microvolt = <3300000>; 303 + 304 + regulator-state-mem { 305 + regulator-on-in-suspend; 306 + regulator-suspend-microvolt = <3300000>; 307 + 308 + }; 309 + }; 310 + 311 + vccio_sd: LDO_REG5 { 312 + regulator-name = "vccio_sd"; 313 + regulator-always-on; 314 + regulator-boot-on; 315 + regulator-min-microvolt = <1800000>; 316 + regulator-max-microvolt = <3300000>; 317 + 318 + regulator-state-mem { 319 + regulator-on-in-suspend; 320 + regulator-suspend-microvolt = <3300000>; 321 + }; 322 + }; 323 + 324 + vcc3v3_pmu: LDO_REG6 { 325 + regulator-name = "vcc3v3_pmu"; 326 + regulator-always-on; 327 + regulator-boot-on; 328 + regulator-min-microvolt = <3300000>; 329 + regulator-max-microvolt = <3300000>; 330 + 331 + regulator-state-mem { 332 + regulator-on-in-suspend; 333 + regulator-suspend-microvolt = <3300000>; 334 + }; 335 + }; 336 + 337 + vcca_1v8: LDO_REG7 { 338 + regulator-name = "vcca_1v8"; 339 + regulator-always-on; 340 + regulator-boot-on; 341 + regulator-min-microvolt = <1800000>; 342 + regulator-max-microvolt = <1800000>; 343 + 344 + regulator-state-mem { 345 + regulator-on-in-suspend; 346 + regulator-suspend-microvolt = <1800000>; 347 + }; 348 + }; 349 + 350 + vcca1v8_pmu: LDO_REG8 { 351 + regulator-name = "vcca1v8_pmu"; 352 + regulator-always-on; 353 + regulator-boot-on; 354 + regulator-min-microvolt = <1800000>; 355 + regulator-max-microvolt = <1800000>; 356 + 357 + regulator-state-mem { 358 + regulator-on-in-suspend; 359 + regulator-suspend-microvolt = <1800000>; 360 + }; 361 + }; 362 + 363 + vcca1v8_image: LDO_REG9 { 364 + regulator-name = "vcca1v8_image"; 365 + regulator-always-on; 366 + regulator-boot-on; 367 + regulator-min-microvolt = <1800000>; 368 + regulator-max-microvolt = <1800000>; 369 + 370 + regulator-state-mem { 371 + regulator-on-in-suspend; 372 + regulator-suspend-microvolt = <1800000>; 373 + }; 374 + }; 375 + 376 + vcc_3v3: SWITCH_REG1 { 377 + regulator-boot-on; 378 + regulator-name = "vcc3v3"; 379 + }; 380 + 381 + vcc3v3_sd: SWITCH_REG2 { 382 + regulator-name = "vcc3v3_sd"; 383 + regulator-always-on; 384 + regulator-boot-on; 385 + }; 386 + }; 387 + }; 388 + }; 389 + 390 + &i2c1 { 391 + status = "okay"; 392 + }; 393 + 394 + &i2c2 { 395 + status = "okay"; 396 + }; 397 + 398 + &i2c3 { 399 + pinctrl-names = "default"; 400 + pinctrl-0 = <&i2c3m1_xfer>; 401 + status = "okay"; 402 + }; 403 + 404 + &i2c5 { 405 + status = "okay"; 406 + }; 407 + 408 + &mdio1 { 409 + rgmii_phy1: ethernet-phy@0 { 410 + compatible = "ethernet-phy-ieee802.3-c22"; 411 + reg = <0x0>; 412 + }; 413 + }; 414 + 415 + &pinctrl { 416 + bt { 417 + bt_enable_h: bt-enable-h { 418 + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 419 + }; 420 + 421 + bt_host_wake_l: bt-host-wake-l { 422 + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>; 423 + }; 424 + 425 + bt_wake_l: bt-wake-l { 426 + rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 427 + }; 428 + }; 429 + 430 + leds { 431 + user_led_enable_h: user-led-enable-h { 432 + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 433 + }; 434 + }; 435 + 436 + pmic { 437 + pmic_int: pmic_int { 438 + rockchip,pins = 439 + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 440 + }; 441 + }; 442 + 443 + sdio-pwrseq { 444 + wifi_enable_h: wifi-enable-h { 445 + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 446 + }; 447 + }; 448 + 449 + usb { 450 + vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h { 451 + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 452 + }; 453 + 454 + vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h { 455 + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 456 + }; 457 + }; 458 + }; 459 + 460 + &pmu_io_domains { 461 + status = "okay"; 462 + pmuio1-supply = <&vcc3v3_pmu>; 463 + pmuio2-supply = <&vcc3v3_pmu>; 464 + vccio1-supply = <&vccio_acodec>; 465 + vccio2-supply = <&vcc_1v8>; 466 + vccio3-supply = <&vccio_sd>; 467 + vccio4-supply = <&vcc_1v8>; 468 + vccio5-supply = <&vcc_3v3>; 469 + vccio6-supply = <&vcc_1v8>; 470 + vccio7-supply = <&vcc_3v3>; 471 + }; 472 + 473 + &sdhci { 474 + bus-width = <8>; 475 + mmc-hs200-1_8v; 476 + non-removable; 477 + vmmc-supply = <&vcc_3v3>; 478 + vqmmc-supply = <&vcc_1v8>; 479 + status = "okay"; 480 + }; 481 + 482 + &sdmmc0 { 483 + bus-width = <4>; 484 + cap-sd-highspeed; 485 + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 486 + disable-wp; 487 + pinctrl-names = "default"; 488 + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 489 + sd-uhs-sdr104; 490 + vmmc-supply = <&vcc3v3_sd>; 491 + vqmmc-supply = <&vccio_sd>; 492 + status = "okay"; 493 + }; 494 + 495 + &sdmmc1 { 496 + bus-width = <4>; 497 + cap-sd-highspeed; 498 + cap-sdio-irq; 499 + keep-power-in-suspend; 500 + mmc-pwrseq = <&sdio_pwrseq>; 501 + vmmc-supply = <&vcc3v3_sys>; 502 + vqmmc-supply = <&vcca1v8_pmu>; 503 + pinctrl-names = "default"; 504 + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 505 + status = "okay"; 506 + }; 507 + 508 + &tsadc { 509 + status = "okay"; 510 + }; 511 + 512 + &uart0 { 513 + pinctrl-names = "default"; 514 + pinctrl-0 = <&uart0_xfer>; 515 + status = "okay"; 516 + }; 517 + 518 + &uart1 { 519 + pinctrl-names = "default"; 520 + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; 521 + status = "okay"; 522 + uart-has-rtscts; 523 + 524 + bluetooth { 525 + compatible = "brcm,bcm43438-bt"; 526 + clocks = <&rk809 1>; 527 + clock-names = "lpo"; 528 + device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 529 + host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 530 + shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 531 + pinctrl-names = "default"; 532 + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; 533 + vbat-supply = <&vcc3v3_sys>; 534 + vddio-supply = <&vcca1v8_pmu>; 535 + }; 536 + }; 537 + 538 + &uart2 { 539 + status = "okay"; 540 + }; 541 + 542 + &usb2phy0_host { 543 + phy-supply = <&vcc5v0_usb30_host>; 544 + status = "okay"; 545 + }; 546 + 547 + &usb2phy0_otg { 548 + phy-supply = <&vcc5v0_usb_otg>; 549 + status = "okay"; 550 + }; 551 + 552 + &usb2phy1_otg { 553 + phy-supply = <&vcc5v0_usb30_host>; 554 + status = "okay"; 555 + }; 556 + 557 + &usb2phy0 { 558 + status = "okay"; 559 + }; 560 + 561 + &usb2phy1 { 562 + status = "okay"; 563 + }; 564 + 565 + &usb_host0_xhci { 566 + status = "okay"; 567 + }; 568 + 569 + &usb_host1_xhci { 570 + status = "okay"; 571 + }; 572 + 573 + &usb_host0_ehci { 574 + status = "okay"; 575 + }; 576 + 577 + &usb_host0_ohci { 578 + status = "okay"; 579 + };
+177
arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + 5 + #include "rk3566-soquartz.dtsi" 6 + 7 + / { 8 + model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board"; 9 + compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566"; 10 + 11 + /* labeled +12v in schematic */ 12 + vcc12v_dcin: vcc12v-dcin-regulator { 13 + compatible = "regulator-fixed"; 14 + regulator-name = "vcc12v_dcin"; 15 + regulator-always-on; 16 + regulator-boot-on; 17 + regulator-min-microvolt = <12000000>; 18 + regulator-max-microvolt = <12000000>; 19 + }; 20 + 21 + /* labeled +5v in schematic */ 22 + vcc_5v: vcc-5v-regulator { 23 + compatible = "regulator-fixed"; 24 + regulator-name = "vcc_5v"; 25 + regulator-always-on; 26 + regulator-boot-on; 27 + regulator-min-microvolt = <5000000>; 28 + regulator-max-microvolt = <5000000>; 29 + vin-supply = <&vcc12v_dcin>; 30 + }; 31 + }; 32 + 33 + &gmac1 { 34 + status = "okay"; 35 + }; 36 + 37 + /* 38 + * i2c1 is exposed on CM1 / Module1A 39 + * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu 40 + * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu 41 + */ 42 + &i2c1 { 43 + status = "okay"; 44 + 45 + /* 46 + * the rtc interrupt is tied to PMIC_PWRON, 47 + * it will force reset the board if triggered. 48 + */ 49 + pcf85063: rtc@51 { 50 + compatible = "nxp,pcf85063"; 51 + reg = <0x51>; 52 + }; 53 + }; 54 + 55 + /* 56 + * i2c2 is exposed on CM1 / Module1A - to PI40 57 + * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch 58 + * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3 59 + */ 60 + &i2c2 { 61 + status = "disabled"; 62 + }; 63 + 64 + /* 65 + * i2c3 is exposed on CM1 / Module1A - to PI40 66 + * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3 67 + * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3 68 + */ 69 + &i2c3 { 70 + status = "disabled"; 71 + }; 72 + 73 + /* 74 + * i2c4 is exposed on CM2 / Module1B - to PI40 75 + * pin 45 - GPIO24 - i2c4_scl_m1 76 + * pin 47 - GPIO23 - i2c4_sda_m1 77 + */ 78 + &i2c4 { 79 + status = "disabled"; 80 + }; 81 + 82 + /* 83 + * i2s1_8ch is exposed on CM1 / Module1A - to PI40 84 + * pin 24 - GPIO26 - i2s1_sdi1_m1 85 + * pin 25 - GPIO21 - i2s1_sdo0_m1 86 + * pin 26 - GPIO19 - i2s1_lrck_tx_m1 87 + * pin 27 - GPIO20 - i2s1_sdi0_m1 88 + * pin 29 - GPIO16 - i2s1_sdi3_m1 89 + * pin 30 - GPIO6 - i2s1_sdi2_m1 90 + * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3 91 + * pin 41 - GPIO25 - i2s1_sdo2_m1 92 + * pin 49 - GPIO18 - i2s1_sclk_tx_m1 93 + * pin 50 - GPIO17 - i2s1_mclk_m1 94 + * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2 95 + */ 96 + &i2s1_8ch { 97 + status = "disabled"; 98 + }; 99 + 100 + &led_diy { 101 + status = "okay"; 102 + }; 103 + 104 + &led_work { 105 + status = "okay"; 106 + }; 107 + 108 + &rgmii_phy1 { 109 + status = "okay"; 110 + }; 111 + 112 + /* 113 + * saradc is exposed on CM1 / Module1A - to J2 114 + * pin 94 - AIN1 - saradc_vin3 115 + * pin 96 - AIN0 - saradc_vin2 116 + */ 117 + &saradc { 118 + status = "disabled"; 119 + }; 120 + 121 + &sdmmc0 { 122 + vmmc-supply = <&sdmmc_pwr>; 123 + status = "okay"; 124 + }; 125 + 126 + &sdmmc_pwr { 127 + regulator-min-microvolt = <3300000>; 128 + regulator-max-microvolt = <3300000>; 129 + status = "okay"; 130 + }; 131 + 132 + /* 133 + * spi3 is exposed on CM1 / Module1A - to PI40 134 + * pin 37 - GPIO7 - spi3_cs1_m0 135 + * pin 38 - GPIO11 - spi3_clk_m0 136 + * pin 39 - GPIO8 - spi3_cs0_m0 137 + * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch 138 + * pin 44 - GPIO10 - spi3_mosi_m0 139 + */ 140 + &spi3 { 141 + status = "disabled"; 142 + }; 143 + 144 + /* 145 + * uart2 is exposed on CM1 / Module1A - to PI40 146 + * pin 51 - GPIO15 - uart2_rx_m0 147 + * pin 55 - GPIO14 - uart2_tx_m0 148 + */ 149 + &uart2 { 150 + status = "okay"; 151 + }; 152 + 153 + /* 154 + * uart7 is exposed on CM1 / Module1A - to PI40 155 + * pin 46 - GPIO22 - uart7_tx_m2 156 + * pin 47 - GPIO23 - uart7_rx_m2 157 + */ 158 + &uart7 { 159 + status = "okay"; 160 + }; 161 + 162 + &usb2phy0 { 163 + status = "okay"; 164 + }; 165 + 166 + &usb2phy0_otg { 167 + phy-supply = <&vcc_5v>; 168 + status = "okay"; 169 + }; 170 + 171 + &usb_host0_xhci { 172 + status = "okay"; 173 + }; 174 + 175 + &vbus { 176 + vin-supply = <&vcc_5v>; 177 + };
+616
arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + 5 + #include <dt-bindings/gpio/gpio.h> 6 + #include <dt-bindings/pinctrl/rockchip.h> 7 + #include "rk3566.dtsi" 8 + 9 + / { 10 + model = "Pine64 RK3566 SoQuartz SOM"; 11 + compatible = "pine64,soquartz", "rockchip,rk3566"; 12 + 13 + aliases { 14 + ethernet0 = &gmac1; 15 + mmc0 = &sdmmc0; 16 + mmc1 = &sdhci; 17 + mmc2 = &sdmmc1; 18 + }; 19 + 20 + chosen: chosen { 21 + stdout-path = "serial2:1500000n8"; 22 + }; 23 + 24 + gmac1_clkin: external-gmac1-clock { 25 + compatible = "fixed-clock"; 26 + clock-frequency = <125000000>; 27 + clock-output-names = "gmac1_clkin"; 28 + #clock-cells = <0>; 29 + }; 30 + 31 + leds { 32 + compatible = "gpio-leds"; 33 + 34 + led_diy: led-diy { 35 + label = "diy-led"; 36 + default-state = "on"; 37 + gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>; 38 + linux,default-trigger = "heartbeat"; 39 + pinctrl-names = "default"; 40 + pinctrl-0 = <&diy_led_enable_h>; 41 + retain-state-suspended; 42 + status = "disabled"; 43 + }; 44 + 45 + led_work: led-work { 46 + label = "work-led"; 47 + default-state = "off"; 48 + gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; 49 + pinctrl-names = "default"; 50 + pinctrl-0 = <&work_led_enable_h>; 51 + retain-state-suspended; 52 + status = "disabled"; 53 + }; 54 + }; 55 + 56 + sdio_pwrseq: sdio-pwrseq { 57 + status = "okay"; 58 + compatible = "mmc-pwrseq-simple"; 59 + clocks = <&rk809 1>; 60 + clock-names = "ext_clock"; 61 + pinctrl-names = "default"; 62 + pinctrl-0 = <&wifi_enable_h>; 63 + reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>; 64 + }; 65 + 66 + vbus: vbus-regulator { 67 + compatible = "regulator-fixed"; 68 + regulator-name = "vbus"; 69 + regulator-always-on; 70 + regulator-boot-on; 71 + regulator-min-microvolt = <5000000>; 72 + regulator-max-microvolt = <5000000>; 73 + }; 74 + 75 + /* sourced from vbus, vbus is provided by the carrier board */ 76 + vcc5v0_sys: vcc5v0-sys-regulator { 77 + compatible = "regulator-fixed"; 78 + regulator-name = "vcc5v0_sys"; 79 + regulator-always-on; 80 + regulator-boot-on; 81 + regulator-min-microvolt = <5000000>; 82 + regulator-max-microvolt = <5000000>; 83 + vin-supply = <&vbus>; 84 + }; 85 + 86 + vcc3v3_sys: vcc3v3-sys-regulator { 87 + compatible = "regulator-fixed"; 88 + regulator-name = "vcc3v3_sys"; 89 + regulator-always-on; 90 + regulator-boot-on; 91 + regulator-min-microvolt = <3300000>; 92 + regulator-max-microvolt = <3300000>; 93 + vin-supply = <&vcc5v0_sys>; 94 + }; 95 + 96 + sdmmc_pwr: sdmmc-pwr-regulator { 97 + compatible = "regulator-fixed"; 98 + enable-active-high; 99 + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 100 + pinctrl-names = "default"; 101 + pinctrl-0 = <&sdmmc_pwr_h>; 102 + regulator-name = "sdmmc_pwr"; 103 + status = "disabled"; 104 + }; 105 + }; 106 + 107 + &cpu0 { 108 + cpu-supply = <&vdd_cpu>; 109 + }; 110 + 111 + &cpu1 { 112 + cpu-supply = <&vdd_cpu>; 113 + }; 114 + 115 + &cpu2 { 116 + cpu-supply = <&vdd_cpu>; 117 + }; 118 + 119 + &cpu3 { 120 + cpu-supply = <&vdd_cpu>; 121 + }; 122 + 123 + &gmac1 { 124 + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; 125 + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; 126 + clock_in_out = "input"; 127 + phy-supply = <&vcc_3v3>; 128 + phy-mode = "rgmii"; 129 + pinctrl-names = "default"; 130 + pinctrl-0 = <&gmac1m0_miim 131 + &gmac1m0_tx_bus2 132 + &gmac1m0_rx_bus2 133 + &gmac1m0_rgmii_clk 134 + &gmac1m0_clkinout 135 + &gmac1m0_rgmii_bus>; 136 + snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; 137 + snps,reset-active-low; 138 + /* Reset time is 20ms, 100ms for rtl8211f, also works well here */ 139 + snps,reset-delays-us = <0 20000 100000>; 140 + tx_delay = <0x30>; 141 + rx_delay = <0x10>; 142 + phy-handle = <&rgmii_phy1>; 143 + status = "disabled"; 144 + }; 145 + 146 + &i2c0 { 147 + status = "okay"; 148 + 149 + vdd_cpu: regulator@1c { 150 + compatible = "tcs,tcs4525"; 151 + reg = <0x1c>; 152 + fcs,suspend-voltage-selector = <1>; 153 + regulator-name = "vdd_cpu"; 154 + regulator-min-microvolt = <800000>; 155 + regulator-max-microvolt = <1150000>; 156 + regulator-ramp-delay = <2300>; 157 + regulator-always-on; 158 + regulator-boot-on; 159 + vin-supply = <&vcc5v0_sys>; 160 + 161 + regulator-state-mem { 162 + regulator-off-in-suspend; 163 + }; 164 + }; 165 + 166 + rk809: pmic@20 { 167 + compatible = "rockchip,rk809"; 168 + reg = <0x20>; 169 + interrupt-parent = <&gpio0>; 170 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 171 + #clock-cells = <1>; 172 + clock-output-names = "rk808-clkout1", "rk808-clkout2"; 173 + pinctrl-names = "default"; 174 + pinctrl-0 = <&pmic_int_l>; 175 + rockchip,system-power-controller; 176 + wakeup-source; 177 + 178 + vcc1-supply = <&vcc3v3_sys>; 179 + vcc2-supply = <&vcc3v3_sys>; 180 + vcc3-supply = <&vcc3v3_sys>; 181 + vcc4-supply = <&vcc3v3_sys>; 182 + vcc5-supply = <&vcc3v3_sys>; 183 + vcc6-supply = <&vcc3v3_sys>; 184 + vcc7-supply = <&vcc3v3_sys>; 185 + vcc8-supply = <&vcc3v3_sys>; 186 + vcc9-supply = <&vcc3v3_sys>; 187 + 188 + regulators { 189 + vdd_logic: DCDC_REG1 { 190 + regulator-name = "vdd_logic"; 191 + regulator-always-on; 192 + regulator-boot-on; 193 + regulator-min-microvolt = <500000>; 194 + regulator-max-microvolt = <1350000>; 195 + regulator-init-microvolt = <900000>; 196 + regulator-ramp-delay = <6001>; 197 + regulator-initial-mode = <0x2>; 198 + regulator-state-mem { 199 + regulator-on-in-suspend; 200 + regulator-suspend-microvolt = <900000>; 201 + }; 202 + }; 203 + 204 + vdd_gpu: DCDC_REG2 { 205 + regulator-name = "vdd_gpu"; 206 + regulator-always-on; 207 + regulator-boot-on; 208 + regulator-min-microvolt = <500000>; 209 + regulator-max-microvolt = <1350000>; 210 + regulator-init-microvolt = <900000>; 211 + regulator-ramp-delay = <6001>; 212 + regulator-initial-mode = <0x2>; 213 + regulator-state-mem { 214 + regulator-off-in-suspend; 215 + }; 216 + }; 217 + 218 + vcc_ddr: DCDC_REG3 { 219 + regulator-always-on; 220 + regulator-boot-on; 221 + regulator-initial-mode = <0x2>; 222 + regulator-name = "vcc_ddr"; 223 + regulator-state-mem { 224 + regulator-on-in-suspend; 225 + }; 226 + }; 227 + 228 + vdd_npu: DCDC_REG4 { 229 + regulator-always-on; 230 + regulator-boot-on; 231 + regulator-min-microvolt = <500000>; 232 + regulator-max-microvolt = <1350000>; 233 + regulator-init-microvolt = <900000>; 234 + regulator-initial-mode = <0x2>; 235 + regulator-name = "vdd_npu"; 236 + regulator-state-mem { 237 + regulator-off-in-suspend; 238 + }; 239 + }; 240 + 241 + vcc_1v8: DCDC_REG5 { 242 + regulator-name = "vcc_1v8"; 243 + regulator-always-on; 244 + regulator-boot-on; 245 + regulator-min-microvolt = <1800000>; 246 + regulator-max-microvolt = <1800000>; 247 + regulator-state-mem { 248 + regulator-on-in-suspend; 249 + regulator-suspend-microvolt = <1800000>; 250 + }; 251 + }; 252 + 253 + vdda0v9_image: LDO_REG1 { 254 + regulator-always-on; 255 + regulator-boot-on; 256 + regulator-min-microvolt = <900000>; 257 + regulator-max-microvolt = <900000>; 258 + regulator-name = "vdda0v9_image"; 259 + regulator-state-mem { 260 + regulator-on-in-suspend; 261 + regulator-suspend-microvolt = <900000>; 262 + }; 263 + }; 264 + 265 + vdda_0v9: LDO_REG2 { 266 + regulator-always-on; 267 + regulator-boot-on; 268 + regulator-min-microvolt = <900000>; 269 + regulator-max-microvolt = <900000>; 270 + regulator-name = "vdda_0v9"; 271 + regulator-state-mem { 272 + regulator-off-in-suspend; 273 + }; 274 + }; 275 + 276 + vdda0v9_pmu: LDO_REG3 { 277 + regulator-always-on; 278 + regulator-boot-on; 279 + regulator-min-microvolt = <900000>; 280 + regulator-max-microvolt = <900000>; 281 + regulator-name = "vdda0v9_pmu"; 282 + regulator-state-mem { 283 + regulator-on-in-suspend; 284 + regulator-suspend-microvolt = <900000>; 285 + }; 286 + }; 287 + 288 + vccio_acodec: LDO_REG4 { 289 + regulator-always-on; 290 + regulator-boot-on; 291 + regulator-min-microvolt = <3300000>; 292 + regulator-max-microvolt = <3300000>; 293 + regulator-name = "vccio_acodec"; 294 + regulator-state-mem { 295 + regulator-off-in-suspend; 296 + }; 297 + }; 298 + 299 + vccio_sd: LDO_REG5 { 300 + regulator-always-on; 301 + regulator-boot-on; 302 + regulator-min-microvolt = <1800000>; 303 + regulator-max-microvolt = <3300000>; 304 + regulator-name = "vccio_sd"; 305 + regulator-state-mem { 306 + regulator-off-in-suspend; 307 + }; 308 + }; 309 + 310 + vcc3v3_pmu: LDO_REG6 { 311 + regulator-always-on; 312 + regulator-boot-on; 313 + regulator-min-microvolt = <3300000>; 314 + regulator-max-microvolt = <3300000>; 315 + regulator-name = "vcc3v3_pmu"; 316 + regulator-state-mem { 317 + regulator-on-in-suspend; 318 + regulator-suspend-microvolt = <3300000>; 319 + }; 320 + }; 321 + 322 + vcca_1v8: LDO_REG7 { 323 + regulator-always-on; 324 + regulator-boot-on; 325 + regulator-min-microvolt = <1800000>; 326 + regulator-max-microvolt = <1800000>; 327 + regulator-name = "vcca_1v8"; 328 + regulator-state-mem { 329 + regulator-off-in-suspend; 330 + }; 331 + }; 332 + 333 + vcca1v8_pmu: LDO_REG8 { 334 + regulator-always-on; 335 + regulator-boot-on; 336 + regulator-min-microvolt = <1800000>; 337 + regulator-max-microvolt = <1800000>; 338 + regulator-name = "vcca1v8_pmu"; 339 + regulator-state-mem { 340 + regulator-off-in-suspend; 341 + }; 342 + }; 343 + 344 + vcca1v8_image: LDO_REG9 { 345 + regulator-always-on; 346 + regulator-boot-on; 347 + regulator-min-microvolt = <1800000>; 348 + regulator-max-microvolt = <1800000>; 349 + regulator-name = "vcca1v8_image"; 350 + regulator-state-mem { 351 + regulator-off-in-suspend; 352 + }; 353 + }; 354 + 355 + vcc_3v3: SWITCH_REG1 { 356 + regulator-name = "vcc_3v3"; 357 + regulator-state-mem { 358 + regulator-off-in-suspend; 359 + }; 360 + }; 361 + 362 + vcc3v3_sd: SWITCH_REG2 { 363 + regulator-name = "vcc3v3_sd"; 364 + status = "disabled"; 365 + regulator-state-mem { 366 + regulator-on-in-suspend; 367 + }; 368 + }; 369 + 370 + }; 371 + }; 372 + }; 373 + 374 + /* 375 + * i2c1 is exposed on CM1 / Module1A 376 + * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu 377 + * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu 378 + */ 379 + &i2c1 { 380 + status = "disabled"; 381 + }; 382 + 383 + /* 384 + * i2c2 is exposed on CM1 / Module1A 385 + * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch 386 + * pin 58 - i2c2_sda_m1, pullup to vcc_3v3 387 + */ 388 + &i2c2 { 389 + pinctrl-names = "default"; 390 + pinctrl-0 = <&i2c2m1_xfer>; 391 + status = "disabled"; 392 + }; 393 + 394 + /* 395 + * i2c3 is exposed on CM1 / Module1A 396 + * pin 35 - i2c3_scl_m0, pullup to vcc_3v3 397 + * pin 36 - i2c3_sda_m0, pullup to vcc_3v3 398 + */ 399 + &i2c3 { 400 + status = "disabled"; 401 + }; 402 + 403 + /* 404 + * i2c4 is exposed on CM2 / Module1B 405 + * pin 45 - i2c4_scl_m1 406 + * pin 47 - i2c4_sda_m1 407 + */ 408 + &i2c4 { 409 + pinctrl-names = "default"; 410 + pinctrl-0 = <&i2c4m1_xfer>; 411 + status = "disabled"; 412 + }; 413 + 414 + /* 415 + * i2s1_8ch is exposed on CM1 / Module1A 416 + * pin 24 - i2s1_sdi1_m1 417 + * pin 25 - i2s1_sdo0_m1 418 + * pin 26 - i2s1_lrck_tx_m1 419 + * pin 27 - i2s1_sdi0_m1 420 + * pin 29 - i2s1_sdi3_m1 421 + * pin 30 - i2s1_sdi2_m1 422 + * pin 40 - i2s1_sdo1_m1, shared with spi3 423 + * pin 41 - i2s1_sdo2_m1 424 + * pin 49 - i2s1_sclk_tx_m1 425 + * pin 50 - i2s1_mclk_m1 426 + * pin 56 - i2s1_sdo3_m1, shared with i2c2 427 + */ 428 + &i2s1_8ch { 429 + pinctrl-names = "default"; 430 + pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx 431 + &i2s1m1_lrcktx &i2s1m1_lrckrx 432 + &i2s1m1_sdi0 &i2s1m1_sdi1 433 + &i2s1m1_sdi2 &i2s1m1_sdi3 434 + &i2s1m1_sdo0 &i2s1m1_sdo1 435 + &i2s1m1_sdo2 &i2s1m1_sdo3>; 436 + status = "disabled"; 437 + }; 438 + 439 + &mdio1 { 440 + rgmii_phy1: ethernet-phy@0 { 441 + compatible = "ethernet-phy-ieee802.3-c22"; 442 + reg = <0>; 443 + status = "disabled"; 444 + }; 445 + }; 446 + 447 + &pinctrl { 448 + bt { 449 + bt_enable_h: bt-enable-h { 450 + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 451 + }; 452 + 453 + bt_host_wake_l: bt-host-wake-l { 454 + rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; 455 + }; 456 + 457 + bt_wake_l: bt-wake-l { 458 + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 459 + }; 460 + }; 461 + 462 + leds { 463 + work_led_enable_h: work-led-enable-h { 464 + rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 465 + }; 466 + 467 + diy_led_enable_h: diy-led-enable-h { 468 + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 469 + }; 470 + }; 471 + 472 + pmic { 473 + pmic_int_l: pmic-int-l { 474 + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 475 + }; 476 + }; 477 + 478 + sdio-pwrseq { 479 + wifi_enable_h: wifi-enable-h { 480 + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 481 + }; 482 + }; 483 + 484 + sdmmc-pwr { 485 + sdmmc_pwr_h: sdmmc-pwr-h { 486 + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 487 + }; 488 + }; 489 + }; 490 + 491 + &pmu_io_domains { 492 + pmuio1-supply = <&vcc3v3_pmu>; 493 + pmuio2-supply = <&vcc3v3_pmu>; 494 + vccio1-supply = <&vcc_3v3>; 495 + vccio2-supply = <&vcc_1v8>; 496 + vccio3-supply = <&vccio_sd>; 497 + vccio4-supply = <&vcc_1v8>; 498 + vccio5-supply = <&vcc_3v3>; 499 + vccio6-supply = <&vcc_3v3>; 500 + vccio7-supply = <&vcc_3v3>; 501 + status = "okay"; 502 + }; 503 + 504 + /* 505 + * saradc is exposed on CM1 / Module1A 506 + * pin 94 - saradc_vin3 507 + * pin 96 - saradc_vin2 508 + */ 509 + &saradc { 510 + vref-supply = <&vcca_1v8>; 511 + status = "disabled"; 512 + }; 513 + 514 + &sdhci { 515 + bus-width = <8>; 516 + mmc-hs200-1_8v; 517 + non-removable; 518 + vmmc-supply = <&vcc_3v3>; 519 + vqmmc-supply = <&vcc_1v8>; 520 + status = "okay"; 521 + }; 522 + 523 + &sdmmc0 { 524 + broken-cd; 525 + bus-width = <4>; 526 + cap-sd-highspeed; 527 + disable-wp; 528 + pinctrl-names = "default"; 529 + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 530 + vqmmc-supply = <&vccio_sd>; 531 + status = "disabled"; 532 + }; 533 + 534 + &sdmmc1 { 535 + bus-width = <4>; 536 + cap-sd-highspeed; 537 + cap-sdio-irq; 538 + keep-power-in-suspend; 539 + mmc-pwrseq = <&sdio_pwrseq>; 540 + non-removable; 541 + pinctrl-names = "default"; 542 + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 543 + sd-uhs-sdr104; 544 + vmmc-supply = <&vcc3v3_sys>; 545 + vqmmc-supply = <&vcc_1v8>; 546 + status = "okay"; 547 + }; 548 + 549 + /* 550 + * spi3 is exposed on CM1 / Module1A 551 + * pin 37 - spi3_cs1_m0 552 + * pin 38 - spi3_clk_m0 553 + * pin 39 - spi3_cs0_m0 554 + * pin 40 - spi3_miso_m0, shared with i2s1_8ch 555 + * pin 44 - spi3_mosi_m0 556 + */ 557 + &spi3 { 558 + status = "disabled"; 559 + }; 560 + 561 + &tsadc { 562 + status = "okay"; 563 + }; 564 + 565 + &uart1 { 566 + pinctrl-names = "default"; 567 + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; 568 + uart-has-rtscts; 569 + status = "okay"; 570 + 571 + bluetooth { 572 + compatible = "brcm,bcm43438-bt"; 573 + clocks = <&rk809 1>; 574 + clock-names = "lpo"; 575 + device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 576 + host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 577 + shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 578 + pinctrl-names = "default"; 579 + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; 580 + vbat-supply = <&vcc3v3_sys>; 581 + vddio-supply = <&vcca1v8_pmu>; 582 + }; 583 + }; 584 + 585 + /* 586 + * uart2 is exposed on CM1 / Module1A 587 + * pin 51 - uart2_rx_m0 588 + * pin 55 - uart2_tx_m0 589 + */ 590 + &uart2 { 591 + status = "disabled"; 592 + }; 593 + 594 + /* 595 + * uart7 is exposed on CM1 / Module1A 596 + * pin 46 - uart7_tx_m2 597 + * pin 47 - uart7_rx_m2 598 + */ 599 + &uart7 { 600 + pinctrl-names = "default"; 601 + pinctrl-0 = <&uart7m2_xfer>; 602 + status = "disabled"; 603 + }; 604 + 605 + /* dwc3_otg is the only usb port available */ 606 + &usb2phy0 { 607 + status = "disabled"; 608 + }; 609 + 610 + &usb2phy0_otg { 611 + status = "disabled"; 612 + }; 613 + 614 + &usb_host0_xhci { 615 + status = "disabled"; 616 + };
+11
arch/arm64/boot/dts/rockchip/rk3566.dtsi
··· 6 6 compatible = "rockchip,rk3566"; 7 7 }; 8 8 9 + &pipegrf { 10 + compatible = "rockchip,rk3566-pipe-grf", "syscon"; 11 + }; 12 + 9 13 &power { 10 14 power-domain@RK3568_PD_PIPE { 11 15 reg = <RK3568_PD_PIPE>; ··· 21 17 <&qos_usb3_1>; 22 18 #power-domain-cells = <0>; 23 19 }; 20 + }; 21 + 22 + &usb_host0_xhci { 23 + phys = <&usb2phy0_otg>; 24 + phy-names = "usb2-phy"; 25 + extcon = <&usb2phy0>; 26 + maximum-speed = "high-speed"; 24 27 };
+102
arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
··· 72 72 regulator-max-microvolt = <5000000>; 73 73 vin-supply = <&dc_12v>; 74 74 }; 75 + 76 + vcc5v0_usb: vcc5v0_usb { 77 + compatible = "regulator-fixed"; 78 + regulator-name = "vcc5v0_usb"; 79 + regulator-always-on; 80 + regulator-boot-on; 81 + regulator-min-microvolt = <5000000>; 82 + regulator-max-microvolt = <5000000>; 83 + vin-supply = <&dc_12v>; 84 + }; 85 + 86 + vcc5v0_usb_host: vcc5v0-usb-host { 87 + compatible = "regulator-fixed"; 88 + enable-active-high; 89 + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 90 + pinctrl-names = "default"; 91 + pinctrl-0 = <&vcc5v0_usb_host_en>; 92 + regulator-name = "vcc5v0_usb_host"; 93 + regulator-min-microvolt = <5000000>; 94 + regulator-max-microvolt = <5000000>; 95 + vin-supply = <&vcc5v0_usb>; 96 + }; 97 + 98 + vcc5v0_usb_otg: vcc5v0-usb-otg { 99 + compatible = "regulator-fixed"; 100 + enable-active-high; 101 + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 102 + pinctrl-names = "default"; 103 + pinctrl-0 = <&vcc5v0_usb_otg_en>; 104 + regulator-name = "vcc5v0_usb_otg"; 105 + regulator-min-microvolt = <5000000>; 106 + regulator-max-microvolt = <5000000>; 107 + vin-supply = <&vcc5v0_usb>; 108 + }; 109 + }; 110 + 111 + &combphy0 { 112 + /* used for USB3 */ 113 + status = "okay"; 114 + }; 115 + 116 + &combphy1 { 117 + /* used for USB3 */ 118 + status = "okay"; 119 + }; 120 + 121 + &combphy2 { 122 + /* used for SATA */ 123 + status = "okay"; 75 124 }; 76 125 77 126 &gmac0 { ··· 387 338 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 388 339 }; 389 340 }; 341 + 342 + usb { 343 + vcc5v0_usb_host_en: vcc5v0_usb_host_en { 344 + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 345 + }; 346 + 347 + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { 348 + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 349 + }; 350 + }; 390 351 }; 391 352 392 353 &pmu_io_domains { ··· 459 400 status = "okay"; 460 401 }; 461 402 403 + &sata2 { 404 + status = "okay"; 405 + }; 406 + 462 407 &sdhci { 463 408 bus-width = <8>; 464 409 max-frequency = <200000000>; ··· 517 454 /* shared with pwm13 and pwm12/spi3 */ 518 455 pinctrl-0 = <&uart9m1_xfer>; 519 456 status = "disabled"; 457 + }; 458 + 459 + &usb_host0_ehci { 460 + status = "okay"; 461 + }; 462 + 463 + &usb_host0_ohci { 464 + status = "okay"; 465 + }; 466 + 467 + &usb_host0_xhci { 468 + extcon = <&usb2phy0>; 469 + status = "okay"; 470 + }; 471 + 472 + &usb_host1_ehci { 473 + status = "okay"; 474 + }; 475 + 476 + &usb_host1_ohci { 477 + status = "okay"; 478 + }; 479 + 480 + &usb_host1_xhci { 481 + status = "okay"; 482 + }; 483 + 484 + &usb2phy0 { 485 + status = "okay"; 486 + }; 487 + 488 + &usb2phy0_host { 489 + phy-supply = <&vcc5v0_usb_host>; 490 + status = "okay"; 491 + }; 492 + 493 + &usb2phy0_otg { 494 + phy-supply = <&vcc5v0_usb_otg>; 495 + status = "okay"; 520 496 };
+46
arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
··· 103 103 vin-supply = <&vcc5v0_usb>; 104 104 }; 105 105 106 + vcc5v0_usb_otg: vcc5v0-usb-otg { 107 + compatible = "regulator-fixed"; 108 + enable-active-high; 109 + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 110 + pinctrl-names = "default"; 111 + pinctrl-0 = <&vcc5v0_usb_otg_en>; 112 + regulator-name = "vcc5v0_usb_otg"; 113 + regulator-min-microvolt = <5000000>; 114 + regulator-max-microvolt = <5000000>; 115 + vin-supply = <&vcc5v0_usb>; 116 + }; 117 + 106 118 vcc3v3_lcd0_n: vcc3v3-lcd0-n { 107 119 compatible = "regulator-fixed"; 108 120 regulator-name = "vcc3v3_lcd0_n"; ··· 146 134 regulator-off-in-suspend; 147 135 }; 148 136 }; 137 + }; 138 + 139 + &combphy0 { 140 + status = "okay"; 141 + }; 142 + 143 + &combphy1 { 144 + status = "okay"; 149 145 }; 150 146 151 147 &cpu0 { ··· 527 507 vcc5v0_usb_host_en: vcc5v0_usb_host_en { 528 508 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 529 509 }; 510 + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { 511 + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 512 + }; 530 513 }; 531 514 }; 532 515 ··· 591 568 status = "okay"; 592 569 }; 593 570 571 + &usb_host0_xhci { 572 + extcon = <&usb2phy0>; 573 + status = "okay"; 574 + }; 575 + 594 576 &usb_host1_ehci { 595 577 status = "okay"; 596 578 }; 597 579 598 580 &usb_host1_ohci { 581 + status = "okay"; 582 + }; 583 + 584 + &usb_host1_xhci { 585 + status = "okay"; 586 + }; 587 + 588 + &usb2phy0 { 589 + status = "okay"; 590 + }; 591 + 592 + &usb2phy0_host { 593 + phy-supply = <&vcc5v0_usb_host>; 594 + status = "okay"; 595 + }; 596 + 597 + &usb2phy0_otg { 598 + vbus-supply = <&vcc5v0_usb_otg>; 599 599 status = "okay"; 600 600 }; 601 601
+562
arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + #include <dt-bindings/gpio/gpio.h> 5 + #include <dt-bindings/leds/common.h> 6 + #include <dt-bindings/pinctrl/rockchip.h> 7 + #include "rk3568.dtsi" 8 + 9 + / { 10 + model = "Radxa ROCK3 Model A"; 11 + compatible = "radxa,rock3a", "rockchip,rk3568"; 12 + 13 + aliases { 14 + ethernet0 = &gmac1; 15 + mmc0 = &sdmmc0; 16 + mmc1 = &sdhci; 17 + }; 18 + 19 + chosen: chosen { 20 + stdout-path = "serial2:1500000n8"; 21 + }; 22 + 23 + leds { 24 + compatible = "gpio-leds"; 25 + 26 + led_user: led-0 { 27 + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 28 + function = LED_FUNCTION_HEARTBEAT; 29 + color = <LED_COLOR_ID_BLUE>; 30 + linux,default-trigger = "heartbeat"; 31 + pinctrl-names = "default"; 32 + pinctrl-0 = <&led_user_en>; 33 + }; 34 + }; 35 + 36 + rk809-sound { 37 + compatible = "simple-audio-card"; 38 + simple-audio-card,format = "i2s"; 39 + simple-audio-card,name = "Analog RK809"; 40 + simple-audio-card,mclk-fs = <256>; 41 + 42 + simple-audio-card,cpu { 43 + sound-dai = <&i2s1_8ch>; 44 + }; 45 + 46 + simple-audio-card,codec { 47 + sound-dai = <&rk809>; 48 + }; 49 + }; 50 + 51 + vcc12v_dcin: vcc12v-dcin { 52 + compatible = "regulator-fixed"; 53 + regulator-name = "vcc12v_dcin"; 54 + regulator-always-on; 55 + regulator-boot-on; 56 + }; 57 + 58 + vcc3v3_sys: vcc3v3-sys { 59 + compatible = "regulator-fixed"; 60 + regulator-name = "vcc3v3_sys"; 61 + regulator-always-on; 62 + regulator-boot-on; 63 + regulator-min-microvolt = <3300000>; 64 + regulator-max-microvolt = <3300000>; 65 + vin-supply = <&vcc12v_dcin>; 66 + }; 67 + 68 + vcc5v0_sys: vcc5v0-sys { 69 + compatible = "regulator-fixed"; 70 + regulator-name = "vcc5v0_sys"; 71 + regulator-always-on; 72 + regulator-boot-on; 73 + regulator-min-microvolt = <5000000>; 74 + regulator-max-microvolt = <5000000>; 75 + vin-supply = <&vcc12v_dcin>; 76 + }; 77 + 78 + vcc5v0_usb: vcc5v0-usb { 79 + compatible = "regulator-fixed"; 80 + regulator-name = "vcc5v0_usb"; 81 + regulator-always-on; 82 + regulator-boot-on; 83 + regulator-min-microvolt = <5000000>; 84 + regulator-max-microvolt = <5000000>; 85 + vin-supply = <&vcc12v_dcin>; 86 + }; 87 + 88 + vcc5v0_usb_host: vcc5v0-usb-host { 89 + compatible = "regulator-fixed"; 90 + enable-active-high; 91 + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 92 + pinctrl-names = "default"; 93 + pinctrl-0 = <&vcc5v0_usb_host_en>; 94 + regulator-name = "vcc5v0_usb_host"; 95 + regulator-min-microvolt = <5000000>; 96 + regulator-max-microvolt = <5000000>; 97 + vin-supply = <&vcc5v0_usb>; 98 + }; 99 + 100 + vcc5v0_usb_hub: vcc5v0-usb-hub-regulator { 101 + compatible = "regulator-fixed"; 102 + enable-active-high; 103 + gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; 104 + pinctrl-names = "default"; 105 + pinctrl-0 = <&vcc5v0_usb_hub_en>; 106 + regulator-name = "vcc5v0_usb_hub"; 107 + regulator-always-on; 108 + vin-supply = <&vcc5v0_usb>; 109 + }; 110 + 111 + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 112 + compatible = "regulator-fixed"; 113 + enable-active-high; 114 + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 115 + pinctrl-names = "default"; 116 + pinctrl-0 = <&vcc5v0_usb_otg_en>; 117 + regulator-name = "vcc5v0_usb_otg"; 118 + regulator-min-microvolt = <5000000>; 119 + regulator-max-microvolt = <5000000>; 120 + vin-supply = <&vcc5v0_usb>; 121 + }; 122 + }; 123 + 124 + &combphy0 { 125 + status = "okay"; 126 + }; 127 + 128 + &combphy1 { 129 + status = "okay"; 130 + }; 131 + 132 + &cpu0 { 133 + cpu-supply = <&vdd_cpu>; 134 + }; 135 + 136 + &cpu1 { 137 + cpu-supply = <&vdd_cpu>; 138 + }; 139 + 140 + &cpu2 { 141 + cpu-supply = <&vdd_cpu>; 142 + }; 143 + 144 + &cpu3 { 145 + cpu-supply = <&vdd_cpu>; 146 + }; 147 + 148 + &gmac1 { 149 + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 150 + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; 151 + assigned-clock-rates = <0>, <125000000>; 152 + clock_in_out = "output"; 153 + phy-handle = <&rgmii_phy1>; 154 + phy-mode = "rgmii-id"; 155 + pinctrl-names = "default"; 156 + pinctrl-0 = <&gmac1m1_miim 157 + &gmac1m1_tx_bus2 158 + &gmac1m1_rx_bus2 159 + &gmac1m1_rgmii_clk 160 + &gmac1m1_rgmii_bus>; 161 + status = "okay"; 162 + }; 163 + 164 + &gpu { 165 + mali-supply = <&vdd_gpu>; 166 + status = "okay"; 167 + }; 168 + 169 + &i2c0 { 170 + status = "okay"; 171 + 172 + vdd_cpu: regulator@1c { 173 + compatible = "tcs,tcs4525"; 174 + reg = <0x1c>; 175 + fcs,suspend-voltage-selector = <1>; 176 + regulator-name = "vdd_cpu"; 177 + regulator-always-on; 178 + regulator-boot-on; 179 + regulator-min-microvolt = <800000>; 180 + regulator-max-microvolt = <1150000>; 181 + regulator-ramp-delay = <2300>; 182 + vin-supply = <&vcc5v0_sys>; 183 + 184 + regulator-state-mem { 185 + regulator-off-in-suspend; 186 + }; 187 + }; 188 + 189 + rk809: pmic@20 { 190 + compatible = "rockchip,rk809"; 191 + reg = <0x20>; 192 + interrupt-parent = <&gpio0>; 193 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 194 + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; 195 + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; 196 + #clock-cells = <1>; 197 + clock-names = "mclk"; 198 + clocks = <&cru I2S1_MCLKOUT_TX>; 199 + pinctrl-names = "default"; 200 + pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; 201 + rockchip,system-power-controller; 202 + #sound-dai-cells = <0>; 203 + vcc1-supply = <&vcc3v3_sys>; 204 + vcc2-supply = <&vcc3v3_sys>; 205 + vcc3-supply = <&vcc3v3_sys>; 206 + vcc4-supply = <&vcc3v3_sys>; 207 + vcc5-supply = <&vcc3v3_sys>; 208 + vcc6-supply = <&vcc3v3_sys>; 209 + vcc7-supply = <&vcc3v3_sys>; 210 + vcc8-supply = <&vcc3v3_sys>; 211 + vcc9-supply = <&vcc3v3_sys>; 212 + wakeup-source; 213 + 214 + regulators { 215 + vdd_logic: DCDC_REG1 { 216 + regulator-name = "vdd_logic"; 217 + regulator-always-on; 218 + regulator-boot-on; 219 + regulator-init-microvolt = <900000>; 220 + regulator-initial-mode = <0x2>; 221 + regulator-min-microvolt = <500000>; 222 + regulator-max-microvolt = <1350000>; 223 + regulator-ramp-delay = <6001>; 224 + 225 + regulator-state-mem { 226 + regulator-off-in-suspend; 227 + }; 228 + }; 229 + 230 + vdd_gpu: DCDC_REG2 { 231 + regulator-name = "vdd_gpu"; 232 + regulator-always-on; 233 + regulator-init-microvolt = <900000>; 234 + regulator-initial-mode = <0x2>; 235 + regulator-min-microvolt = <500000>; 236 + regulator-max-microvolt = <1350000>; 237 + regulator-ramp-delay = <6001>; 238 + 239 + regulator-state-mem { 240 + regulator-off-in-suspend; 241 + }; 242 + }; 243 + 244 + vcc_ddr: DCDC_REG3 { 245 + regulator-name = "vcc_ddr"; 246 + regulator-always-on; 247 + regulator-boot-on; 248 + regulator-initial-mode = <0x2>; 249 + 250 + regulator-state-mem { 251 + regulator-on-in-suspend; 252 + }; 253 + }; 254 + 255 + vdd_npu: DCDC_REG4 { 256 + regulator-name = "vdd_npu"; 257 + regulator-init-microvolt = <900000>; 258 + regulator-initial-mode = <0x2>; 259 + regulator-min-microvolt = <500000>; 260 + regulator-max-microvolt = <1350000>; 261 + regulator-ramp-delay = <6001>; 262 + 263 + regulator-state-mem { 264 + regulator-off-in-suspend; 265 + }; 266 + }; 267 + 268 + vcc_1v8: DCDC_REG5 { 269 + regulator-name = "vcc_1v8"; 270 + regulator-always-on; 271 + regulator-boot-on; 272 + regulator-min-microvolt = <1800000>; 273 + regulator-max-microvolt = <1800000>; 274 + 275 + regulator-state-mem { 276 + regulator-off-in-suspend; 277 + }; 278 + }; 279 + 280 + vdda0v9_image: LDO_REG1 { 281 + regulator-name = "vdda0v9_image"; 282 + regulator-min-microvolt = <900000>; 283 + regulator-max-microvolt = <900000>; 284 + 285 + regulator-state-mem { 286 + regulator-off-in-suspend; 287 + }; 288 + }; 289 + 290 + vdda_0v9: LDO_REG2 { 291 + regulator-name = "vdda_0v9"; 292 + regulator-always-on; 293 + regulator-boot-on; 294 + regulator-min-microvolt = <900000>; 295 + regulator-max-microvolt = <900000>; 296 + 297 + regulator-state-mem { 298 + regulator-off-in-suspend; 299 + }; 300 + }; 301 + 302 + vdda0v9_pmu: LDO_REG3 { 303 + regulator-name = "vdda0v9_pmu"; 304 + regulator-always-on; 305 + regulator-boot-on; 306 + regulator-min-microvolt = <900000>; 307 + regulator-max-microvolt = <900000>; 308 + 309 + regulator-state-mem { 310 + regulator-on-in-suspend; 311 + regulator-suspend-microvolt = <900000>; 312 + }; 313 + }; 314 + 315 + vccio_acodec: LDO_REG4 { 316 + regulator-name = "vccio_acodec"; 317 + regulator-always-on; 318 + regulator-min-microvolt = <3300000>; 319 + regulator-max-microvolt = <3300000>; 320 + 321 + regulator-state-mem { 322 + regulator-off-in-suspend; 323 + }; 324 + }; 325 + 326 + vccio_sd: LDO_REG5 { 327 + regulator-name = "vccio_sd"; 328 + regulator-min-microvolt = <1800000>; 329 + regulator-max-microvolt = <3300000>; 330 + 331 + regulator-state-mem { 332 + regulator-off-in-suspend; 333 + }; 334 + }; 335 + 336 + vcc3v3_pmu: LDO_REG6 { 337 + regulator-name = "vcc3v3_pmu"; 338 + regulator-always-on; 339 + regulator-boot-on; 340 + regulator-min-microvolt = <3300000>; 341 + regulator-max-microvolt = <3300000>; 342 + 343 + regulator-state-mem { 344 + regulator-on-in-suspend; 345 + regulator-suspend-microvolt = <3300000>; 346 + }; 347 + }; 348 + 349 + vcca_1v8: LDO_REG7 { 350 + regulator-name = "vcca_1v8"; 351 + regulator-always-on; 352 + regulator-boot-on; 353 + regulator-min-microvolt = <1800000>; 354 + regulator-max-microvolt = <1800000>; 355 + 356 + regulator-state-mem { 357 + regulator-off-in-suspend; 358 + }; 359 + }; 360 + 361 + vcca1v8_pmu: LDO_REG8 { 362 + regulator-name = "vcca1v8_pmu"; 363 + regulator-always-on; 364 + regulator-boot-on; 365 + regulator-min-microvolt = <1800000>; 366 + regulator-max-microvolt = <1800000>; 367 + 368 + regulator-state-mem { 369 + regulator-on-in-suspend; 370 + regulator-suspend-microvolt = <1800000>; 371 + }; 372 + }; 373 + 374 + vcca1v8_image: LDO_REG9 { 375 + regulator-name = "vcca1v8_image"; 376 + regulator-min-microvolt = <1800000>; 377 + regulator-max-microvolt = <1800000>; 378 + 379 + regulator-state-mem { 380 + regulator-off-in-suspend; 381 + }; 382 + }; 383 + 384 + vcc_3v3: SWITCH_REG1 { 385 + regulator-name = "vcc_3v3"; 386 + regulator-always-on; 387 + regulator-boot-on; 388 + 389 + regulator-state-mem { 390 + regulator-off-in-suspend; 391 + }; 392 + }; 393 + 394 + vcc3v3_sd: SWITCH_REG2 { 395 + regulator-name = "vcc3v3_sd"; 396 + 397 + regulator-state-mem { 398 + regulator-off-in-suspend; 399 + }; 400 + }; 401 + }; 402 + 403 + codec { 404 + mic-in-differential; 405 + }; 406 + }; 407 + }; 408 + 409 + &i2s1_8ch { 410 + rockchip,trcm-sync-tx-only; 411 + status = "okay"; 412 + }; 413 + 414 + &mdio1 { 415 + rgmii_phy1: ethernet-phy@0 { 416 + compatible = "ethernet-phy-ieee802.3-c22"; 417 + reg = <0x0>; 418 + pinctrl-names = "default"; 419 + pinctrl-0 = <&eth_phy_rst>; 420 + reset-assert-us = <20000>; 421 + reset-deassert-us = <100000>; 422 + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; 423 + }; 424 + }; 425 + 426 + &pinctrl { 427 + ethernet { 428 + eth_phy_rst: eth_phy_rst { 429 + rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 430 + }; 431 + }; 432 + 433 + leds { 434 + led_user_en: led_user_en { 435 + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 436 + }; 437 + }; 438 + 439 + pmic { 440 + pmic_int: pmic_int { 441 + rockchip,pins = 442 + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 443 + }; 444 + }; 445 + 446 + usb { 447 + vcc5v0_usb_host_en: vcc5v0_usb_host_en { 448 + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 449 + }; 450 + vcc5v0_usb_hub_en: vcc5v0_usb_hub_en { 451 + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 452 + }; 453 + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { 454 + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 455 + }; 456 + }; 457 + }; 458 + 459 + &pmu_io_domains { 460 + pmuio1-supply = <&vcc3v3_pmu>; 461 + pmuio2-supply = <&vcc3v3_pmu>; 462 + vccio1-supply = <&vccio_acodec>; 463 + vccio2-supply = <&vcc_1v8>; 464 + vccio3-supply = <&vccio_sd>; 465 + vccio4-supply = <&vcc_1v8>; 466 + vccio5-supply = <&vcc_3v3>; 467 + vccio6-supply = <&vcc_1v8>; 468 + vccio7-supply = <&vcc_3v3>; 469 + status = "okay"; 470 + }; 471 + 472 + &saradc { 473 + vref-supply = <&vcca_1v8>; 474 + status = "okay"; 475 + }; 476 + 477 + &sdhci { 478 + bus-width = <8>; 479 + max-frequency = <200000000>; 480 + non-removable; 481 + pinctrl-names = "default"; 482 + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; 483 + vmmc-supply = <&vcc_3v3>; 484 + vqmmc-supply = <&vcc_1v8>; 485 + status = "okay"; 486 + }; 487 + 488 + &sdmmc0 { 489 + bus-width = <4>; 490 + cap-sd-highspeed; 491 + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 492 + disable-wp; 493 + pinctrl-names = "default"; 494 + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 495 + sd-uhs-sdr104; 496 + vmmc-supply = <&vcc3v3_sd>; 497 + vqmmc-supply = <&vccio_sd>; 498 + status = "okay"; 499 + }; 500 + 501 + &tsadc { 502 + rockchip,hw-tshut-mode = <1>; 503 + rockchip,hw-tshut-polarity = <0>; 504 + status = "okay"; 505 + }; 506 + 507 + &uart2 { 508 + status = "okay"; 509 + }; 510 + 511 + &usb_host0_ehci { 512 + status = "okay"; 513 + }; 514 + 515 + &usb_host0_ohci { 516 + status = "okay"; 517 + }; 518 + 519 + &usb_host0_xhci { 520 + extcon = <&usb2phy0>; 521 + status = "okay"; 522 + }; 523 + 524 + &usb_host1_ehci { 525 + status = "okay"; 526 + }; 527 + 528 + &usb_host1_ohci { 529 + status = "okay"; 530 + }; 531 + 532 + &usb_host1_xhci { 533 + status = "okay"; 534 + }; 535 + 536 + &usb2phy0 { 537 + status = "okay"; 538 + }; 539 + 540 + &usb2phy0_host { 541 + phy-supply = <&vcc5v0_usb_host>; 542 + status = "okay"; 543 + }; 544 + 545 + &usb2phy0_otg { 546 + vbus-supply = <&vcc5v0_usb_otg>; 547 + status = "okay"; 548 + }; 549 + 550 + &usb2phy1 { 551 + status = "okay"; 552 + }; 553 + 554 + &usb2phy1_host { 555 + phy-supply = <&vcc5v0_usb_host>; 556 + status = "okay"; 557 + }; 558 + 559 + &usb2phy1_otg { 560 + phy-supply = <&vcc5v0_usb_host>; 561 + status = "okay"; 562 + };
+23
arch/arm64/boot/dts/rockchip/rk3568.dtsi
··· 8 8 / { 9 9 compatible = "rockchip,rk3568"; 10 10 11 + sata0: sata@fc000000 { 12 + compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; 13 + reg = <0 0xfc000000 0 0x1000>; 14 + clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>, 15 + <&cru CLK_SATA0_RXOOB>; 16 + clock-names = "sata", "pmalive", "rxoob"; 17 + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 18 + phys = <&combphy0 PHY_TYPE_SATA>; 19 + phy-names = "sata-phy"; 20 + ports-implemented = <0x1>; 21 + power-domains = <&power RK3568_PD_PIPE>; 22 + status = "disabled"; 23 + }; 24 + 11 25 pipe_phy_grf0: syscon@fdc70000 { 12 26 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; 13 27 reg = <0x0 0xfdc70000 0x0 0x1000>; ··· 113 99 }; 114 100 }; 115 101 102 + &pipegrf { 103 + compatible = "rockchip,rk3568-pipe-grf", "syscon"; 104 + }; 105 + 116 106 &power { 117 107 power-domain@RK3568_PD_PIPE { 118 108 reg = <RK3568_PD_PIPE>; ··· 131 113 <&qos_usb3_1>; 132 114 #power-domain-cells = <0>; 133 115 }; 116 + }; 117 + 118 + &usb_host0_xhci { 119 + phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; 120 + phy-names = "usb2-phy", "usb3-phy"; 134 121 };
+73 -1
arch/arm64/boot/dts/rockchip/rk356x.dtsi
··· 230 230 }; 231 231 }; 232 232 233 + sata1: sata@fc400000 { 234 + compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; 235 + reg = <0 0xfc400000 0 0x1000>; 236 + clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>, 237 + <&cru CLK_SATA1_RXOOB>; 238 + clock-names = "sata", "pmalive", "rxoob"; 239 + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 240 + phys = <&combphy1 PHY_TYPE_SATA>; 241 + phy-names = "sata-phy"; 242 + ports-implemented = <0x1>; 243 + power-domains = <&power RK3568_PD_PIPE>; 244 + status = "disabled"; 245 + }; 246 + 247 + sata2: sata@fc800000 { 248 + compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; 249 + reg = <0 0xfc800000 0 0x1000>; 250 + clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>, 251 + <&cru CLK_SATA2_RXOOB>; 252 + clock-names = "sata", "pmalive", "rxoob"; 253 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 254 + phys = <&combphy2 PHY_TYPE_SATA>; 255 + phy-names = "sata-phy"; 256 + ports-implemented = <0x1>; 257 + power-domains = <&power RK3568_PD_PIPE>; 258 + status = "disabled"; 259 + }; 260 + 261 + usb_host0_xhci: usb@fcc00000 { 262 + compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; 263 + reg = <0x0 0xfcc00000 0x0 0x400000>; 264 + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 265 + clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>, 266 + <&cru ACLK_USB3OTG0>; 267 + clock-names = "ref_clk", "suspend_clk", 268 + "bus_clk"; 269 + dr_mode = "otg"; 270 + phy_type = "utmi_wide"; 271 + power-domains = <&power RK3568_PD_PIPE>; 272 + resets = <&cru SRST_USB3OTG0>; 273 + snps,dis_u2_susphy_quirk; 274 + status = "disabled"; 275 + }; 276 + 277 + usb_host1_xhci: usb@fd000000 { 278 + compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; 279 + reg = <0x0 0xfd000000 0x0 0x400000>; 280 + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 281 + clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>, 282 + <&cru ACLK_USB3OTG1>; 283 + clock-names = "ref_clk", "suspend_clk", 284 + "bus_clk"; 285 + dr_mode = "host"; 286 + phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>; 287 + phy-names = "usb2-phy", "usb3-phy"; 288 + phy_type = "utmi_wide"; 289 + power-domains = <&power RK3568_PD_PIPE>; 290 + resets = <&cru SRST_USB3OTG1>; 291 + snps,dis_u2_susphy_quirk; 292 + status = "disabled"; 293 + }; 294 + 233 295 gic: interrupt-controller@fd400000 { 234 296 compatible = "arm,gic-v3"; 235 297 reg = <0x0 0xfd400000 0 0x10000>, /* GICD */ ··· 359 297 }; 360 298 361 299 pipegrf: syscon@fdc50000 { 362 - compatible = "rockchip,rk3568-pipe-grf", "syscon"; 363 300 reg = <0x0 0xfdc50000 0x0 0x1000>; 364 301 }; 365 302 ··· 775 714 max-frequency = <150000000>; 776 715 resets = <&cru SRST_SDMMC1>; 777 716 reset-names = "reset"; 717 + status = "disabled"; 718 + }; 719 + 720 + sfc: spi@fe300000 { 721 + compatible = "rockchip,sfc"; 722 + reg = <0x0 0xfe300000 0x0 0x4000>; 723 + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 724 + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; 725 + clock-names = "clk_sfc", "hclk_sfc"; 726 + pinctrl-0 = <&fspi_pins>; 727 + pinctrl-names = "default"; 778 728 status = "disabled"; 779 729 }; 780 730