tjh.dev / kernel
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MIPS: Remove all the uses of custom gpio.h

Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS
machines, and each machine type provides its own gpio.h. However
only a handful really implement the GPIO API, most just forward
everythings to gpiolib.

The Alchemy machine is notable as it provides a system to allow
implementing the GPIO API at the board level. But it is not used by
any board currently supported, so it can also be removed.

For most machine types we can just remove the custom gpio.h, as well
as the custom wrappers if some exists. Some of the code found in
the wrappers must be moved to the respective GPIO driver.

A few more fixes are need in some drivers as they rely on linux/gpio.h
to provides some machine specific definitions, or used asm/gpio.h
instead of linux/gpio.h for the gpio API.

Signed-off-by: Alban Bedel <albeu@free.fr>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Joe Perches <joe@perches.com>
Cc: Daniel Walter <dwalter@google.com>
Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: James Hartley <james.hartley@imgtec.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Varka Bhadram <varkabhadram@gmail.com>
Cc: Masanari Iida <standby24x7@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Michael Buesch <m@bues.ch>
Cc: abdoulaye berthe <berthe.ab@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-ide@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-input@vger.kernel.org
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10828/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Alban Bedel and committed by
Ralf Baechle 832f5dac 1d473c2c

+45 -551
-1
arch/mips/Kconfig
··· 14 14 select HAVE_ARCH_SECCOMP_FILTER 15 15 select HAVE_ARCH_TRACEHOOK 16 16 select HAVE_BPF_JIT if !CPU_MICROMIPS 17 - select ARCH_HAVE_CUSTOM_GPIO_H 18 17 select HAVE_FUNCTION_TRACER 19 18 select HAVE_DYNAMIC_FTRACE 20 19 select HAVE_FTRACE_MCOUNT_RECORD
-7
arch/mips/alchemy/Kconfig
··· 6 6 config ALCHEMY_GPIOINT_AU1300 7 7 bool 8 8 9 - # select this in your board config if you don't want to use the gpio 10 - # namespace as documented in the manuals. In this case however you need 11 - # to create the necessary gpio_* functions in your board code/headers! 12 - # see arch/mips/include/asm/mach-au1x00/gpio.h for more information. 13 - config ALCHEMY_GPIO_INDIRECT 14 - def_bool n 15 - 16 9 choice 17 10 prompt "Machine type" 18 11 depends on MIPS_ALCHEMY
+1
arch/mips/alchemy/board-gpr.c
··· 34 34 #include <asm/idle.h> 35 35 #include <asm/reboot.h> 36 36 #include <asm/mach-au1x00/au1000.h> 37 + #include <asm/mach-au1x00/gpio-au1000.h> 37 38 #include <prom.h> 38 39 39 40 const char *get_system_type(void)
+1
arch/mips/alchemy/board-mtx1.c
··· 32 32 #include <asm/bootinfo.h> 33 33 #include <asm/reboot.h> 34 34 #include <asm/mach-au1x00/au1000.h> 35 + #include <asm/mach-au1x00/gpio-au1000.h> 35 36 #include <asm/mach-au1x00/au1xxx_eth.h> 36 37 #include <prom.h> 37 38
+1 -6
arch/mips/alchemy/common/Makefile
··· 5 5 # Makefile for the Alchemy Au1xx0 CPUs, generic files. 6 6 # 7 7 8 - obj-y += prom.o time.o clock.o platform.o power.o \ 8 + obj-y += prom.o time.o clock.o platform.o power.o gpiolib.o \ 9 9 setup.o sleeper.o dma.o dbdma.o vss.o irq.o usb.o 10 - 11 - # optional gpiolib support 12 - ifeq ($(CONFIG_ALCHEMY_GPIO_INDIRECT),) 13 - obj-$(CONFIG_GPIOLIB) += gpiolib.o 14 - endif
+1
arch/mips/alchemy/devboards/db1000.c
··· 33 33 #include <linux/spi/spi_gpio.h> 34 34 #include <linux/spi/ads7846.h> 35 35 #include <asm/mach-au1x00/au1000.h> 36 + #include <asm/mach-au1x00/gpio-au1000.h> 36 37 #include <asm/mach-au1x00/au1000_dma.h> 37 38 #include <asm/mach-au1x00/au1100_mmc.h> 38 39 #include <asm/mach-db1x00/bcsr.h>
+1
arch/mips/alchemy/devboards/db1300.c
··· 24 24 #include <linux/wm97xx.h> 25 25 26 26 #include <asm/mach-au1x00/au1000.h> 27 + #include <asm/mach-au1x00/gpio-au1300.h> 27 28 #include <asm/mach-au1x00/au1100_mmc.h> 28 29 #include <asm/mach-au1x00/au1200fb.h> 29 30 #include <asm/mach-au1x00/au1xxx_dbdma.h>
+1
arch/mips/alchemy/devboards/db1550.c
··· 20 20 #include <linux/spi/flash.h> 21 21 #include <asm/bootinfo.h> 22 22 #include <asm/mach-au1x00/au1000.h> 23 + #include <asm/mach-au1x00/gpio-au1000.h> 23 24 #include <asm/mach-au1x00/au1xxx_eth.h> 24 25 #include <asm/mach-au1x00/au1xxx_dbdma.h> 25 26 #include <asm/mach-au1x00/au1xxx_psc.h>
+1 -1
arch/mips/alchemy/devboards/pm.c
··· 9 9 #include <linux/suspend.h> 10 10 #include <linux/sysfs.h> 11 11 #include <asm/mach-au1x00/au1000.h> 12 - #include <asm/mach-au1x00/gpio.h> 12 + #include <asm/mach-au1x00/gpio-au1000.h> 13 13 #include <asm/mach-db1x00/bcsr.h> 14 14 15 15 /*
+4 -1
arch/mips/ar7/gpio.c
··· 21 21 #include <linux/module.h> 22 22 #include <linux/gpio.h> 23 23 24 - #include <asm/mach-ar7/gpio.h> 24 + #include <asm/mach-ar7/ar7.h> 25 + 26 + #define AR7_GPIO_MAX 32 27 + #define TITAN_GPIO_MAX 51 25 28 26 29 struct ar7_gpio_chip { 27 30 void __iomem *regs;
-1
arch/mips/ar7/platform.c
··· 39 39 40 40 #include <asm/addrspace.h> 41 41 #include <asm/mach-ar7/ar7.h> 42 - #include <asm/mach-ar7/gpio.h> 43 42 #include <asm/mach-ar7/prom.h> 44 43 45 44 /*****************************************************************************
-1
arch/mips/ar7/setup.c
··· 23 23 #include <asm/reboot.h> 24 24 #include <asm/mach-ar7/ar7.h> 25 25 #include <asm/mach-ar7/prom.h> 26 - #include <asm/mach-ar7/gpio.h> 27 26 28 27 static void ar7_machine_restart(char *command) 29 28 {
-6
arch/mips/include/asm/gpio.h
··· 1 - #ifndef __ASM_MIPS_GPIO_H 2 - #define __ASM_MIPS_GPIO_H 3 - 4 - #include <gpio.h> 5 - 6 - #endif /* __ASM_MIPS_GPIO_H */
+4
arch/mips/include/asm/mach-ar7/ar7.h
··· 203 203 int __init ar7_gpio_init(void); 204 204 void __init ar7_init_clocks(void); 205 205 206 + /* Board specific GPIO functions */ 207 + int ar7_gpio_enable(unsigned gpio); 208 + int ar7_gpio_disable(unsigned gpio); 209 + 206 210 #endif /* __AR7_H__ */
-41
arch/mips/include/asm/mach-ar7/gpio.h
··· 1 - /* 2 - * Copyright (C) 2007-2009 Florian Fainelli <florian@openwrt.org> 3 - * 4 - * This program is free software; you can redistribute it and/or modify 5 - * it under the terms of the GNU General Public License as published by 6 - * the Free Software Foundation; either version 2 of the License, or 7 - * (at your option) any later version. 8 - * 9 - * This program is distributed in the hope that it will be useful, 10 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 - * GNU General Public License for more details. 13 - * 14 - * You should have received a copy of the GNU General Public License 15 - * along with this program; if not, write to the Free Software 16 - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 17 - */ 18 - 19 - #ifndef __AR7_GPIO_H__ 20 - #define __AR7_GPIO_H__ 21 - 22 - #include <asm/mach-ar7/ar7.h> 23 - 24 - #define AR7_GPIO_MAX 32 25 - #define TITAN_GPIO_MAX 51 26 - #define NR_BUILTIN_GPIO TITAN_GPIO_MAX 27 - 28 - #define gpio_to_irq(gpio) -1 29 - 30 - #define gpio_get_value __gpio_get_value 31 - #define gpio_set_value __gpio_set_value 32 - 33 - #define gpio_cansleep __gpio_cansleep 34 - 35 - /* Board specific GPIO functions */ 36 - int ar7_gpio_enable(unsigned gpio); 37 - int ar7_gpio_disable(unsigned gpio); 38 - 39 - #include <asm-generic/gpio.h> 40 - 41 - #endif
-16
arch/mips/include/asm/mach-ath25/gpio.h
··· 1 - #ifndef __ASM_MACH_ATH25_GPIO_H 2 - #define __ASM_MACH_ATH25_GPIO_H 3 - 4 - #include <asm-generic/gpio.h> 5 - 6 - #define gpio_get_value __gpio_get_value 7 - #define gpio_set_value __gpio_set_value 8 - #define gpio_cansleep __gpio_cansleep 9 - #define gpio_to_irq __gpio_to_irq 10 - 11 - static inline int irq_to_gpio(unsigned irq) 12 - { 13 - return -EINVAL; 14 - } 15 - 16 - #endif /* __ASM_MACH_ATH25_GPIO_H */
-26
arch/mips/include/asm/mach-ath79/gpio.h
··· 1 - /* 2 - * Atheros AR71XX/AR724X/AR913X GPIO API definitions 3 - * 4 - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> 5 - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 6 - * 7 - * This program is free software; you can redistribute it and/or modify it 8 - * under the terms of the GNU General Public License version 2 as published 9 - * by the Free Software Foundation. 10 - * 11 - */ 12 - 13 - #ifndef __ASM_MACH_ATH79_GPIO_H 14 - #define __ASM_MACH_ATH79_GPIO_H 15 - 16 - #define ARCH_NR_GPIOS 64 17 - #include <asm-generic/gpio.h> 18 - 19 - int gpio_to_irq(unsigned gpio); 20 - int irq_to_gpio(unsigned irq); 21 - int gpio_get_value(unsigned gpio); 22 - void gpio_set_value(unsigned gpio, int value); 23 - 24 - #define gpio_cansleep __gpio_cansleep 25 - 26 - #endif /* __ASM_MACH_ATH79_GPIO_H */
+11 -137
arch/mips/include/asm/mach-au1x00/gpio-au1000.h
··· 266 266 return -ENXIO; 267 267 } 268 268 269 + /* On Au1000, Au1500 and Au1100 GPIOs won't work as inputs before 270 + * SYS_PININPUTEN is written to at least once. On Au1550/Au1200/Au1300 this 271 + * register enables use of GPIOs as wake source. 272 + */ 273 + static inline void alchemy_gpio1_input_enable(void) 274 + { 275 + void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR); 276 + __raw_writel(0, base + 0x110); /* the write op is key */ 277 + wmb(); 278 + } 279 + 269 280 /* 270 281 * GPIO2 block macros for common linux GPIO functions. The 'gpio' 271 282 * parameter must be in range of ALCHEMY_GPIO2_BASE..ALCHEMY_GPIO2_MAX. ··· 528 517 } 529 518 return -ENXIO; 530 519 } 531 - 532 - /**********************************************************************/ 533 - 534 - /* Linux gpio framework integration. 535 - * 536 - * 4 use cases of Au1000-Au1200 GPIOS: 537 - *(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y: 538 - * Board must register gpiochips. 539 - *(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n: 540 - * 2 (1 for Au1000) gpio_chips are registered. 541 - * 542 - *(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y: 543 - * the boards' gpio.h must provide the linux gpio wrapper functions, 544 - * 545 - *(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n: 546 - * inlinable gpio functions are provided which enable access to the 547 - * Au1000 gpios only by using the numbers straight out of the data- 548 - * sheets. 549 - 550 - * Cases 1 and 3 are intended for boards which want to provide their own 551 - * GPIO namespace and -operations (i.e. for example you have 8 GPIOs 552 - * which are in part provided by spare Au1000 GPIO pins and in part by 553 - * an external FPGA but you still want them to be accssible in linux 554 - * as gpio0-7. The board can of course use the alchemy_gpioX_* functions 555 - * as required). 556 - */ 557 - 558 - #ifndef CONFIG_GPIOLIB 559 - 560 - #ifdef CONFIG_ALCHEMY_GPIOINT_AU1000 561 - 562 - #ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (4) */ 563 - 564 - static inline int gpio_direction_input(int gpio) 565 - { 566 - return alchemy_gpio_direction_input(gpio); 567 - } 568 - 569 - static inline int gpio_direction_output(int gpio, int v) 570 - { 571 - return alchemy_gpio_direction_output(gpio, v); 572 - } 573 - 574 - static inline int gpio_get_value(int gpio) 575 - { 576 - return alchemy_gpio_get_value(gpio); 577 - } 578 - 579 - static inline void gpio_set_value(int gpio, int v) 580 - { 581 - alchemy_gpio_set_value(gpio, v); 582 - } 583 - 584 - static inline int gpio_get_value_cansleep(unsigned gpio) 585 - { 586 - return gpio_get_value(gpio); 587 - } 588 - 589 - static inline void gpio_set_value_cansleep(unsigned gpio, int value) 590 - { 591 - gpio_set_value(gpio, value); 592 - } 593 - 594 - static inline int gpio_is_valid(int gpio) 595 - { 596 - return alchemy_gpio_is_valid(gpio); 597 - } 598 - 599 - static inline int gpio_cansleep(int gpio) 600 - { 601 - return alchemy_gpio_cansleep(gpio); 602 - } 603 - 604 - static inline int gpio_to_irq(int gpio) 605 - { 606 - return alchemy_gpio_to_irq(gpio); 607 - } 608 - 609 - static inline int irq_to_gpio(int irq) 610 - { 611 - return alchemy_irq_to_gpio(irq); 612 - } 613 - 614 - static inline int gpio_request(unsigned gpio, const char *label) 615 - { 616 - return 0; 617 - } 618 - 619 - static inline int gpio_request_one(unsigned gpio, 620 - unsigned long flags, const char *label) 621 - { 622 - return 0; 623 - } 624 - 625 - static inline int gpio_request_array(struct gpio *array, size_t num) 626 - { 627 - return 0; 628 - } 629 - 630 - static inline void gpio_free(unsigned gpio) 631 - { 632 - } 633 - 634 - static inline void gpio_free_array(struct gpio *array, size_t num) 635 - { 636 - } 637 - 638 - static inline int gpio_set_debounce(unsigned gpio, unsigned debounce) 639 - { 640 - return -ENOSYS; 641 - } 642 - 643 - static inline int gpio_export(unsigned gpio, bool direction_may_change) 644 - { 645 - return -ENOSYS; 646 - } 647 - 648 - static inline int gpio_export_link(struct device *dev, const char *name, 649 - unsigned gpio) 650 - { 651 - return -ENOSYS; 652 - } 653 - 654 - static inline int gpio_sysfs_set_active_low(unsigned gpio, int value) 655 - { 656 - return -ENOSYS; 657 - } 658 - 659 - static inline void gpio_unexport(unsigned gpio) 660 - { 661 - } 662 - 663 - #endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */ 664 - 665 - #endif /* CONFIG_ALCHEMY_GPIOINT_AU1000 */ 666 - 667 - #endif /* !CONFIG_GPIOLIB */ 668 520 669 521 #endif /* _ALCHEMY_GPIO_AU1000_H_ */
-86
arch/mips/include/asm/mach-au1x00/gpio.h
··· 1 - /* 2 - * Alchemy GPIO support. 3 - * 4 - * With CONFIG_GPIOLIB=y different types of on-chip GPIO can be supported within 5 - * the same kernel image. 6 - * With CONFIG_GPIOLIB=n, your board must select ALCHEMY_GPIOINT_AU1XXX for the 7 - * appropriate CPU type (AU1000 currently). 8 - */ 9 - 10 - #ifndef _ALCHEMY_GPIO_H_ 11 - #define _ALCHEMY_GPIO_H_ 12 - 13 - #include <asm/mach-au1x00/au1000.h> 14 - #include <asm/mach-au1x00/gpio-au1000.h> 15 - #include <asm/mach-au1x00/gpio-au1300.h> 16 - 17 - /* On Au1000, Au1500 and Au1100 GPIOs won't work as inputs before 18 - * SYS_PININPUTEN is written to at least once. On Au1550/Au1200/Au1300 this 19 - * register enables use of GPIOs as wake source. 20 - */ 21 - static inline void alchemy_gpio1_input_enable(void) 22 - { 23 - void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR); 24 - __raw_writel(0, base + 0x110); /* the write op is key */ 25 - wmb(); 26 - } 27 - 28 - 29 - /* Linux gpio framework integration. 30 - * 31 - * 4 use cases of Alchemy GPIOS: 32 - *(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y: 33 - * Board must register gpiochips. 34 - *(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n: 35 - * A gpiochip for the 75 GPIOs is registered. 36 - * 37 - *(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y: 38 - * the boards' gpio.h must provide the linux gpio wrapper functions, 39 - * 40 - *(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n: 41 - * inlinable gpio functions are provided which enable access to the 42 - * Au1300 gpios only by using the numbers straight out of the data- 43 - * sheets. 44 - 45 - * Cases 1 and 3 are intended for boards which want to provide their own 46 - * GPIO namespace and -operations (i.e. for example you have 8 GPIOs 47 - * which are in part provided by spare Au1300 GPIO pins and in part by 48 - * an external FPGA but you still want them to be accssible in linux 49 - * as gpio0-7. The board can of course use the alchemy_gpioX_* functions 50 - * as required). 51 - */ 52 - 53 - #ifdef CONFIG_GPIOLIB 54 - 55 - /* wraps the cpu-dependent irq_to_gpio functions */ 56 - /* FIXME: gpiolib needs an irq_to_gpio hook */ 57 - static inline int __au_irq_to_gpio(unsigned int irq) 58 - { 59 - switch (alchemy_get_cputype()) { 60 - case ALCHEMY_CPU_AU1000...ALCHEMY_CPU_AU1200: 61 - return alchemy_irq_to_gpio(irq); 62 - case ALCHEMY_CPU_AU1300: 63 - return au1300_irq_to_gpio(irq); 64 - } 65 - return -EINVAL; 66 - } 67 - 68 - 69 - /* using gpiolib to provide up to 2 gpio_chips for on-chip gpios */ 70 - #ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (2) */ 71 - 72 - /* get everything through gpiolib */ 73 - #define gpio_to_irq __gpio_to_irq 74 - #define gpio_get_value __gpio_get_value 75 - #define gpio_set_value __gpio_set_value 76 - #define gpio_cansleep __gpio_cansleep 77 - #define irq_to_gpio __au_irq_to_gpio 78 - 79 - #include <asm-generic/gpio.h> 80 - 81 - #endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */ 82 - 83 - 84 - #endif /* CONFIG_GPIOLIB */ 85 - 86 - #endif /* _ALCHEMY_GPIO_H_ */
-17
arch/mips/include/asm/mach-bcm47xx/gpio.h
··· 1 - #ifndef __ASM_MIPS_MACH_BCM47XX_GPIO_H 2 - #define __ASM_MIPS_MACH_BCM47XX_GPIO_H 3 - 4 - #include <asm-generic/gpio.h> 5 - 6 - #define gpio_get_value __gpio_get_value 7 - #define gpio_set_value __gpio_set_value 8 - 9 - #define gpio_cansleep __gpio_cansleep 10 - #define gpio_to_irq __gpio_to_irq 11 - 12 - static inline int irq_to_gpio(unsigned int irq) 13 - { 14 - return -EINVAL; 15 - } 16 - 17 - #endif
-15
arch/mips/include/asm/mach-bcm63xx/gpio.h
··· 1 - #ifndef __ASM_MIPS_MACH_BCM63XX_GPIO_H 2 - #define __ASM_MIPS_MACH_BCM63XX_GPIO_H 3 - 4 - #include <bcm63xx_gpio.h> 5 - 6 - #define gpio_to_irq(gpio) -1 7 - 8 - #define gpio_get_value __gpio_get_value 9 - #define gpio_set_value __gpio_set_value 10 - 11 - #define gpio_cansleep __gpio_cansleep 12 - 13 - #include <asm-generic/gpio.h> 14 - 15 - #endif /* __ASM_MIPS_MACH_BCM63XX_GPIO_H */
-21
arch/mips/include/asm/mach-cavium-octeon/gpio.h
··· 1 - #ifndef __ASM_MACH_CAVIUM_OCTEON_GPIO_H 2 - #define __ASM_MACH_CAVIUM_OCTEON_GPIO_H 3 - 4 - #ifdef CONFIG_GPIOLIB 5 - #define gpio_get_value __gpio_get_value 6 - #define gpio_set_value __gpio_set_value 7 - #define gpio_cansleep __gpio_cansleep 8 - #else 9 - int gpio_request(unsigned gpio, const char *label); 10 - void gpio_free(unsigned gpio); 11 - int gpio_direction_input(unsigned gpio); 12 - int gpio_direction_output(unsigned gpio, int value); 13 - int gpio_get_value(unsigned gpio); 14 - void gpio_set_value(unsigned gpio, int value); 15 - #endif 16 - 17 - #include <asm-generic/gpio.h> 18 - 19 - #define gpio_to_irq __gpio_to_irq 20 - 21 - #endif /* __ASM_MACH_GENERIC_GPIO_H */
-21
arch/mips/include/asm/mach-generic/gpio.h
··· 1 - #ifndef __ASM_MACH_GENERIC_GPIO_H 2 - #define __ASM_MACH_GENERIC_GPIO_H 3 - 4 - #ifdef CONFIG_GPIOLIB 5 - #define gpio_get_value __gpio_get_value 6 - #define gpio_set_value __gpio_set_value 7 - #define gpio_cansleep __gpio_cansleep 8 - #else 9 - int gpio_request(unsigned gpio, const char *label); 10 - void gpio_free(unsigned gpio); 11 - int gpio_direction_input(unsigned gpio); 12 - int gpio_direction_output(unsigned gpio, int value); 13 - int gpio_get_value(unsigned gpio); 14 - void gpio_set_value(unsigned gpio, int value); 15 - #endif 16 - int gpio_to_irq(unsigned gpio); 17 - int irq_to_gpio(unsigned irq); 18 - 19 - #include <asm-generic/gpio.h> /* cansleep wrappers */ 20 - 21 - #endif /* __ASM_MACH_GENERIC_GPIO_H */
-2
arch/mips/include/asm/mach-jz4740/gpio.h
··· 73 73 void jz_gpio_port_set_value(int port, uint32_t value, uint32_t mask); 74 74 uint32_t jz_gpio_port_get_value(int port, uint32_t mask); 75 75 76 - #include <asm/mach-generic/gpio.h> 77 - 78 76 #define JZ_GPIO_PORTA(x) ((x) + 32 * 0) 79 77 #define JZ_GPIO_PORTB(x) ((x) + 32 * 1) 80 78 #define JZ_GPIO_PORTC(x) ((x) + 32 * 2)
-13
arch/mips/include/asm/mach-lantiq/gpio.h
··· 1 - #ifndef __ASM_MIPS_MACH_LANTIQ_GPIO_H 2 - #define __ASM_MIPS_MACH_LANTIQ_GPIO_H 3 - 4 - #define gpio_to_irq __gpio_to_irq 5 - 6 - #define gpio_get_value __gpio_get_value 7 - #define gpio_set_value __gpio_set_value 8 - 9 - #define gpio_cansleep __gpio_cansleep 10 - 11 - #include <asm-generic/gpio.h> 12 - 13 - #endif
-36
arch/mips/include/asm/mach-loongson64/gpio.h
··· 1 - /* 2 - * Loongson GPIO Support 3 - * 4 - * Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com> 5 - * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com> 6 - * Copyright (c) 2014 Huacai Chen <chenhc@lemote.com> 7 - * 8 - * This program is free software; you can redistribute it and/or modify 9 - * it under the terms of the GNU General Public License as published by 10 - * the Free Software Foundation; either version 2 of the License, or 11 - * (at your option) any later version. 12 - */ 13 - 14 - #ifndef __LOONGSON_GPIO_H 15 - #define __LOONGSON_GPIO_H 16 - 17 - #include <asm-generic/gpio.h> 18 - 19 - #define gpio_get_value __gpio_get_value 20 - #define gpio_set_value __gpio_set_value 21 - #define gpio_cansleep __gpio_cansleep 22 - 23 - /* The chip can do interrupt 24 - * but it has not been tested and doc not clear 25 - */ 26 - static inline int gpio_to_irq(int gpio) 27 - { 28 - return -EINVAL; 29 - } 30 - 31 - static inline int irq_to_gpio(int gpio) 32 - { 33 - return -EINVAL; 34 - } 35 - 36 - #endif /* __LOONGSON_GPIO_H */
-21
arch/mips/include/asm/mach-pistachio/gpio.h
··· 1 - /* 2 - * Pistachio IRQ setup 3 - * 4 - * Copyright (C) 2014 Google, Inc. 5 - * 6 - * This program is free software; you can redistribute it and/or modify it 7 - * under the terms and conditions of the GNU General Public License, 8 - * version 2, as published by the Free Software Foundation. 9 - */ 10 - 11 - #ifndef __ASM_MACH_PISTACHIO_GPIO_H 12 - #define __ASM_MACH_PISTACHIO_GPIO_H 13 - 14 - #include <asm-generic/gpio.h> 15 - 16 - #define gpio_get_value __gpio_get_value 17 - #define gpio_set_value __gpio_set_value 18 - #define gpio_cansleep __gpio_cansleep 19 - #define gpio_to_irq __gpio_to_irq 20 - 21 - #endif /* __ASM_MACH_PISTACHIO_GPIO_H */
-12
arch/mips/include/asm/mach-rc32434/gpio.h
··· 13 13 #ifndef _RC32434_GPIO_H_ 14 14 #define _RC32434_GPIO_H_ 15 15 16 - #include <linux/types.h> 17 - #include <asm-generic/gpio.h> 18 - 19 - #define NR_BUILTIN_GPIO 32 20 - 21 - #define gpio_get_value __gpio_get_value 22 - #define gpio_set_value __gpio_set_value 23 - #define gpio_cansleep __gpio_cansleep 24 - 25 - #define gpio_to_irq(gpio) (8 + 4 * 32 + gpio) 26 - #define irq_to_gpio(irq) (irq - (8 + 4 * 32)) 27 - 28 16 struct rb532_gpio_reg { 29 17 u32 gpiofunc; /* GPIO Function Register 30 18 * gpiofunc[x]==0 bit = gpio
+8 -12
arch/mips/jz4740/gpio.c
··· 231 231 return 0; 232 232 } 233 233 234 + static int jz_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) 235 + { 236 + struct jz_gpio_chip *jz_gpio = gpio_chip_to_jz_gpio_chip(chip); 237 + 238 + return jz_gpio->irq_base + gpio; 239 + } 240 + 234 241 int jz_gpio_port_direction_input(int port, uint32_t mask) 235 242 { 236 243 writel(mask, GPIO_TO_REG(port, JZ_REG_GPIO_DIRECTION_CLEAR)); ··· 268 261 return value & mask; 269 262 } 270 263 EXPORT_SYMBOL(jz_gpio_port_get_value); 271 - 272 - int gpio_to_irq(unsigned gpio) 273 - { 274 - return JZ4740_IRQ_GPIO(0) + gpio; 275 - } 276 - EXPORT_SYMBOL_GPL(gpio_to_irq); 277 - 278 - int irq_to_gpio(unsigned irq) 279 - { 280 - return irq - JZ4740_IRQ_GPIO(0); 281 - } 282 - EXPORT_SYMBOL_GPL(irq_to_gpio); 283 264 284 265 #define IRQ_TO_BIT(irq) BIT(irq_to_gpio(irq) & 0x1f) 285 266 ··· 398 403 .get = jz_gpio_get_value, \ 399 404 .direction_output = jz_gpio_direction_output, \ 400 405 .direction_input = jz_gpio_direction_input, \ 406 + .to_irq = jz_gpio_to_irq, \ 401 407 .base = JZ4740_GPIO_BASE_ ## _bank, \ 402 408 .ngpio = JZ4740_GPIO_NUM_ ## _bank, \ 403 409 }, \
-1
arch/mips/pci/pci-lantiq.c
··· 20 20 #include <linux/of_irq.h> 21 21 #include <linux/of_pci.h> 22 22 23 - #include <asm/gpio.h> 24 23 #include <asm/addrspace.h> 25 24 26 25 #include <lantiq_soc.h>
+1
arch/mips/rb532/devices.c
··· 23 23 #include <linux/mtd/nand.h> 24 24 #include <linux/mtd/mtd.h> 25 25 #include <linux/mtd/partitions.h> 26 + #include <linux/gpio.h> 26 27 #include <linux/gpio_keys.h> 27 28 #include <linux/input.h> 28 29 #include <linux/serial_8250.h>
+6
arch/mips/rb532/gpio.c
··· 140 140 return 0; 141 141 } 142 142 143 + static int rb532_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) 144 + { 145 + return 8 + 4 * 32 + gpio; 146 + } 147 + 143 148 static struct rb532_gpio_chip rb532_gpio_chip[] = { 144 149 [0] = { 145 150 .chip = { ··· 153 148 .direction_output = rb532_gpio_direction_output, 154 149 .get = rb532_gpio_get, 155 150 .set = rb532_gpio_set, 151 + .to_irq = rb532_gpio_to_irq, 156 152 .base = 0, 157 153 .ngpio = 32, 158 154 },
-16
arch/mips/txx9/generic/setup.c
··· 117 117 } 118 118 EXPORT_SYMBOL(clk_put); 119 119 120 - /* GPIO support */ 121 - 122 - #ifdef CONFIG_GPIOLIB 123 - int gpio_to_irq(unsigned gpio) 124 - { 125 - return -EINVAL; 126 - } 127 - EXPORT_SYMBOL(gpio_to_irq); 128 - 129 - int irq_to_gpio(unsigned irq) 130 - { 131 - return -EINVAL; 132 - } 133 - EXPORT_SYMBOL(irq_to_gpio); 134 - #endif 135 - 136 120 #define BOARD_VEC(board) extern struct txx9_board_vec board; 137 121 #include <asm/txx9/boards.h> 138 122 #undef BOARD_VEC
+1 -2
drivers/ata/pata_rb532_cf.c
··· 27 27 #include <linux/io.h> 28 28 #include <linux/interrupt.h> 29 29 #include <linux/irq.h> 30 + #include <linux/gpio.h> 30 31 31 32 #include <linux/libata.h> 32 33 #include <scsi/scsi_host.h> 33 - 34 - #include <asm/gpio.h> 35 34 36 35 #define DRV_NAME "pata-rb532-cf" 37 36 #define DRV_VERSION "0.1.0"
-32
drivers/gpio/gpio-ath79.c
··· 202 202 }; 203 203 204 204 module_platform_driver(ath79_gpio_driver); 205 - 206 - int gpio_get_value(unsigned gpio) 207 - { 208 - if (gpio < ath79_gpio_count) 209 - return __ath79_gpio_get_value(gpio); 210 - 211 - return __gpio_get_value(gpio); 212 - } 213 - EXPORT_SYMBOL(gpio_get_value); 214 - 215 - void gpio_set_value(unsigned gpio, int value) 216 - { 217 - if (gpio < ath79_gpio_count) 218 - __ath79_gpio_set_value(gpio, value); 219 - else 220 - __gpio_set_value(gpio, value); 221 - } 222 - EXPORT_SYMBOL(gpio_set_value); 223 - 224 - int gpio_to_irq(unsigned gpio) 225 - { 226 - /* FIXME */ 227 - return -EINVAL; 228 - } 229 - EXPORT_SYMBOL(gpio_to_irq); 230 - 231 - int irq_to_gpio(unsigned irq) 232 - { 233 - /* FIXME */ 234 - return -EINVAL; 235 - } 236 - EXPORT_SYMBOL(irq_to_gpio);
+1
drivers/input/misc/rb532_button.c
··· 7 7 #include <linux/input-polldev.h> 8 8 #include <linux/module.h> 9 9 #include <linux/platform_device.h> 10 + #include <linux/gpio.h> 10 11 11 12 #include <asm/mach-rc32434/gpio.h> 12 13 #include <asm/mach-rc32434/rb.h>
+2
drivers/net/ethernet/ti/cpmac.c
··· 41 41 #include <linux/gpio.h> 42 42 #include <linux/atomic.h> 43 43 44 + #include <asm/mach-ar7/ar7.h> 45 + 44 46 MODULE_AUTHOR("Eugene Konev <ejka@imfi.kspu.ru>"); 45 47 MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)"); 46 48 MODULE_LICENSE("GPL");