x86: PAT Update validate_pat_support for intel CPUs

Pentium III and Core Solo/Duo CPUs have an erratum
" Page with PAT set to WC while associated MTRR is UC may consolidate to UC "
which can result in WC setting in PAT to be ineffective. We will disable
PAT on such CPUs, so that we can continue to use MTRR WC setting.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

authored by venkatesh.pallipadi@intel.com and committed by Ingo Molnar 8323444b 28df82eb

+15 -2
+15 -2
arch/x86/kernel/cpu/addon_cpuid_features.c
··· 56 56 57 57 switch (c->x86_vendor) { 58 58 case X86_VENDOR_INTEL: 59 - if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15)) 59 + /* 60 + * There is a known erratum on Pentium III and Core Solo 61 + * and Core Duo CPUs. 62 + * " Page with PAT set to WC while associated MTRR is UC 63 + * may consolidate to UC " 64 + * Because of this erratum, it is better to stick with 65 + * setting WC in MTRR rather than using PAT on these CPUs. 66 + * 67 + * Enable PAT WC only on P4, Core 2 or later CPUs. 68 + */ 69 + if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15)) 60 70 return; 61 - break; 71 + 72 + pat_disable("PAT WC disabled due to known CPU erratum."); 73 + return; 74 + 62 75 case X86_VENDOR_AMD: 63 76 case X86_VENDOR_CENTAUR: 64 77 case X86_VENDOR_TRANSMETA: