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dt-bindings: net: convert mdio-mux-meson-g12a.txt to dt-schema

Convert MDIO bus multiplexer/glue of Amlogic G12a SoC family bindings
to dt-schema.

Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Neil Armstrong and committed by
Jakub Kicinski
82fc0f87 60d86034

+80 -48
+80
Documentation/devicetree/bindings/net/amlogic,g12a-mdio-mux.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: MDIO bus multiplexer/glue of Amlogic G12a SoC family 8 + 9 + description: 10 + This is a special case of a MDIO bus multiplexer. It allows to choose between 11 + the internal mdio bus leading to the embedded 10/100 PHY or the external 12 + MDIO bus. 13 + 14 + maintainers: 15 + - Neil Armstrong <neil.armstrong@linaro.org> 16 + 17 + allOf: 18 + - $ref: mdio-mux.yaml# 19 + 20 + properties: 21 + compatible: 22 + const: amlogic,g12a-mdio-mux 23 + 24 + reg: 25 + maxItems: 1 26 + 27 + clocks: 28 + items: 29 + - description: peripheral clock 30 + - description: platform crytal 31 + - description: SoC 50MHz MPLL 32 + 33 + clock-names: 34 + items: 35 + - const: pclk 36 + - const: clkin0 37 + - const: clkin1 38 + 39 + required: 40 + - compatible 41 + - reg 42 + - clocks 43 + - clock-names 44 + 45 + unevaluatedProperties: false 46 + 47 + examples: 48 + - | 49 + #include <dt-bindings/interrupt-controller/irq.h> 50 + #include <dt-bindings/interrupt-controller/arm-gic.h> 51 + mdio-multiplexer@4c000 { 52 + compatible = "amlogic,g12a-mdio-mux"; 53 + reg = <0x4c000 0xa4>; 54 + clocks = <&clkc_eth_phy>, <&xtal>, <&clkc_mpll>; 55 + clock-names = "pclk", "clkin0", "clkin1"; 56 + mdio-parent-bus = <&mdio0>; 57 + #address-cells = <1>; 58 + #size-cells = <0>; 59 + 60 + mdio@0 { 61 + reg = <0>; 62 + #address-cells = <1>; 63 + #size-cells = <0>; 64 + }; 65 + 66 + mdio@1 { 67 + reg = <1>; 68 + #address-cells = <1>; 69 + #size-cells = <0>; 70 + 71 + ethernet-phy@8 { 72 + compatible = "ethernet-phy-id0180.3301", 73 + "ethernet-phy-ieee802.3-c22"; 74 + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 75 + reg = <8>; 76 + max-speed = <100>; 77 + }; 78 + }; 79 + }; 80 + ...
-48
Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt
··· 1 - Properties for the MDIO bus multiplexer/glue of Amlogic G12a SoC family. 2 - 3 - This is a special case of a MDIO bus multiplexer. It allows to choose between 4 - the internal mdio bus leading to the embedded 10/100 PHY or the external 5 - MDIO bus. 6 - 7 - Required properties in addition to the generic multiplexer properties: 8 - - compatible : amlogic,g12a-mdio-mux 9 - - reg: physical address and length of the multiplexer/glue registers 10 - - clocks: list of clock phandle, one for each entry clock-names. 11 - - clock-names: should contain the following: 12 - * "pclk" : peripheral clock. 13 - * "clkin0" : platform crytal 14 - * "clkin1" : SoC 50MHz MPLL 15 - 16 - Example : 17 - 18 - mdio_mux: mdio-multiplexer@4c000 { 19 - compatible = "amlogic,g12a-mdio-mux"; 20 - reg = <0x0 0x4c000 0x0 0xa4>; 21 - clocks = <&clkc CLKID_ETH_PHY>, 22 - <&xtal>, 23 - <&clkc CLKID_MPLL_5OM>; 24 - clock-names = "pclk", "clkin0", "clkin1"; 25 - mdio-parent-bus = <&mdio0>; 26 - #address-cells = <1>; 27 - #size-cells = <0>; 28 - 29 - ext_mdio: mdio@0 { 30 - reg = <0>; 31 - #address-cells = <1>; 32 - #size-cells = <0>; 33 - }; 34 - 35 - int_mdio: mdio@1 { 36 - reg = <1>; 37 - #address-cells = <1>; 38 - #size-cells = <0>; 39 - 40 - internal_ephy: ethernet-phy@8 { 41 - compatible = "ethernet-phy-id0180.3301", 42 - "ethernet-phy-ieee802.3-c22"; 43 - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 44 - reg = <8>; 45 - max-speed = <100>; 46 - }; 47 - }; 48 - };