tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

drm/radeon/dpm: move platform caps fetching to a separate function

It's needed by by both the asic specific functions and the
extended table parser.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Alex Deucher and committed by
Christian König 82f79cc5 b59b7333

+68 -27
+4
drivers/gpu/drm/radeon/btc_dpm.c
··· 2601 2601 pi->min_vddc_in_table = 0; 2602 2602 pi->max_vddc_in_table = 0; 2603 2603 2604 + ret = r600_get_platform_caps(rdev); 2605 + if (ret) 2606 + return ret; 2607 + 2604 2608 ret = rv7xx_parse_power_table(rdev); 2605 2609 if (ret) 2606 2610 return ret;
+6 -3
drivers/gpu/drm/radeon/ci_dpm.c
··· 4959 4959 if (!rdev->pm.dpm.ps) 4960 4960 return -ENOMEM; 4961 4961 power_state_offset = (u8 *)state_array->states; 4962 - rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 4963 - rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 4964 - rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 4965 4962 for (i = 0; i < state_array->ucNumEntries; i++) { 4966 4963 u8 *idx; 4967 4964 power_state = (union pplib_power_state *)power_state_offset; ··· 5070 5073 pi->pcie_lane_powersaving.min = 16; 5071 5074 5072 5075 ret = ci_get_vbios_boot_values(rdev, &pi->vbios_boot_state); 5076 + if (ret) { 5077 + ci_dpm_fini(rdev); 5078 + return ret; 5079 + } 5080 + 5081 + ret = r600_get_platform_caps(rdev); 5073 5082 if (ret) { 5074 5083 ci_dpm_fini(rdev); 5075 5084 return ret;
+4
drivers/gpu/drm/radeon/cypress_dpm.c
··· 2036 2036 pi->min_vddc_in_table = 0; 2037 2037 pi->max_vddc_in_table = 0; 2038 2038 2039 + ret = r600_get_platform_caps(rdev); 2040 + if (ret) 2041 + return ret; 2042 + 2039 2043 ret = rv7xx_parse_power_table(rdev); 2040 2044 if (ret) 2041 2045 return ret;
+4 -3
drivers/gpu/drm/radeon/kv_dpm.c
··· 2538 2538 if (!rdev->pm.dpm.ps) 2539 2539 return -ENOMEM; 2540 2540 power_state_offset = (u8 *)state_array->states; 2541 - rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 2542 - rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 2543 - rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 2544 2541 for (i = 0; i < state_array->ucNumEntries; i++) { 2545 2542 u8 *idx; 2546 2543 power_state = (union pplib_power_state *)power_state_offset; ··· 2586 2589 if (pi == NULL) 2587 2590 return -ENOMEM; 2588 2591 rdev->pm.dpm.priv = pi; 2592 + 2593 + ret = r600_get_platform_caps(rdev); 2594 + if (ret) 2595 + return ret; 2589 2596 2590 2597 ret = r600_parse_extended_power_table(rdev); 2591 2598 if (ret)
+4 -3
drivers/gpu/drm/radeon/ni_dpm.c
··· 4025 4025 power_info->pplib.ucNumStates, GFP_KERNEL); 4026 4026 if (!rdev->pm.dpm.ps) 4027 4027 return -ENOMEM; 4028 - rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 4029 - rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 4030 - rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 4031 4028 4032 4029 for (i = 0; i < power_info->pplib.ucNumStates; i++) { 4033 4030 power_state = (union pplib_power_state *) ··· 4085 4088 eg_pi->acpi_vddci = 0; 4086 4089 pi->min_vddc_in_table = 0; 4087 4090 pi->max_vddc_in_table = 0; 4091 + 4092 + ret = r600_get_platform_caps(rdev); 4093 + if (ret) 4094 + return ret; 4088 4095 4089 4096 ret = ni_parse_power_table(rdev); 4090 4097 if (ret)
+20
drivers/gpu/drm/radeon/r600_dpm.c
··· 834 834 return 0; 835 835 } 836 836 837 + int r600_get_platform_caps(struct radeon_device *rdev) 838 + { 839 + struct radeon_mode_info *mode_info = &rdev->mode_info; 840 + union power_info *power_info; 841 + int index = GetIndexIntoMasterTable(DATA, PowerPlayInfo); 842 + u16 data_offset; 843 + u8 frev, crev; 844 + 845 + if (!atom_parse_data_header(mode_info->atom_context, index, NULL, 846 + &frev, &crev, &data_offset)) 847 + return -EINVAL; 848 + power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); 849 + 850 + rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 851 + rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 852 + rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 853 + 854 + return 0; 855 + } 856 + 837 857 /* sizeof(ATOM_PPLIB_EXTENDEDHEADER) */ 838 858 #define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V2 12 839 859 #define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V3 14
+2
drivers/gpu/drm/radeon/r600_dpm.h
··· 215 215 216 216 bool r600_is_internal_thermal_sensor(enum radeon_int_thermal_type sensor); 217 217 218 + int r600_get_platform_caps(struct radeon_device *rdev); 219 + 218 220 int r600_parse_extended_power_table(struct radeon_device *rdev); 219 221 void r600_free_extended_power_table(struct radeon_device *rdev); 220 222
+4 -3
drivers/gpu/drm/radeon/rs780_dpm.c
··· 807 807 power_info->pplib.ucNumStates, GFP_KERNEL); 808 808 if (!rdev->pm.dpm.ps) 809 809 return -ENOMEM; 810 - rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 811 - rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 812 - rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 813 810 814 811 for (i = 0; i < power_info->pplib.ucNumStates; i++) { 815 812 power_state = (union pplib_power_state *) ··· 855 858 if (pi == NULL) 856 859 return -ENOMEM; 857 860 rdev->pm.dpm.priv = pi; 861 + 862 + ret = r600_get_platform_caps(rdev); 863 + if (ret) 864 + return ret; 858 865 859 866 ret = rs780_parse_power_table(rdev); 860 867 if (ret)
+4 -3
drivers/gpu/drm/radeon/rv6xx_dpm.c
··· 1891 1891 power_info->pplib.ucNumStates, GFP_KERNEL); 1892 1892 if (!rdev->pm.dpm.ps) 1893 1893 return -ENOMEM; 1894 - rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 1895 - rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 1896 - rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 1897 1894 1898 1895 for (i = 0; i < power_info->pplib.ucNumStates; i++) { 1899 1896 power_state = (union pplib_power_state *) ··· 1939 1942 if (pi == NULL) 1940 1943 return -ENOMEM; 1941 1944 rdev->pm.dpm.priv = pi; 1945 + 1946 + ret = r600_get_platform_caps(rdev); 1947 + if (ret) 1948 + return ret; 1942 1949 1943 1950 ret = rv6xx_parse_power_table(rdev); 1944 1951 if (ret)
+4 -3
drivers/gpu/drm/radeon/rv770_dpm.c
··· 2281 2281 power_info->pplib.ucNumStates, GFP_KERNEL); 2282 2282 if (!rdev->pm.dpm.ps) 2283 2283 return -ENOMEM; 2284 - rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 2285 - rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 2286 - rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 2287 2284 2288 2285 for (i = 0; i < power_info->pplib.ucNumStates; i++) { 2289 2286 power_state = (union pplib_power_state *) ··· 2357 2360 pi->acpi_vddc = 0; 2358 2361 pi->min_vddc_in_table = 0; 2359 2362 pi->max_vddc_in_table = 0; 2363 + 2364 + ret = r600_get_platform_caps(rdev); 2365 + if (ret) 2366 + return ret; 2360 2367 2361 2368 ret = rv7xx_parse_power_table(rdev); 2362 2369 if (ret)
+4 -3
drivers/gpu/drm/radeon/si_dpm.c
··· 6271 6271 if (!rdev->pm.dpm.ps) 6272 6272 return -ENOMEM; 6273 6273 power_state_offset = (u8 *)state_array->states; 6274 - rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 6275 - rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 6276 - rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 6277 6274 for (i = 0; i < state_array->ucNumEntries; i++) { 6278 6275 u8 *idx; 6279 6276 power_state = (union pplib_power_state *)power_state_offset; ··· 6346 6349 eg_pi->acpi_vddci = 0; 6347 6350 pi->min_vddc_in_table = 0; 6348 6351 pi->max_vddc_in_table = 0; 6352 + 6353 + ret = r600_get_platform_caps(rdev); 6354 + if (ret) 6355 + return ret; 6349 6356 6350 6357 ret = si_parse_power_table(rdev); 6351 6358 if (ret)
+4 -3
drivers/gpu/drm/radeon/sumo_dpm.c
··· 1484 1484 if (!rdev->pm.dpm.ps) 1485 1485 return -ENOMEM; 1486 1486 power_state_offset = (u8 *)state_array->states; 1487 - rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 1488 - rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 1489 - rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 1490 1487 for (i = 0; i < state_array->ucNumEntries; i++) { 1491 1488 u8 *idx; 1492 1489 power_state = (union pplib_power_state *)power_state_offset; ··· 1768 1771 return ret; 1769 1772 1770 1773 sumo_construct_boot_and_acpi_state(rdev); 1774 + 1775 + ret = r600_get_platform_caps(rdev); 1776 + if (ret) 1777 + return ret; 1771 1778 1772 1779 ret = sumo_parse_power_table(rdev); 1773 1780 if (ret)
+4 -3
drivers/gpu/drm/radeon/trinity_dpm.c
··· 1694 1694 if (!rdev->pm.dpm.ps) 1695 1695 return -ENOMEM; 1696 1696 power_state_offset = (u8 *)state_array->states; 1697 - rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); 1698 - rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); 1699 - rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); 1700 1697 for (i = 0; i < state_array->ucNumEntries; i++) { 1701 1698 u8 *idx; 1702 1699 power_state = (union pplib_power_state *)power_state_offset; ··· 1891 1894 return ret; 1892 1895 1893 1896 trinity_construct_boot_state(rdev); 1897 + 1898 + ret = r600_get_platform_caps(rdev); 1899 + if (ret) 1900 + return ret; 1894 1901 1895 1902 ret = trinity_parse_power_table(rdev); 1896 1903 if (ret)