clk: rockchip: add 400MHz to rk3066 clock rates table

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

We need this to init PLL_CPLL to 400MHz at boot.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

authored by

Paweł Jarosz and committed by

Heiko Stuebner 9 years ago 82e56393 1dfbec39

1 changed file

expand all

drivers

clk

rockchip

clk-rk3188.c

drivers/clk/rockchip/clk-rk3188.c

··· 89 89 RK3066_PLL_RATE( 504000000, 1, 84, 4), 90 90 RK3066_PLL_RATE( 456000000, 1, 76, 4), 91 91 RK3066_PLL_RATE( 408000000, 1, 68, 4), 92 + RK3066_PLL_RATE( 400000000, 3, 100, 2), 92 93 RK3066_PLL_RATE( 384000000, 2, 128, 4), 93 94 RK3066_PLL_RATE( 360000000, 1, 60, 4), 94 95 RK3066_PLL_RATE( 312000000, 1, 52, 4),