Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915/gt: move remaining debugfs interfaces into gt

The following interfaces:

i915_wedged
i915_forcewake_user

are dependent on gt values. Put them inside gt/ and drop the
"i915_" prefix name. This would be the new structure:

dri/0/gt
|
+-- forcewake_user
|
\-- reset

For backwards compatibility with existing igt (and the slight
semantic difference between operating on the i915 abi entry
points and the deep gt info):

dri/0
|
+-- i915_wedged
|
\-- i915_forcewake_user

remain at the top level.

Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211012221738.16029-1-andi@etezian.org

authored by

Andi Shyti and committed by
Lucas De Marchi
82a149a6 b0179f0d

+111 -36
+55
drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
··· 13 13 #include "pxp/intel_pxp_debugfs.h" 14 14 #include "uc/intel_uc_debugfs.h" 15 15 16 + int intel_gt_debugfs_reset_show(struct intel_gt *gt, u64 *val) 17 + { 18 + int ret = intel_gt_terminally_wedged(gt); 19 + 20 + switch (ret) { 21 + case -EIO: 22 + *val = 1; 23 + return 0; 24 + case 0: 25 + *val = 0; 26 + return 0; 27 + default: 28 + return ret; 29 + } 30 + } 31 + 32 + int intel_gt_debugfs_reset_store(struct intel_gt *gt, u64 val) 33 + { 34 + /* Flush any previous reset before applying for a new one */ 35 + wait_event(gt->reset.queue, 36 + !test_bit(I915_RESET_BACKOFF, &gt->reset.flags)); 37 + 38 + intel_gt_handle_error(gt, val, I915_ERROR_CAPTURE, 39 + "Manually reset engine mask to %llx", val); 40 + return 0; 41 + } 42 + 43 + /* 44 + * keep the interface clean where the first parameter 45 + * is a 'struct intel_gt *' instead of 'void *' 46 + */ 47 + static int __intel_gt_debugfs_reset_show(void *data, u64 *val) 48 + { 49 + return intel_gt_debugfs_reset_show(data, val); 50 + } 51 + 52 + static int __intel_gt_debugfs_reset_store(void *data, u64 val) 53 + { 54 + return intel_gt_debugfs_reset_store(data, val); 55 + } 56 + 57 + DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show, 58 + __intel_gt_debugfs_reset_store, "%llu\n"); 59 + 60 + static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root) 61 + { 62 + static const struct intel_gt_debugfs_file files[] = { 63 + { "reset", &reset_fops, NULL }, 64 + }; 65 + 66 + intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt); 67 + } 68 + 16 69 void intel_gt_debugfs_register(struct intel_gt *gt) 17 70 { 18 71 struct dentry *root; ··· 76 23 root = debugfs_create_dir("gt", gt->i915->drm.primary->debugfs_root); 77 24 if (IS_ERR(root)) 78 25 return; 26 + 27 + gt_debugfs_register(gt, root); 79 28 80 29 intel_gt_engines_debugfs_register(gt, root); 81 30 intel_gt_pm_debugfs_register(gt, root);
+4
drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
··· 35 35 const struct intel_gt_debugfs_file *files, 36 36 unsigned long count, void *data); 37 37 38 + /* functions that need to be accessed by the upper level non-gt interfaces */ 39 + int intel_gt_debugfs_reset_show(struct intel_gt *gt, u64 *val); 40 + int intel_gt_debugfs_reset_store(struct intel_gt *gt, u64 val); 41 + 38 42 #endif /* INTEL_GT_DEBUGFS_H */
+41
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
··· 19 19 #include "intel_sideband.h" 20 20 #include "intel_uncore.h" 21 21 22 + int intel_gt_pm_debugfs_forcewake_user_open(struct intel_gt *gt) 23 + { 24 + atomic_inc(&gt->user_wakeref); 25 + intel_gt_pm_get(gt); 26 + if (GRAPHICS_VER(gt->i915) >= 6) 27 + intel_uncore_forcewake_user_get(gt->uncore); 28 + 29 + return 0; 30 + } 31 + 32 + int intel_gt_pm_debugfs_forcewake_user_release(struct intel_gt *gt) 33 + { 34 + if (GRAPHICS_VER(gt->i915) >= 6) 35 + intel_uncore_forcewake_user_put(gt->uncore); 36 + intel_gt_pm_put(gt); 37 + atomic_dec(&gt->user_wakeref); 38 + 39 + return 0; 40 + } 41 + 42 + static int forcewake_user_open(struct inode *inode, struct file *file) 43 + { 44 + struct intel_gt *gt = inode->i_private; 45 + 46 + return intel_gt_pm_debugfs_forcewake_user_open(gt); 47 + } 48 + 49 + static int forcewake_user_release(struct inode *inode, struct file *file) 50 + { 51 + struct intel_gt *gt = inode->i_private; 52 + 53 + return intel_gt_pm_debugfs_forcewake_user_release(gt); 54 + } 55 + 56 + static const struct file_operations forcewake_user_fops = { 57 + .owner = THIS_MODULE, 58 + .open = forcewake_user_open, 59 + .release = forcewake_user_release, 60 + }; 61 + 22 62 static int fw_domains_show(struct seq_file *m, void *data) 23 63 { 24 64 struct intel_gt *gt = m->private; ··· 667 627 { "drpc", &drpc_fops, NULL }, 668 628 { "frequency", &frequency_fops, NULL }, 669 629 { "forcewake", &fw_domains_fops, NULL }, 630 + { "forcewake_user", &forcewake_user_fops, NULL}, 670 631 { "llc", &llc_fops, llc_eval }, 671 632 { "rps_boost", &rps_boost_fops, rps_eval }, 672 633 };
+4
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
··· 13 13 void intel_gt_pm_debugfs_register(struct intel_gt *gt, struct dentry *root); 14 14 void intel_gt_pm_frequency_dump(struct intel_gt *gt, struct drm_printer *m); 15 15 16 + /* functions that need to be accessed by the upper level non-gt interfaces */ 17 + int intel_gt_pm_debugfs_forcewake_user_open(struct intel_gt *gt); 18 + int intel_gt_pm_debugfs_forcewake_user_release(struct intel_gt *gt); 19 + 16 20 #endif /* INTEL_GT_PM_DEBUGFS_H */
+7 -36
drivers/gpu/drm/i915/i915_debugfs.c
··· 35 35 #include "gt/intel_gt.h" 36 36 #include "gt/intel_gt_buffer_pool.h" 37 37 #include "gt/intel_gt_clock_utils.h" 38 + #include "gt/intel_gt_debugfs.h" 38 39 #include "gt/intel_gt_pm.h" 39 40 #include "gt/intel_gt_pm_debugfs.h" 40 41 #include "gt/intel_gt_requests.h" ··· 555 554 return 0; 556 555 } 557 556 558 - static int 559 - i915_wedged_get(void *data, u64 *val) 557 + static int i915_wedged_get(void *data, u64 *val) 560 558 { 561 559 struct drm_i915_private *i915 = data; 562 - int ret = intel_gt_terminally_wedged(&i915->gt); 563 560 564 - switch (ret) { 565 - case -EIO: 566 - *val = 1; 567 - return 0; 568 - case 0: 569 - *val = 0; 570 - return 0; 571 - default: 572 - return ret; 573 - } 561 + return intel_gt_debugfs_reset_show(&i915->gt, val); 574 562 } 575 563 576 - static int 577 - i915_wedged_set(void *data, u64 val) 564 + static int i915_wedged_set(void *data, u64 val) 578 565 { 579 566 struct drm_i915_private *i915 = data; 580 567 581 - /* Flush any previous reset before applying for a new one */ 582 - wait_event(i915->gt.reset.queue, 583 - !test_bit(I915_RESET_BACKOFF, &i915->gt.reset.flags)); 584 - 585 - intel_gt_handle_error(&i915->gt, val, I915_ERROR_CAPTURE, 586 - "Manually set wedged engine mask = %llx", val); 587 - return 0; 568 + return intel_gt_debugfs_reset_store(&i915->gt, val); 588 569 } 589 570 590 571 DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops, ··· 711 728 static int i915_forcewake_open(struct inode *inode, struct file *file) 712 729 { 713 730 struct drm_i915_private *i915 = inode->i_private; 714 - struct intel_gt *gt = &i915->gt; 715 731 716 - atomic_inc(&gt->user_wakeref); 717 - intel_gt_pm_get(gt); 718 - if (GRAPHICS_VER(i915) >= 6) 719 - intel_uncore_forcewake_user_get(gt->uncore); 720 - 721 - return 0; 732 + return intel_gt_pm_debugfs_forcewake_user_open(&i915->gt); 722 733 } 723 734 724 735 static int i915_forcewake_release(struct inode *inode, struct file *file) 725 736 { 726 737 struct drm_i915_private *i915 = inode->i_private; 727 - struct intel_gt *gt = &i915->gt; 728 738 729 - if (GRAPHICS_VER(i915) >= 6) 730 - intel_uncore_forcewake_user_put(&i915->uncore); 731 - intel_gt_pm_put(gt); 732 - atomic_dec(&gt->user_wakeref); 733 - 734 - return 0; 739 + return intel_gt_pm_debugfs_forcewake_user_release(&i915->gt); 735 740 } 736 741 737 742 static const struct file_operations i915_forcewake_fops = {