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Merge series "spi: spi-zynqmp-gpspi: fix some issues" from quanyang.wang@windriver.com Quanyang Wang <quanyang.wang@windriver.com>:

From: Quanyang Wang <quanyang.wang@windriver.com>

Hello,

This series fix some issues that occurs when the gqspi driver switches to spi-mem framework.

Hi Amit,
I rewrite the "Subject" and "commit message" of these patches, so they
look different from the ones which you reviewed before. I still keep
your "Reviewed-by" and hope you will not mind.

Regards,
Quanyang Wang

Quanyang Wang (4):
spi: spi-zynqmp-gqspi: use wait_for_completion_timeout to make
zynqmp_qspi_exec_op not interruptible
spi: spi-zynqmp-gqspi: add mutex locking for exec_op
spi: spi-zynqmp-gqspi: transmit dummy circles by using the
controller's internal functionality
spi: spi-zynqmp-gqspi: fix incorrect operating mode in
zynqmp_qspi_read_op

drivers/spi/spi-zynqmp-gqspi.c | 53 +++++++++++++++++-----------------
1 file changed, 27 insertions(+), 26 deletions(-)

--
2.25.1

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+27 -26
+27 -26
drivers/spi/spi-zynqmp-gqspi.c
··· 173 173 u32 genfifoentry; 174 174 enum mode_type mode; 175 175 struct completion data_completion; 176 + struct mutex op_lock; 176 177 }; 177 178 178 179 /** ··· 521 520 { 522 521 u32 count = 0, intermediate; 523 522 524 - while ((xqspi->bytes_to_transfer > 0) && (count < size)) { 523 + while ((xqspi->bytes_to_transfer > 0) && (count < size) && (xqspi->txbuf)) { 525 524 memcpy(&intermediate, xqspi->txbuf, 4); 526 525 zynqmp_gqspi_write(xqspi, GQSPI_TXD_OFST, intermediate); 527 526 ··· 580 579 genfifoentry |= GQSPI_GENFIFO_DATA_XFER; 581 580 genfifoentry |= GQSPI_GENFIFO_TX; 582 581 transfer_len = xqspi->bytes_to_transfer; 583 - } else { 582 + } else if (xqspi->rxbuf) { 584 583 genfifoentry &= ~GQSPI_GENFIFO_TX; 585 584 genfifoentry |= GQSPI_GENFIFO_DATA_XFER; 586 585 genfifoentry |= GQSPI_GENFIFO_RX; ··· 588 587 transfer_len = xqspi->dma_rx_bytes; 589 588 else 590 589 transfer_len = xqspi->bytes_to_receive; 590 + } else { 591 + /* Sending dummy circles here */ 592 + genfifoentry &= ~(GQSPI_GENFIFO_TX | GQSPI_GENFIFO_RX); 593 + genfifoentry |= GQSPI_GENFIFO_DATA_XFER; 594 + transfer_len = xqspi->bytes_to_transfer; 591 595 } 592 596 genfifoentry |= zynqmp_qspi_selectspimode(xqspi, nbits); 593 597 xqspi->genfifoentry = genfifoentry; ··· 827 821 static void zynqmp_qspi_read_op(struct zynqmp_qspi *xqspi, u8 rx_nbits, 828 822 u32 genfifoentry) 829 823 { 830 - zynqmp_qspi_fillgenfifo(xqspi, rx_nbits, genfifoentry); 831 824 zynqmp_qspi_setuprxdma(xqspi); 825 + zynqmp_qspi_fillgenfifo(xqspi, rx_nbits, genfifoentry); 832 826 } 833 827 834 828 /** ··· 957 951 op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth, 958 952 op->dummy.buswidth, op->data.buswidth); 959 953 954 + mutex_lock(&xqspi->op_lock); 960 955 zynqmp_qspi_config_op(xqspi, mem->spi); 961 956 zynqmp_qspi_chipselect(mem->spi, false); 962 957 genfifoentry |= xqspi->genfifocs; ··· 980 973 zynqmp_gqspi_write(xqspi, GQSPI_IER_OFST, 981 974 GQSPI_IER_GENFIFOEMPTY_MASK | 982 975 GQSPI_IER_TXNOT_FULL_MASK); 983 - if (!wait_for_completion_interruptible_timeout 976 + if (!wait_for_completion_timeout 984 977 (&xqspi->data_completion, msecs_to_jiffies(1000))) { 985 978 err = -ETIMEDOUT; 986 979 kfree(tmpbuf); ··· 1008 1001 GQSPI_IER_TXEMPTY_MASK | 1009 1002 GQSPI_IER_GENFIFOEMPTY_MASK | 1010 1003 GQSPI_IER_TXNOT_FULL_MASK); 1011 - if (!wait_for_completion_interruptible_timeout 1004 + if (!wait_for_completion_timeout 1012 1005 (&xqspi->data_completion, msecs_to_jiffies(1000))) { 1013 1006 err = -ETIMEDOUT; 1014 1007 goto return_err; ··· 1016 1009 } 1017 1010 1018 1011 if (op->dummy.nbytes) { 1019 - tmpbuf = kzalloc(op->dummy.nbytes, GFP_KERNEL | GFP_DMA); 1020 - if (!tmpbuf) 1021 - return -ENOMEM; 1022 - memset(tmpbuf, 0xff, op->dummy.nbytes); 1023 - reinit_completion(&xqspi->data_completion); 1024 - xqspi->txbuf = tmpbuf; 1012 + xqspi->txbuf = NULL; 1025 1013 xqspi->rxbuf = NULL; 1026 - xqspi->bytes_to_transfer = op->dummy.nbytes; 1014 + /* 1015 + * xqspi->bytes_to_transfer here represents the dummy circles 1016 + * which need to be sent. 1017 + */ 1018 + xqspi->bytes_to_transfer = op->dummy.nbytes * 8 / op->dummy.buswidth; 1027 1019 xqspi->bytes_to_receive = 0; 1028 - zynqmp_qspi_write_op(xqspi, op->dummy.buswidth, 1020 + /* 1021 + * Using op->data.buswidth instead of op->dummy.buswidth here because 1022 + * we need to use it to configure the correct SPI mode. 1023 + */ 1024 + zynqmp_qspi_write_op(xqspi, op->data.buswidth, 1029 1025 genfifoentry); 1030 1026 zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, 1031 1027 zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST) | 1032 1028 GQSPI_CFG_START_GEN_FIFO_MASK); 1033 - zynqmp_gqspi_write(xqspi, GQSPI_IER_OFST, 1034 - GQSPI_IER_TXEMPTY_MASK | 1035 - GQSPI_IER_GENFIFOEMPTY_MASK | 1036 - GQSPI_IER_TXNOT_FULL_MASK); 1037 - if (!wait_for_completion_interruptible_timeout 1038 - (&xqspi->data_completion, msecs_to_jiffies(1000))) { 1039 - err = -ETIMEDOUT; 1040 - kfree(tmpbuf); 1041 - goto return_err; 1042 - } 1043 - 1044 - kfree(tmpbuf); 1045 1029 } 1046 1030 1047 1031 if (op->data.nbytes) { ··· 1074 1076 GQSPI_IER_RXEMPTY_MASK); 1075 1077 } 1076 1078 } 1077 - if (!wait_for_completion_interruptible_timeout 1079 + if (!wait_for_completion_timeout 1078 1080 (&xqspi->data_completion, msecs_to_jiffies(1000))) 1079 1081 err = -ETIMEDOUT; 1080 1082 } ··· 1082 1084 return_err: 1083 1085 1084 1086 zynqmp_qspi_chipselect(mem->spi, true); 1087 + mutex_unlock(&xqspi->op_lock); 1085 1088 1086 1089 return err; 1087 1090 } ··· 1154 1155 dev_err(dev, "Unable to enable device clock.\n"); 1155 1156 goto clk_dis_pclk; 1156 1157 } 1158 + 1159 + mutex_init(&xqspi->op_lock); 1157 1160 1158 1161 pm_runtime_use_autosuspend(&pdev->dev); 1159 1162 pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT);