Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

staging: iio: accel: adis16204: Fix 'line over 80 characters' warning

Many of the comments in the same lines with #define
caused checkpatch warning 'line over 80 characters'.

Move all such comments to line before #define.
This style is already used in some other .h files in accel:

Add blank lines after #define to improve readability.

Signed-off-by: Svetlana Orlik <sveta.orlik.code@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Svetlana Orlik and committed by
Greg Kroah-Hartman
81da8a89 3261c31c

+118 -41
+118 -41
drivers/staging/iio/accel/adis16204.h
··· 3 3 4 4 #define ADIS16204_STARTUP_DELAY 220 /* ms */ 5 5 6 - #define ADIS16204_FLASH_CNT 0x00 /* Flash memory write count */ 7 - #define ADIS16204_SUPPLY_OUT 0x02 /* Output, power supply */ 8 - #define ADIS16204_XACCL_OUT 0x04 /* Output, x-axis accelerometer */ 9 - #define ADIS16204_YACCL_OUT 0x06 /* Output, y-axis accelerometer */ 10 - #define ADIS16204_AUX_ADC 0x08 /* Output, auxiliary ADC input */ 11 - #define ADIS16204_TEMP_OUT 0x0A /* Output, temperature */ 12 - #define ADIS16204_X_PEAK_OUT 0x0C /* Twos complement */ 13 - #define ADIS16204_Y_PEAK_OUT 0x0E /* Twos complement */ 14 - #define ADIS16204_XACCL_NULL 0x10 /* Calibration, x-axis acceleration offset null */ 15 - #define ADIS16204_YACCL_NULL 0x12 /* Calibration, y-axis acceleration offset null */ 16 - #define ADIS16204_XACCL_SCALE 0x14 /* X-axis scale factor calibration register */ 17 - #define ADIS16204_YACCL_SCALE 0x16 /* Y-axis scale factor calibration register */ 18 - #define ADIS16204_XY_RSS_OUT 0x18 /* XY combined acceleration (RSS) */ 19 - #define ADIS16204_XY_PEAK_OUT 0x1A /* Peak, XY combined output (RSS) */ 20 - #define ADIS16204_CAP_BUF_1 0x1C /* Capture buffer output register 1 */ 21 - #define ADIS16204_CAP_BUF_2 0x1E /* Capture buffer output register 2 */ 22 - #define ADIS16204_ALM_MAG1 0x20 /* Alarm 1 amplitude threshold */ 23 - #define ADIS16204_ALM_MAG2 0x22 /* Alarm 2 amplitude threshold */ 24 - #define ADIS16204_ALM_CTRL 0x28 /* Alarm control */ 25 - #define ADIS16204_CAPT_PNTR 0x2A /* Capture register address pointer */ 26 - #define ADIS16204_AUX_DAC 0x30 /* Auxiliary DAC data */ 27 - #define ADIS16204_GPIO_CTRL 0x32 /* General-purpose digital input/output control */ 28 - #define ADIS16204_MSC_CTRL 0x34 /* Miscellaneous control */ 29 - #define ADIS16204_SMPL_PRD 0x36 /* Internal sample period (rate) control */ 30 - #define ADIS16204_AVG_CNT 0x38 /* Operation, filter configuration */ 31 - #define ADIS16204_SLP_CNT 0x3A /* Operation, sleep mode control */ 32 - #define ADIS16204_DIAG_STAT 0x3C /* Diagnostics, system status register */ 33 - #define ADIS16204_GLOB_CMD 0x3E /* Operation, system command register */ 6 + /* Flash memory write count */ 7 + #define ADIS16204_FLASH_CNT 0x00 8 + 9 + /* Output, power supply */ 10 + #define ADIS16204_SUPPLY_OUT 0x02 11 + 12 + /* Output, x-axis accelerometer */ 13 + #define ADIS16204_XACCL_OUT 0x04 14 + 15 + /* Output, y-axis accelerometer */ 16 + #define ADIS16204_YACCL_OUT 0x06 17 + 18 + /* Output, auxiliary ADC input */ 19 + #define ADIS16204_AUX_ADC 0x08 20 + 21 + /* Output, temperature */ 22 + #define ADIS16204_TEMP_OUT 0x0A 23 + 24 + /* Twos complement */ 25 + #define ADIS16204_X_PEAK_OUT 0x0C 26 + #define ADIS16204_Y_PEAK_OUT 0x0E 27 + 28 + /* Calibration, x-axis acceleration offset null */ 29 + #define ADIS16204_XACCL_NULL 0x10 30 + 31 + /* Calibration, y-axis acceleration offset null */ 32 + #define ADIS16204_YACCL_NULL 0x12 33 + 34 + /* X-axis scale factor calibration register */ 35 + #define ADIS16204_XACCL_SCALE 0x14 36 + 37 + /* Y-axis scale factor calibration register */ 38 + #define ADIS16204_YACCL_SCALE 0x16 39 + 40 + /* XY combined acceleration (RSS) */ 41 + #define ADIS16204_XY_RSS_OUT 0x18 42 + 43 + /* Peak, XY combined output (RSS) */ 44 + #define ADIS16204_XY_PEAK_OUT 0x1A 45 + 46 + /* Capture buffer output register 1 */ 47 + #define ADIS16204_CAP_BUF_1 0x1C 48 + 49 + /* Capture buffer output register 2 */ 50 + #define ADIS16204_CAP_BUF_2 0x1E 51 + 52 + /* Alarm 1 amplitude threshold */ 53 + #define ADIS16204_ALM_MAG1 0x20 54 + 55 + /* Alarm 2 amplitude threshold */ 56 + #define ADIS16204_ALM_MAG2 0x22 57 + 58 + /* Alarm control */ 59 + #define ADIS16204_ALM_CTRL 0x28 60 + 61 + /* Capture register address pointer */ 62 + #define ADIS16204_CAPT_PNTR 0x2A 63 + 64 + /* Auxiliary DAC data */ 65 + #define ADIS16204_AUX_DAC 0x30 66 + 67 + /* General-purpose digital input/output control */ 68 + #define ADIS16204_GPIO_CTRL 0x32 69 + 70 + /* Miscellaneous control */ 71 + #define ADIS16204_MSC_CTRL 0x34 72 + 73 + /* Internal sample period (rate) control */ 74 + #define ADIS16204_SMPL_PRD 0x36 75 + 76 + /* Operation, filter configuration */ 77 + #define ADIS16204_AVG_CNT 0x38 78 + 79 + /* Operation, sleep mode control */ 80 + #define ADIS16204_SLP_CNT 0x3A 81 + 82 + /* Diagnostics, system status register */ 83 + #define ADIS16204_DIAG_STAT 0x3C 84 + 85 + /* Operation, system command register */ 86 + #define ADIS16204_GLOB_CMD 0x3E 34 87 35 88 /* MSC_CTRL */ 36 - #define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST BIT(10) /* Self-test at power-on: 1 = disabled, 0 = enabled */ 37 - #define ADIS16204_MSC_CTRL_SELF_TEST_EN BIT(8) /* Self-test enable */ 38 - #define ADIS16204_MSC_CTRL_DATA_RDY_EN BIT(2) /* Data-ready enable: 1 = enabled, 0 = disabled */ 39 - #define ADIS16204_MSC_CTRL_ACTIVE_HIGH BIT(1) /* Data-ready polarity: 1 = active high, 0 = active low */ 40 - #define ADIS16204_MSC_CTRL_DATA_RDY_DIO2 BIT(0) /* Data-ready line selection: 1 = DIO2, 0 = DIO1 */ 89 + 90 + /* Self-test at power-on: 1 = disabled, 0 = enabled */ 91 + #define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST BIT(10) 92 + 93 + /* Self-test enable */ 94 + #define ADIS16204_MSC_CTRL_SELF_TEST_EN BIT(8) 95 + 96 + /* Data-ready enable: 1 = enabled, 0 = disabled */ 97 + #define ADIS16204_MSC_CTRL_DATA_RDY_EN BIT(2) 98 + 99 + /* Data-ready polarity: 1 = active high, 0 = active low */ 100 + #define ADIS16204_MSC_CTRL_ACTIVE_HIGH BIT(1) 101 + 102 + /* Data-ready line selection: 1 = DIO2, 0 = DIO1 */ 103 + #define ADIS16204_MSC_CTRL_DATA_RDY_DIO2 BIT(0) 41 104 42 105 /* DIAG_STAT */ 43 - #define ADIS16204_DIAG_STAT_ALARM2 BIT(9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */ 44 - #define ADIS16204_DIAG_STAT_ALARM1 BIT(8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */ 45 - #define ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT 5 /* Self-test diagnostic error flag: 1 = error condition, 46 - 0 = normal operation */ 47 - #define ADIS16204_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */ 48 - #define ADIS16204_DIAG_STAT_FLASH_UPT_BIT 2 /* Flash update failure */ 49 - #define ADIS16204_DIAG_STAT_POWER_HIGH_BIT 1 /* Power supply above 3.625 V */ 50 - #define ADIS16204_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 2.975 V */ 106 + 107 + /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */ 108 + #define ADIS16204_DIAG_STAT_ALARM2 BIT(9) 109 + 110 + /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */ 111 + #define ADIS16204_DIAG_STAT_ALARM1 BIT(8) 112 + 113 + /* Self-test diagnostic error flag: 1 = error condition, 0 = normal operation */ 114 + #define ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT 5 115 + 116 + /* SPI communications failure */ 117 + #define ADIS16204_DIAG_STAT_SPI_FAIL_BIT 3 118 + 119 + /* Flash update failure */ 120 + #define ADIS16204_DIAG_STAT_FLASH_UPT_BIT 2 121 + 122 + /* Power supply above 3.625 V */ 123 + #define ADIS16204_DIAG_STAT_POWER_HIGH_BIT 1 124 + 125 + /* Power supply below 2.975 V */ 126 + #define ADIS16204_DIAG_STAT_POWER_LOW_BIT 0 51 127 52 128 /* GLOB_CMD */ 129 + 53 130 #define ADIS16204_GLOB_CMD_SW_RESET BIT(7) 54 131 #define ADIS16204_GLOB_CMD_CLEAR_STAT BIT(4) 55 132 #define ADIS16204_GLOB_CMD_FACTORY_CAL BIT(1)