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linux
drm/amd/display: cleaning up smu_if to add future flexibility
This commit cleans up code that uses old variables and adds some SMU
interfaces for future flexibility.
Signed-off-by: Martin Leung <Martin.Leung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Martin Leung
and committed by
Alex Deucher
80fb7a40
214d72f6
+78
-16
+9
-10
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c
+9
-10
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c
···
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#include "clk_mgr_internal.h"
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#include "reg_helper.h"
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#include "dalsmc.h"
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#include "smu13_driver_if.h"
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#define mmDAL_MSG_REG 0x1628A
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#define mmDAL_ARG_REG 0x16273
···
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mm ## reg_name
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#include "logger_types.h"
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#include "dalsmc.h"
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#include "smu13_driver_if.h"
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#define smu_print(str, ...) {DC_LOG_SMU(str, ##__VA_ARGS__); }
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···
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DALSMC_MSG_SetFclkSwitchAllow, enable ? FCLK_PSTATE_SUPPORTED : FCLK_PSTATE_NOTSUPPORTED, NULL);
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}
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void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr)
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{
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smu_print("SMU Transfer WM table DRAM 2 SMU\n");
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-
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dcn32_smu_send_msg_with_param(clk_mgr,
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DALSMC_MSG_TransferTableDram2Smu, TABLE_WATERMARKS, NULL);
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}
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-
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void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways)
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{
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smu_print("Numways for SubVP : %d\n", num_ways);
···
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dcn32_smu_send_msg_with_param(clk_mgr, DALSMC_MSG_SetCabForUclkPstate, num_ways, NULL);
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}
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void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr)
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{
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smu_print("SMU Transfer WM table DRAM 2 SMU\n");
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dcn32_smu_send_msg_with_param(clk_mgr,
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DALSMC_MSG_TransferTableDram2Smu, TABLE_WATERMARKS, NULL);
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}
+2
-5
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h
+2
-5
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h
···
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#define DALSMC_Result_OK 0x1
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void
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dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr,
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bool enable);
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-
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dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr, bool enable);
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void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);
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-
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void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways);
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-
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void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);
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#endif /* __DCN32_CLK_MGR_SMU_MSG_H_ */
+63
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_smu13_driver_if.h
+63
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_smu13_driver_if.h
···
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// This is a stripped-down version of the smu13_driver_if.h file for the relevant DAL interfaces.
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#define SMU13_DRIVER_IF_VERSION 0x18
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//Only Clks that have DPM descriptors are listed here
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typedef enum {
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PPCLK_GFXCLK = 0,
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PPCLK_SOCCLK,
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PPCLK_UCLK,
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PPCLK_FCLK,
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PPCLK_DCLK_0,
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PPCLK_VCLK_0,
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PPCLK_DCLK_1,
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PPCLK_VCLK_1,
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PPCLK_DISPCLK,
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PPCLK_DPPCLK,
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PPCLK_DPREFCLK,
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PPCLK_DCFCLK,
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PPCLK_DTBCLK,
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PPCLK_COUNT,
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} PPCLK_e;
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typedef struct {
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uint8_t WmSetting;
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uint8_t Flags;
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uint8_t Padding[2];
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} WatermarkRowGeneric_t;
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#define NUM_WM_RANGES 4
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typedef enum {
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WATERMARKS_CLOCK_RANGE = 0,
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WATERMARKS_DUMMY_PSTATE,
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WATERMARKS_MALL,
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WATERMARKS_COUNT,
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} WATERMARKS_FLAGS_e;
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typedef struct {
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// Watermarks
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WatermarkRowGeneric_t WatermarkRow[NUM_WM_RANGES];
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} Watermarks_t;
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typedef struct {
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Watermarks_t Watermarks;
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uint32_t Spare[16];
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uint32_t MmHubPadding[8]; // SMU internal use
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} WatermarksExternal_t;
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// Table types
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#define TABLE_PMFW_PPTABLE 0
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#define TABLE_COMBO_PPTABLE 1
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#define TABLE_WATERMARKS 2
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#define TABLE_AVFS_PSM_DEBUG 3
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#define TABLE_PMSTATUSLOG 4
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#define TABLE_SMU_METRICS 5
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#define TABLE_DRIVER_SMU_CONFIG 6
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#define TABLE_ACTIVITY_MONITOR_COEFF 7
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#define TABLE_OVERDRIVE 8
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#define TABLE_I2C_COMMANDS 9
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#define TABLE_DRIVER_INFO 10
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#define TABLE_COUNT 11
+4
-1
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
+4
-1
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c