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MIPS: Always use -Wa,-msoft-float and eliminate GAS_HAS_SET_HARDFLOAT

-Wa,-msoft-float is tested with as-option, which will be a problem for
clang with an upcoming change to move as-option to use KBUILD_AFLAGS
instead of KBUILD_CFLAGS due to a lack of '-mno-abicalls' in
KBUILD_AFLAGS at the point that this check occurs; $(cflags-y) is added
to KBUILD_AFLAGS towards the end of this file.

clang: error: ignoring '-fno-PIE' option as it cannot be used with implicit usage of -mabicalls and the N64 ABI [-Werror,-Woption-ignored]

This could be resolved by switching to a cc-option check but
'$(cflags-y)' would need to be added so that '-mno-abicalls' is present
for the test. However, this check is no longer necessary, as
-msoft-float is supported by all supported assembler versions (GNU as
2.25+ and LLVM 11+). Eliminate GAS_HAS_SET_HARDFLOAT and all of its
uses, inlining SET_HARDFLOAT where necessary.

Link: https://lore.kernel.org/202209101939.bvk64Fok-lkp@intel.com/
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>

authored by

Nathan Chancellor and committed by
Masahiro Yamada 80a20d2f 994f5f78

+40 -75
+1 -10
arch/mips/Makefile
··· 95 95 # crossformat linking we rely on the elf2ecoff tool for format conversion. 96 96 # 97 97 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe 98 - cflags-y += -msoft-float 98 + cflags-y += -msoft-float -Wa,-msoft-float 99 99 LDFLAGS_vmlinux += -G 0 -static -n -nostdlib 100 100 KBUILD_AFLAGS_MODULE += -mlong-calls 101 101 KBUILD_CFLAGS_MODULE += -mlong-calls 102 102 103 103 ifeq ($(CONFIG_RELOCATABLE),y) 104 104 LDFLAGS_vmlinux += --emit-relocs 105 - endif 106 - 107 - # 108 - # pass -msoft-float to GAS if it supports it. However on newer binutils 109 - # (specifically newer than 2.24.51.20140728) we then also need to explicitly 110 - # set ".set hardfloat" in all files which manipulate floating point registers. 111 - # 112 - ifneq ($(call as-option,-Wa$(comma)-msoft-float,),) 113 - cflags-y += -DGAS_HAS_SET_HARDFLOAT -Wa,-msoft-float 114 105 endif 115 106 116 107 cflags-y += -ffreestanding
+2 -2
arch/mips/include/asm/asmmacro-32.h
··· 15 15 16 16 .macro fpu_save_single thread tmp=t0 17 17 .set push 18 - SET_HARDFLOAT 18 + .set hardfloat 19 19 cfc1 \tmp, fcr31 20 20 s.d $f0, THREAD_FPR0(\thread) 21 21 s.d $f2, THREAD_FPR2(\thread) ··· 39 39 40 40 .macro fpu_restore_single thread tmp=t0 41 41 .set push 42 - SET_HARDFLOAT 42 + .set hardfloat 43 43 lw \tmp, THREAD_FCR31(\thread) 44 44 l.d $f0, THREAD_FPR0(\thread) 45 45 l.d $f2, THREAD_FPR2(\thread)
+21 -21
arch/mips/include/asm/asmmacro.h
··· 83 83 84 84 .macro fpu_save_16even thread tmp=t0 85 85 .set push 86 - SET_HARDFLOAT 86 + .set hardfloat 87 87 cfc1 \tmp, fcr31 88 88 sdc1 $f0, THREAD_FPR0(\thread) 89 89 sdc1 $f2, THREAD_FPR2(\thread) ··· 109 109 .set push 110 110 .set mips64r2 111 111 .set fp=64 112 - SET_HARDFLOAT 112 + .set hardfloat 113 113 sdc1 $f1, THREAD_FPR1(\thread) 114 114 sdc1 $f3, THREAD_FPR3(\thread) 115 115 sdc1 $f5, THREAD_FPR5(\thread) ··· 142 142 143 143 .macro fpu_restore_16even thread tmp=t0 144 144 .set push 145 - SET_HARDFLOAT 145 + .set hardfloat 146 146 lw \tmp, THREAD_FCR31(\thread) 147 147 ldc1 $f0, THREAD_FPR0(\thread) 148 148 ldc1 $f2, THREAD_FPR2(\thread) ··· 168 168 .set push 169 169 .set mips64r2 170 170 .set fp=64 171 - SET_HARDFLOAT 171 + .set hardfloat 172 172 ldc1 $f1, THREAD_FPR1(\thread) 173 173 ldc1 $f3, THREAD_FPR3(\thread) 174 174 ldc1 $f5, THREAD_FPR5(\thread) ··· 373 373 .macro _cfcmsa rd, cs 374 374 .set push 375 375 .set noat 376 - SET_HARDFLOAT 376 + .set hardfloat 377 377 insn_if_mips 0x787e0059 | (\cs << 11) 378 378 insn32_if_mm 0x587e0056 | (\cs << 11) 379 379 move \rd, $1 ··· 383 383 .macro _ctcmsa cd, rs 384 384 .set push 385 385 .set noat 386 - SET_HARDFLOAT 386 + .set hardfloat 387 387 move $1, \rs 388 388 insn_if_mips 0x783e0819 | (\cd << 6) 389 389 insn32_if_mm 0x583e0816 | (\cd << 6) ··· 393 393 .macro ld_b wd, off, base 394 394 .set push 395 395 .set noat 396 - SET_HARDFLOAT 396 + .set hardfloat 397 397 PTR_ADDU $1, \base, \off 398 398 insn_if_mips 0x78000820 | (\wd << 6) 399 399 insn32_if_mm 0x58000807 | (\wd << 6) ··· 403 403 .macro ld_h wd, off, base 404 404 .set push 405 405 .set noat 406 - SET_HARDFLOAT 406 + .set hardfloat 407 407 PTR_ADDU $1, \base, \off 408 408 insn_if_mips 0x78000821 | (\wd << 6) 409 409 insn32_if_mm 0x58000817 | (\wd << 6) ··· 413 413 .macro ld_w wd, off, base 414 414 .set push 415 415 .set noat 416 - SET_HARDFLOAT 416 + .set hardfloat 417 417 PTR_ADDU $1, \base, \off 418 418 insn_if_mips 0x78000822 | (\wd << 6) 419 419 insn32_if_mm 0x58000827 | (\wd << 6) ··· 423 423 .macro ld_d wd, off, base 424 424 .set push 425 425 .set noat 426 - SET_HARDFLOAT 426 + .set hardfloat 427 427 PTR_ADDU $1, \base, \off 428 428 insn_if_mips 0x78000823 | (\wd << 6) 429 429 insn32_if_mm 0x58000837 | (\wd << 6) ··· 433 433 .macro st_b wd, off, base 434 434 .set push 435 435 .set noat 436 - SET_HARDFLOAT 436 + .set hardfloat 437 437 PTR_ADDU $1, \base, \off 438 438 insn_if_mips 0x78000824 | (\wd << 6) 439 439 insn32_if_mm 0x5800080f | (\wd << 6) ··· 443 443 .macro st_h wd, off, base 444 444 .set push 445 445 .set noat 446 - SET_HARDFLOAT 446 + .set hardfloat 447 447 PTR_ADDU $1, \base, \off 448 448 insn_if_mips 0x78000825 | (\wd << 6) 449 449 insn32_if_mm 0x5800081f | (\wd << 6) ··· 453 453 .macro st_w wd, off, base 454 454 .set push 455 455 .set noat 456 - SET_HARDFLOAT 456 + .set hardfloat 457 457 PTR_ADDU $1, \base, \off 458 458 insn_if_mips 0x78000826 | (\wd << 6) 459 459 insn32_if_mm 0x5800082f | (\wd << 6) ··· 463 463 .macro st_d wd, off, base 464 464 .set push 465 465 .set noat 466 - SET_HARDFLOAT 466 + .set hardfloat 467 467 PTR_ADDU $1, \base, \off 468 468 insn_if_mips 0x78000827 | (\wd << 6) 469 469 insn32_if_mm 0x5800083f | (\wd << 6) ··· 473 473 .macro copy_s_w ws, n 474 474 .set push 475 475 .set noat 476 - SET_HARDFLOAT 476 + .set hardfloat 477 477 insn_if_mips 0x78b00059 | (\n << 16) | (\ws << 11) 478 478 insn32_if_mm 0x58b00056 | (\n << 16) | (\ws << 11) 479 479 .set pop ··· 482 482 .macro copy_s_d ws, n 483 483 .set push 484 484 .set noat 485 - SET_HARDFLOAT 485 + .set hardfloat 486 486 insn_if_mips 0x78b80059 | (\n << 16) | (\ws << 11) 487 487 insn32_if_mm 0x58b80056 | (\n << 16) | (\ws << 11) 488 488 .set pop ··· 491 491 .macro insert_w wd, n 492 492 .set push 493 493 .set noat 494 - SET_HARDFLOAT 494 + .set hardfloat 495 495 insn_if_mips 0x79300819 | (\n << 16) | (\wd << 6) 496 496 insn32_if_mm 0x59300816 | (\n << 16) | (\wd << 6) 497 497 .set pop ··· 500 500 .macro insert_d wd, n 501 501 .set push 502 502 .set noat 503 - SET_HARDFLOAT 503 + .set hardfloat 504 504 insn_if_mips 0x79380819 | (\n << 16) | (\wd << 6) 505 505 insn32_if_mm 0x59380816 | (\n << 16) | (\wd << 6) 506 506 .set pop ··· 553 553 st_d 29, THREAD_FPR29 - FPR_BASE_OFFS, FPR_BASE 554 554 st_d 30, THREAD_FPR30 - FPR_BASE_OFFS, FPR_BASE 555 555 st_d 31, THREAD_FPR31 - FPR_BASE_OFFS, FPR_BASE 556 - SET_HARDFLOAT 556 + .set hardfloat 557 557 _cfcmsa $1, MSA_CSR 558 558 sw $1, THREAD_MSA_CSR(\thread) 559 559 .set pop ··· 562 562 .macro msa_restore_all thread 563 563 .set push 564 564 .set noat 565 - SET_HARDFLOAT 565 + .set hardfloat 566 566 lw $1, THREAD_MSA_CSR(\thread) 567 567 _ctcmsa MSA_CSR, $1 568 568 #ifdef TOOLCHAIN_SUPPORTS_MSA ··· 618 618 .macro msa_init_all_upper 619 619 .set push 620 620 .set noat 621 - SET_HARDFLOAT 621 + .set hardfloat 622 622 not $1, zero 623 623 msa_init_upper 0 624 624 msa_init_upper 1
-14
arch/mips/include/asm/fpregdef.h
··· 14 14 15 15 #include <asm/sgidefs.h> 16 16 17 - /* 18 - * starting with binutils 2.24.51.20140729, MIPS binutils warn about mixing 19 - * hardfloat and softfloat object files. The kernel build uses soft-float by 20 - * default, so we also need to pass -msoft-float along to GAS if it supports it. 21 - * But this in turn causes assembler errors in files which access hardfloat 22 - * registers. We detect if GAS supports "-msoft-float" in the Makefile and 23 - * explicitly put ".set hardfloat" where floating point registers are touched. 24 - */ 25 - #ifdef GAS_HAS_SET_HARDFLOAT 26 - #define SET_HARDFLOAT .set hardfloat 27 - #else 28 - #define SET_HARDFLOAT 29 - #endif 30 - 31 17 #if _MIPS_SIM == _MIPS_SIM_ABI32 32 18 33 19 /*
+4 -16
arch/mips/include/asm/mipsregs.h
··· 2367 2367 /* 2368 2368 * Macros to access the floating point coprocessor control registers 2369 2369 */ 2370 - #define _read_32bit_cp1_register(source, gas_hardfloat) \ 2370 + #define read_32bit_cp1_register(source) \ 2371 2371 ({ \ 2372 2372 unsigned int __res; \ 2373 2373 \ ··· 2377 2377 " # gas fails to assemble cfc1 for some archs, \n" \ 2378 2378 " # like Octeon. \n" \ 2379 2379 " .set mips1 \n" \ 2380 - " "STR(gas_hardfloat)" \n" \ 2380 + " .set hardfloat \n" \ 2381 2381 " cfc1 %0,"STR(source)" \n" \ 2382 2382 " .set pop \n" \ 2383 2383 : "=r" (__res)); \ 2384 2384 __res; \ 2385 2385 }) 2386 2386 2387 - #define _write_32bit_cp1_register(dest, val, gas_hardfloat) \ 2387 + #define write_32bit_cp1_register(dest, val) \ 2388 2388 do { \ 2389 2389 __asm__ __volatile__( \ 2390 2390 " .set push \n" \ 2391 2391 " .set reorder \n" \ 2392 - " "STR(gas_hardfloat)" \n" \ 2392 + " .set hardfloat \n" \ 2393 2393 " ctc1 %0,"STR(dest)" \n" \ 2394 2394 " .set pop \n" \ 2395 2395 : : "r" (val)); \ 2396 2396 } while (0) 2397 - 2398 - #ifdef GAS_HAS_SET_HARDFLOAT 2399 - #define read_32bit_cp1_register(source) \ 2400 - _read_32bit_cp1_register(source, .set hardfloat) 2401 - #define write_32bit_cp1_register(dest, val) \ 2402 - _write_32bit_cp1_register(dest, val, .set hardfloat) 2403 - #else 2404 - #define read_32bit_cp1_register(source) \ 2405 - _read_32bit_cp1_register(source, ) 2406 - #define write_32bit_cp1_register(dest, val) \ 2407 - _write_32bit_cp1_register(dest, val, ) 2408 - #endif 2409 2397 2410 2398 #ifdef TOOLCHAIN_SUPPORTS_DSP 2411 2399 #define rddsp(mask) \
+1 -1
arch/mips/kernel/genex.S
··· 480 480 .set push 481 481 /* gas fails to assemble cfc1 for some archs (octeon).*/ \ 482 482 .set mips1 483 - SET_HARDFLOAT 483 + .set hardfloat 484 484 cfc1 a1, fcr31 485 485 .set pop 486 486 .endm
+2 -2
arch/mips/kernel/r2300_fpu.S
··· 64 64 */ 65 65 LEAF(_save_fp_context) 66 66 .set push 67 - SET_HARDFLOAT 67 + .set hardfloat 68 68 li v0, 0 # assume success 69 69 cfc1 t1, fcr31 70 70 EX2(s.d $f0, 0(a0)) ··· 98 98 */ 99 99 LEAF(_restore_fp_context) 100 100 .set push 101 - SET_HARDFLOAT 101 + .set hardfloat 102 102 li v0, 0 # assume success 103 103 EX(lw t0, (a1)) 104 104 EX2(l.d $f0, 0(a0))
+6 -6
arch/mips/kernel/r4k_fpu.S
··· 26 26 27 27 .macro EX insn, reg, src 28 28 .set push 29 - SET_HARDFLOAT 29 + .set hardfloat 30 30 .set nomacro 31 31 .ex\@: \insn \reg, \src 32 32 .set pop ··· 98 98 */ 99 99 LEAF(_save_fp_context) 100 100 .set push 101 - SET_HARDFLOAT 101 + .set hardfloat 102 102 cfc1 t1, fcr31 103 103 .set pop 104 104 105 105 #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \ 106 106 defined(CONFIG_CPU_MIPSR5) || defined(CONFIG_CPU_MIPSR6) 107 107 .set push 108 - SET_HARDFLOAT 108 + .set hardfloat 109 109 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5) 110 110 .set mips32r2 111 111 .set fp=64 ··· 135 135 #endif 136 136 137 137 .set push 138 - SET_HARDFLOAT 138 + .set hardfloat 139 139 /* Store the 16 even double precision registers */ 140 140 EX sdc1 $f0, 0(a0) 141 141 EX sdc1 $f2, 16(a0) ··· 173 173 #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \ 174 174 defined(CONFIG_CPU_MIPSR5) || defined(CONFIG_CPU_MIPSR6) 175 175 .set push 176 - SET_HARDFLOAT 176 + .set hardfloat 177 177 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5) 178 178 .set mips32r2 179 179 .set fp=64 ··· 201 201 1: .set pop 202 202 #endif 203 203 .set push 204 - SET_HARDFLOAT 204 + .set hardfloat 205 205 EX ldc1 $f0, 0(a0) 206 206 EX ldc1 $f2, 16(a0) 207 207 EX ldc1 $f4, 32(a0)
+3 -3
arch/mips/kvm/fpu.S
··· 22 22 23 23 LEAF(__kvm_save_fpu) 24 24 .set push 25 - SET_HARDFLOAT 25 + .set hardfloat 26 26 .set fp=64 27 27 mfc0 t0, CP0_STATUS 28 28 sll t0, t0, 5 # is Status.FR set? ··· 66 66 67 67 LEAF(__kvm_restore_fpu) 68 68 .set push 69 - SET_HARDFLOAT 69 + .set hardfloat 70 70 .set fp=64 71 71 mfc0 t0, CP0_STATUS 72 72 sll t0, t0, 5 # is Status.FR set? ··· 110 110 111 111 LEAF(__kvm_restore_fcsr) 112 112 .set push 113 - SET_HARDFLOAT 113 + .set hardfloat 114 114 lw t0, VCPU_FCR31(a0) 115 115 /* 116 116 * The ctc1 must stay at this offset in __kvm_restore_fcsr.