tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Disintegrate asm/system.h for M68K
Disintegrate asm/system.h for M68K.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Greg Ungerer <gerg@uclinux.org>
cc: linux-m68k@lists.linux-m68k.org
+214
-246
-1
arch/m68k/amiga/amisound.c
-1
arch/m68k/amiga/amisound.c
-1
arch/m68k/amiga/config.c
-1
arch/m68k/amiga/config.c
-1
arch/m68k/apollo/config.c
-1
arch/m68k/apollo/config.c
-1
arch/m68k/atari/ataints.c
-1
arch/m68k/atari/ataints.c
-1
arch/m68k/atari/atasound.c
-1
arch/m68k/atari/atasound.c
-1
arch/m68k/atari/config.c
-1
arch/m68k/atari/config.c
-1
arch/m68k/bvme6000/config.c
-1
arch/m68k/bvme6000/config.c
-1
arch/m68k/bvme6000/rtc.c
-1
arch/m68k/bvme6000/rtc.c
-1
arch/m68k/hp300/time.c
-1
arch/m68k/hp300/time.c
+1
-1
arch/m68k/include/asm/atomic.h
+1
-1
arch/m68k/include/asm/atomic.h
+20
arch/m68k/include/asm/barrier.h
+20
arch/m68k/include/asm/barrier.h
···
1
+
#ifndef _M68K_BARRIER_H
2
+
#define _M68K_BARRIER_H
3
+
4
+
/*
5
+
* Force strict CPU ordering.
6
+
* Not really required on m68k...
7
+
*/
8
+
#define nop() do { asm volatile ("nop"); barrier(); } while (0)
9
+
#define mb() barrier()
10
+
#define rmb() barrier()
11
+
#define wmb() barrier()
12
+
#define read_barrier_depends() ((void)0)
13
+
#define set_mb(var, value) ({ (var) = (value); wmb(); })
14
+
15
+
#define smp_mb() barrier()
16
+
#define smp_rmb() barrier()
17
+
#define smp_wmb() barrier()
18
+
#define smp_read_barrier_depends() ((void)0)
19
+
20
+
#endif /* _M68K_BARRIER_H */
+141
arch/m68k/include/asm/cmpxchg.h
+141
arch/m68k/include/asm/cmpxchg.h
···
1
+
#ifndef __ARCH_M68K_CMPXCHG__
2
+
#define __ARCH_M68K_CMPXCHG__
3
+
4
+
#include <linux/irqflags.h>
5
+
6
+
struct __xchg_dummy { unsigned long a[100]; };
7
+
#define __xg(x) ((volatile struct __xchg_dummy *)(x))
8
+
9
+
extern unsigned long __invalid_xchg_size(unsigned long, volatile void *, int);
10
+
11
+
#ifndef CONFIG_RMW_INSNS
12
+
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
13
+
{
14
+
unsigned long flags, tmp;
15
+
16
+
local_irq_save(flags);
17
+
18
+
switch (size) {
19
+
case 1:
20
+
tmp = *(u8 *)ptr;
21
+
*(u8 *)ptr = x;
22
+
x = tmp;
23
+
break;
24
+
case 2:
25
+
tmp = *(u16 *)ptr;
26
+
*(u16 *)ptr = x;
27
+
x = tmp;
28
+
break;
29
+
case 4:
30
+
tmp = *(u32 *)ptr;
31
+
*(u32 *)ptr = x;
32
+
x = tmp;
33
+
break;
34
+
default:
35
+
tmp = __invalid_xchg_size(x, ptr, size);
36
+
break;
37
+
}
38
+
39
+
local_irq_restore(flags);
40
+
return x;
41
+
}
42
+
#else
43
+
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
44
+
{
45
+
switch (size) {
46
+
case 1:
47
+
__asm__ __volatile__
48
+
("moveb %2,%0\n\t"
49
+
"1:\n\t"
50
+
"casb %0,%1,%2\n\t"
51
+
"jne 1b"
52
+
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
53
+
break;
54
+
case 2:
55
+
__asm__ __volatile__
56
+
("movew %2,%0\n\t"
57
+
"1:\n\t"
58
+
"casw %0,%1,%2\n\t"
59
+
"jne 1b"
60
+
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
61
+
break;
62
+
case 4:
63
+
__asm__ __volatile__
64
+
("movel %2,%0\n\t"
65
+
"1:\n\t"
66
+
"casl %0,%1,%2\n\t"
67
+
"jne 1b"
68
+
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
69
+
break;
70
+
default:
71
+
x = __invalid_xchg_size(x, ptr, size);
72
+
break;
73
+
}
74
+
return x;
75
+
}
76
+
#endif
77
+
78
+
#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
79
+
80
+
#include <asm-generic/cmpxchg-local.h>
81
+
82
+
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
83
+
84
+
extern unsigned long __invalid_cmpxchg_size(volatile void *,
85
+
unsigned long, unsigned long, int);
86
+
87
+
/*
88
+
* Atomic compare and exchange. Compare OLD with MEM, if identical,
89
+
* store NEW in MEM. Return the initial value in MEM. Success is
90
+
* indicated by comparing RETURN with OLD.
91
+
*/
92
+
#ifdef CONFIG_RMW_INSNS
93
+
#define __HAVE_ARCH_CMPXCHG 1
94
+
95
+
static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
96
+
unsigned long new, int size)
97
+
{
98
+
switch (size) {
99
+
case 1:
100
+
__asm__ __volatile__ ("casb %0,%2,%1"
101
+
: "=d" (old), "=m" (*(char *)p)
102
+
: "d" (new), "0" (old), "m" (*(char *)p));
103
+
break;
104
+
case 2:
105
+
__asm__ __volatile__ ("casw %0,%2,%1"
106
+
: "=d" (old), "=m" (*(short *)p)
107
+
: "d" (new), "0" (old), "m" (*(short *)p));
108
+
break;
109
+
case 4:
110
+
__asm__ __volatile__ ("casl %0,%2,%1"
111
+
: "=d" (old), "=m" (*(int *)p)
112
+
: "d" (new), "0" (old), "m" (*(int *)p));
113
+
break;
114
+
default:
115
+
old = __invalid_cmpxchg_size(p, old, new, size);
116
+
break;
117
+
}
118
+
return old;
119
+
}
120
+
121
+
#define cmpxchg(ptr, o, n) \
122
+
((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
123
+
(unsigned long)(n), sizeof(*(ptr))))
124
+
#define cmpxchg_local(ptr, o, n) \
125
+
((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
126
+
(unsigned long)(n), sizeof(*(ptr))))
127
+
#else
128
+
129
+
/*
130
+
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
131
+
* them available.
132
+
*/
133
+
#define cmpxchg_local(ptr, o, n) \
134
+
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
135
+
(unsigned long)(n), sizeof(*(ptr))))
136
+
137
+
#include <asm-generic/cmpxchg.h>
138
+
139
+
#endif
140
+
141
+
#endif /* __ARCH_M68K_CMPXCHG__ */
+6
arch/m68k/include/asm/exec.h
+6
arch/m68k/include/asm/exec.h
-1
arch/m68k/include/asm/sun3xflop.h
-1
arch/m68k/include/asm/sun3xflop.h
+41
arch/m68k/include/asm/switch_to.h
+41
arch/m68k/include/asm/switch_to.h
···
1
+
#ifndef _M68K_SWITCH_TO_H
2
+
#define _M68K_SWITCH_TO_H
3
+
4
+
/*
5
+
* switch_to(n) should switch tasks to task ptr, first checking that
6
+
* ptr isn't the current task, in which case it does nothing. This
7
+
* also clears the TS-flag if the task we switched to has used the
8
+
* math co-processor latest.
9
+
*/
10
+
/*
11
+
* switch_to() saves the extra registers, that are not saved
12
+
* automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
13
+
* a0-a1. Some of these are used by schedule() and its predecessors
14
+
* and so we might get see unexpected behaviors when a task returns
15
+
* with unexpected register values.
16
+
*
17
+
* syscall stores these registers itself and none of them are used
18
+
* by syscall after the function in the syscall has been called.
19
+
*
20
+
* Beware that resume now expects *next to be in d1 and the offset of
21
+
* tss to be in a1. This saves a few instructions as we no longer have
22
+
* to push them onto the stack and read them back right after.
23
+
*
24
+
* 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
25
+
*
26
+
* Changed 96/09/19 by Andreas Schwab
27
+
* pass prev in a0, next in a1
28
+
*/
29
+
asmlinkage void resume(void);
30
+
#define switch_to(prev,next,last) do { \
31
+
register void *_prev __asm__ ("a0") = (prev); \
32
+
register void *_next __asm__ ("a1") = (next); \
33
+
register void *_last __asm__ ("d1"); \
34
+
__asm__ __volatile__("jbsr resume" \
35
+
: "=a" (_prev), "=a" (_next), "=d" (_last) \
36
+
: "0" (_prev), "1" (_next) \
37
+
: "d0", "d2", "d3", "d4", "d5"); \
38
+
(last) = _last; \
39
+
} while (0)
40
+
41
+
#endif /* _M68K_SWITCH_TO_H */
+5
-205
arch/m68k/include/asm/system.h
+5
-205
arch/m68k/include/asm/system.h
···
1
-
#ifndef _M68K_SYSTEM_H
2
-
#define _M68K_SYSTEM_H
3
-
4
-
#include <linux/linkage.h>
5
-
#include <linux/kernel.h>
6
-
#include <linux/irqflags.h>
7
-
#include <asm/segment.h>
8
-
#include <asm/entry.h>
9
-
10
-
#ifdef __KERNEL__
11
-
12
-
/*
13
-
* switch_to(n) should switch tasks to task ptr, first checking that
14
-
* ptr isn't the current task, in which case it does nothing. This
15
-
* also clears the TS-flag if the task we switched to has used the
16
-
* math co-processor latest.
17
-
*/
18
-
/*
19
-
* switch_to() saves the extra registers, that are not saved
20
-
* automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
21
-
* a0-a1. Some of these are used by schedule() and its predecessors
22
-
* and so we might get see unexpected behaviors when a task returns
23
-
* with unexpected register values.
24
-
*
25
-
* syscall stores these registers itself and none of them are used
26
-
* by syscall after the function in the syscall has been called.
27
-
*
28
-
* Beware that resume now expects *next to be in d1 and the offset of
29
-
* tss to be in a1. This saves a few instructions as we no longer have
30
-
* to push them onto the stack and read them back right after.
31
-
*
32
-
* 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
33
-
*
34
-
* Changed 96/09/19 by Andreas Schwab
35
-
* pass prev in a0, next in a1
36
-
*/
37
-
asmlinkage void resume(void);
38
-
#define switch_to(prev,next,last) do { \
39
-
register void *_prev __asm__ ("a0") = (prev); \
40
-
register void *_next __asm__ ("a1") = (next); \
41
-
register void *_last __asm__ ("d1"); \
42
-
__asm__ __volatile__("jbsr resume" \
43
-
: "=a" (_prev), "=a" (_next), "=d" (_last) \
44
-
: "0" (_prev), "1" (_next) \
45
-
: "d0", "d2", "d3", "d4", "d5"); \
46
-
(last) = _last; \
47
-
} while (0)
48
-
49
-
50
-
/*
51
-
* Force strict CPU ordering.
52
-
* Not really required on m68k...
53
-
*/
54
-
#define nop() do { asm volatile ("nop"); barrier(); } while (0)
55
-
#define mb() barrier()
56
-
#define rmb() barrier()
57
-
#define wmb() barrier()
58
-
#define read_barrier_depends() ((void)0)
59
-
#define set_mb(var, value) ({ (var) = (value); wmb(); })
60
-
61
-
#define smp_mb() barrier()
62
-
#define smp_rmb() barrier()
63
-
#define smp_wmb() barrier()
64
-
#define smp_read_barrier_depends() ((void)0)
65
-
66
-
#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
67
-
68
-
struct __xchg_dummy { unsigned long a[100]; };
69
-
#define __xg(x) ((volatile struct __xchg_dummy *)(x))
70
-
71
-
extern unsigned long __invalid_xchg_size(unsigned long, volatile void *, int);
72
-
73
-
#ifndef CONFIG_RMW_INSNS
74
-
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
75
-
{
76
-
unsigned long flags, tmp;
77
-
78
-
local_irq_save(flags);
79
-
80
-
switch (size) {
81
-
case 1:
82
-
tmp = *(u8 *)ptr;
83
-
*(u8 *)ptr = x;
84
-
x = tmp;
85
-
break;
86
-
case 2:
87
-
tmp = *(u16 *)ptr;
88
-
*(u16 *)ptr = x;
89
-
x = tmp;
90
-
break;
91
-
case 4:
92
-
tmp = *(u32 *)ptr;
93
-
*(u32 *)ptr = x;
94
-
x = tmp;
95
-
break;
96
-
default:
97
-
tmp = __invalid_xchg_size(x, ptr, size);
98
-
break;
99
-
}
100
-
101
-
local_irq_restore(flags);
102
-
return x;
103
-
}
104
-
#else
105
-
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
106
-
{
107
-
switch (size) {
108
-
case 1:
109
-
__asm__ __volatile__
110
-
("moveb %2,%0\n\t"
111
-
"1:\n\t"
112
-
"casb %0,%1,%2\n\t"
113
-
"jne 1b"
114
-
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
115
-
break;
116
-
case 2:
117
-
__asm__ __volatile__
118
-
("movew %2,%0\n\t"
119
-
"1:\n\t"
120
-
"casw %0,%1,%2\n\t"
121
-
"jne 1b"
122
-
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
123
-
break;
124
-
case 4:
125
-
__asm__ __volatile__
126
-
("movel %2,%0\n\t"
127
-
"1:\n\t"
128
-
"casl %0,%1,%2\n\t"
129
-
"jne 1b"
130
-
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
131
-
break;
132
-
default:
133
-
x = __invalid_xchg_size(x, ptr, size);
134
-
break;
135
-
}
136
-
return x;
137
-
}
138
-
#endif
139
-
140
-
#include <asm-generic/cmpxchg-local.h>
141
-
142
-
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
143
-
144
-
extern unsigned long __invalid_cmpxchg_size(volatile void *,
145
-
unsigned long, unsigned long, int);
146
-
147
-
/*
148
-
* Atomic compare and exchange. Compare OLD with MEM, if identical,
149
-
* store NEW in MEM. Return the initial value in MEM. Success is
150
-
* indicated by comparing RETURN with OLD.
151
-
*/
152
-
#ifdef CONFIG_RMW_INSNS
153
-
#define __HAVE_ARCH_CMPXCHG 1
154
-
155
-
static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
156
-
unsigned long new, int size)
157
-
{
158
-
switch (size) {
159
-
case 1:
160
-
__asm__ __volatile__ ("casb %0,%2,%1"
161
-
: "=d" (old), "=m" (*(char *)p)
162
-
: "d" (new), "0" (old), "m" (*(char *)p));
163
-
break;
164
-
case 2:
165
-
__asm__ __volatile__ ("casw %0,%2,%1"
166
-
: "=d" (old), "=m" (*(short *)p)
167
-
: "d" (new), "0" (old), "m" (*(short *)p));
168
-
break;
169
-
case 4:
170
-
__asm__ __volatile__ ("casl %0,%2,%1"
171
-
: "=d" (old), "=m" (*(int *)p)
172
-
: "d" (new), "0" (old), "m" (*(int *)p));
173
-
break;
174
-
default:
175
-
old = __invalid_cmpxchg_size(p, old, new, size);
176
-
break;
177
-
}
178
-
return old;
179
-
}
180
-
181
-
#define cmpxchg(ptr, o, n) \
182
-
((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
183
-
(unsigned long)(n), sizeof(*(ptr))))
184
-
#define cmpxchg_local(ptr, o, n) \
185
-
((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
186
-
(unsigned long)(n), sizeof(*(ptr))))
187
-
#else
188
-
189
-
/*
190
-
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
191
-
* them available.
192
-
*/
193
-
#define cmpxchg_local(ptr, o, n) \
194
-
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
195
-
(unsigned long)(n), sizeof(*(ptr))))
196
-
197
-
#include <asm-generic/cmpxchg.h>
198
-
199
-
#endif
200
-
201
-
#define arch_align_stack(x) (x)
202
-
203
-
#endif /* __KERNEL__ */
204
-
205
-
#endif /* _M68K_SYSTEM_H */
1
+
/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */
2
+
#include <asm/barrier.h>
3
+
#include <asm/cmpxchg.h>
4
+
#include <asm/exec.h>
5
+
#include <asm/switch_to.h>
-1
arch/m68k/kernel/ints.c
-1
arch/m68k/kernel/ints.c
-1
arch/m68k/kernel/irq.c
-1
arch/m68k/kernel/irq.c
-1
arch/m68k/kernel/process.c
-1
arch/m68k/kernel/process.c
-1
arch/m68k/kernel/ptrace.c
-1
arch/m68k/kernel/ptrace.c
-1
arch/m68k/kernel/traps.c
-1
arch/m68k/kernel/traps.c
-1
arch/m68k/kernel/vectors.c
-1
arch/m68k/kernel/vectors.c
-1
arch/m68k/mac/config.c
-1
arch/m68k/mac/config.c
-1
arch/m68k/mac/misc.c
-1
arch/m68k/mac/misc.c
-1
arch/m68k/mm/fault.c
-1
arch/m68k/mm/fault.c
-1
arch/m68k/mm/init_mm.c
-1
arch/m68k/mm/init_mm.c
-1
arch/m68k/mm/init_no.c
-1
arch/m68k/mm/init_no.c
-1
arch/m68k/mm/kmap.c
-1
arch/m68k/mm/kmap.c
-1
arch/m68k/mm/memory.c
-1
arch/m68k/mm/memory.c
-1
arch/m68k/mm/motorola.c
-1
arch/m68k/mm/motorola.c
-1
arch/m68k/mm/sun3mmu.c
-1
arch/m68k/mm/sun3mmu.c
-1
arch/m68k/mvme147/config.c
-1
arch/m68k/mvme147/config.c
-1
arch/m68k/mvme16x/config.c
-1
arch/m68k/mvme16x/config.c
-1
arch/m68k/mvme16x/rtc.c
-1
arch/m68k/mvme16x/rtc.c
-1
arch/m68k/platform/68328/config.c
-1
arch/m68k/platform/68328/config.c
-1
arch/m68k/platform/68328/timers.c
-1
arch/m68k/platform/68328/timers.c
-1
arch/m68k/platform/68360/config.c
-1
arch/m68k/platform/68360/config.c
-1
arch/m68k/platform/68EZ328/config.c
-1
arch/m68k/platform/68EZ328/config.c
-1
arch/m68k/platform/68VZ328/config.c
-1
arch/m68k/platform/68VZ328/config.c
-1
arch/m68k/q40/config.c
-1
arch/m68k/q40/config.c
-1
arch/m68k/q40/q40ints.c
-1
arch/m68k/q40/q40ints.c
-1
arch/m68k/sun3/intersil.c
-1
arch/m68k/sun3/intersil.c
-1
arch/m68k/sun3/mmu_emu.c
-1
arch/m68k/sun3/mmu_emu.c
-1
arch/m68k/sun3/prom/console.c
-1
arch/m68k/sun3/prom/console.c
-1
arch/m68k/sun3x/config.c
-1
arch/m68k/sun3x/config.c