Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[PATCH] EHCI, split out PCI glue

This splits BIOS and PCI specific support out of ehci-hcd.c into
ehci-pci.c. It follows the model already used in the OHCI driver
so support for non-PCI EHCI controllers can be more easily added.

Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

drivers/usb/host/ehci-hcd.c | 543 ++++++--------------------------------------
drivers/usb/host/ehci-pci.c | 414 +++++++++++++++++++++++++++++++++
drivers/usb/host/ehci.h | 1
3 files changed, 492 insertions(+), 466 deletions(-)

authored by

Matt Porter and committed by
Greg Kroah-Hartman
7ff71d6a e9b7bd4e

+500 -474
+85 -474
drivers/usb/host/ehci-hcd.c
··· 300 300 spin_unlock_irqrestore (&ehci->lock, flags); 301 301 } 302 302 303 - #ifdef CONFIG_PCI 304 - 305 - /* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/... 306 - * off the controller (maybe it can boot from highspeed USB disks). 307 - */ 308 - static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap) 309 - { 310 - struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 311 - 312 - /* always say Linux will own the hardware */ 313 - pci_write_config_byte(pdev, where + 3, 1); 314 - 315 - /* maybe wait a while for BIOS to respond */ 316 - if (cap & (1 << 16)) { 317 - int msec = 5000; 318 - 319 - do { 320 - msleep(10); 321 - msec -= 10; 322 - pci_read_config_dword(pdev, where, &cap); 323 - } while ((cap & (1 << 16)) && msec); 324 - if (cap & (1 << 16)) { 325 - ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n", 326 - where, cap); 327 - // some BIOS versions seem buggy... 328 - // return 1; 329 - ehci_warn (ehci, "continuing after BIOS bug...\n"); 330 - /* disable all SMIs, and clear "BIOS owns" flag */ 331 - pci_write_config_dword(pdev, where + 4, 0); 332 - pci_write_config_byte(pdev, where + 2, 0); 333 - } else 334 - ehci_dbg(ehci, "BIOS handoff succeeded\n"); 335 - } 336 - return 0; 337 - } 338 - 339 - #endif 340 - 341 303 /* Reboot notifiers kick in for silicon on any bus (not just pci, etc). 342 304 * This forcibly disables dma and IRQs, helping kexec and other cases 343 305 * where the next system software may expect clean state. ··· 333 371 msleep(20); 334 372 } 335 373 374 + /*-------------------------------------------------------------------------*/ 336 375 337 - /* called by khubd or root hub init threads */ 338 - 339 - static int ehci_hc_reset (struct usb_hcd *hcd) 376 + /* 377 + * ehci_work is called from some interrupts, timers, and so on. 378 + * it calls driver completion functions, after dropping ehci->lock. 379 + */ 380 + static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs) 340 381 { 341 - struct ehci_hcd *ehci = hcd_to_ehci (hcd); 342 - u32 temp; 343 - unsigned count = 256/4; 382 + timer_action_done (ehci, TIMER_IO_WATCHDOG); 383 + if (ehci->reclaim_ready) 384 + end_unlink_async (ehci, regs); 344 385 345 - spin_lock_init (&ehci->lock); 386 + /* another CPU may drop ehci->lock during a schedule scan while 387 + * it reports urb completions. this flag guards against bogus 388 + * attempts at re-entrant schedule scanning. 389 + */ 390 + if (ehci->scanning) 391 + return; 392 + ehci->scanning = 1; 393 + scan_async (ehci, regs); 394 + if (ehci->next_uframe != -1) 395 + scan_periodic (ehci, regs); 396 + ehci->scanning = 0; 346 397 347 - ehci->caps = hcd->regs; 348 - ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase)); 349 - dbg_hcs_params (ehci, "reset"); 350 - dbg_hcc_params (ehci, "reset"); 351 - 352 - /* cache this readonly data; minimize chip reads */ 353 - ehci->hcs_params = readl (&ehci->caps->hcs_params); 354 - 355 - #ifdef CONFIG_PCI 356 - if (hcd->self.controller->bus == &pci_bus_type) { 357 - struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 358 - 359 - switch (pdev->vendor) { 360 - case PCI_VENDOR_ID_TDI: 361 - if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { 362 - ehci->is_tdi_rh_tt = 1; 363 - tdi_reset (ehci); 364 - } 365 - break; 366 - case PCI_VENDOR_ID_AMD: 367 - /* AMD8111 EHCI doesn't work, according to AMD errata */ 368 - if (pdev->device == 0x7463) { 369 - ehci_info (ehci, "ignoring AMD8111 (errata)\n"); 370 - return -EIO; 371 - } 372 - break; 373 - case PCI_VENDOR_ID_NVIDIA: 374 - /* NVidia reports that certain chips don't handle 375 - * QH, ITD, or SITD addresses above 2GB. (But TD, 376 - * data buffer, and periodic schedule are normal.) 377 - */ 378 - switch (pdev->device) { 379 - case 0x003c: /* MCP04 */ 380 - case 0x005b: /* CK804 */ 381 - case 0x00d8: /* CK8 */ 382 - case 0x00e8: /* CK8S */ 383 - if (pci_set_consistent_dma_mask(pdev, 384 - DMA_31BIT_MASK) < 0) 385 - ehci_warn (ehci, "can't enable NVidia " 386 - "workaround for >2GB RAM\n"); 387 - break; 388 - } 389 - break; 390 - } 391 - 392 - /* optional debug port, normally in the first BAR */ 393 - temp = pci_find_capability (pdev, 0x0a); 394 - if (temp) { 395 - pci_read_config_dword(pdev, temp, &temp); 396 - temp >>= 16; 397 - if ((temp & (3 << 13)) == (1 << 13)) { 398 - temp &= 0x1fff; 399 - ehci->debug = hcd->regs + temp; 400 - temp = readl (&ehci->debug->control); 401 - ehci_info (ehci, "debug port %d%s\n", 402 - HCS_DEBUG_PORT(ehci->hcs_params), 403 - (temp & DBGP_ENABLED) 404 - ? " IN USE" 405 - : ""); 406 - if (!(temp & DBGP_ENABLED)) 407 - ehci->debug = NULL; 408 - } 409 - } 410 - 411 - temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params)); 412 - } else 413 - temp = 0; 414 - 415 - /* EHCI 0.96 and later may have "extended capabilities" */ 416 - while (temp && count--) { 417 - u32 cap; 418 - 419 - pci_read_config_dword (to_pci_dev(hcd->self.controller), 420 - temp, &cap); 421 - ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp); 422 - switch (cap & 0xff) { 423 - case 1: /* BIOS/SMM/... handoff */ 424 - if (bios_handoff (ehci, temp, cap) != 0) 425 - return -EOPNOTSUPP; 426 - break; 427 - case 0: /* illegal reserved capability */ 428 - ehci_warn (ehci, "illegal capability!\n"); 429 - cap = 0; 430 - /* FALLTHROUGH */ 431 - default: /* unknown */ 432 - break; 433 - } 434 - temp = (cap >> 8) & 0xff; 435 - } 436 - if (!count) { 437 - ehci_err (ehci, "bogus capabilities ... PCI problems!\n"); 438 - return -EIO; 439 - } 440 - if (ehci_is_TDI(ehci)) 441 - ehci_reset (ehci); 442 - #endif 443 - 444 - ehci_port_power (ehci, 0); 445 - 446 - /* at least the Genesys GL880S needs fixup here */ 447 - temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); 448 - temp &= 0x0f; 449 - if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { 450 - ehci_dbg (ehci, "bogus port configuration: " 451 - "cc=%d x pcc=%d < ports=%d\n", 452 - HCS_N_CC(ehci->hcs_params), 453 - HCS_N_PCC(ehci->hcs_params), 454 - HCS_N_PORTS(ehci->hcs_params)); 455 - 456 - #ifdef CONFIG_PCI 457 - if (hcd->self.controller->bus == &pci_bus_type) { 458 - struct pci_dev *pdev; 459 - 460 - pdev = to_pci_dev(hcd->self.controller); 461 - switch (pdev->vendor) { 462 - case 0x17a0: /* GENESYS */ 463 - /* GL880S: should be PORTS=2 */ 464 - temp |= (ehci->hcs_params & ~0xf); 465 - ehci->hcs_params = temp; 466 - break; 467 - case PCI_VENDOR_ID_NVIDIA: 468 - /* NF4: should be PCC=10 */ 469 - break; 470 - } 471 - } 472 - #endif 473 - } 474 - 475 - /* force HC to halt state */ 476 - return ehci_halt (ehci); 398 + /* the IO watchdog guards against hardware or driver bugs that 399 + * misplace IRQs, and should let us run completely without IRQs. 400 + * such lossage has been observed on both VT6202 and VT8235. 401 + */ 402 + if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && 403 + (ehci->async->qh_next.ptr != NULL || 404 + ehci->periodic_sched != 0)) 405 + timer_action (ehci, TIMER_IO_WATCHDOG); 477 406 } 478 407 479 - static int ehci_start (struct usb_hcd *hcd) 408 + static void ehci_stop (struct usb_hcd *hcd) 409 + { 410 + struct ehci_hcd *ehci = hcd_to_ehci (hcd); 411 + 412 + ehci_dbg (ehci, "stop\n"); 413 + 414 + /* Turn off port power on all root hub ports. */ 415 + ehci_port_power (ehci, 0); 416 + 417 + /* no more interrupts ... */ 418 + del_timer_sync (&ehci->watchdog); 419 + 420 + spin_lock_irq(&ehci->lock); 421 + if (HC_IS_RUNNING (hcd->state)) 422 + ehci_quiesce (ehci); 423 + 424 + ehci_reset (ehci); 425 + writel (0, &ehci->regs->intr_enable); 426 + spin_unlock_irq(&ehci->lock); 427 + 428 + /* let companion controllers work when we aren't */ 429 + writel (0, &ehci->regs->configured_flag); 430 + unregister_reboot_notifier (&ehci->reboot_notifier); 431 + 432 + remove_debug_files (ehci); 433 + 434 + /* root hub is shut down separately (first, when possible) */ 435 + spin_lock_irq (&ehci->lock); 436 + if (ehci->async) 437 + ehci_work (ehci, NULL); 438 + spin_unlock_irq (&ehci->lock); 439 + ehci_mem_cleanup (ehci); 440 + 441 + #ifdef EHCI_STATS 442 + ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n", 443 + ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim, 444 + ehci->stats.lost_iaa); 445 + ehci_dbg (ehci, "complete %ld unlink %ld\n", 446 + ehci->stats.complete, ehci->stats.unlink); 447 + #endif 448 + 449 + dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status)); 450 + } 451 + 452 + static int ehci_run (struct usb_hcd *hcd) 480 453 { 481 454 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 482 455 u32 temp; 483 456 int retval; 484 457 u32 hcc_params; 485 - u8 sbrn = 0; 486 458 int first; 487 459 488 460 /* skip some things on restart paths */ ··· 454 558 return retval; 455 559 } 456 560 writel (ehci->periodic_dma, &ehci->regs->frame_list); 457 - 458 - #ifdef CONFIG_PCI 459 - if (hcd->self.controller->bus == &pci_bus_type) { 460 - struct pci_dev *pdev; 461 - u16 port_wake; 462 - 463 - pdev = to_pci_dev(hcd->self.controller); 464 - 465 - /* Serial Bus Release Number is at PCI 0x60 offset */ 466 - pci_read_config_byte(pdev, 0x60, &sbrn); 467 - 468 - /* port wake capability, reported by boot firmware */ 469 - pci_read_config_word(pdev, 0x62, &port_wake); 470 - hcd->can_wakeup = (port_wake & 1) != 0; 471 - 472 - /* help hc dma work well with cachelines */ 473 - retval = pci_set_mwi(pdev); 474 - if (retval) 475 - ehci_dbg(ehci, "unable to enable MWI - not fatal.\n"); 476 - } 477 - #endif 478 561 479 562 /* 480 563 * dedicate a qh for the async ring head, since we couldn't unlink ··· 550 675 temp = HC_VERSION(readl (&ehci->caps->hc_capbase)); 551 676 ehci_info (ehci, 552 677 "USB %x.%x %s, EHCI %x.%02x, driver %s\n", 553 - ((sbrn & 0xf0)>>4), (sbrn & 0x0f), 678 + ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), 554 679 first ? "initialized" : "restarted", 555 680 temp >> 8, temp & 0xff, DRIVER_VERSION); 556 681 ··· 560 685 create_debug_files (ehci); 561 686 562 687 return 0; 563 - } 564 - 565 - /* always called by thread; normally rmmod */ 566 - 567 - static void ehci_stop (struct usb_hcd *hcd) 568 - { 569 - struct ehci_hcd *ehci = hcd_to_ehci (hcd); 570 - 571 - ehci_dbg (ehci, "stop\n"); 572 - 573 - /* Turn off port power on all root hub ports. */ 574 - ehci_port_power (ehci, 0); 575 - 576 - /* no more interrupts ... */ 577 - del_timer_sync (&ehci->watchdog); 578 - 579 - spin_lock_irq(&ehci->lock); 580 - if (HC_IS_RUNNING (hcd->state)) 581 - ehci_quiesce (ehci); 582 - 583 - ehci_reset (ehci); 584 - writel (0, &ehci->regs->intr_enable); 585 - spin_unlock_irq(&ehci->lock); 586 - 587 - /* let companion controllers work when we aren't */ 588 - writel (0, &ehci->regs->configured_flag); 589 - unregister_reboot_notifier (&ehci->reboot_notifier); 590 - 591 - remove_debug_files (ehci); 592 - 593 - /* root hub is shut down separately (first, when possible) */ 594 - spin_lock_irq (&ehci->lock); 595 - if (ehci->async) 596 - ehci_work (ehci, NULL); 597 - spin_unlock_irq (&ehci->lock); 598 - ehci_mem_cleanup (ehci); 599 - 600 - #ifdef EHCI_STATS 601 - ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n", 602 - ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim, 603 - ehci->stats.lost_iaa); 604 - ehci_dbg (ehci, "complete %ld unlink %ld\n", 605 - ehci->stats.complete, ehci->stats.unlink); 606 - #endif 607 - 608 - dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status)); 609 - } 610 - 611 - static int ehci_get_frame (struct usb_hcd *hcd) 612 - { 613 - struct ehci_hcd *ehci = hcd_to_ehci (hcd); 614 - return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size; 615 - } 616 - 617 - /*-------------------------------------------------------------------------*/ 618 - 619 - #ifdef CONFIG_PM 620 - 621 - /* suspend/resume, section 4.3 */ 622 - 623 - /* These routines rely on the bus (pci, platform, etc) 624 - * to handle powerdown and wakeup, and currently also on 625 - * transceivers that don't need any software attention to set up 626 - * the right sort of wakeup. 627 - */ 628 - 629 - static int ehci_suspend (struct usb_hcd *hcd, pm_message_t message) 630 - { 631 - struct ehci_hcd *ehci = hcd_to_ehci (hcd); 632 - 633 - if (time_before (jiffies, ehci->next_statechange)) 634 - msleep (100); 635 - 636 - #ifdef CONFIG_USB_SUSPEND 637 - (void) usb_suspend_device (hcd->self.root_hub); 638 - #else 639 - usb_lock_device (hcd->self.root_hub); 640 - (void) ehci_hub_suspend (hcd); 641 - usb_unlock_device (hcd->self.root_hub); 642 - #endif 643 - 644 - // save (PCI) FLADJ in case of Vaux power loss 645 - // ... we'd only use it to handle clock skew 646 - 647 - return 0; 648 - } 649 - 650 - static int ehci_resume (struct usb_hcd *hcd) 651 - { 652 - struct ehci_hcd *ehci = hcd_to_ehci (hcd); 653 - unsigned port; 654 - struct usb_device *root = hcd->self.root_hub; 655 - int retval = -EINVAL; 656 - 657 - // maybe restore (PCI) FLADJ 658 - 659 - if (time_before (jiffies, ehci->next_statechange)) 660 - msleep (100); 661 - 662 - /* If any port is suspended (or owned by the companion), 663 - * we know we can/must resume the HC (and mustn't reset it). 664 - */ 665 - for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) { 666 - u32 status; 667 - port--; 668 - status = readl (&ehci->regs->port_status [port]); 669 - if (!(status & PORT_POWER)) 670 - continue; 671 - if (status & (PORT_SUSPEND | PORT_OWNER)) { 672 - down (&hcd->self.root_hub->serialize); 673 - retval = ehci_hub_resume (hcd); 674 - up (&hcd->self.root_hub->serialize); 675 - break; 676 - } 677 - if (!root->children [port]) 678 - continue; 679 - dbg_port (ehci, __FUNCTION__, port + 1, status); 680 - usb_set_device_state (root->children[port], 681 - USB_STATE_NOTATTACHED); 682 - } 683 - 684 - /* Else reset, to cope with power loss or flush-to-storage 685 - * style "resume" having activated BIOS during reboot. 686 - */ 687 - if (port == 0) { 688 - (void) ehci_halt (ehci); 689 - (void) ehci_reset (ehci); 690 - (void) ehci_hc_reset (hcd); 691 - 692 - /* emptying the schedule aborts any urbs */ 693 - spin_lock_irq (&ehci->lock); 694 - if (ehci->reclaim) 695 - ehci->reclaim_ready = 1; 696 - ehci_work (ehci, NULL); 697 - spin_unlock_irq (&ehci->lock); 698 - 699 - /* restart; khubd will disconnect devices */ 700 - retval = ehci_start (hcd); 701 - 702 - /* here we "know" root ports should always stay powered; 703 - * but some controllers may lose all power. 704 - */ 705 - ehci_port_power (ehci, 1); 706 - } 707 - 708 - return retval; 709 - } 710 - 711 - #endif 712 - 713 - /*-------------------------------------------------------------------------*/ 714 - 715 - /* 716 - * ehci_work is called from some interrupts, timers, and so on. 717 - * it calls driver completion functions, after dropping ehci->lock. 718 - */ 719 - static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs) 720 - { 721 - timer_action_done (ehci, TIMER_IO_WATCHDOG); 722 - if (ehci->reclaim_ready) 723 - end_unlink_async (ehci, regs); 724 - 725 - /* another CPU may drop ehci->lock during a schedule scan while 726 - * it reports urb completions. this flag guards against bogus 727 - * attempts at re-entrant schedule scanning. 728 - */ 729 - if (ehci->scanning) 730 - return; 731 - ehci->scanning = 1; 732 - scan_async (ehci, regs); 733 - if (ehci->next_uframe != -1) 734 - scan_periodic (ehci, regs); 735 - ehci->scanning = 0; 736 - 737 - /* the IO watchdog guards against hardware or driver bugs that 738 - * misplace IRQs, and should let us run completely without IRQs. 739 - * such lossage has been observed on both VT6202 and VT8235. 740 - */ 741 - if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && 742 - (ehci->async->qh_next.ptr != NULL || 743 - ehci->periodic_sched != 0)) 744 - timer_action (ehci, TIMER_IO_WATCHDOG); 745 688 } 746 689 747 690 /*-------------------------------------------------------------------------*/ ··· 872 1179 return; 873 1180 } 874 1181 875 - /*-------------------------------------------------------------------------*/ 876 - 877 - static const struct hc_driver ehci_driver = { 878 - .description = hcd_name, 879 - .product_desc = "EHCI Host Controller", 880 - .hcd_priv_size = sizeof(struct ehci_hcd), 881 - 882 - /* 883 - * generic hardware linkage 884 - */ 885 - .irq = ehci_irq, 886 - .flags = HCD_MEMORY | HCD_USB2, 887 - 888 - /* 889 - * basic lifecycle operations 890 - */ 891 - .reset = ehci_hc_reset, 892 - .start = ehci_start, 893 - #ifdef CONFIG_PM 894 - .suspend = ehci_suspend, 895 - .resume = ehci_resume, 896 - #endif 897 - .stop = ehci_stop, 898 - 899 - /* 900 - * managing i/o requests and associated device resources 901 - */ 902 - .urb_enqueue = ehci_urb_enqueue, 903 - .urb_dequeue = ehci_urb_dequeue, 904 - .endpoint_disable = ehci_endpoint_disable, 905 - 906 - /* 907 - * scheduling support 908 - */ 909 - .get_frame_number = ehci_get_frame, 910 - 911 - /* 912 - * root hub support 913 - */ 914 - .hub_status_data = ehci_hub_status_data, 915 - .hub_control = ehci_hub_control, 916 - .hub_suspend = ehci_hub_suspend, 917 - .hub_resume = ehci_hub_resume, 918 - }; 1182 + static int ehci_get_frame (struct usb_hcd *hcd) 1183 + { 1184 + struct ehci_hcd *ehci = hcd_to_ehci (hcd); 1185 + return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size; 1186 + } 919 1187 920 1188 /*-------------------------------------------------------------------------*/ 921 - 922 - /* EHCI 1.0 doesn't require PCI */ 923 - 924 - #ifdef CONFIG_PCI 925 - 926 - /* PCI driver selection metadata; PCI hotplugging uses this */ 927 - static const struct pci_device_id pci_ids [] = { { 928 - /* handle any USB 2.0 EHCI controller */ 929 - PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0), 930 - .driver_data = (unsigned long) &ehci_driver, 931 - }, 932 - { /* end: all zeroes */ } 933 - }; 934 - MODULE_DEVICE_TABLE (pci, pci_ids); 935 - 936 - /* pci driver glue; this is a "new style" PCI driver module */ 937 - static struct pci_driver ehci_pci_driver = { 938 - .name = (char *) hcd_name, 939 - .id_table = pci_ids, 940 - 941 - .probe = usb_hcd_pci_probe, 942 - .remove = usb_hcd_pci_remove, 943 - 944 - #ifdef CONFIG_PM 945 - .suspend = usb_hcd_pci_suspend, 946 - .resume = usb_hcd_pci_resume, 947 - #endif 948 - }; 949 - 950 - #endif /* PCI */ 951 - 952 1189 953 1190 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC 954 1191 ··· 886 1263 MODULE_AUTHOR (DRIVER_AUTHOR); 887 1264 MODULE_LICENSE ("GPL"); 888 1265 889 - static int __init init (void) 890 - { 891 - if (usb_disabled()) 892 - return -ENODEV; 1266 + #ifdef CONFIG_PCI 1267 + #include "ehci-pci.c" 1268 + #endif 893 1269 894 - pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", 895 - hcd_name, 896 - sizeof (struct ehci_qh), sizeof (struct ehci_qtd), 897 - sizeof (struct ehci_itd), sizeof (struct ehci_sitd)); 898 - 899 - return pci_register_driver (&ehci_pci_driver); 900 - } 901 - module_init (init); 902 - 903 - static void __exit cleanup (void) 904 - { 905 - pci_unregister_driver (&ehci_pci_driver); 906 - } 907 - module_exit (cleanup); 1270 + #if !defined(CONFIG_PCI) 1271 + #error "missing bus glue for ehci-hcd" 1272 + #endif
+414
drivers/usb/host/ehci-pci.c
··· 1 + /* 2 + * EHCI HCD (Host Controller Driver) PCI Bus Glue. 3 + * 4 + * Copyright (c) 2000-2004 by David Brownell 5 + * 6 + * This program is free software; you can redistribute it and/or modify it 7 + * under the terms of the GNU General Public License as published by the 8 + * Free Software Foundation; either version 2 of the License, or (at your 9 + * option) any later version. 10 + * 11 + * This program is distributed in the hope that it will be useful, but 12 + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 + * for more details. 15 + * 16 + * You should have received a copy of the GNU General Public License 17 + * along with this program; if not, write to the Free Software Foundation, 18 + * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 + */ 20 + 21 + #ifndef CONFIG_PCI 22 + #error "This file is PCI bus glue. CONFIG_PCI must be defined." 23 + #endif 24 + 25 + /*-------------------------------------------------------------------------*/ 26 + 27 + /* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/... 28 + * off the controller (maybe it can boot from highspeed USB disks). 29 + */ 30 + static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap) 31 + { 32 + struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 33 + 34 + /* always say Linux will own the hardware */ 35 + pci_write_config_byte(pdev, where + 3, 1); 36 + 37 + /* maybe wait a while for BIOS to respond */ 38 + if (cap & (1 << 16)) { 39 + int msec = 5000; 40 + 41 + do { 42 + msleep(10); 43 + msec -= 10; 44 + pci_read_config_dword(pdev, where, &cap); 45 + } while ((cap & (1 << 16)) && msec); 46 + if (cap & (1 << 16)) { 47 + ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n", 48 + where, cap); 49 + // some BIOS versions seem buggy... 50 + // return 1; 51 + ehci_warn (ehci, "continuing after BIOS bug...\n"); 52 + /* disable all SMIs, and clear "BIOS owns" flag */ 53 + pci_write_config_dword(pdev, where + 4, 0); 54 + pci_write_config_byte(pdev, where + 2, 0); 55 + } else 56 + ehci_dbg(ehci, "BIOS handoff succeeded\n"); 57 + } 58 + return 0; 59 + } 60 + 61 + /* called by khubd or root hub init threads */ 62 + static int ehci_pci_reset (struct usb_hcd *hcd) 63 + { 64 + struct ehci_hcd *ehci = hcd_to_ehci (hcd); 65 + u32 temp; 66 + unsigned count = 256/4; 67 + 68 + spin_lock_init (&ehci->lock); 69 + 70 + ehci->caps = hcd->regs; 71 + ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase)); 72 + dbg_hcs_params (ehci, "reset"); 73 + dbg_hcc_params (ehci, "reset"); 74 + 75 + /* cache this readonly data; minimize chip reads */ 76 + ehci->hcs_params = readl (&ehci->caps->hcs_params); 77 + 78 + if (hcd->self.controller->bus == &pci_bus_type) { 79 + struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 80 + 81 + switch (pdev->vendor) { 82 + case PCI_VENDOR_ID_TDI: 83 + if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { 84 + ehci->is_tdi_rh_tt = 1; 85 + tdi_reset (ehci); 86 + } 87 + break; 88 + case PCI_VENDOR_ID_AMD: 89 + /* AMD8111 EHCI doesn't work, according to AMD errata */ 90 + if (pdev->device == 0x7463) { 91 + ehci_info (ehci, "ignoring AMD8111 (errata)\n"); 92 + return -EIO; 93 + } 94 + break; 95 + case PCI_VENDOR_ID_NVIDIA: 96 + /* NVidia reports that certain chips don't handle 97 + * QH, ITD, or SITD addresses above 2GB. (But TD, 98 + * data buffer, and periodic schedule are normal.) 99 + */ 100 + switch (pdev->device) { 101 + case 0x003c: /* MCP04 */ 102 + case 0x005b: /* CK804 */ 103 + case 0x00d8: /* CK8 */ 104 + case 0x00e8: /* CK8S */ 105 + if (pci_set_consistent_dma_mask(pdev, 106 + DMA_31BIT_MASK) < 0) 107 + ehci_warn (ehci, "can't enable NVidia " 108 + "workaround for >2GB RAM\n"); 109 + break; 110 + } 111 + break; 112 + } 113 + 114 + /* optional debug port, normally in the first BAR */ 115 + temp = pci_find_capability (pdev, 0x0a); 116 + if (temp) { 117 + pci_read_config_dword(pdev, temp, &temp); 118 + temp >>= 16; 119 + if ((temp & (3 << 13)) == (1 << 13)) { 120 + temp &= 0x1fff; 121 + ehci->debug = hcd->regs + temp; 122 + temp = readl (&ehci->debug->control); 123 + ehci_info (ehci, "debug port %d%s\n", 124 + HCS_DEBUG_PORT(ehci->hcs_params), 125 + (temp & DBGP_ENABLED) 126 + ? " IN USE" 127 + : ""); 128 + if (!(temp & DBGP_ENABLED)) 129 + ehci->debug = NULL; 130 + } 131 + } 132 + 133 + temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params)); 134 + } else 135 + temp = 0; 136 + 137 + /* EHCI 0.96 and later may have "extended capabilities" */ 138 + while (temp && count--) { 139 + u32 cap; 140 + 141 + pci_read_config_dword (to_pci_dev(hcd->self.controller), 142 + temp, &cap); 143 + ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp); 144 + switch (cap & 0xff) { 145 + case 1: /* BIOS/SMM/... handoff */ 146 + if (bios_handoff (ehci, temp, cap) != 0) 147 + return -EOPNOTSUPP; 148 + break; 149 + case 0: /* illegal reserved capability */ 150 + ehci_warn (ehci, "illegal capability!\n"); 151 + cap = 0; 152 + /* FALLTHROUGH */ 153 + default: /* unknown */ 154 + break; 155 + } 156 + temp = (cap >> 8) & 0xff; 157 + } 158 + if (!count) { 159 + ehci_err (ehci, "bogus capabilities ... PCI problems!\n"); 160 + return -EIO; 161 + } 162 + if (ehci_is_TDI(ehci)) 163 + ehci_reset (ehci); 164 + 165 + ehci_port_power (ehci, 0); 166 + 167 + /* at least the Genesys GL880S needs fixup here */ 168 + temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); 169 + temp &= 0x0f; 170 + if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { 171 + ehci_dbg (ehci, "bogus port configuration: " 172 + "cc=%d x pcc=%d < ports=%d\n", 173 + HCS_N_CC(ehci->hcs_params), 174 + HCS_N_PCC(ehci->hcs_params), 175 + HCS_N_PORTS(ehci->hcs_params)); 176 + 177 + if (hcd->self.controller->bus == &pci_bus_type) { 178 + struct pci_dev *pdev; 179 + 180 + pdev = to_pci_dev(hcd->self.controller); 181 + switch (pdev->vendor) { 182 + case 0x17a0: /* GENESYS */ 183 + /* GL880S: should be PORTS=2 */ 184 + temp |= (ehci->hcs_params & ~0xf); 185 + ehci->hcs_params = temp; 186 + break; 187 + case PCI_VENDOR_ID_NVIDIA: 188 + /* NF4: should be PCC=10 */ 189 + break; 190 + } 191 + } 192 + } 193 + 194 + /* force HC to halt state */ 195 + return ehci_halt (ehci); 196 + } 197 + 198 + static int ehci_pci_start (struct usb_hcd *hcd) 199 + { 200 + struct ehci_hcd *ehci = hcd_to_ehci (hcd); 201 + int result = 0; 202 + 203 + if (hcd->self.controller->bus == &pci_bus_type) { 204 + struct pci_dev *pdev; 205 + u16 port_wake; 206 + 207 + pdev = to_pci_dev(hcd->self.controller); 208 + 209 + /* Serial Bus Release Number is at PCI 0x60 offset */ 210 + pci_read_config_byte(pdev, 0x60, &ehci->sbrn); 211 + 212 + /* port wake capability, reported by boot firmware */ 213 + pci_read_config_word(pdev, 0x62, &port_wake); 214 + hcd->can_wakeup = (port_wake & 1) != 0; 215 + 216 + /* help hc dma work well with cachelines */ 217 + result = pci_set_mwi(pdev); 218 + if (result) 219 + ehci_dbg(ehci, "unable to enable MWI - not fatal.\n"); 220 + } 221 + 222 + return ehci_run (hcd); 223 + } 224 + 225 + /* always called by thread; normally rmmod */ 226 + 227 + static void ehci_pci_stop (struct usb_hcd *hcd) 228 + { 229 + ehci_stop (hcd); 230 + } 231 + 232 + /*-------------------------------------------------------------------------*/ 233 + 234 + #ifdef CONFIG_PM 235 + 236 + /* suspend/resume, section 4.3 */ 237 + 238 + /* These routines rely on the bus (pci, platform, etc) 239 + * to handle powerdown and wakeup, and currently also on 240 + * transceivers that don't need any software attention to set up 241 + * the right sort of wakeup. 242 + */ 243 + 244 + static int ehci_pci_suspend (struct usb_hcd *hcd, pm_message_t message) 245 + { 246 + struct ehci_hcd *ehci = hcd_to_ehci (hcd); 247 + 248 + if (time_before (jiffies, ehci->next_statechange)) 249 + msleep (100); 250 + 251 + #ifdef CONFIG_USB_SUSPEND 252 + (void) usb_suspend_device (hcd->self.root_hub); 253 + #else 254 + usb_lock_device (hcd->self.root_hub); 255 + (void) ehci_hub_suspend (hcd); 256 + usb_unlock_device (hcd->self.root_hub); 257 + #endif 258 + 259 + // save (PCI) FLADJ in case of Vaux power loss 260 + // ... we'd only use it to handle clock skew 261 + 262 + return 0; 263 + } 264 + 265 + static int ehci_pci_resume (struct usb_hcd *hcd) 266 + { 267 + struct ehci_hcd *ehci = hcd_to_ehci (hcd); 268 + unsigned port; 269 + struct usb_device *root = hcd->self.root_hub; 270 + int retval = -EINVAL; 271 + 272 + // maybe restore (PCI) FLADJ 273 + 274 + if (time_before (jiffies, ehci->next_statechange)) 275 + msleep (100); 276 + 277 + /* If any port is suspended (or owned by the companion), 278 + * we know we can/must resume the HC (and mustn't reset it). 279 + */ 280 + for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) { 281 + u32 status; 282 + port--; 283 + status = readl (&ehci->regs->port_status [port]); 284 + if (!(status & PORT_POWER)) 285 + continue; 286 + if (status & (PORT_SUSPEND | PORT_OWNER)) { 287 + down (&hcd->self.root_hub->serialize); 288 + retval = ehci_hub_resume (hcd); 289 + up (&hcd->self.root_hub->serialize); 290 + break; 291 + } 292 + if (!root->children [port]) 293 + continue; 294 + dbg_port (ehci, __FUNCTION__, port + 1, status); 295 + usb_set_device_state (root->children[port], 296 + USB_STATE_NOTATTACHED); 297 + } 298 + 299 + /* Else reset, to cope with power loss or flush-to-storage 300 + * style "resume" having activated BIOS during reboot. 301 + */ 302 + if (port == 0) { 303 + (void) ehci_halt (ehci); 304 + (void) ehci_reset (ehci); 305 + (void) ehci_pci_reset (hcd); 306 + 307 + /* emptying the schedule aborts any urbs */ 308 + spin_lock_irq (&ehci->lock); 309 + if (ehci->reclaim) 310 + ehci->reclaim_ready = 1; 311 + ehci_work (ehci, NULL); 312 + spin_unlock_irq (&ehci->lock); 313 + 314 + /* restart; khubd will disconnect devices */ 315 + retval = ehci_run (hcd); 316 + 317 + /* here we "know" root ports should always stay powered; 318 + * but some controllers may lose all power. 319 + */ 320 + ehci_port_power (ehci, 1); 321 + } 322 + 323 + return retval; 324 + } 325 + #endif 326 + 327 + static const struct hc_driver ehci_pci_hc_driver = { 328 + .description = hcd_name, 329 + .product_desc = "EHCI Host Controller", 330 + .hcd_priv_size = sizeof(struct ehci_hcd), 331 + 332 + /* 333 + * generic hardware linkage 334 + */ 335 + .irq = ehci_irq, 336 + .flags = HCD_MEMORY | HCD_USB2, 337 + 338 + /* 339 + * basic lifecycle operations 340 + */ 341 + .reset = ehci_pci_reset, 342 + .start = ehci_pci_start, 343 + #ifdef CONFIG_PM 344 + .suspend = ehci_pci_suspend, 345 + .resume = ehci_pci_resume, 346 + #endif 347 + .stop = ehci_pci_stop, 348 + 349 + /* 350 + * managing i/o requests and associated device resources 351 + */ 352 + .urb_enqueue = ehci_urb_enqueue, 353 + .urb_dequeue = ehci_urb_dequeue, 354 + .endpoint_disable = ehci_endpoint_disable, 355 + 356 + /* 357 + * scheduling support 358 + */ 359 + .get_frame_number = ehci_get_frame, 360 + 361 + /* 362 + * root hub support 363 + */ 364 + .hub_status_data = ehci_hub_status_data, 365 + .hub_control = ehci_hub_control, 366 + .hub_suspend = ehci_hub_suspend, 367 + .hub_resume = ehci_hub_resume, 368 + }; 369 + 370 + /*-------------------------------------------------------------------------*/ 371 + 372 + /* PCI driver selection metadata; PCI hotplugging uses this */ 373 + static const struct pci_device_id pci_ids [] = { { 374 + /* handle any USB 2.0 EHCI controller */ 375 + PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0), 376 + .driver_data = (unsigned long) &ehci_pci_hc_driver, 377 + }, 378 + { /* end: all zeroes */ } 379 + }; 380 + MODULE_DEVICE_TABLE (pci, pci_ids); 381 + 382 + /* pci driver glue; this is a "new style" PCI driver module */ 383 + static struct pci_driver ehci_pci_driver = { 384 + .name = (char *) hcd_name, 385 + .id_table = pci_ids, 386 + 387 + .probe = usb_hcd_pci_probe, 388 + .remove = usb_hcd_pci_remove, 389 + 390 + #ifdef CONFIG_PM 391 + .suspend = usb_hcd_pci_suspend, 392 + .resume = usb_hcd_pci_resume, 393 + #endif 394 + }; 395 + 396 + static int __init ehci_hcd_pci_init (void) 397 + { 398 + if (usb_disabled()) 399 + return -ENODEV; 400 + 401 + pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", 402 + hcd_name, 403 + sizeof (struct ehci_qh), sizeof (struct ehci_qtd), 404 + sizeof (struct ehci_itd), sizeof (struct ehci_sitd)); 405 + 406 + return pci_register_driver (&ehci_pci_driver); 407 + } 408 + module_init (ehci_hcd_pci_init); 409 + 410 + static void __exit ehci_hcd_pci_cleanup (void) 411 + { 412 + pci_unregister_driver (&ehci_pci_driver); 413 + } 414 + module_exit (ehci_hcd_pci_cleanup);
+1
drivers/usb/host/ehci.h
··· 97 97 #else 98 98 # define COUNT(x) do {} while (0) 99 99 #endif 100 + u8 sbrn; /* packed release number */ 100 101 }; 101 102 102 103 /* convert between an HCD pointer and the corresponding EHCI_HCD */