tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

Merge tag 'gpio-fixes-for-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio fix from Bartosz Golaszewski:

- convert regular spinlock to raw spinlock in gpio-xilinx to avoid a
lockdep splat

* tag 'gpio-fixes-for-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
gpio: xilinx: Convert gpio_lock to raw spinlock

Linus Torvalds 7fed891d 5e74b9bf

options
unified split
Changed files
+16 -16
drivers
gpio
gpio-xilinx.c
+16 -16
drivers/gpio/gpio-xilinx.c
··· 65 65 DECLARE_BITMAP(state, 64); 66 66 DECLARE_BITMAP(last_irq_read, 64); 67 67 DECLARE_BITMAP(dir, 64); 68 - spinlock_t gpio_lock; /* For serializing operations */ 68 + raw_spinlock_t gpio_lock; /* For serializing operations */ 69 69 int irq; 70 70 DECLARE_BITMAP(enable, 64); 71 71 DECLARE_BITMAP(rising_edge, 64); ··· 179 179 struct xgpio_instance *chip = gpiochip_get_data(gc); 180 180 int bit = xgpio_to_bit(chip, gpio); 181 181 182 - spin_lock_irqsave(&chip->gpio_lock, flags); 182 + raw_spin_lock_irqsave(&chip->gpio_lock, flags); 183 183 184 184 /* Write to GPIO signal and set its direction to output */ 185 185 __assign_bit(bit, chip->state, val); 186 186 187 187 xgpio_write_ch(chip, XGPIO_DATA_OFFSET, bit, chip->state); 188 188 189 - spin_unlock_irqrestore(&chip->gpio_lock, flags); 189 + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); 190 190 } 191 191 192 192 /** ··· 210 210 bitmap_remap(hw_mask, mask, chip->sw_map, chip->hw_map, 64); 211 211 bitmap_remap(hw_bits, bits, chip->sw_map, chip->hw_map, 64); 212 212 213 - spin_lock_irqsave(&chip->gpio_lock, flags); 213 + raw_spin_lock_irqsave(&chip->gpio_lock, flags); 214 214 215 215 bitmap_replace(state, chip->state, hw_bits, hw_mask, 64); 216 216 ··· 218 218 219 219 bitmap_copy(chip->state, state, 64); 220 220 221 - spin_unlock_irqrestore(&chip->gpio_lock, flags); 221 + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); 222 222 } 223 223 224 224 /** ··· 236 236 struct xgpio_instance *chip = gpiochip_get_data(gc); 237 237 int bit = xgpio_to_bit(chip, gpio); 238 238 239 - spin_lock_irqsave(&chip->gpio_lock, flags); 239 + raw_spin_lock_irqsave(&chip->gpio_lock, flags); 240 240 241 241 /* Set the GPIO bit in shadow register and set direction as input */ 242 242 __set_bit(bit, chip->dir); 243 243 xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir); 244 244 245 - spin_unlock_irqrestore(&chip->gpio_lock, flags); 245 + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); 246 246 247 247 return 0; 248 248 } ··· 265 265 struct xgpio_instance *chip = gpiochip_get_data(gc); 266 266 int bit = xgpio_to_bit(chip, gpio); 267 267 268 - spin_lock_irqsave(&chip->gpio_lock, flags); 268 + raw_spin_lock_irqsave(&chip->gpio_lock, flags); 269 269 270 270 /* Write state of GPIO signal */ 271 271 __assign_bit(bit, chip->state, val); ··· 275 275 __clear_bit(bit, chip->dir); 276 276 xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir); 277 277 278 - spin_unlock_irqrestore(&chip->gpio_lock, flags); 278 + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); 279 279 280 280 return 0; 281 281 } ··· 398 398 int bit = xgpio_to_bit(chip, irq_offset); 399 399 u32 mask = BIT(bit / 32), temp; 400 400 401 - spin_lock_irqsave(&chip->gpio_lock, flags); 401 + raw_spin_lock_irqsave(&chip->gpio_lock, flags); 402 402 403 403 __clear_bit(bit, chip->enable); 404 404 ··· 408 408 temp &= ~mask; 409 409 xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, temp); 410 410 } 411 - spin_unlock_irqrestore(&chip->gpio_lock, flags); 411 + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); 412 412 413 413 gpiochip_disable_irq(&chip->gc, irq_offset); 414 414 } ··· 428 428 429 429 gpiochip_enable_irq(&chip->gc, irq_offset); 430 430 431 - spin_lock_irqsave(&chip->gpio_lock, flags); 431 + raw_spin_lock_irqsave(&chip->gpio_lock, flags); 432 432 433 433 __set_bit(bit, chip->enable); 434 434 ··· 447 447 xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, val); 448 448 } 449 449 450 - spin_unlock_irqrestore(&chip->gpio_lock, flags); 450 + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); 451 451 } 452 452 453 453 /** ··· 512 512 513 513 chained_irq_enter(irqchip, desc); 514 514 515 - spin_lock(&chip->gpio_lock); 515 + raw_spin_lock(&chip->gpio_lock); 516 516 517 517 xgpio_read_ch_all(chip, XGPIO_DATA_OFFSET, all); 518 518 ··· 529 529 bitmap_copy(chip->last_irq_read, all, 64); 530 530 bitmap_or(all, rising, falling, 64); 531 531 532 - spin_unlock(&chip->gpio_lock); 532 + raw_spin_unlock(&chip->gpio_lock); 533 533 534 534 dev_dbg(gc->parent, "IRQ rising %*pb falling %*pb\n", 64, rising, 64, falling); 535 535 ··· 620 620 bitmap_set(chip->hw_map, 0, width[0]); 621 621 bitmap_set(chip->hw_map, 32, width[1]); 622 622 623 - spin_lock_init(&chip->gpio_lock); 623 + raw_spin_lock_init(&chip->gpio_lock); 624 624 625 625 chip->gc.base = -1; 626 626 chip->gc.ngpio = bitmap_weight(chip->hw_map, 64);