arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.4.I7bd7d9a8da5e2894711b700a1127e6902a2b2f1d@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

authored by

Enric Balletbo i Serra and committed by

Matthias Brugger 4 years ago 7fdb1bc3 858d8e14

2 changed files

expand all

arch

arm64

boot

dts

mediatek

mt8173.dtsi

include

dt-bindings

reset

mt8173-resets.h

arch/arm64/boot/dts/mediatek/mt8173.dtsi

··· 996 996 assigned-clocks = <&topckgen CLK_TOP_MM_SEL>; 997 997 assigned-clock-rates = <400000000>; 998 998 #clock-cells = <1>; 999 + #reset-cells = <1>; 999 1000 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, 1000 1001 <&gce 1 CMDQ_THR_PRIO_HIGHEST>; 1001 1002 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; ··· 1223 1222 <&mmsys CLK_MM_DSI0_DIGITAL>, 1224 1223 <&mipi_tx0>; 1225 1224 clock-names = "engine", "digital", "hs"; 1225 + resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>; 1226 1226 phys = <&mipi_tx0>; 1227 1227 phy-names = "dphy"; 1228 1228 status = "disabled";

include/dt-bindings/reset/mt8173-resets.h

··· 27 27 #define MT8173_INFRA_GCE_FAXI_RST 40 28 28 #define MT8173_INFRA_MMIOMMURST 47 29 29 30 + /* MMSYS resets */ 31 + #define MT8173_MMSYS_SW0_RST_B_DISP_DSI0 25 30 32 31 33 /* PERICFG resets */ 32 34 #define MT8173_PERI_UART0_SW_RST 0