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fbdev/atyfb: Fix DSP config on some PowerMacs & PowerBooks

Since the complete re-write in 2.6.10, some PowerMacs (At least PowerMac 5500
and PowerMac G3 Beige rev A) with ATI Mach64 chip have suffered from unstable
columns in their framebuffer image. This seems to depend on a value (4) read
from PLL_EXT_CNTL register, which leads to incorrect DSP config parameters to
be written to the chip. This patch uses a value calculated by aty_init_pll_ct
instead, as a starting point.

There are questions as to whether this should be extended to other platforms
or maybe made dependent on specific chip types, but in the meantime, this has
been tested on various powermacs and works for them so let's commit it.

Signed-off-by: Risto Suominen <Risto.Suominen@gmail.com>
Tested-by: Michael Pettersson <mike@it.uu.se>
Cc: <stable@kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

authored by

Risto Suominen and committed by
Benjamin Herrenschmidt
7fbb7cad 59b608c2

+11
+11
drivers/video/aty/mach64_ct.c
··· 8 8 #include <asm/io.h> 9 9 #include <video/mach64.h> 10 10 #include "atyfb.h" 11 + #ifdef CONFIG_PPC 12 + #include <asm/machdep.h> 13 + #endif 11 14 12 15 #undef DEBUG 13 16 ··· 538 535 } 539 536 pll->ct.xclk_post_div_real = postdividers[xpost_div]; 540 537 pll->ct.mclk_fb_div = q * pll->ct.xclk_post_div_real / 8; 538 + 539 + #ifdef CONFIG_PPC 540 + if (machine_is(powermac)) { 541 + /* Override PLL_EXT_CNTL & 0x07. */ 542 + pll->ct.xclk_post_div = xpost_div; 543 + pll->ct.xclk_ref_div = 1; 544 + } 545 + #endif 541 546 542 547 #ifdef DEBUG 543 548 pllmclk = (1000000 * pll->ct.mclk_fb_mult * pll->ct.mclk_fb_div) /