Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: qcom: videocc-sdm845: convert to parent data

Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-14-dmitry.baryshkov@linaro.org
[sboyd@kernel.org: Silence checkpatch block comments]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Dmitry Baryshkov and committed by
Stephen Boyd
7f195c06 040184b7

+29 -27
+29 -27
drivers/clk/qcom/videocc-sdm845.c
··· 21 21 enum { 22 22 P_BI_TCXO, 23 23 P_CORE_BI_PLL_TEST_SE, 24 - P_VIDEO_PLL0_OUT_EVEN, 25 24 P_VIDEO_PLL0_OUT_MAIN, 26 - P_VIDEO_PLL0_OUT_ODD, 27 - }; 28 - 29 - static const struct parent_map video_cc_parent_map_0[] = { 30 - { P_BI_TCXO, 0 }, 31 - { P_VIDEO_PLL0_OUT_MAIN, 1 }, 32 - { P_VIDEO_PLL0_OUT_EVEN, 2 }, 33 - { P_VIDEO_PLL0_OUT_ODD, 3 }, 34 - { P_CORE_BI_PLL_TEST_SE, 4 }, 35 - }; 36 - 37 - static const char * const video_cc_parent_names_0[] = { 38 - "bi_tcxo", 39 - "video_pll0", 40 - "video_pll0_out_even", 41 - "video_pll0_out_odd", 42 - "core_bi_pll_test_se", 25 + /* P_VIDEO_PLL0_OUT_EVEN, */ 26 + /* P_VIDEO_PLL0_OUT_ODD, */ 43 27 }; 44 28 45 29 static const struct alpha_pll_config video_pll0_config = { ··· 37 53 .clkr = { 38 54 .hw.init = &(struct clk_init_data){ 39 55 .name = "video_pll0", 40 - .parent_names = (const char *[]){ "bi_tcxo" }, 56 + .parent_data = &(const struct clk_parent_data){ 57 + .fw_name = "bi_tcxo", .name = "bi_tcxo", 58 + }, 41 59 .num_parents = 1, 42 60 .ops = &clk_alpha_pll_fabia_ops, 43 61 }, 44 62 }, 63 + }; 64 + 65 + static const struct parent_map video_cc_parent_map_0[] = { 66 + { P_BI_TCXO, 0 }, 67 + { P_VIDEO_PLL0_OUT_MAIN, 1 }, 68 + /* { P_VIDEO_PLL0_OUT_EVEN, 2 }, */ 69 + /* { P_VIDEO_PLL0_OUT_ODD, 3 }, */ 70 + { P_CORE_BI_PLL_TEST_SE, 4 }, 71 + }; 72 + 73 + static const struct clk_parent_data video_cc_parent_data_0[] = { 74 + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, 75 + { .hw = &video_pll0.clkr.hw }, 76 + /* { .name = "video_pll0_out_even" }, */ 77 + /* { .name = "video_pll0_out_odd" }, */ 78 + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 45 79 }; 46 80 47 81 static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = { ··· 80 78 .freq_tbl = ftbl_video_cc_venus_clk_src, 81 79 .clkr.hw.init = &(struct clk_init_data){ 82 80 .name = "video_cc_venus_clk_src", 83 - .parent_names = video_cc_parent_names_0, 84 - .num_parents = 5, 81 + .parent_data = video_cc_parent_data_0, 82 + .num_parents = ARRAY_SIZE(video_cc_parent_data_0), 85 83 .flags = CLK_SET_RATE_PARENT, 86 84 .ops = &clk_rcg2_shared_ops, 87 85 }, ··· 160 158 .enable_mask = BIT(0), 161 159 .hw.init = &(struct clk_init_data){ 162 160 .name = "video_cc_vcodec0_core_clk", 163 - .parent_names = (const char *[]){ 164 - "video_cc_venus_clk_src", 161 + .parent_hws = (const struct clk_hw*[]){ 162 + &video_cc_venus_clk_src.clkr.hw, 165 163 }, 166 164 .num_parents = 1, 167 165 .flags = CLK_SET_RATE_PARENT, ··· 191 189 .enable_mask = BIT(0), 192 190 .hw.init = &(struct clk_init_data){ 193 191 .name = "video_cc_vcodec1_core_clk", 194 - .parent_names = (const char *[]){ 195 - "video_cc_venus_clk_src", 192 + .parent_hws = (const struct clk_hw*[]){ 193 + &video_cc_venus_clk_src.clkr.hw, 196 194 }, 197 195 .num_parents = 1, 198 196 .flags = CLK_SET_RATE_PARENT, ··· 235 233 .enable_mask = BIT(0), 236 234 .hw.init = &(struct clk_init_data){ 237 235 .name = "video_cc_venus_ctl_core_clk", 238 - .parent_names = (const char *[]){ 239 - "video_cc_venus_clk_src", 236 + .parent_hws = (const struct clk_hw*[]){ 237 + &video_cc_venus_clk_src.clkr.hw, 240 238 }, 241 239 .num_parents = 1, 242 240 .flags = CLK_SET_RATE_PARENT,