x86: mrst: Parse SFI timer table for all timer configs

Penwell has APB timer based watchdog timers, it requires platform code to parse
SFI MTMR tables in order to claim its timer.

This patch will always parse SFI MTMR regardless of system timer configuration
choices. Otherwise, SFI MTMR table may not get parsed if running on Medfield
with always-on local APIC timers and constant TSC. Watchdog timer driver will
then not get a timer to use.

Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
LKML-Reference: <20101109112800.20591.10802.stgit@localhost.localdomain>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

authored by

Jacob Pan and committed by
Thomas Gleixner
7f05dec3 1da4b1c6

+1 -1
+1 -1
arch/x86/platform/mrst/mrst.c
··· 221 222 void __init mrst_time_init(void) 223 { 224 switch (mrst_timer_options) { 225 case MRST_TIMER_APBT_ONLY: 226 break; ··· 237 return; 238 } 239 /* we need at least one APB timer */ 240 - sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr); 241 pre_init_apic_IRQ0(); 242 apbt_time_init(); 243 }
··· 221 222 void __init mrst_time_init(void) 223 { 224 + sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr); 225 switch (mrst_timer_options) { 226 case MRST_TIMER_APBT_ONLY: 227 break; ··· 236 return; 237 } 238 /* we need at least one APB timer */ 239 pre_init_apic_IRQ0(); 240 apbt_time_init(); 241 }