[AGPGART] Fix PCI-posting flush typo.

Unfortunately there was a typo in one of the patches I sent,
(The one now committed to the agpgart tree).
It may cause a bus error on i810 type hardware.

Signed-off-by: Thomas Hellstrom <[e-mail]>
Signed-off-by: Dave Jones <[e-mail]>

drivers/char/agp/intel-agp.c

···
 			mem->memory[i], mem->type),
 			intel_i810_private.registers+I810_PTE_BASE+(j*4));
 	}
-	readl(intel_i810_private.registers+I810_PTE_BASE+(j-1*4));	/* PCI Posting. */
+	readl(intel_i810_private.registers+I810_PTE_BASE+((j-1)*4));	/* PCI Posting. */
 
 	agp_bridge->driver->tlb_flush(mem);
 	return 0;