+4
-4
arch/arm/kvm/coproc.c
+4
-4
arch/arm/kvm/coproc.c
···
478
478
479
479
/* ICC_SGI1R */
480
480
{ CRm64(12), Op1( 0), is64, access_gic_sgi},
481
-
/* ICC_ASGI1R */
482
-
{ CRm64(12), Op1( 1), is64, access_gic_sgi},
483
-
/* ICC_SGI0R */
484
-
{ CRm64(12), Op1( 2), is64, access_gic_sgi},
485
481
486
482
/* VBAR: swapped by interrupt.S. */
487
483
{ CRn(12), CRm( 0), Op1( 0), Op2( 0), is32,
488
484
NULL, reset_val, c12_VBAR, 0x00000000 },
489
485
486
+
/* ICC_ASGI1R */
487
+
{ CRm64(12), Op1( 1), is64, access_gic_sgi},
488
+
/* ICC_SGI0R */
489
+
{ CRm64(12), Op1( 2), is64, access_gic_sgi},
490
490
/* ICC_SRE */
491
491
{ CRn(12), CRm(12), Op1( 0), Op2(5), is32, access_gic_sre },
492
492
+5
-1
arch/x86/kvm/svm.c
+5
-1
arch/x86/kvm/svm.c
···
436
436
437
437
static inline bool svm_sev_enabled(void)
438
438
{
439
-
return max_sev_asid;
439
+
return IS_ENABLED(CONFIG_KVM_AMD_SEV) ? max_sev_asid : 0;
440
440
}
441
441
442
442
static inline bool sev_guest(struct kvm *kvm)
443
443
{
444
+
#ifdef CONFIG_KVM_AMD_SEV
444
445
struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
445
446
446
447
return sev->active;
448
+
#else
449
+
return false;
450
+
#endif
447
451
}
448
452
449
453
static inline int sev_get_asid(struct kvm *kvm)
+5
-1
arch/x86/kvm/vmx.c
+5
-1
arch/x86/kvm/vmx.c
···
1572
1572
goto out;
1573
1573
}
1574
1574
1575
+
/*
1576
+
* FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE hypercall needs the address of the
1577
+
* base of EPT PML4 table, strip off EPT configuration information.
1578
+
*/
1575
1579
ret = hyperv_flush_guest_mapping(
1576
-
to_vmx(kvm_get_vcpu(kvm, 0))->ept_pointer);
1580
+
to_vmx(kvm_get_vcpu(kvm, 0))->ept_pointer & PAGE_MASK);
1577
1581
1578
1582
out:
1579
1583
spin_unlock(&to_kvm_vmx(kvm)->ept_pointer_lock);