Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915/dpll: Rename crtc_get_shared_dpll

Rename crtc_get_shared_dpll to take into the individual PLL framework
which came in at DISPLAY_VER >= 14.
Also having shared dpll stuff also in intel_dpll.c is just confusing.

--v2
-Change naming to dpll_global to keep consistency with rest of the
naming

--v3
-Just use intel_dpll [Jani]

--v4
-Modify commit message [Jani]

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/20250515071801.2221120-9-suraj.kandpal@intel.com

+15 -15
+1 -1
drivers/gpu/drm/i915/display/intel_display.c
··· 4225 4225 crtc_state->update_wm_post = true; 4226 4226 4227 4227 if (intel_crtc_needs_modeset(crtc_state)) { 4228 - ret = intel_dpll_crtc_get_shared_dpll(state, crtc); 4228 + ret = intel_dpll_crtc_get_dpll(state, crtc); 4229 4229 if (ret) 4230 4230 return ret; 4231 4231 }
+12 -12
drivers/gpu/drm/i915/display/intel_dpll.c
··· 28 28 struct intel_dpll_global_funcs { 29 29 int (*crtc_compute_clock)(struct intel_atomic_state *state, 30 30 struct intel_crtc *crtc); 31 - int (*crtc_get_shared_dpll)(struct intel_atomic_state *state, 32 - struct intel_crtc *crtc); 31 + int (*crtc_get_dpll)(struct intel_atomic_state *state, 32 + struct intel_crtc *crtc); 33 33 }; 34 34 35 35 struct intel_limit { ··· 1177 1177 return 0; 1178 1178 } 1179 1179 1180 - static int hsw_crtc_get_shared_dpll(struct intel_atomic_state *state, 1181 - struct intel_crtc *crtc) 1180 + static int hsw_crtc_get_dpll(struct intel_atomic_state *state, 1181 + struct intel_crtc *crtc) 1182 1182 { 1183 1183 struct intel_display *display = to_intel_display(state); 1184 1184 struct intel_crtc_state *crtc_state = ··· 1405 1405 return ret; 1406 1406 } 1407 1407 1408 - static int ilk_crtc_get_shared_dpll(struct intel_atomic_state *state, 1409 - struct intel_crtc *crtc) 1408 + static int ilk_crtc_get_dpll(struct intel_atomic_state *state, 1409 + struct intel_crtc *crtc) 1410 1410 { 1411 1411 struct intel_crtc_state *crtc_state = 1412 1412 intel_atomic_get_new_crtc_state(state, crtc); ··· 1701 1701 1702 1702 static const struct intel_dpll_global_funcs hsw_dpll_funcs = { 1703 1703 .crtc_compute_clock = hsw_crtc_compute_clock, 1704 - .crtc_get_shared_dpll = hsw_crtc_get_shared_dpll, 1704 + .crtc_get_dpll = hsw_crtc_get_dpll, 1705 1705 }; 1706 1706 1707 1707 static const struct intel_dpll_global_funcs ilk_dpll_funcs = { 1708 1708 .crtc_compute_clock = ilk_crtc_compute_clock, 1709 - .crtc_get_shared_dpll = ilk_crtc_get_shared_dpll, 1709 + .crtc_get_dpll = ilk_crtc_get_dpll, 1710 1710 }; 1711 1711 1712 1712 static const struct intel_dpll_global_funcs chv_dpll_funcs = { ··· 1759 1759 return 0; 1760 1760 } 1761 1761 1762 - int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state, 1763 - struct intel_crtc *crtc) 1762 + int intel_dpll_crtc_get_dpll(struct intel_atomic_state *state, 1763 + struct intel_crtc *crtc) 1764 1764 { 1765 1765 struct intel_display *display = to_intel_display(state); 1766 1766 struct intel_crtc_state *crtc_state = ··· 1773 1773 if (!crtc_state->hw.enable || crtc_state->intel_dpll) 1774 1774 return 0; 1775 1775 1776 - if (!display->funcs.dpll->crtc_get_shared_dpll) 1776 + if (!display->funcs.dpll->crtc_get_dpll) 1777 1777 return 0; 1778 1778 1779 - ret = display->funcs.dpll->crtc_get_shared_dpll(state, crtc); 1779 + ret = display->funcs.dpll->crtc_get_dpll(state, crtc); 1780 1780 if (ret) { 1781 1781 drm_dbg_kms(display->drm, "[CRTC:%d:%s] Couldn't get a shared DPLL\n", 1782 1782 crtc->base.base.id, crtc->base.name);
+2 -2
drivers/gpu/drm/i915/display/intel_dpll.h
··· 19 19 void intel_dpll_init_clock_hook(struct intel_display *display); 20 20 int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state, 21 21 struct intel_crtc *crtc); 22 - int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state, 23 - struct intel_crtc *crtc); 22 + int intel_dpll_crtc_get_dpll(struct intel_atomic_state *state, 23 + struct intel_crtc *crtc); 24 24 int i9xx_calc_dpll_params(int refclk, struct dpll *clock); 25 25 u32 i9xx_dpll_compute_fp(const struct dpll *dpll); 26 26 void i9xx_dpll_get_hw_state(struct intel_crtc *crtc,