Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915: Drop struct_mutex from around i915_retire_requests()

We don't need to hold struct_mutex now for retiring requests, so drop it
from i915_retire_requests() and i915_gem_wait_for_idle(), finally
removing I915_WAIT_LOCKED for good.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191004134015.13204-8-chris@chris-wilson.co.uk

+213 -460
+1 -6
drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
··· 155 155 static void clear_pages_worker(struct work_struct *work) 156 156 { 157 157 struct clear_pages_work *w = container_of(work, typeof(*w), work); 158 - struct drm_i915_private *i915 = w->ce->engine->i915; 159 158 struct drm_i915_gem_object *obj = w->sleeve->vma->obj; 160 159 struct i915_vma *vma = w->sleeve->vma; 161 160 struct i915_request *rq; ··· 172 173 obj->read_domains = I915_GEM_GPU_DOMAINS; 173 174 obj->write_domain = 0; 174 175 175 - /* XXX: we need to kill this */ 176 - mutex_lock(&i915->drm.struct_mutex); 177 176 err = i915_vma_pin(vma, 0, 0, PIN_USER); 178 177 if (unlikely(err)) 179 - goto out_unlock; 178 + goto out_signal; 180 179 181 180 batch = intel_emit_vma_fill_blt(w->ce, vma, w->value); 182 181 if (IS_ERR(batch)) { ··· 226 229 intel_emit_vma_release(w->ce, batch); 227 230 out_unpin: 228 231 i915_vma_unpin(vma); 229 - out_unlock: 230 - mutex_unlock(&i915->drm.struct_mutex); 231 232 out_signal: 232 233 if (unlikely(err)) { 233 234 dma_fence_set_error(&w->dma, err);
+1 -19
drivers/gpu/drm/i915/gem/i915_gem_context.c
··· 1159 1159 } 1160 1160 1161 1161 static int 1162 - __intel_context_reconfigure_sseu(struct intel_context *ce, 1163 - struct intel_sseu sseu) 1162 + intel_context_reconfigure_sseu(struct intel_context *ce, struct intel_sseu sseu) 1164 1163 { 1165 1164 int ret; 1166 1165 ··· 1179 1180 1180 1181 unlock: 1181 1182 intel_context_unlock_pinned(ce); 1182 - return ret; 1183 - } 1184 - 1185 - static int 1186 - intel_context_reconfigure_sseu(struct intel_context *ce, struct intel_sseu sseu) 1187 - { 1188 - struct drm_i915_private *i915 = ce->engine->i915; 1189 - int ret; 1190 - 1191 - ret = mutex_lock_interruptible(&i915->drm.struct_mutex); 1192 - if (ret) 1193 - return ret; 1194 - 1195 - ret = __intel_context_reconfigure_sseu(ce, sseu); 1196 - 1197 - mutex_unlock(&i915->drm.struct_mutex); 1198 - 1199 1183 return ret; 1200 1184 } 1201 1185
+17 -28
drivers/gpu/drm/i915/gem/i915_gem_pm.c
··· 48 48 struct drm_i915_private *i915 = 49 49 container_of(work, typeof(*i915), gem.retire_work.work); 50 50 51 - /* Come back later if the device is busy... */ 52 - if (mutex_trylock(&i915->drm.struct_mutex)) { 53 - i915_retire_requests(i915); 54 - mutex_unlock(&i915->drm.struct_mutex); 55 - } 51 + i915_retire_requests(i915); 56 52 57 53 queue_delayed_work(i915->wq, 58 54 &i915->gem.retire_work, ··· 82 86 { 83 87 bool result = !intel_gt_is_wedged(gt); 84 88 85 - do { 86 - if (i915_gem_wait_for_idle(gt->i915, 87 - I915_WAIT_LOCKED | 88 - I915_WAIT_FOR_IDLE_BOOST, 89 - I915_GEM_IDLE_TIMEOUT) == -ETIME) { 90 - /* XXX hide warning from gem_eio */ 91 - if (i915_modparams.reset) { 92 - dev_err(gt->i915->drm.dev, 93 - "Failed to idle engines, declaring wedged!\n"); 94 - GEM_TRACE_DUMP(); 95 - } 96 - 97 - /* 98 - * Forcibly cancel outstanding work and leave 99 - * the gpu quiet. 100 - */ 101 - intel_gt_set_wedged(gt); 102 - result = false; 89 + if (i915_gem_wait_for_idle(gt->i915, 90 + I915_WAIT_FOR_IDLE_BOOST, 91 + I915_GEM_IDLE_TIMEOUT) == -ETIME) { 92 + /* XXX hide warning from gem_eio */ 93 + if (i915_modparams.reset) { 94 + dev_err(gt->i915->drm.dev, 95 + "Failed to idle engines, declaring wedged!\n"); 96 + GEM_TRACE_DUMP(); 103 97 } 104 - } while (i915_retire_requests(gt->i915) && result); 98 + 99 + /* 100 + * Forcibly cancel outstanding work and leave 101 + * the gpu quiet. 102 + */ 103 + intel_gt_set_wedged(gt); 104 + result = false; 105 + } 105 106 106 107 if (intel_gt_pm_wait_for_idle(gt)) 107 108 result = false; ··· 138 145 139 146 user_forcewake(&i915->gt, true); 140 147 141 - mutex_lock(&i915->drm.struct_mutex); 142 - 143 148 /* 144 149 * We have to flush all the executing contexts to main memory so 145 150 * that they can saved in the hibernation image. To ensure the last ··· 148 157 * not rely on its state. 149 158 */ 150 159 switch_to_kernel_context_sync(&i915->gt); 151 - 152 - mutex_unlock(&i915->drm.struct_mutex); 153 160 154 161 cancel_delayed_work_sync(&i915->gt.hangcheck.work); 155 162
+24 -16
drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
··· 7 7 #include <linux/prime_numbers.h> 8 8 9 9 #include "gt/intel_gt.h" 10 + #include "gt/intel_gt_pm.h" 10 11 11 12 #include "i915_selftest.h" 12 13 #include "selftests/i915_random.h" ··· 79 78 { 80 79 struct i915_vma *vma; 81 80 u32 __iomem *map; 82 - int err; 81 + int err = 0; 83 82 84 83 i915_gem_object_lock(obj); 85 84 err = i915_gem_object_set_to_gtt_domain(obj, true); ··· 91 90 if (IS_ERR(vma)) 92 91 return PTR_ERR(vma); 93 92 93 + intel_gt_pm_get(vma->vm->gt); 94 + 94 95 map = i915_vma_pin_iomap(vma); 95 96 i915_vma_unpin(vma); 96 - if (IS_ERR(map)) 97 - return PTR_ERR(map); 97 + if (IS_ERR(map)) { 98 + err = PTR_ERR(map); 99 + goto out_rpm; 100 + } 98 101 99 102 iowrite32(v, &map[offset / sizeof(*map)]); 100 103 i915_vma_unpin_iomap(vma); 101 104 102 - return 0; 105 + out_rpm: 106 + intel_gt_pm_put(vma->vm->gt); 107 + return err; 103 108 } 104 109 105 110 static int gtt_get(struct drm_i915_gem_object *obj, ··· 114 107 { 115 108 struct i915_vma *vma; 116 109 u32 __iomem *map; 117 - int err; 110 + int err = 0; 118 111 119 112 i915_gem_object_lock(obj); 120 113 err = i915_gem_object_set_to_gtt_domain(obj, false); ··· 126 119 if (IS_ERR(vma)) 127 120 return PTR_ERR(vma); 128 121 122 + intel_gt_pm_get(vma->vm->gt); 123 + 129 124 map = i915_vma_pin_iomap(vma); 130 125 i915_vma_unpin(vma); 131 - if (IS_ERR(map)) 132 - return PTR_ERR(map); 126 + if (IS_ERR(map)) { 127 + err = PTR_ERR(map); 128 + goto out_rpm; 129 + } 133 130 134 131 *v = ioread32(&map[offset / sizeof(*map)]); 135 132 i915_vma_unpin_iomap(vma); 136 133 137 - return 0; 134 + out_rpm: 135 + intel_gt_pm_put(vma->vm->gt); 136 + return err; 138 137 } 139 138 140 139 static int wc_set(struct drm_i915_gem_object *obj, ··· 293 280 struct drm_i915_private *i915 = arg; 294 281 const struct igt_coherency_mode *read, *write, *over; 295 282 struct drm_i915_gem_object *obj; 296 - intel_wakeref_t wakeref; 297 283 unsigned long count, n; 298 284 u32 *offsets, *values; 299 285 int err = 0; ··· 311 299 312 300 values = offsets + ncachelines; 313 301 314 - mutex_lock(&i915->drm.struct_mutex); 315 - wakeref = intel_runtime_pm_get(&i915->runtime_pm); 316 302 for (over = igt_coherency_mode; over->name; over++) { 317 303 if (!over->set) 318 304 continue; ··· 336 326 obj = i915_gem_object_create_internal(i915, PAGE_SIZE); 337 327 if (IS_ERR(obj)) { 338 328 err = PTR_ERR(obj); 339 - goto unlock; 329 + goto free; 340 330 } 341 331 342 332 i915_random_reorder(offsets, ncachelines, &prng); ··· 387 377 } 388 378 } 389 379 } 390 - unlock: 391 - intel_runtime_pm_put(&i915->runtime_pm, wakeref); 392 - mutex_unlock(&i915->drm.struct_mutex); 380 + free: 393 381 kfree(offsets); 394 382 return err; 395 383 396 384 put_object: 397 385 i915_gem_object_put(obj); 398 - goto unlock; 386 + goto free; 399 387 } 400 388 401 389 int i915_gem_coherency_live_selftests(struct drm_i915_private *i915)
+4 -14
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
··· 164 164 static int __live_parallel_switch1(void *data) 165 165 { 166 166 struct parallel_switch *arg = data; 167 - struct drm_i915_private *i915 = arg->ce[0]->engine->i915; 168 167 IGT_TIMEOUT(end_time); 169 168 unsigned long count; 170 169 ··· 175 176 for (n = 0; n < ARRAY_SIZE(arg->ce); n++) { 176 177 i915_request_put(rq); 177 178 178 - mutex_lock(&i915->drm.struct_mutex); 179 179 rq = i915_request_create(arg->ce[n]); 180 - if (IS_ERR(rq)) { 181 - mutex_unlock(&i915->drm.struct_mutex); 180 + if (IS_ERR(rq)) 182 181 return PTR_ERR(rq); 183 - } 184 182 185 183 i915_request_get(rq); 186 184 i915_request_add(rq); 187 - mutex_unlock(&i915->drm.struct_mutex); 188 185 } 189 186 190 187 err = 0; ··· 200 205 static int __live_parallel_switchN(void *data) 201 206 { 202 207 struct parallel_switch *arg = data; 203 - struct drm_i915_private *i915 = arg->ce[0]->engine->i915; 204 208 IGT_TIMEOUT(end_time); 205 209 unsigned long count; 206 210 int n; ··· 209 215 for (n = 0; n < ARRAY_SIZE(arg->ce); n++) { 210 216 struct i915_request *rq; 211 217 212 - mutex_lock(&i915->drm.struct_mutex); 213 218 rq = i915_request_create(arg->ce[n]); 214 - if (IS_ERR(rq)) { 215 - mutex_unlock(&i915->drm.struct_mutex); 219 + if (IS_ERR(rq)) 216 220 return PTR_ERR(rq); 217 - } 218 221 219 222 i915_request_add(rq); 220 - mutex_unlock(&i915->drm.struct_mutex); 221 223 } 222 224 223 225 count++; ··· 1163 1173 if (ret) 1164 1174 return ret; 1165 1175 1166 - ret = __intel_context_reconfigure_sseu(ce, sseu); 1176 + ret = intel_context_reconfigure_sseu(ce, sseu); 1167 1177 if (ret) 1168 1178 goto out_spin; 1169 1179 ··· 1267 1277 goto out_fail; 1268 1278 1269 1279 out_fail: 1270 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 1280 + if (igt_flush_test(i915)) 1271 1281 ret = -EIO; 1272 1282 1273 1283 intel_context_unpin(ce);
+1 -5
drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
··· 581 581 582 582 static void restore_retire_worker(struct drm_i915_private *i915) 583 583 { 584 + igt_flush_test(i915); 584 585 intel_gt_pm_put(&i915->gt); 585 - 586 - mutex_lock(&i915->drm.struct_mutex); 587 - igt_flush_test(i915, I915_WAIT_LOCKED); 588 - mutex_unlock(&i915->drm.struct_mutex); 589 - 590 586 i915_gem_driver_register__shrinker(i915); 591 587 } 592 588
-4
drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
··· 65 65 if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE)) 66 66 obj->cache_dirty = true; 67 67 68 - mutex_lock(&i915->drm.struct_mutex); 69 68 err = i915_gem_object_fill_blt(obj, ce, val); 70 - mutex_unlock(&i915->drm.struct_mutex); 71 69 if (err) 72 70 goto err_unpin; 73 71 ··· 164 166 if (!(dst->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE)) 165 167 dst->cache_dirty = true; 166 168 167 - mutex_lock(&i915->drm.struct_mutex); 168 169 err = i915_gem_object_copy_blt(src, dst, ce); 169 - mutex_unlock(&i915->drm.struct_mutex); 170 170 if (err) 171 171 goto err_unpin; 172 172
+8 -20
drivers/gpu/drm/i915/gt/intel_gt_pm.c
··· 196 196 197 197 static void wait_for_idle(struct intel_gt *gt) 198 198 { 199 - mutex_lock(&gt->i915->drm.struct_mutex); /* XXX */ 200 - do { 201 - if (i915_gem_wait_for_idle(gt->i915, 202 - I915_WAIT_LOCKED, 203 - I915_GEM_IDLE_TIMEOUT) == -ETIME) { 204 - /* XXX hide warning from gem_eio */ 205 - if (i915_modparams.reset) { 206 - dev_err(gt->i915->drm.dev, 207 - "Failed to idle engines, declaring wedged!\n"); 208 - GEM_TRACE_DUMP(); 209 - } 210 - 211 - /* 212 - * Forcibly cancel outstanding work and leave 213 - * the gpu quiet. 214 - */ 215 - intel_gt_set_wedged(gt); 216 - } 217 - } while (i915_retire_requests(gt->i915)); 218 - mutex_unlock(&gt->i915->drm.struct_mutex); 199 + if (i915_gem_wait_for_idle(gt->i915, 0, 200 + I915_GEM_IDLE_TIMEOUT) == -ETIME) { 201 + /* 202 + * Forcibly cancel outstanding work and leave 203 + * the gpu quiet. 204 + */ 205 + intel_gt_set_wedged(gt); 206 + } 219 207 220 208 intel_gt_pm_wait_for_idle(gt); 221 209 }
+2 -2
drivers/gpu/drm/i915/gt/selftest_context.c
··· 318 318 if (err) 319 319 break; 320 320 321 - err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); 321 + err = igt_flush_test(gt->i915); 322 322 if (err) 323 323 break; 324 324 } ··· 431 431 if (err) 432 432 break; 433 433 434 - err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); 434 + err = igt_flush_test(gt->i915); 435 435 if (err) 436 436 break; 437 437 }
+15 -74
drivers/gpu/drm/i915/gt/selftest_hangcheck.c
··· 58 58 memset(h, 0, sizeof(*h)); 59 59 h->gt = gt; 60 60 61 + mutex_lock(&gt->i915->drm.struct_mutex); 61 62 h->ctx = kernel_context(gt->i915); 63 + mutex_unlock(&gt->i915->drm.struct_mutex); 62 64 if (IS_ERR(h->ctx)) 63 65 return PTR_ERR(h->ctx); 64 66 ··· 287 285 288 286 kernel_context_close(h->ctx); 289 287 290 - igt_flush_test(h->gt->i915, I915_WAIT_LOCKED); 288 + igt_flush_test(h->gt->i915); 291 289 } 292 290 293 291 static bool wait_until_running(struct hang *h, struct i915_request *rq) ··· 311 309 312 310 /* Basic check that we can execute our hanging batch */ 313 311 314 - mutex_lock(&gt->i915->drm.struct_mutex); 315 312 err = hang_init(&h, gt); 316 313 if (err) 317 - goto unlock; 314 + return err; 318 315 319 316 for_each_engine(engine, gt->i915, id) { 320 317 struct intel_wedge_me w; ··· 356 355 357 356 fini: 358 357 hang_fini(&h); 359 - unlock: 360 - mutex_unlock(&gt->i915->drm.struct_mutex); 361 358 return err; 362 359 } 363 360 ··· 394 395 reset_count = i915_reset_count(global); 395 396 count = 0; 396 397 do { 397 - mutex_lock(&gt->i915->drm.struct_mutex); 398 - 399 398 for_each_engine(engine, gt->i915, id) { 400 399 int i; 401 400 ··· 414 417 intel_gt_reset(gt, ALL_ENGINES, NULL); 415 418 igt_global_reset_unlock(gt); 416 419 417 - mutex_unlock(&gt->i915->drm.struct_mutex); 418 420 if (intel_gt_is_wedged(gt)) { 419 421 err = -EIO; 420 422 break; ··· 425 429 break; 426 430 } 427 431 428 - err = igt_flush_test(gt->i915, 0); 432 + err = igt_flush_test(gt->i915); 429 433 if (err) 430 434 break; 431 435 } while (time_before(jiffies, end_time)); 432 436 pr_info("%s: %d resets\n", __func__, count); 433 437 434 - mutex_lock(&gt->i915->drm.struct_mutex); 435 - err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); 436 - mutex_unlock(&gt->i915->drm.struct_mutex); 437 - 438 + err = igt_flush_test(gt->i915); 438 439 out: 439 440 mock_file_free(gt->i915, file); 440 441 if (intel_gt_is_wedged(gt)) ··· 487 494 break; 488 495 } 489 496 490 - mutex_lock(&gt->i915->drm.struct_mutex); 491 497 for (i = 0; i < 16; i++) { 492 498 struct i915_request *rq; 493 499 ··· 499 507 i915_request_add(rq); 500 508 } 501 509 err = intel_engine_reset(engine, NULL); 502 - mutex_unlock(&gt->i915->drm.struct_mutex); 503 510 if (err) { 504 511 pr_err("i915_reset_engine failed\n"); 505 512 break; ··· 524 533 if (err) 525 534 break; 526 535 527 - err = igt_flush_test(gt->i915, 0); 536 + err = igt_flush_test(gt->i915); 528 537 if (err) 529 538 break; 530 539 } 531 540 532 - mutex_lock(&gt->i915->drm.struct_mutex); 533 - err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); 534 - mutex_unlock(&gt->i915->drm.struct_mutex); 535 - 541 + err = igt_flush_test(gt->i915); 536 542 out: 537 543 mock_file_free(gt->i915, file); 538 544 if (intel_gt_is_wedged(gt)) ··· 551 563 return 0; 552 564 553 565 if (active) { 554 - mutex_lock(&gt->i915->drm.struct_mutex); 555 566 err = hang_init(&h, gt); 556 - mutex_unlock(&gt->i915->drm.struct_mutex); 557 567 if (err) 558 568 return err; 559 569 } ··· 579 593 if (active) { 580 594 struct i915_request *rq; 581 595 582 - mutex_lock(&gt->i915->drm.struct_mutex); 583 596 rq = hang_create_request(&h, engine); 584 597 if (IS_ERR(rq)) { 585 598 err = PTR_ERR(rq); 586 - mutex_unlock(&gt->i915->drm.struct_mutex); 587 599 break; 588 600 } 589 601 590 602 i915_request_get(rq); 591 603 i915_request_add(rq); 592 - mutex_unlock(&gt->i915->drm.struct_mutex); 593 604 594 605 if (!wait_until_running(&h, rq)) { 595 606 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); ··· 630 647 if (err) 631 648 break; 632 649 633 - err = igt_flush_test(gt->i915, 0); 650 + err = igt_flush_test(gt->i915); 634 651 if (err) 635 652 break; 636 653 } ··· 638 655 if (intel_gt_is_wedged(gt)) 639 656 err = -EIO; 640 657 641 - if (active) { 642 - mutex_lock(&gt->i915->drm.struct_mutex); 658 + if (active) 643 659 hang_fini(&h); 644 - mutex_unlock(&gt->i915->drm.struct_mutex); 645 - } 646 660 647 661 return err; 648 662 } ··· 721 741 struct i915_request *old = rq[idx]; 722 742 struct i915_request *new; 723 743 724 - mutex_lock(&engine->i915->drm.struct_mutex); 725 744 new = igt_request_alloc(ctx[idx], engine); 726 745 if (IS_ERR(new)) { 727 - mutex_unlock(&engine->i915->drm.struct_mutex); 728 746 err = PTR_ERR(new); 729 747 break; 730 748 } ··· 733 755 734 756 rq[idx] = i915_request_get(new); 735 757 i915_request_add(new); 736 - mutex_unlock(&engine->i915->drm.struct_mutex); 737 758 738 759 err = active_request_put(old); 739 760 if (err) ··· 772 795 return 0; 773 796 774 797 if (flags & TEST_ACTIVE) { 775 - mutex_lock(&gt->i915->drm.struct_mutex); 776 798 err = hang_init(&h, gt); 777 - mutex_unlock(&gt->i915->drm.struct_mutex); 778 799 if (err) 779 800 return err; 780 801 ··· 830 855 struct i915_request *rq = NULL; 831 856 832 857 if (flags & TEST_ACTIVE) { 833 - mutex_lock(&gt->i915->drm.struct_mutex); 834 858 rq = hang_create_request(&h, engine); 835 859 if (IS_ERR(rq)) { 836 860 err = PTR_ERR(rq); 837 - mutex_unlock(&gt->i915->drm.struct_mutex); 838 861 break; 839 862 } 840 863 841 864 i915_request_get(rq); 842 865 i915_request_add(rq); 843 - mutex_unlock(&gt->i915->drm.struct_mutex); 844 866 845 867 if (!wait_until_running(&h, rq)) { 846 868 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); ··· 949 977 if (err) 950 978 break; 951 979 952 - mutex_lock(&gt->i915->drm.struct_mutex); 953 - err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); 954 - mutex_unlock(&gt->i915->drm.struct_mutex); 980 + err = igt_flush_test(gt->i915); 955 981 if (err) 956 982 break; 957 983 } ··· 957 987 if (intel_gt_is_wedged(gt)) 958 988 err = -EIO; 959 989 960 - if (flags & TEST_ACTIVE) { 961 - mutex_lock(&gt->i915->drm.struct_mutex); 990 + if (flags & TEST_ACTIVE) 962 991 hang_fini(&h); 963 - mutex_unlock(&gt->i915->drm.struct_mutex); 964 - } 965 992 966 993 return err; 967 994 } ··· 1028 1061 1029 1062 igt_global_reset_lock(gt); 1030 1063 1031 - mutex_lock(&gt->i915->drm.struct_mutex); 1032 1064 err = hang_init(&h, gt); 1033 1065 if (err) 1034 1066 goto unlock; ··· 1075 1109 fini: 1076 1110 hang_fini(&h); 1077 1111 unlock: 1078 - mutex_unlock(&gt->i915->drm.struct_mutex); 1079 1112 igt_global_reset_unlock(gt); 1080 1113 1081 1114 if (intel_gt_is_wedged(gt)) ··· 1154 1189 1155 1190 /* Check that we can recover an unbind stuck on a hanging request */ 1156 1191 1157 - mutex_lock(&gt->i915->drm.struct_mutex); 1158 1192 err = hang_init(&h, gt); 1159 1193 if (err) 1160 - goto unlock; 1194 + return err; 1161 1195 1162 1196 obj = i915_gem_object_create_internal(gt->i915, SZ_1M); 1163 1197 if (IS_ERR(obj)) { ··· 1219 1255 if (err) 1220 1256 goto out_rq; 1221 1257 1222 - mutex_unlock(&gt->i915->drm.struct_mutex); 1223 - 1224 1258 if (!wait_until_running(&h, rq)) { 1225 1259 struct drm_printer p = drm_info_printer(gt->i915->drm.dev); 1226 1260 ··· 1267 1305 put_task_struct(tsk); 1268 1306 } 1269 1307 1270 - mutex_lock(&gt->i915->drm.struct_mutex); 1271 1308 out_rq: 1272 1309 i915_request_put(rq); 1273 1310 out_obj: 1274 1311 i915_gem_object_put(obj); 1275 1312 fini: 1276 1313 hang_fini(&h); 1277 - unlock: 1278 - mutex_unlock(&gt->i915->drm.struct_mutex); 1279 - 1280 1314 if (intel_gt_is_wedged(gt)) 1281 1315 return -EIO; 1282 1316 ··· 1354 1396 1355 1397 igt_global_reset_lock(gt); 1356 1398 1357 - mutex_lock(&gt->i915->drm.struct_mutex); 1358 1399 err = hang_init(&h, gt); 1359 1400 if (err) 1360 1401 goto unlock; ··· 1468 1511 1469 1512 i915_request_put(prev); 1470 1513 1471 - err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); 1514 + err = igt_flush_test(gt->i915); 1472 1515 if (err) 1473 1516 break; 1474 1517 } ··· 1476 1519 fini: 1477 1520 hang_fini(&h); 1478 1521 unlock: 1479 - mutex_unlock(&gt->i915->drm.struct_mutex); 1480 1522 igt_global_reset_unlock(gt); 1481 1523 1482 1524 if (intel_gt_is_wedged(gt)) ··· 1502 1546 if (!engine || !intel_engine_can_store_dword(engine)) 1503 1547 return 0; 1504 1548 1505 - mutex_lock(&gt->i915->drm.struct_mutex); 1506 - 1507 1549 err = hang_init(&h, gt); 1508 1550 if (err) 1509 - goto err_unlock; 1551 + return err; 1510 1552 1511 1553 rq = hang_create_request(&h, engine); 1512 1554 if (IS_ERR(rq)) { ··· 1528 1574 goto err_request; 1529 1575 } 1530 1576 1531 - mutex_unlock(&gt->i915->drm.struct_mutex); 1532 - 1533 1577 /* Temporarily disable error capture */ 1534 1578 error = xchg(&global->first_error, (void *)-1); 1535 1579 1536 1580 intel_gt_handle_error(gt, engine->mask, 0, NULL); 1537 1581 1538 1582 xchg(&global->first_error, error); 1539 - 1540 - mutex_lock(&gt->i915->drm.struct_mutex); 1541 1583 1542 1584 if (rq->fence.error != -EIO) { 1543 1585 pr_err("Guilty request not identified!\n"); ··· 1545 1595 i915_request_put(rq); 1546 1596 err_fini: 1547 1597 hang_fini(&h); 1548 - err_unlock: 1549 - mutex_unlock(&gt->i915->drm.struct_mutex); 1550 1598 return err; 1551 1599 } 1552 1600 ··· 1637 1689 return 0; 1638 1690 1639 1691 igt_global_reset_lock(gt); 1640 - mutex_lock(&gt->i915->drm.struct_mutex); 1641 1692 1642 1693 /* Flush any requests before we get started and check basics */ 1643 1694 if (!igt_force_reset(gt)) ··· 1656 1709 out: 1657 1710 /* As we poke around the guts, do a full reset before continuing. */ 1658 1711 igt_force_reset(gt); 1659 - 1660 1712 unlock: 1661 - mutex_unlock(&gt->i915->drm.struct_mutex); 1662 1713 igt_global_reset_unlock(gt); 1663 1714 1664 1715 return err; ··· 1695 1750 drain_delayed_work(&gt->hangcheck.work); /* flush param */ 1696 1751 1697 1752 err = intel_gt_live_subtests(tests, gt); 1698 - 1699 - mutex_lock(&gt->i915->drm.struct_mutex); 1700 - igt_flush_test(gt->i915, I915_WAIT_LOCKED); 1701 - mutex_unlock(&gt->i915->drm.struct_mutex); 1702 1753 1703 1754 i915_modparams.enable_hangcheck = saved_hangcheck; 1704 1755 intel_runtime_pm_put(&gt->i915->runtime_pm, wakeref);
+11 -12
drivers/gpu/drm/i915/gt/selftest_lrc.c
··· 61 61 } 62 62 63 63 igt_spinner_end(&spin); 64 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) { 64 + if (igt_flush_test(i915)) { 65 65 err = -EIO; 66 66 goto err_ctx; 67 67 } ··· 384 384 if (err) 385 385 goto out; 386 386 387 - if (i915_request_wait(head, 388 - I915_WAIT_LOCKED, 387 + if (i915_request_wait(head, 0, 389 388 2 * RUNTIME_INFO(outer->i915)->num_engines * (count + 2) * (count + 3)) < 0) { 390 389 pr_err("Failed to slice along semaphore chain of length (%d, %d)!\n", 391 390 count, n); ··· 456 457 if (err) 457 458 goto err_pin; 458 459 459 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) { 460 + if (igt_flush_test(i915)) { 460 461 err = -EIO; 461 462 goto err_pin; 462 463 } ··· 1009 1010 goto err_wedged; 1010 1011 } 1011 1012 1012 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 1013 + if (igt_flush_test(i915)) 1013 1014 goto err_wedged; 1014 1015 } 1015 1016 ··· 1074 1075 if (!intel_engine_has_preemption(engine)) 1075 1076 continue; 1076 1077 1077 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 1078 + if (igt_flush_test(i915)) 1078 1079 goto err_wedged; 1079 1080 1080 1081 intel_engine_pm_get(engine); ··· 1135 1136 } 1136 1137 1137 1138 intel_engine_pm_put(engine); 1138 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 1139 + if (igt_flush_test(i915)) 1139 1140 goto err_wedged; 1140 1141 } 1141 1142 ··· 1296 1297 for (i = 0; i < ARRAY_SIZE(client); i++) 1297 1298 igt_spinner_end(&client[i].spin); 1298 1299 1299 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 1300 + if (igt_flush_test(i915)) 1300 1301 goto err_wedged; 1301 1302 1302 1303 if (engine->execlists.preempt_hang.count) { ··· 1575 1576 1576 1577 igt_spinner_end(&spin_hi); 1577 1578 igt_spinner_end(&spin_lo); 1578 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) { 1579 + if (igt_flush_test(i915)) { 1579 1580 err = -EIO; 1580 1581 goto err_ctx_lo; 1581 1582 } ··· 1972 1973 prime, div64_u64(ktime_to_ns(times[1]), prime)); 1973 1974 1974 1975 out: 1975 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 1976 + if (igt_flush_test(i915)) 1976 1977 err = -EIO; 1977 1978 1978 1979 for (nc = 0; nc < nctx; nc++) { ··· 2117 2118 goto out; 2118 2119 2119 2120 out: 2120 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 2121 + if (igt_flush_test(i915)) 2121 2122 err = -EIO; 2122 2123 2123 2124 for (n = 0; n < nsibling; n++) ··· 2295 2296 out: 2296 2297 for (n = 0; !IS_ERR(rq[n]); n++) 2297 2298 i915_request_put(rq[n]); 2298 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 2299 + if (igt_flush_test(i915)) 2299 2300 err = -EIO; 2300 2301 2301 2302 kernel_context_close(ctx);
+39 -52
drivers/gpu/drm/i915/gt/selftest_timeline.c
··· 6 6 7 7 #include <linux/prime_numbers.h> 8 8 9 - #include "gem/i915_gem_pm.h" 9 + #include "intel_engine_pm.h" 10 10 #include "intel_gt.h" 11 11 12 12 #include "../selftests/i915_random.h" ··· 136 136 goto err_put; 137 137 } 138 138 139 - mutex_lock(&state.i915->drm.struct_mutex); 140 139 for (p = phases; p->name; p++) { 141 140 pr_debug("%s(%s)\n", __func__, p->name); 142 141 for_each_prime_number_from(na, 1, 2 * CACHELINES_PER_PAGE) { ··· 148 149 out: 149 150 for (na = 0; na < state.max; na++) 150 151 __mock_hwsp_record(&state, na, NULL); 151 - mutex_unlock(&state.i915->drm.struct_mutex); 152 152 kfree(state.history); 153 153 err_put: 154 154 drm_dev_put(&state.i915->drm); ··· 447 449 struct i915_request *rq; 448 450 int err; 449 451 450 - lockdep_assert_held(&tl->gt->i915->drm.struct_mutex); /* lazy rq refs */ 451 - 452 452 err = intel_timeline_pin(tl); 453 453 if (err) { 454 454 rq = ERR_PTR(err); ··· 457 461 if (IS_ERR(rq)) 458 462 goto out_unpin; 459 463 464 + i915_request_get(rq); 465 + 460 466 err = emit_ggtt_store_dw(rq, tl->hwsp_offset, value); 461 467 i915_request_add(rq); 462 - if (err) 468 + if (err) { 469 + i915_request_put(rq); 463 470 rq = ERR_PTR(err); 471 + } 464 472 465 473 out_unpin: 466 474 intel_timeline_unpin(tl); ··· 500 500 struct intel_timeline **timelines; 501 501 struct intel_engine_cs *engine; 502 502 enum intel_engine_id id; 503 - intel_wakeref_t wakeref; 504 503 unsigned long count, n; 505 504 int err = 0; 506 505 ··· 514 515 if (!timelines) 515 516 return -ENOMEM; 516 517 517 - mutex_lock(&i915->drm.struct_mutex); 518 - wakeref = intel_runtime_pm_get(&i915->runtime_pm); 519 - 520 518 count = 0; 521 519 for_each_engine(engine, i915, id) { 522 520 if (!intel_engine_can_store_dword(engine)) 523 521 continue; 522 + 523 + intel_engine_pm_get(engine); 524 524 525 525 for (n = 0; n < NUM_TIMELINES; n++) { 526 526 struct intel_timeline *tl; ··· 528 530 tl = checked_intel_timeline_create(i915); 529 531 if (IS_ERR(tl)) { 530 532 err = PTR_ERR(tl); 531 - goto out; 533 + break; 532 534 } 533 535 534 536 rq = tl_write(tl, engine, count); 535 537 if (IS_ERR(rq)) { 536 538 intel_timeline_put(tl); 537 539 err = PTR_ERR(rq); 538 - goto out; 540 + break; 539 541 } 540 542 541 543 timelines[count++] = tl; 544 + i915_request_put(rq); 542 545 } 546 + 547 + intel_engine_pm_put(engine); 548 + if (err) 549 + break; 543 550 } 544 551 545 - out: 546 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 552 + if (igt_flush_test(i915)) 547 553 err = -EIO; 548 554 549 555 for (n = 0; n < count; n++) { ··· 561 559 intel_timeline_put(tl); 562 560 } 563 561 564 - intel_runtime_pm_put(&i915->runtime_pm, wakeref); 565 - mutex_unlock(&i915->drm.struct_mutex); 566 - 567 562 kvfree(timelines); 568 - 569 563 return err; 570 564 #undef NUM_TIMELINES 571 565 } ··· 573 575 struct intel_timeline **timelines; 574 576 struct intel_engine_cs *engine; 575 577 enum intel_engine_id id; 576 - intel_wakeref_t wakeref; 577 578 unsigned long count, n; 578 579 int err = 0; 579 580 ··· 588 591 if (!timelines) 589 592 return -ENOMEM; 590 593 591 - mutex_lock(&i915->drm.struct_mutex); 592 - wakeref = intel_runtime_pm_get(&i915->runtime_pm); 593 - 594 594 count = 0; 595 595 for (n = 0; n < NUM_TIMELINES; n++) { 596 596 for_each_engine(engine, i915, id) { ··· 599 605 600 606 tl = checked_intel_timeline_create(i915); 601 607 if (IS_ERR(tl)) { 608 + intel_engine_pm_put(engine); 602 609 err = PTR_ERR(tl); 603 610 goto out; 604 611 } 605 612 613 + intel_engine_pm_get(engine); 606 614 rq = tl_write(tl, engine, count); 615 + intel_engine_pm_put(engine); 607 616 if (IS_ERR(rq)) { 608 617 intel_timeline_put(tl); 609 618 err = PTR_ERR(rq); ··· 614 617 } 615 618 616 619 timelines[count++] = tl; 620 + i915_request_put(rq); 617 621 } 618 622 } 619 623 620 624 out: 621 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 625 + if (igt_flush_test(i915)) 622 626 err = -EIO; 623 627 624 628 for (n = 0; n < count; n++) { ··· 633 635 intel_timeline_put(tl); 634 636 } 635 637 636 - intel_runtime_pm_put(&i915->runtime_pm, wakeref); 637 - mutex_unlock(&i915->drm.struct_mutex); 638 - 639 638 kvfree(timelines); 640 - 641 639 return err; 642 640 #undef NUM_TIMELINES 643 641 } ··· 644 650 struct intel_engine_cs *engine; 645 651 struct intel_timeline *tl; 646 652 enum intel_engine_id id; 647 - intel_wakeref_t wakeref; 648 653 int err = 0; 649 654 650 655 /* ··· 651 658 * foreign GPU references. 652 659 */ 653 660 654 - mutex_lock(&i915->drm.struct_mutex); 655 - wakeref = intel_runtime_pm_get(&i915->runtime_pm); 656 - 657 661 tl = intel_timeline_create(&i915->gt, NULL); 658 - if (IS_ERR(tl)) { 659 - err = PTR_ERR(tl); 660 - goto out_rpm; 661 - } 662 + if (IS_ERR(tl)) 663 + return PTR_ERR(tl); 664 + 662 665 if (!tl->has_initial_breadcrumb || !tl->hwsp_cacheline) 663 666 goto out_free; 664 667 ··· 670 681 if (!intel_engine_can_store_dword(engine)) 671 682 continue; 672 683 684 + intel_engine_pm_get(engine); 673 685 rq = i915_request_create(engine->kernel_context); 686 + intel_engine_pm_put(engine); 674 687 if (IS_ERR(rq)) { 675 688 err = PTR_ERR(rq); 676 689 goto out; ··· 738 747 } 739 748 740 749 out: 741 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 750 + if (igt_flush_test(i915)) 742 751 err = -EIO; 743 752 744 753 intel_timeline_unpin(tl); 745 754 out_free: 746 755 intel_timeline_put(tl); 747 - out_rpm: 748 - intel_runtime_pm_put(&i915->runtime_pm, wakeref); 749 - mutex_unlock(&i915->drm.struct_mutex); 750 - 751 756 return err; 752 757 } 753 758 ··· 752 765 struct drm_i915_private *i915 = arg; 753 766 struct intel_engine_cs *engine; 754 767 enum intel_engine_id id; 755 - intel_wakeref_t wakeref; 756 768 unsigned long count; 757 769 int err = 0; 758 770 ··· 761 775 * want to confuse ourselves or the GPU. 762 776 */ 763 777 764 - mutex_lock(&i915->drm.struct_mutex); 765 - wakeref = intel_runtime_pm_get(&i915->runtime_pm); 766 - 767 778 count = 0; 768 779 for_each_engine(engine, i915, id) { 769 780 IGT_TIMEOUT(end_time); 770 781 771 782 if (!intel_engine_can_store_dword(engine)) 772 783 continue; 784 + 785 + intel_engine_pm_get(engine); 773 786 774 787 do { 775 788 struct intel_timeline *tl; ··· 777 792 tl = checked_intel_timeline_create(i915); 778 793 if (IS_ERR(tl)) { 779 794 err = PTR_ERR(tl); 780 - goto out; 795 + break; 781 796 } 782 797 783 798 rq = tl_write(tl, engine, count); 784 799 if (IS_ERR(rq)) { 785 800 intel_timeline_put(tl); 786 801 err = PTR_ERR(rq); 787 - goto out; 802 + break; 788 803 } 789 804 790 805 if (i915_request_wait(rq, 0, HZ / 5) < 0) { 791 806 pr_err("Wait for timeline writes timed out!\n"); 807 + i915_request_put(rq); 792 808 intel_timeline_put(tl); 793 809 err = -EIO; 794 - goto out; 810 + break; 795 811 } 796 812 797 813 if (*tl->hwsp_seqno != count) { ··· 801 815 err = -EINVAL; 802 816 } 803 817 818 + i915_request_put(rq); 804 819 intel_timeline_put(tl); 805 820 count++; 806 821 807 822 if (err) 808 - goto out; 823 + break; 809 824 } while (!__igt_timeout(end_time, NULL)); 810 - } 811 825 812 - out: 813 - intel_runtime_pm_put(&i915->runtime_pm, wakeref); 814 - mutex_unlock(&i915->drm.struct_mutex); 826 + intel_engine_pm_put(engine); 827 + if (err) 828 + break; 829 + } 815 830 816 831 return err; 817 832 }
+3 -3
drivers/gpu/drm/i915/gt/selftest_workarounds.c
··· 676 676 break; 677 677 } 678 678 679 - if (igt_flush_test(ctx->i915, I915_WAIT_LOCKED)) 679 + if (igt_flush_test(ctx->i915)) 680 680 err = -EIO; 681 681 out_batch: 682 682 i915_vma_unpin_and_release(&batch, 0); ··· 1090 1090 kernel_context_close(client[i].ctx); 1091 1091 } 1092 1092 1093 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 1093 + if (igt_flush_test(i915)) 1094 1094 err = -EIO; 1095 1095 1096 1096 return err; ··· 1248 1248 igt_global_reset_unlock(&i915->gt); 1249 1249 kernel_context_close(ctx); 1250 1250 1251 - igt_flush_test(i915, I915_WAIT_LOCKED); 1251 + igt_flush_test(i915); 1252 1252 1253 1253 return ret; 1254 1254 }
+12 -30
drivers/gpu/drm/i915/i915_debugfs.c
··· 3621 3621 i915_drop_caches_set(void *data, u64 val) 3622 3622 { 3623 3623 struct drm_i915_private *i915 = data; 3624 + int ret; 3624 3625 3625 3626 DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n", 3626 3627 val, val & DROP_ALL); ··· 3631 3630 I915_IDLE_ENGINES_TIMEOUT)) 3632 3631 intel_gt_set_wedged(&i915->gt); 3633 3632 3634 - /* No need to check and wait for gpu resets, only libdrm auto-restarts 3635 - * on ioctls on -EAGAIN. */ 3636 - if (val & (DROP_ACTIVE | DROP_IDLE | DROP_RETIRE | DROP_RESET_SEQNO)) { 3637 - int ret; 3633 + if (val & DROP_RETIRE) 3634 + i915_retire_requests(i915); 3638 3635 3639 - ret = mutex_lock_interruptible(&i915->drm.struct_mutex); 3636 + if (val & (DROP_IDLE | DROP_ACTIVE)) { 3637 + ret = i915_gem_wait_for_idle(i915, 3638 + I915_WAIT_INTERRUPTIBLE, 3639 + MAX_SCHEDULE_TIMEOUT); 3640 3640 if (ret) 3641 3641 return ret; 3642 + } 3642 3643 3643 - /* 3644 - * To finish the flush of the idle_worker, we must complete 3645 - * the switch-to-kernel-context, which requires a double 3646 - * pass through wait_for_idle: first queues the switch, 3647 - * second waits for the switch. 3648 - */ 3649 - if (ret == 0 && val & (DROP_IDLE | DROP_ACTIVE)) 3650 - ret = i915_gem_wait_for_idle(i915, 3651 - I915_WAIT_INTERRUPTIBLE | 3652 - I915_WAIT_LOCKED, 3653 - MAX_SCHEDULE_TIMEOUT); 3654 - 3655 - if (ret == 0 && val & DROP_IDLE) 3656 - ret = i915_gem_wait_for_idle(i915, 3657 - I915_WAIT_INTERRUPTIBLE | 3658 - I915_WAIT_LOCKED, 3659 - MAX_SCHEDULE_TIMEOUT); 3660 - 3661 - if (val & DROP_RETIRE) 3662 - i915_retire_requests(i915); 3663 - 3664 - mutex_unlock(&i915->drm.struct_mutex); 3665 - 3666 - if (ret == 0 && val & DROP_IDLE) 3667 - ret = intel_gt_pm_wait_for_idle(&i915->gt); 3644 + if (val & DROP_IDLE) { 3645 + ret = intel_gt_pm_wait_for_idle(&i915->gt); 3646 + if (ret) 3647 + return ret; 3668 3648 } 3669 3649 3670 3650 if (val & DROP_RESET_ACTIVE && intel_gt_terminally_wedged(&i915->gt))
+8 -11
drivers/gpu/drm/i915/i915_gem.c
··· 945 945 if (!intel_gt_pm_is_awake(gt)) 946 946 return 0; 947 947 948 - GEM_TRACE("flags=%x (%s), timeout=%ld%s\n", 949 - flags, flags & I915_WAIT_LOCKED ? "locked" : "unlocked", 950 - timeout, timeout == MAX_SCHEDULE_TIMEOUT ? " (forever)" : ""); 948 + do { 949 + timeout = wait_for_timelines(gt, flags, timeout); 950 + if (timeout < 0) 951 + return timeout; 951 952 952 - timeout = wait_for_timelines(gt, flags, timeout); 953 - if (timeout < 0) 954 - return timeout; 953 + cond_resched(); 954 + if (signal_pending(current)) 955 + return -EINTR; 955 956 956 - if (flags & I915_WAIT_LOCKED) { 957 - lockdep_assert_held(&i915->drm.struct_mutex); 958 - 959 - i915_retire_requests(i915); 960 - } 957 + } while (i915_retire_requests(i915)); 961 958 962 959 return 0; 963 960 }
+3 -4
drivers/gpu/drm/i915/i915_request.h
··· 308 308 long timeout) 309 309 __attribute__((nonnull(1))); 310 310 #define I915_WAIT_INTERRUPTIBLE BIT(0) 311 - #define I915_WAIT_LOCKED BIT(1) /* struct_mutex held, handle GPU reset */ 312 - #define I915_WAIT_PRIORITY BIT(2) /* small priority bump for the request */ 313 - #define I915_WAIT_ALL BIT(3) /* used by i915_gem_object_wait() */ 314 - #define I915_WAIT_FOR_IDLE_BOOST BIT(4) 311 + #define I915_WAIT_PRIORITY BIT(1) /* small priority bump for the request */ 312 + #define I915_WAIT_ALL BIT(2) /* used by i915_gem_object_wait() */ 313 + #define I915_WAIT_FOR_IDLE_BOOST BIT(3) 315 314 316 315 static inline bool i915_request_signaled(const struct i915_request *rq) 317 316 {
+2 -6
drivers/gpu/drm/i915/selftests/i915_active.c
··· 162 162 163 163 __live_put(active); 164 164 165 - mutex_lock(&i915->drm.struct_mutex); 166 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 165 + if (igt_flush_test(i915)) 167 166 err = -EIO; 168 - mutex_unlock(&i915->drm.struct_mutex); 169 167 170 168 return err; 171 169 } ··· 181 183 return PTR_ERR(active); 182 184 183 185 /* waits for & retires all requests */ 184 - mutex_lock(&i915->drm.struct_mutex); 185 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 186 + if (igt_flush_test(i915)) 186 187 err = -EIO; 187 - mutex_unlock(&i915->drm.struct_mutex); 188 188 189 189 if (!READ_ONCE(active->retired)) { 190 190 pr_err("i915_active not retired after flushing!\n");
+1 -1
drivers/gpu/drm/i915/selftests/i915_gem_evict.c
··· 523 523 524 524 mutex_lock(&i915->ggtt.vm.mutex); 525 525 out_locked: 526 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 526 + if (igt_flush_test(i915)) 527 527 err = -EIO; 528 528 while (reserved) { 529 529 struct reserved *next = reserved->next;
+1 -5
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
··· 1705 1705 1706 1706 err = i915_subtests(tests, ggtt); 1707 1707 1708 - mutex_lock(&i915->drm.struct_mutex); 1709 1708 mock_device_flush(i915); 1710 - mutex_unlock(&i915->drm.struct_mutex); 1711 - 1712 1709 i915_gem_drain_freed_objects(i915); 1713 - 1714 1710 mock_fini_ggtt(ggtt); 1715 1711 kfree(ggtt); 1716 1712 out_put: ··· 2002 2006 } 2003 2007 } 2004 2008 end: 2005 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 2009 + if (igt_flush_test(i915)) 2006 2010 err = -EIO; 2007 2011 i915_gem_context_unlock_engines(ctx); 2008 2012 i915_gem_object_unpin_map(out);
+43 -108
drivers/gpu/drm/i915/selftests/i915_request.c
··· 41 41 { 42 42 struct drm_i915_private *i915 = arg; 43 43 struct i915_request *request; 44 - int err = -ENOMEM; 45 44 46 45 /* Basic preliminary test to create a request and let it loose! */ 47 46 48 - mutex_lock(&i915->drm.struct_mutex); 49 47 request = mock_request(i915->engine[RCS0]->kernel_context, HZ / 10); 50 48 if (!request) 51 - goto out_unlock; 49 + return -ENOMEM; 52 50 53 51 i915_request_add(request); 54 52 55 - err = 0; 56 - out_unlock: 57 - mutex_unlock(&i915->drm.struct_mutex); 58 - return err; 53 + return 0; 59 54 } 60 55 61 56 static int igt_wait_request(void *arg) ··· 62 67 63 68 /* Submit a request, then wait upon it */ 64 69 65 - mutex_lock(&i915->drm.struct_mutex); 66 70 request = mock_request(i915->engine[RCS0]->kernel_context, T); 67 - if (!request) { 68 - err = -ENOMEM; 69 - goto out_unlock; 70 - } 71 + if (!request) 72 + return -ENOMEM; 73 + 71 74 i915_request_get(request); 72 75 73 76 if (i915_request_wait(request, 0, 0) != -ETIME) { ··· 118 125 err = 0; 119 126 out_request: 120 127 i915_request_put(request); 121 - out_unlock: 122 128 mock_device_flush(i915); 123 - mutex_unlock(&i915->drm.struct_mutex); 124 129 return err; 125 130 } 126 131 ··· 131 140 132 141 /* Submit a request, treat it as a fence and wait upon it */ 133 142 134 - mutex_lock(&i915->drm.struct_mutex); 135 143 request = mock_request(i915->engine[RCS0]->kernel_context, T); 136 - if (!request) { 137 - err = -ENOMEM; 138 - goto out_locked; 139 - } 144 + if (!request) 145 + return -ENOMEM; 140 146 141 147 if (dma_fence_wait_timeout(&request->fence, false, T) != -ETIME) { 142 148 pr_err("fence wait success before submit (expected timeout)!\n"); 143 - goto out_locked; 149 + goto out; 144 150 } 145 151 146 152 i915_request_add(request); 147 - mutex_unlock(&i915->drm.struct_mutex); 148 153 149 154 if (dma_fence_is_signaled(&request->fence)) { 150 155 pr_err("fence signaled immediately!\n"); 151 - goto out_device; 156 + goto out; 152 157 } 153 158 154 159 if (dma_fence_wait_timeout(&request->fence, false, T / 2) != -ETIME) { 155 160 pr_err("fence wait success after submit (expected timeout)!\n"); 156 - goto out_device; 161 + goto out; 157 162 } 158 163 159 164 if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) { 160 165 pr_err("fence wait timed out (expected success)!\n"); 161 - goto out_device; 166 + goto out; 162 167 } 163 168 164 169 if (!dma_fence_is_signaled(&request->fence)) { 165 170 pr_err("fence unsignaled after waiting!\n"); 166 - goto out_device; 171 + goto out; 167 172 } 168 173 169 174 if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) { 170 175 pr_err("fence wait timed out when complete (expected success)!\n"); 171 - goto out_device; 176 + goto out; 172 177 } 173 178 174 179 err = 0; 175 - out_device: 176 - mutex_lock(&i915->drm.struct_mutex); 177 - out_locked: 180 + out: 178 181 mock_device_flush(i915); 179 - mutex_unlock(&i915->drm.struct_mutex); 180 182 return err; 181 183 } 182 184 ··· 183 199 184 200 mutex_lock(&i915->drm.struct_mutex); 185 201 ctx[0] = mock_context(i915, "A"); 202 + mutex_unlock(&i915->drm.struct_mutex); 203 + 186 204 ce = i915_gem_context_get_engine(ctx[0], RCS0); 187 205 GEM_BUG_ON(IS_ERR(ce)); 188 206 request = mock_request(ce, 2 * HZ); ··· 197 211 i915_request_get(request); 198 212 i915_request_add(request); 199 213 214 + mutex_lock(&i915->drm.struct_mutex); 200 215 ctx[1] = mock_context(i915, "B"); 216 + mutex_unlock(&i915->drm.struct_mutex); 217 + 201 218 ce = i915_gem_context_get_engine(ctx[1], RCS0); 202 219 GEM_BUG_ON(IS_ERR(ce)); 203 220 vip = mock_request(ce, 0); ··· 222 233 request->engine->submit_request(request); 223 234 rcu_read_unlock(); 224 235 225 - mutex_unlock(&i915->drm.struct_mutex); 226 236 227 237 if (i915_request_wait(vip, 0, HZ) == -ETIME) { 228 238 pr_err("timed out waiting for high priority request\n"); ··· 236 248 err = 0; 237 249 err: 238 250 i915_request_put(vip); 239 - mutex_lock(&i915->drm.struct_mutex); 240 251 err_context_1: 241 252 mock_context_close(ctx[1]); 242 253 i915_request_put(request); 243 254 err_context_0: 244 255 mock_context_close(ctx[0]); 245 256 mock_device_flush(i915); 246 - mutex_unlock(&i915->drm.struct_mutex); 247 257 return err; 248 258 } 249 259 ··· 268 282 static int __igt_breadcrumbs_smoketest(void *arg) 269 283 { 270 284 struct smoketest *t = arg; 271 - struct mutex * const BKL = &t->engine->i915->drm.struct_mutex; 272 285 const unsigned int max_batch = min(t->ncontexts, t->max_batch) - 1; 273 286 const unsigned int total = 4 * t->ncontexts + 1; 274 287 unsigned int num_waits = 0, num_fences = 0; ··· 322 337 struct i915_request *rq; 323 338 struct intel_context *ce; 324 339 325 - mutex_lock(BKL); 326 - 327 340 ce = i915_gem_context_get_engine(ctx, t->engine->legacy_idx); 328 341 GEM_BUG_ON(IS_ERR(ce)); 329 342 rq = t->request_alloc(ce); 330 343 intel_context_put(ce); 331 344 if (IS_ERR(rq)) { 332 - mutex_unlock(BKL); 333 345 err = PTR_ERR(rq); 334 346 count = n; 335 347 break; ··· 338 356 339 357 requests[n] = i915_request_get(rq); 340 358 i915_request_add(rq); 341 - 342 - mutex_unlock(BKL); 343 359 344 360 if (err >= 0) 345 361 err = i915_sw_fence_await_dma_fence(wait, ··· 437 457 goto out_threads; 438 458 } 439 459 440 - mutex_lock(&t.engine->i915->drm.struct_mutex); 441 460 for (n = 0; n < t.ncontexts; n++) { 461 + mutex_lock(&t.engine->i915->drm.struct_mutex); 442 462 t.contexts[n] = mock_context(t.engine->i915, "mock"); 463 + mutex_unlock(&t.engine->i915->drm.struct_mutex); 443 464 if (!t.contexts[n]) { 444 465 ret = -ENOMEM; 445 466 goto out_contexts; 446 467 } 447 468 } 448 - mutex_unlock(&t.engine->i915->drm.struct_mutex); 449 469 450 470 for (n = 0; n < ncpus; n++) { 451 471 threads[n] = kthread_run(__igt_breadcrumbs_smoketest, ··· 475 495 atomic_long_read(&t.num_fences), 476 496 ncpus); 477 497 478 - mutex_lock(&t.engine->i915->drm.struct_mutex); 479 498 out_contexts: 480 499 for (n = 0; n < t.ncontexts; n++) { 481 500 if (!t.contexts[n]) 482 501 break; 483 502 mock_context_close(t.contexts[n]); 484 503 } 485 - mutex_unlock(&t.engine->i915->drm.struct_mutex); 486 504 kfree(t.contexts); 487 505 out_threads: 488 506 kfree(threads); 489 - 490 507 return ret; 491 508 } 492 509 ··· 516 539 { 517 540 struct drm_i915_private *i915 = arg; 518 541 struct intel_engine_cs *engine; 519 - intel_wakeref_t wakeref; 520 542 struct igt_live_test t; 521 543 unsigned int id; 522 544 int err = -ENODEV; ··· 525 549 * the overhead of submitting requests to the hardware. 526 550 */ 527 551 528 - mutex_lock(&i915->drm.struct_mutex); 529 - wakeref = intel_runtime_pm_get(&i915->runtime_pm); 530 - 531 552 for_each_engine(engine, i915, id) { 532 - struct i915_request *request = NULL; 533 553 unsigned long n, prime; 534 554 IGT_TIMEOUT(end_time); 535 555 ktime_t times[2] = {}; 536 556 537 557 err = igt_live_test_begin(&t, i915, __func__, engine->name); 538 558 if (err) 539 - goto out_unlock; 559 + return err; 540 560 541 561 for_each_prime_number_from(prime, 1, 8192) { 562 + struct i915_request *request = NULL; 563 + 542 564 times[1] = ktime_get_raw(); 543 565 544 566 for (n = 0; n < prime; n++) { 567 + i915_request_put(request); 545 568 request = i915_request_create(engine->kernel_context); 546 - if (IS_ERR(request)) { 547 - err = PTR_ERR(request); 548 - goto out_unlock; 549 - } 569 + if (IS_ERR(request)) 570 + return PTR_ERR(request); 550 571 551 572 /* This space is left intentionally blank. 552 573 * ··· 558 585 * for latency. 559 586 */ 560 587 588 + i915_request_get(request); 561 589 i915_request_add(request); 562 590 } 563 591 i915_request_wait(request, 0, MAX_SCHEDULE_TIMEOUT); 592 + i915_request_put(request); 564 593 565 594 times[1] = ktime_sub(ktime_get_raw(), times[1]); 566 595 if (prime == 1) ··· 574 599 575 600 err = igt_live_test_end(&t); 576 601 if (err) 577 - goto out_unlock; 602 + return err; 578 603 579 604 pr_info("Request latencies on %s: 1 = %lluns, %lu = %lluns\n", 580 605 engine->name, ··· 582 607 prime, div64_u64(ktime_to_ns(times[1]), prime)); 583 608 } 584 609 585 - out_unlock: 586 - intel_runtime_pm_put(&i915->runtime_pm, wakeref); 587 - mutex_unlock(&i915->drm.struct_mutex); 588 610 return err; 589 611 } 590 612 ··· 651 679 if (err) 652 680 goto out_request; 653 681 682 + i915_request_get(request); 654 683 out_request: 655 684 i915_request_add(request); 656 685 return err ? ERR_PTR(err) : request; ··· 661 688 { 662 689 struct drm_i915_private *i915 = arg; 663 690 struct intel_engine_cs *engine; 664 - intel_wakeref_t wakeref; 665 691 struct igt_live_test t; 666 692 struct i915_vma *batch; 667 693 unsigned int id; ··· 671 699 * the overhead of submitting requests to the hardware. 672 700 */ 673 701 674 - mutex_lock(&i915->drm.struct_mutex); 675 - wakeref = intel_runtime_pm_get(&i915->runtime_pm); 676 - 677 702 batch = empty_batch(i915); 678 - if (IS_ERR(batch)) { 679 - err = PTR_ERR(batch); 680 - goto out_unlock; 681 - } 703 + if (IS_ERR(batch)) 704 + return PTR_ERR(batch); 682 705 683 706 for_each_engine(engine, i915, id) { 684 707 IGT_TIMEOUT(end_time); ··· 697 730 times[1] = ktime_get_raw(); 698 731 699 732 for (n = 0; n < prime; n++) { 733 + i915_request_put(request); 700 734 request = empty_request(engine, batch); 701 735 if (IS_ERR(request)) { 702 736 err = PTR_ERR(request); ··· 713 745 if (__igt_timeout(end_time, NULL)) 714 746 break; 715 747 } 748 + i915_request_put(request); 716 749 717 750 err = igt_live_test_end(&t); 718 751 if (err) ··· 728 759 out_batch: 729 760 i915_vma_unpin(batch); 730 761 i915_vma_put(batch); 731 - out_unlock: 732 - intel_runtime_pm_put(&i915->runtime_pm, wakeref); 733 - mutex_unlock(&i915->drm.struct_mutex); 734 762 return err; 735 763 } 736 764 ··· 807 841 struct drm_i915_private *i915 = arg; 808 842 struct intel_engine_cs *engine; 809 843 struct i915_request *request[I915_NUM_ENGINES]; 810 - intel_wakeref_t wakeref; 811 844 struct igt_live_test t; 812 845 struct i915_vma *batch; 813 846 unsigned int id; ··· 817 852 * block doing so, and that they don't complete too soon. 818 853 */ 819 854 820 - mutex_lock(&i915->drm.struct_mutex); 821 - wakeref = intel_runtime_pm_get(&i915->runtime_pm); 822 - 823 855 err = igt_live_test_begin(&t, i915, __func__, ""); 824 856 if (err) 825 - goto out_unlock; 857 + return err; 826 858 827 859 batch = recursive_batch(i915); 828 860 if (IS_ERR(batch)) { 829 861 err = PTR_ERR(batch); 830 862 pr_err("%s: Unable to create batch, err=%d\n", __func__, err); 831 - goto out_unlock; 863 + return err; 832 864 } 833 865 834 866 for_each_engine(engine, i915, id) { ··· 895 933 i915_request_put(request[id]); 896 934 i915_vma_unpin(batch); 897 935 i915_vma_put(batch); 898 - out_unlock: 899 - intel_runtime_pm_put(&i915->runtime_pm, wakeref); 900 - mutex_unlock(&i915->drm.struct_mutex); 901 936 return err; 902 937 } 903 938 ··· 904 945 struct i915_request *request[I915_NUM_ENGINES] = {}; 905 946 struct i915_request *prev = NULL; 906 947 struct intel_engine_cs *engine; 907 - intel_wakeref_t wakeref; 908 948 struct igt_live_test t; 909 949 unsigned int id; 910 950 int err; ··· 914 956 * they are running on independent engines. 915 957 */ 916 958 917 - mutex_lock(&i915->drm.struct_mutex); 918 - wakeref = intel_runtime_pm_get(&i915->runtime_pm); 919 - 920 959 err = igt_live_test_begin(&t, i915, __func__, ""); 921 960 if (err) 922 - goto out_unlock; 961 + return err; 923 962 924 963 for_each_engine(engine, i915, id) { 925 964 struct i915_vma *batch; ··· 926 971 err = PTR_ERR(batch); 927 972 pr_err("%s: Unable to create batch for %s, err=%d\n", 928 973 __func__, engine->name, err); 929 - goto out_unlock; 974 + return err; 930 975 } 931 976 932 977 request[id] = i915_request_create(engine->kernel_context); ··· 1018 1063 i915_vma_put(request[id]->batch); 1019 1064 i915_request_put(request[id]); 1020 1065 } 1021 - out_unlock: 1022 - intel_runtime_pm_put(&i915->runtime_pm, wakeref); 1023 - mutex_unlock(&i915->drm.struct_mutex); 1024 1066 return err; 1025 1067 } 1026 1068 ··· 1032 1080 struct i915_request *rq; 1033 1081 int err; 1034 1082 1035 - mutex_lock(&engine->i915->drm.struct_mutex); 1036 1083 rq = i915_request_create(engine->kernel_context); 1037 - if (IS_ERR(rq)) { 1038 - mutex_unlock(&engine->i915->drm.struct_mutex); 1084 + if (IS_ERR(rq)) 1039 1085 return PTR_ERR(rq); 1040 - } 1041 1086 1042 1087 i915_request_get(rq); 1043 1088 i915_request_add(rq); 1044 - mutex_unlock(&engine->i915->drm.struct_mutex); 1045 1089 1046 1090 err = 0; 1047 1091 if (i915_request_wait(rq, 0, HZ / 5) < 0) ··· 1063 1115 do { 1064 1116 struct i915_request *rq; 1065 1117 1066 - mutex_lock(&engine->i915->drm.struct_mutex); 1067 1118 rq = i915_request_create(engine->kernel_context); 1068 - if (IS_ERR(rq)) { 1069 - mutex_unlock(&engine->i915->drm.struct_mutex); 1119 + if (IS_ERR(rq)) 1070 1120 return PTR_ERR(rq); 1071 - } 1072 1121 1073 1122 i915_request_add(rq); 1074 - mutex_unlock(&engine->i915->drm.struct_mutex); 1075 - 1076 1123 count++; 1077 1124 } while (!__igt_timeout(end_time, NULL)); 1078 1125 ··· 1097 1154 struct task_struct *tsk[I915_NUM_ENGINES] = {}; 1098 1155 struct igt_live_test t; 1099 1156 1100 - mutex_lock(&i915->drm.struct_mutex); 1101 1157 err = igt_live_test_begin(&t, i915, __func__, ""); 1102 - mutex_unlock(&i915->drm.struct_mutex); 1103 1158 if (err) 1104 1159 break; 1105 1160 ··· 1125 1184 put_task_struct(tsk[id]); 1126 1185 } 1127 1186 1128 - mutex_lock(&i915->drm.struct_mutex); 1129 1187 if (igt_live_test_end(&t)) 1130 1188 err = -EIO; 1131 - mutex_unlock(&i915->drm.struct_mutex); 1132 1189 } 1133 1190 1134 1191 return err; ··· 1219 1280 goto out_threads; 1220 1281 } 1221 1282 1222 - mutex_lock(&i915->drm.struct_mutex); 1223 1283 for (n = 0; n < t[0].ncontexts; n++) { 1284 + mutex_lock(&i915->drm.struct_mutex); 1224 1285 t[0].contexts[n] = live_context(i915, file); 1286 + mutex_unlock(&i915->drm.struct_mutex); 1225 1287 if (!t[0].contexts[n]) { 1226 1288 ret = -ENOMEM; 1227 1289 goto out_contexts; ··· 1239 1299 t[id].max_batch = max_batches(t[0].contexts[0], engine); 1240 1300 if (t[id].max_batch < 0) { 1241 1301 ret = t[id].max_batch; 1242 - mutex_unlock(&i915->drm.struct_mutex); 1243 1302 goto out_flush; 1244 1303 } 1245 1304 /* One ring interleaved between requests from all cpus */ ··· 1253 1314 &t[id], "igt/%d.%d", id, n); 1254 1315 if (IS_ERR(tsk)) { 1255 1316 ret = PTR_ERR(tsk); 1256 - mutex_unlock(&i915->drm.struct_mutex); 1257 1317 goto out_flush; 1258 1318 } 1259 1319 ··· 1260 1322 threads[id * ncpus + n] = tsk; 1261 1323 } 1262 1324 } 1263 - mutex_unlock(&i915->drm.struct_mutex); 1264 1325 1265 1326 msleep(jiffies_to_msecs(i915_selftest.timeout_jiffies)); 1266 1327 ··· 1287 1350 pr_info("Completed %lu waits for %lu fences across %d engines and %d cpus\n", 1288 1351 num_waits, num_fences, RUNTIME_INFO(i915)->num_engines, ncpus); 1289 1352 1290 - mutex_lock(&i915->drm.struct_mutex); 1291 1353 ret = igt_live_test_end(&live) ?: ret; 1292 1354 out_contexts: 1293 - mutex_unlock(&i915->drm.struct_mutex); 1294 1355 kfree(t[0].contexts); 1295 1356 out_threads: 1296 1357 kfree(threads);
+2 -6
drivers/gpu/drm/i915/selftests/i915_selftest.c
··· 263 263 { 264 264 struct drm_i915_private *i915 = data; 265 265 266 - mutex_lock(&i915->drm.struct_mutex); 267 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 266 + if (igt_flush_test(i915)) 268 267 err = -EIO; 269 - mutex_unlock(&i915->drm.struct_mutex); 270 268 271 269 i915_gem_drain_freed_objects(i915); 272 270 ··· 282 284 { 283 285 struct intel_gt *gt = data; 284 286 285 - mutex_lock(&gt->i915->drm.struct_mutex); 286 - if (igt_flush_test(gt->i915, I915_WAIT_LOCKED)) 287 + if (igt_flush_test(gt->i915)) 287 288 err = -EIO; 288 - mutex_unlock(&gt->i915->drm.struct_mutex); 289 289 290 290 i915_gem_drain_freed_objects(gt->i915); 291 291
-4
drivers/gpu/drm/i915/selftests/i915_vma.c
··· 833 833 834 834 err = i915_subtests(tests, ggtt); 835 835 836 - mutex_lock(&i915->drm.struct_mutex); 837 836 mock_device_flush(i915); 838 - mutex_unlock(&i915->drm.struct_mutex); 839 - 840 837 i915_gem_drain_freed_objects(i915); 841 - 842 838 mock_fini_ggtt(ggtt); 843 839 kfree(ggtt); 844 840 out_put:
+12 -18
drivers/gpu/drm/i915/selftests/igt_flush_test.c
··· 12 12 13 13 #include "igt_flush_test.h" 14 14 15 - int igt_flush_test(struct drm_i915_private *i915, unsigned int flags) 15 + int igt_flush_test(struct drm_i915_private *i915) 16 16 { 17 17 int ret = intel_gt_is_wedged(&i915->gt) ? -EIO : 0; 18 - int repeat = !!(flags & I915_WAIT_LOCKED); 19 18 20 19 cond_resched(); 21 20 22 - do { 23 - if (i915_gem_wait_for_idle(i915, flags, HZ / 5) == -ETIME) { 24 - pr_err("%pS timed out, cancelling all further testing.\n", 25 - __builtin_return_address(0)); 21 + i915_retire_requests(i915); 22 + if (i915_gem_wait_for_idle(i915, 0, HZ / 5) == -ETIME) { 23 + pr_err("%pS timed out, cancelling all further testing.\n", 24 + __builtin_return_address(0)); 26 25 27 - GEM_TRACE("%pS timed out.\n", 28 - __builtin_return_address(0)); 29 - GEM_TRACE_DUMP(); 26 + GEM_TRACE("%pS timed out.\n", 27 + __builtin_return_address(0)); 28 + GEM_TRACE_DUMP(); 30 29 31 - intel_gt_set_wedged(&i915->gt); 32 - repeat = 0; 33 - ret = -EIO; 34 - } 35 - 36 - /* Ensure we also flush after wedging. */ 37 - if (flags & I915_WAIT_LOCKED) 38 - i915_retire_requests(i915); 39 - } while (repeat--); 30 + intel_gt_set_wedged(&i915->gt); 31 + ret = -EIO; 32 + } 33 + i915_retire_requests(i915); 40 34 41 35 return ret; 42 36 }
+1 -1
drivers/gpu/drm/i915/selftests/igt_flush_test.h
··· 9 9 10 10 struct drm_i915_private; 11 11 12 - int igt_flush_test(struct drm_i915_private *i915, unsigned int flags); 12 + int igt_flush_test(struct drm_i915_private *i915); 13 13 14 14 #endif /* IGT_FLUSH_TEST_H */
+2 -7
drivers/gpu/drm/i915/selftests/igt_live_test.c
··· 19 19 enum intel_engine_id id; 20 20 int err; 21 21 22 - lockdep_assert_held(&i915->drm.struct_mutex); 23 - 24 22 t->i915 = i915; 25 23 t->func = func; 26 24 t->name = name; 27 25 28 26 err = i915_gem_wait_for_idle(i915, 29 - I915_WAIT_INTERRUPTIBLE | 30 - I915_WAIT_LOCKED, 27 + I915_WAIT_INTERRUPTIBLE, 31 28 MAX_SCHEDULE_TIMEOUT); 32 29 if (err) { 33 30 pr_err("%s(%s): failed to idle before, with err=%d!", ··· 47 50 struct intel_engine_cs *engine; 48 51 enum intel_engine_id id; 49 52 50 - lockdep_assert_held(&i915->drm.struct_mutex); 51 - 52 - if (igt_flush_test(i915, I915_WAIT_LOCKED)) 53 + if (igt_flush_test(i915)) 53 54 return -EIO; 54 55 55 56 if (t->reset_global != i915_reset_count(&i915->gpu_error)) {
-4
drivers/gpu/drm/i915/selftests/mock_gem_device.c
··· 41 41 struct intel_engine_cs *engine; 42 42 enum intel_engine_id id; 43 43 44 - lockdep_assert_held(&i915->drm.struct_mutex); 45 - 46 44 do { 47 45 for_each_engine(engine, i915, id) 48 46 mock_engine_flush(engine); ··· 53 55 struct intel_engine_cs *engine; 54 56 enum intel_engine_id id; 55 57 56 - mutex_lock(&i915->drm.struct_mutex); 57 58 mock_device_flush(i915); 58 - mutex_unlock(&i915->drm.struct_mutex); 59 59 60 60 flush_work(&i915->gem.idle_work); 61 61 i915_gem_drain_workqueue(i915);