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dt-bindings: clock: qcom: document the Milos GPU Clock Controller
Add bindings documentation for the Milos (e.g. SM7635) Graphics Clock
Controller.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-8-18f9faac4984@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
authored by
Luca Weiss
and committed by
Bjorn Andersson
7e5368a1
f40b5217
+58
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Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
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Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
···
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domains on Qualcomm SoCs.
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See also::
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include/dt-bindings/clock/qcom,milos-gpucc.h
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include/dt-bindings/clock/qcom,sar2130p-gpucc.h
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include/dt-bindings/clock/qcom,sm4450-gpucc.h
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include/dt-bindings/clock/qcom,sm8450-gpucc.h
···
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properties:
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compatible:
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enum:
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- qcom,milos-gpucc
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- qcom,sar2130p-gpucc
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- qcom,sm4450-gpucc
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- qcom,sm8450-gpucc
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include/dt-bindings/clock/qcom,milos-gpucc.h
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include/dt-bindings/clock/qcom,milos-gpucc.h
···
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2025, Luca Weiss <luca.weiss@fairphone.com>
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_MILOS_H
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#define _DT_BINDINGS_CLK_QCOM_GPU_CC_MILOS_H
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/* GPU_CC clocks */
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#define GPU_CC_PLL0 0
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#define GPU_CC_PLL0_OUT_EVEN 1
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#define GPU_CC_AHB_CLK 2
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#define GPU_CC_CB_CLK 3
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#define GPU_CC_CX_ACCU_SHIFT_CLK 4
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#define GPU_CC_CX_FF_CLK 5
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#define GPU_CC_CX_GMU_CLK 6
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#define GPU_CC_CXO_AON_CLK 7
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#define GPU_CC_CXO_CLK 8
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#define GPU_CC_DEMET_CLK 9
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#define GPU_CC_DEMET_DIV_CLK_SRC 10
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#define GPU_CC_DPM_CLK 11
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#define GPU_CC_FF_CLK_SRC 12
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#define GPU_CC_FREQ_MEASURE_CLK 13
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#define GPU_CC_GMU_CLK_SRC 14
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#define GPU_CC_GX_ACCU_SHIFT_CLK 15
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#define GPU_CC_GX_ACD_AHB_FF_CLK 16
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#define GPU_CC_GX_AHB_FF_CLK 17
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#define GPU_CC_GX_GMU_CLK 18
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#define GPU_CC_GX_RCG_AHB_FF_CLK 19
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#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 20
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#define GPU_CC_HUB_AON_CLK 21
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#define GPU_CC_HUB_CLK_SRC 22
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#define GPU_CC_HUB_CX_INT_CLK 23
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#define GPU_CC_HUB_DIV_CLK_SRC 24
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#define GPU_CC_MEMNOC_GFX_CLK 25
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#define GPU_CC_RSCC_HUB_AON_CLK 26
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#define GPU_CC_RSCC_XO_AON_CLK 27
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#define GPU_CC_SLEEP_CLK 28
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#define GPU_CC_XO_CLK_SRC 29
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#define GPU_CC_XO_DIV_CLK_SRC 30
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/* GPU_CC resets */
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#define GPU_CC_CB_BCR 0
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#define GPU_CC_CX_BCR 1
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#define GPU_CC_FAST_HUB_BCR 2
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#define GPU_CC_FF_BCR 3
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#define GPU_CC_GMU_BCR 4
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#define GPU_CC_GX_BCR 5
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#define GPU_CC_RBCPR_BCR 6
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#define GPU_CC_XO_BCR 7
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/* GPU_CC power domains */
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#define GPU_CC_CX_GDSC 0
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#endif